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domenico
2025-06-24 15:51:28 +02:00
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target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt Normal file
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target/linux/ar71xx/files/arch/mips/ath79/Makefile Normal file
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#
# Makefile for the Atheros AR71XX/AR724X/AR913X specific parts of the kernel
#
# Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 as published
# by the Free Software Foundation.
obj-y := prom.o setup.o irq.o common.o clock.o gpio.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_PCI) += pci.o
#
# Devices
#
obj-y += dev-common.o
obj-$(CONFIG_ATH79_DEV_AP9X_PCI) += dev-ap9x-pci.o
obj-$(CONFIG_ATH79_DEV_DSA) += dev-dsa.o
obj-$(CONFIG_ATH79_DEV_ETH) += dev-eth.o
obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o
obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o
obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o
obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o
obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
#
# Miscellaneous objects
#
obj-$(CONFIG_ATH79_NVRAM) += nvram.o
obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += pci-ath9k-fixup.o
obj-$(CONFIG_ATH79_ROUTERBOOT) += routerboot.o
#
# Machines
#
obj-$(CONFIG_ATH79_MACH_A60) += mach-a60.o
obj-$(CONFIG_ATH79_MACH_WI2A_AC200I) += mach-wi2a-ac200i.o
obj-$(CONFIG_ATH79_MACH_ALFA_AP120C) += mach-alfa-ap120c.o
obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o
obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o
obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o
obj-$(CONFIG_ATH79_MACH_ALL0315N) += mach-all0315n.o
obj-$(CONFIG_ATH79_MACH_ANTMINER_S1) += mach-antminer-s1.o
obj-$(CONFIG_ATH79_MACH_ANTMINER_S3) += mach-antminer-s3.o
obj-$(CONFIG_ATH79_MACH_ANTROUTER_R1) += mach-antrouter-r1.o
obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
obj-$(CONFIG_ATH79_MACH_AP121F) += mach-ap121f.o
obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o
obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o
obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o
obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o
obj-$(CONFIG_ATH79_MACH_AP531B0) += mach-ap531b0.o
obj-$(CONFIG_ATH79_MACH_AP90Q) += mach-ap90q.o
obj-$(CONFIG_ATH79_MACH_AP91_5G) += mach-ap91-5g.o
obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C25_V1) += mach-archer-c25-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C58_V1) += mach-archer-c59-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C59_V1) += mach-archer-c59-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C60_V1) += mach-archer-c60-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C60_V2) += mach-archer-c60-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7-v4.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7-v5.o
obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o
obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o
obj-$(CONFIG_ATH79_MACH_BHR_4GRV2) += mach-bhr-4grv2.o
obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A) += mach-bhu-bxu2000n2-a.o
obj-$(CONFIG_ATH79_MACH_BSB) += mach-bsb.o
obj-$(CONFIG_ATH79_MACH_C55) += mach-c55.o
obj-$(CONFIG_ATH79_MACH_C60) += mach-c60.o
obj-$(CONFIG_ATH79_MACH_CAP324) += mach-cap324.o
obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
obj-$(CONFIG_ATH79_MACH_CARAMBOLA2) += mach-carambola2.o
obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E320N_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E355AC) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E375AC) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E380AC_V1) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E380AC_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E520N) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CF_E530N) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CPE505N) += mach-r602n.o
obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
obj-$(CONFIG_ATH79_MACH_CPE830) += mach-ap90q.o
obj-$(CONFIG_ATH79_MACH_CPE870) += mach-cpe870.o
obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
obj-$(CONFIG_ATH79_MACH_CR5000) += mach-cr5000.o
obj-$(CONFIG_ATH79_MACH_DAP_1330_A1) += mach-dap-1330-a1.o
obj-$(CONFIG_ATH79_MACH_DAP_2695_A1) += mach-dap-2695-a1.o
obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o
obj-$(CONFIG_ATH79_MACH_DHP_1565_A1) += mach-dhp-1565-a1.o
obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o
obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o
obj-$(CONFIG_ATH79_MACH_DIR_869_A1) += mach-dir-869-a1.o
obj-$(CONFIG_ATH79_MACH_DLAN_HOTSPOT) += mach-dlan-hotspot.o
obj-$(CONFIG_ATH79_MACH_DLAN_PRO_1200_AC) += mach-dlan-pro-1200-ac.o
obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o
obj-$(CONFIG_ATH79_MACH_DOMYWIFI_DW33D) += mach-domywifi-dw33d.o
obj-$(CONFIG_ATH79_MACH_DR342) += mach-dr344.o
obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o
obj-$(CONFIG_ATH79_MACH_DR531) += mach-dr531.o
obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o
obj-$(CONFIG_ATH79_MACH_E1700AC_V2) += mach-e1700ac-v2.o
obj-$(CONFIG_ATH79_MACH_E558_V2) += mach-e558-v2.o
obj-$(CONFIG_ATH79_MACH_E600G_V2) += mach-e600g-v2.o
obj-$(CONFIG_ATH79_MACH_E750A_V4) += mach-e750a-v4.o
obj-$(CONFIG_ATH79_MACH_E750G_V8) += mach-e750g-v8.o
obj-$(CONFIG_ATH79_MACH_EAP120) += mach-eap120.o
obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o
obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
obj-$(CONFIG_ATH79_MACH_EL_M150) += mach-el-m150.o
obj-$(CONFIG_ATH79_MACH_EL_MINI) += mach-el-mini.o
obj-$(CONFIG_ATH79_MACH_ENS202EXT) += mach-ens202ext.o
obj-$(CONFIG_ATH79_MACH_EPG5000) += mach-epg5000.o
obj-$(CONFIG_ATH79_MACH_ESR1750) += mach-esr1750.o
obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o
obj-$(CONFIG_ATH79_MACH_EW_BALIN) += mach-ew-balin.o
obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o
obj-$(CONFIG_ATH79_MACH_F9K1115V2) += mach-f9k1115v2.o
obj-$(CONFIG_ATH79_MACH_FRITZ300E) += mach-fritz300e.o
obj-$(CONFIG_ATH79_MACH_FRITZ4020) += mach-fritz4020.o
obj-$(CONFIG_ATH79_MACH_FRITZ450E) += mach-fritz450e.o
obj-$(CONFIG_ATH79_MACH_GL_AR150) += mach-gl-ar150.o
obj-$(CONFIG_ATH79_MACH_GL_AR300) += mach-gl-ar300.o
obj-$(CONFIG_ATH79_MACH_GL_AR300M) += mach-gl-ar300m.o
obj-$(CONFIG_ATH79_MACH_GL_AR750) += mach-gl-ar750.o
obj-$(CONFIG_ATH79_MACH_GL_DOMINO) += mach-gl-domino.o
obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o
obj-$(CONFIG_ATH79_MACH_GL_MIFI) += mach-gl-mifi.o
obj-$(CONFIG_ATH79_MACH_GL_USB150) += mach-gl-usb150.o
obj-$(CONFIG_ATH79_MACH_GS_OOLITE_V1) += mach-gs-oolite-v1.o
obj-$(CONFIG_ATH79_MACH_GS_OOLITE_V5_2) += mach-gs-oolite-v5-2.o
obj-$(CONFIG_ATH79_MACH_HIVEAP_121) += mach-hiveap-121.o
obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o
obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o
obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o
obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o
obj-$(CONFIG_ATH79_MACH_JWAP230) += mach-jwap230.o
obj-$(CONFIG_ATH79_MACH_KOALA) += mach-koala.o
obj-$(CONFIG_ATH79_MACH_LAN_TURTLE) += mach-lan-turtle.o
obj-$(CONFIG_ATH79_MACH_LIMA) += mach-lima.o
obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o
obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o
obj-$(CONFIG_ATH79_MACH_MR16) += mach-mr16.o
obj-$(CONFIG_ATH79_MACH_MR1750) += mach-mr1750.o
obj-$(CONFIG_ATH79_MACH_MR18) += mach-mr18.o
obj-$(CONFIG_ATH79_MACH_MR600) += mach-mr600.o
obj-$(CONFIG_ATH79_MACH_MR900) += mach-mr900.o
obj-$(CONFIG_ATH79_MACH_MYNET_N600) += mach-mynet-n600.o
obj-$(CONFIG_ATH79_MACH_MYNET_N750) += mach-mynet-n750.o
obj-$(CONFIG_ATH79_MACH_MYNET_REXT) += mach-mynet-rext.o
obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += mach-mzk-w04nu.o
obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o
obj-$(CONFIG_ATH79_MACH_N5Q) += mach-n5q.o
obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o
obj-$(CONFIG_ATH79_MACH_NBG6716) += mach-nbg6716.o
obj-$(CONFIG_ATH79_MACH_RAMBUTAN) += mach-rambutan.o
obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o
obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o
obj-$(CONFIG_ATH79_MACH_OM5P_AC) += mach-om5pac.o
obj-$(CONFIG_ATH79_MACH_OM5P_ACv2) += mach-om5pacv2.o
obj-$(CONFIG_ATH79_MACH_OMY_G1) += mach-omy-g1.o
obj-$(CONFIG_ATH79_MACH_OMY_X1) += mach-omy-x1.o
obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o
obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o
obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
obj-$(CONFIG_ATH79_MACH_PQI_AIR_PEN) += mach-pqi-air-pen.o
obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o
obj-$(CONFIG_ATH79_MACH_R36A) += mach-r36a.o
obj-$(CONFIG_ATH79_MACH_R602N) += mach-r602n.o
obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o
obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o
obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o
obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o
obj-$(CONFIG_ATH79_MACH_RB91X) += mach-rb91x.o
obj-$(CONFIG_ATH79_MACH_RB922) += mach-rb922.o
obj-$(CONFIG_ATH79_MACH_RB941) += mach-rb941.o
obj-$(CONFIG_ATH79_MACH_RB95X) += mach-rb95x.o
obj-$(CONFIG_ATH79_MACH_RBSPI) += mach-rbspi.o
obj-$(CONFIG_ATH79_MACH_RBSXTLITE) += mach-rbsxtlite.o
obj-$(CONFIG_ATH79_MACH_RE355) += mach-re450.o
obj-$(CONFIG_ATH79_MACH_RE450) += mach-re450.o
obj-$(CONFIG_ATH79_MACH_RME_EG200) += mach-rme-eg200.o
obj-$(CONFIG_ATH79_MACH_RUT9XX) += mach-rut9xx.o
obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o
obj-$(CONFIG_ATH79_MACH_SC1750) += mach-sc1750.o
obj-$(CONFIG_ATH79_MACH_SC300M) += mach-sc300m.o
obj-$(CONFIG_ATH79_MACH_SC450) += mach-sc450.o
obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o
obj-$(CONFIG_ATH79_MACH_SOM9331) += mach-som9331.o
obj-$(CONFIG_ATH79_MACH_SR3200) += mach-sr3200.o
obj-$(CONFIG_ATH79_MACH_T830) += mach-t830.o
obj-$(CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE) += mach-tellstick-znet-lite.o
obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o
obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o
obj-$(CONFIG_ATH79_MACH_TEW_712BR) += mach-tew-712br.o
obj-$(CONFIG_ATH79_MACH_TEW_732BR) += mach-tew-732br.o
obj-$(CONFIG_ATH79_MACH_TEW_823DRU) += mach-tew-823dru.o
obj-$(CONFIG_ATH79_MACH_TL_MR11U) += mach-tl-mr11u.o
obj-$(CONFIG_ATH79_MACH_TL_MR13U) += mach-tl-mr13u.o
obj-$(CONFIG_ATH79_MACH_TL_MR3020) += mach-tl-mr3020.o
obj-$(CONFIG_ATH79_MACH_TL_MR3X20) += mach-tl-mr3x20.o
obj-$(CONFIG_ATH79_MACH_TL_MR6400) += mach-tl-mr6400.o
obj-$(CONFIG_ATH79_MACH_TL_WA701ND_V2) += mach-tl-wa701nd-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WA7210N_V2) += mach-tl-wa7210n-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WA801ND_V3) += mach-tl-wa801nd-v3.o
obj-$(CONFIG_ATH79_MACH_TL_WA830RE_V2) += mach-tl-wa830re-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WA850RE_V2) += mach-tl-wax50re.o
obj-$(CONFIG_ATH79_MACH_TL_WA855RE_V1) += mach-tl-wax50re.o
obj-$(CONFIG_ATH79_MACH_TL_WA901ND) += mach-tl-wa901nd.o
obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V4) += mach-tl-wa901nd-v4.o
obj-$(CONFIG_ATH79_MACH_TL_WAX50RE) += mach-tl-wax50re.o
obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o
obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o
obj-$(CONFIG_ATH79_MACH_TL_WDR6500_V2) += mach-tl-wdr6500-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WPA8630) += mach-tl-wpa8630.o
obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2) += mach-tl-wr1041n-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o
obj-$(CONFIG_ATH79_MACH_TL_WR1043ND_V2) += mach-tl-wr1043nd-v2.o
obj-$(CONFIG_ATH79_MACH_TL_WR1043ND_V4) += mach-tl-wr1043nd-v4.o
obj-$(CONFIG_ATH79_MACH_TL_WR2543N) += mach-tl-wr2543n.o
obj-$(CONFIG_ATH79_MACH_TL_WR703N) += mach-tl-wr703n.o
obj-$(CONFIG_ATH79_MACH_TL_WR720N_V3) += mach-tl-wr720n-v3.o
obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += mach-tl-wr741nd.o
obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o
obj-$(CONFIG_ATH79_MACH_TL_WR802N_V1) += mach-tl-wr802n.o
obj-$(CONFIG_ATH79_MACH_TL_WR802N_V2) += mach-tl-wr802n.o
obj-$(CONFIG_ATH79_MACH_TL_WR810N) += mach-tl-wr810n.o
obj-$(CONFIG_ATH79_MACH_TL_WR810N_V2) += mach-tl-wr810n.o
obj-$(CONFIG_ATH79_MACH_TL_WR840N_V2) += mach-tl-wr841n-v9.o
obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o
obj-$(CONFIG_ATH79_MACH_TL_WR841N_V8) += mach-tl-wr841n-v8.o
obj-$(CONFIG_ATH79_MACH_TL_WR841N_V9) += mach-tl-wr841n-v9.o
obj-$(CONFIG_ATH79_MACH_TL_WR902AC_V1) += mach-tl-wr902ac-v1.o
obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o
obj-$(CONFIG_ATH79_MACH_TL_WR941ND_V6) += mach-tl-wr941nd-v6.o
obj-$(CONFIG_ATH79_MACH_TL_WR940N_V4) += mach-tl-wr940n-v4.o
obj-$(CONFIG_ATH79_MACH_TL_WR942N_V1) += mach-tl-wr942n-v1.o
obj-$(CONFIG_ATH79_MACH_TS_D084) += mach-ts-d084.o
obj-$(CONFIG_ATH79_MACH_TUBE2H) += mach-tube2h.o
obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o
obj-$(CONFIG_ATH79_MACH_UBNT_UNIFIAC) += mach-ubnt-unifiac.o
obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
obj-$(CONFIG_ATH79_MACH_WAM250) += mach-wam250.o
obj-$(CONFIG_ATH79_MACH_WEIO) += mach-weio.o
obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o
obj-$(CONFIG_ATH79_MACH_WIFI_PINEAPPLE_NANO) += mach-wifi-pineapple-nano.o
obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o
obj-$(CONFIG_ATH79_MACH_WLR8100) += mach-wlr8100.o
obj-$(CONFIG_ATH79_MACH_WNDAP360) += mach-wndap360.o
obj-$(CONFIG_ATH79_MACH_WNDR3700) += mach-wndr3700.o
obj-$(CONFIG_ATH79_MACH_WNDR4300) += mach-wndr4300.o
obj-$(CONFIG_ATH79_MACH_WNR2000) += mach-wnr2000.o
obj-$(CONFIG_ATH79_MACH_WNR2000_V3) += mach-wnr2000-v3.o
obj-$(CONFIG_ATH79_MACH_WNR2000_V4) += mach-wnr2000-v4.o
obj-$(CONFIG_ATH79_MACH_WNR2200) += mach-wnr2200.o
obj-$(CONFIG_ATH79_MACH_WP543) += mach-wp543.o
obj-$(CONFIG_ATH79_MACH_WPE72) += mach-wpe72.o
obj-$(CONFIG_ATH79_MACH_WPJ342) += mach-wpj342.o
obj-$(CONFIG_ATH79_MACH_WPJ344) += mach-wpj344.o
obj-$(CONFIG_ATH79_MACH_WPJ531) += mach-wpj531.o
obj-$(CONFIG_ATH79_MACH_WPJ558) += mach-wpj558.o
obj-$(CONFIG_ATH79_MACH_WPJ563) += mach-wpj563.o
obj-$(CONFIG_ATH79_MACH_WRT160NL) += mach-wrt160nl.o
obj-$(CONFIG_ATH79_MACH_WRT400N) += mach-wrt400n.o
obj-$(CONFIG_ATH79_MACH_WRTNODE2Q) += mach-wrtnode2q.o
obj-$(CONFIG_ATH79_MACH_WZR_450HP2) += mach-wzr-450hp2.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_G450H) += mach-wzr-hp-g450h.o
obj-$(CONFIG_ATH79_MACH_XD3200) += mach-sr3200.o
obj-$(CONFIG_ATH79_MACH_Z1) += mach-z1.o
obj-$(CONFIG_ATH79_MACH_ZBT_WE1526) += mach-zbt-we1526.o
obj-$(CONFIG_ATH79_MACH_ZCN_1523H) += mach-zcn-1523h.o

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target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c Normal file
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/*
* Atheros AP9X reference board PCI initialization
*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-ap9x-pci.h"
#include "pci-ath9k-fixup.h"
#include "pci.h"
static struct ath9k_platform_data ap9x_wmac0_data = {
.led_pin = -1,
};
static struct ath9k_platform_data ap9x_wmac1_data = {
.led_pin = -1,
};
static char ap9x_wmac0_mac[6];
static char ap9x_wmac1_mac[6];
__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.led_pin = pin;
break;
case 1:
ap9x_wmac1_data.led_pin = pin;
break;
}
}
__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac)
{
switch (wmac) {
case 0:
return &ap9x_wmac0_data;
case 1:
return &ap9x_wmac1_data;
}
return NULL;
}
__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.gpio_mask = mask;
ap9x_wmac0_data.gpio_val = val;
break;
case 1:
ap9x_wmac1_data.gpio_mask = mask;
ap9x_wmac1_data.gpio_val = val;
break;
}
}
__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds,
int num_leds)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.leds = leds;
ap9x_wmac0_data.num_leds = num_leds;
break;
case 1:
ap9x_wmac1_data.leds = leds;
ap9x_wmac1_data.num_leds = num_leds;
break;
}
}
__init void ap9x_pci_setup_wmac_btns(unsigned wmac,
struct gpio_keys_button *btns,
unsigned num_btns, unsigned poll_interval)
{
struct ath9k_platform_data *ap9x_wmac_data;
if (!(ap9x_wmac_data = ap9x_pci_get_wmac_data(wmac)))
return;
ap9x_wmac_data->btns = btns;
ap9x_wmac_data->num_btns = num_btns;
ap9x_wmac_data->btn_poll_interval = poll_interval;
}
static int ap91_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 0:
dev->dev.platform_data = &ap9x_wmac0_data;
break;
}
return 0;
}
__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr)
{
if (cal_data)
memcpy(ap9x_wmac0_data.eeprom_data, cal_data,
sizeof(ap9x_wmac0_data.eeprom_data));
if (mac_addr) {
memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac));
ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
}
ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init);
ath79_register_pci();
pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data);
}
__init void ap91_pci_init_simple(void)
{
ap91_pci_init(NULL, NULL);
ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom";
}
static int ap94_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &ap9x_wmac0_data;
break;
case 18:
dev->dev.platform_data = &ap9x_wmac1_data;
break;
}
return 0;
}
__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
if (cal_data0)
memcpy(ap9x_wmac0_data.eeprom_data, cal_data0,
sizeof(ap9x_wmac0_data.eeprom_data));
if (cal_data1)
memcpy(ap9x_wmac1_data.eeprom_data, cal_data1,
sizeof(ap9x_wmac1_data.eeprom_data));
if (mac_addr0) {
memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac));
ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
}
if (mac_addr1) {
memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac));
ap9x_wmac1_data.macaddr = ap9x_wmac1_mac;
}
ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init);
ath79_register_pci();
pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data);
pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data);
}

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/*
* Atheros AP9X reference board PCI initialization
*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_AP9X_PCI_H
#define _ATH79_DEV_AP9X_PCI_H
struct gpio_led;
struct gpio_keys_button;
struct ath9k_platform_data;
#if defined(CONFIG_ATH79_DEV_AP9X_PCI)
void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin);
void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val);
void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds,
int num_leds);
void ap9x_pci_setup_wmac_btns(unsigned wmac, struct gpio_keys_button *btns,
unsigned num_btns, unsigned poll_interval);
struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac);
void ap91_pci_init(u8 *cal_data, u8 *mac_addr);
void ap91_pci_init_simple(void);
void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1);
#else
static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {}
static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac,
u32 mask, u32 val) {}
static inline void ap9x_pci_setup_wmac_leds(unsigned wmac,
struct gpio_led *leds,
int num_leds) {}
static inline void ap9x_pci_setup_wmac_btns(unsigned wmac,
struct gpio_keys_button *btns,
unsigned num_btns,
unsigned poll_interval) {}
static inline struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac)
{
return NULL;
}
static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {}
static inline void ap91_pci_init_simple(void) {}
static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1) {}
#endif
#endif /* _ATH79_DEV_AP9X_PCI_H */

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/*
* Atheros AR71xx DSA switch device support
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-dsa.h"
static struct platform_device ar71xx_dsa_switch_device = {
.name = "dsa",
.id = 0,
};
void __init ath79_register_dsa(struct device *netdev,
struct device *miidev,
struct dsa_platform_data *d)
{
int i;
d->netdev = netdev;
for (i = 0; i < d->nr_chips; i++)
d->chip[i].host_dev = miidev;
ar71xx_dsa_switch_device.dev.platform_data = d;
platform_device_register(&ar71xx_dsa_switch_device);
}

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/*
* Atheros AR71xx DSA switch device support
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_DSA_H
#define _ATH79_DEV_DSA_H
#include <net/dsa.h>
void ath79_register_dsa(struct device *netdev,
struct device *miidev,
struct dsa_platform_data *d);
#endif /* _ATH79_DEV_DSA_H */

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55
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/*
* Atheros AR71xx SoC device definitions
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_ETH_H
#define _ATH79_DEV_ETH_H
#include <asm/mach-ath79/ag71xx_platform.h>
struct platform_device;
extern unsigned char ath79_mac_base[] __initdata;
void ath79_parse_ascii_mac(char *mac_str, u8 *mac);
void ath79_extract_mac_reverse(u8 *ptr, u8 *out);
void ath79_init_mac(unsigned char *dst, const unsigned char *src,
int offset);
void ath79_init_local_mac(unsigned char *dst, const unsigned char *src);
struct ath79_eth_pll_data {
u32 pll_10;
u32 pll_100;
u32 pll_1000;
};
extern struct ath79_eth_pll_data ath79_eth0_pll_data;
extern struct ath79_eth_pll_data ath79_eth1_pll_data;
extern struct ag71xx_platform_data ath79_eth0_data;
extern struct ag71xx_platform_data ath79_eth1_data;
extern struct platform_device ath79_eth0_device;
extern struct platform_device ath79_eth1_device;
void ath79_register_eth(unsigned int id);
extern struct ag71xx_switch_platform_data ath79_switch_data;
extern struct ag71xx_mdio_platform_data ath79_mdio0_data;
extern struct ag71xx_mdio_platform_data ath79_mdio1_data;
extern struct platform_device ath79_mdio0_device;
extern struct platform_device ath79_mdio1_device;
void ath79_register_mdio(unsigned int id, u32 phy_mask);
void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio);
void ath79_setup_ar934x_eth_cfg(u32 mask);
void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv);
void ath79_setup_qca955x_eth_cfg(u32 mask);
void ath79_setup_qca956x_eth_cfg(u32 mask);
#endif /* _ATH79_DEV_ETH_H */

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/*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/concat.h>
#include "dev-spi.h"
#include "dev-m25p80.h"
static struct spi_board_info ath79_spi_info[] = {
{
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 25000000,
.modalias = "m25p80",
},
{
.bus_num = 0,
.chip_select = 1,
.max_speed_hz = 25000000,
.modalias = "m25p80",
}
};
static struct ath79_spi_platform_data ath79_spi_data;
void __init ath79_register_m25p80(struct flash_platform_data *pdata)
{
ath79_spi_data.bus_num = 0;
ath79_spi_data.num_chipselect = 1;
ath79_spi_info[0].platform_data = pdata;
ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1);
}
static struct flash_platform_data *multi_pdata;
static struct mtd_info *concat_devs[2] = { NULL, NULL };
static struct work_struct mtd_concat_work;
static void mtd_concat_add_work(struct work_struct *work)
{
struct mtd_info *mtd;
mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash");
mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts);
}
static void mtd_concat_add(struct mtd_info *mtd)
{
static bool registered = false;
if (registered)
return;
if (!strcmp(mtd->name, "spi0.0"))
concat_devs[0] = mtd;
else if (!strcmp(mtd->name, "spi0.1"))
concat_devs[1] = mtd;
else
return;
if (!concat_devs[0] || !concat_devs[1])
return;
registered = true;
INIT_WORK(&mtd_concat_work, mtd_concat_add_work);
schedule_work(&mtd_concat_work);
}
static void mtd_concat_remove(struct mtd_info *mtd)
{
}
static void add_mtd_concat_notifier(void)
{
static struct mtd_notifier not = {
.add = mtd_concat_add,
.remove = mtd_concat_remove,
};
register_mtd_user(&not);
}
void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata)
{
multi_pdata = pdata;
add_mtd_concat_notifier();
ath79_spi_data.bus_num = 0;
ath79_spi_data.num_chipselect = 2;
ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2);
}

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/*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_M25P80_H
#define _ATH79_DEV_M25P80_H
#include <linux/spi/flash.h>
void ath79_register_m25p80(struct flash_platform_data *pdata) __init;
void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init;
#endif /* _ATH79_DEV_M25P80_H */

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/*
* Atheros AR934X SoCs built-in NAND flash controller support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/platform/ar934x_nfc.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-nfc.h"
static struct resource ath79_nfc_resources[2];
static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32);
static struct ar934x_nfc_platform_data ath79_nfc_data;
static struct platform_device ath79_nfc_device = {
.name = AR934X_NFC_DRIVER_NAME,
.id = -1,
.resource = ath79_nfc_resources,
.num_resources = ARRAY_SIZE(ath79_nfc_resources),
.dev = {
.dma_mask = &ar934x_nfc_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &ath79_nfc_data,
},
};
static void __init ath79_nfc_init_resource(struct resource res[2],
unsigned long base,
unsigned long size,
int irq)
{
memset(res, 0, sizeof(struct resource) * 2);
res[0].flags = IORESOURCE_MEM;
res[0].start = base;
res[0].end = base + size - 1;
res[1].flags = IORESOURCE_IRQ;
res[1].start = irq;
res[1].end = irq;
}
static void ar934x_nfc_hw_reset(bool active)
{
if (active) {
ath79_device_reset_set(AR934X_RESET_NANDF);
udelay(100);
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG);
udelay(250);
} else {
ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG);
udelay(250);
ath79_device_reset_clear(AR934X_RESET_NANDF);
udelay(100);
}
}
static void ar934x_nfc_setup(void)
{
ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
ath79_nfc_init_resource(ath79_nfc_resources,
AR934X_NFC_BASE, AR934X_NFC_SIZE,
ATH79_MISC_IRQ(21));
platform_device_register(&ath79_nfc_device);
}
static void qca955x_nfc_hw_reset(bool active)
{
if (active) {
ath79_device_reset_set(QCA955X_RESET_NANDF);
udelay(250);
} else {
ath79_device_reset_clear(QCA955X_RESET_NANDF);
udelay(100);
}
}
static void qca955x_nfc_setup(void)
{
ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset;
ath79_nfc_init_resource(ath79_nfc_resources,
QCA955X_NFC_BASE, QCA955X_NFC_SIZE,
ATH79_MISC_IRQ(21));
platform_device_register(&ath79_nfc_device);
}
void __init ath79_nfc_set_select_chip(void (*f)(int chip_no))
{
ath79_nfc_data.select_chip = f;
}
void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd))
{
ath79_nfc_data.scan_fixup = f;
}
void __init ath79_nfc_set_swap_dma(bool enable)
{
ath79_nfc_data.swap_dma = enable;
}
void __init ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode)
{
ath79_nfc_data.ecc_mode = mode;
}
void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts)
{
ath79_nfc_data.parts = parts;
ath79_nfc_data.nr_parts = nr_parts;
}
void __init ath79_register_nfc(void)
{
if (soc_is_ar934x())
ar934x_nfc_setup();
else if (soc_is_qca955x())
qca955x_nfc_setup();
else
BUG();
}

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/*
* Atheros AR934X SoCs built-in NAND Flash Controller support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_NFC_H
#define _ATH79_DEV_NFC_H
struct mtd_partition;
enum ar934x_nfc_ecc_mode;
#ifdef CONFIG_ATH79_DEV_NFC
void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts);
void ath79_nfc_set_select_chip(void (*f)(int chip_no));
void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd));
void ath79_nfc_set_swap_dma(bool enable);
void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode);
void ath79_register_nfc(void);
#else
static inline void ath79_nfc_set_parts(struct mtd_partition *parts,
int nr_parts) {}
static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {}
static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {}
static inline void ath79_nfc_set_swap_dma(bool enable) {}
static inline void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) {}
static inline void ath79_register_nfc(void) {}
#endif
#endif /* _ATH79_DEV_NFC_H */

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/*
* OpenMesh A60 support
*
* Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
* Copyright (C) 2014-2017 Sven Eckelmann <sven@open-mesh.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/platform_data/phy-at803x.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-gpio-buttons.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-usb.h"
#define A60_GPIO_LED_RED 22
#define A60_GPIO_LED_GREEN 23
#define A60_GPIO_LED_BLUE 13
#define A60_GPIO_BTN_RESET 17
#define A60_KEYS_POLL_INTERVAL 20 /* msecs */
#define A60_KEYS_DEBOUNCE_INTERVAL (3 * A60_KEYS_POLL_INTERVAL)
#define A60_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led a40_leds_gpio[] __initdata = {
{
.name = "a40:red:status",
.gpio = A60_GPIO_LED_RED,
}, {
.name = "a40:green:status",
.gpio = A60_GPIO_LED_GREEN,
}, {
.name = "a40:blue:status",
.gpio = A60_GPIO_LED_BLUE,
}
};
static struct gpio_led a60_leds_gpio[] __initdata = {
{
.name = "a60:red:status",
.gpio = A60_GPIO_LED_RED,
}, {
.name = "a60:green:status",
.gpio = A60_GPIO_LED_GREEN,
}, {
.name = "a60:blue:status",
.gpio = A60_GPIO_LED_BLUE,
}
};
static struct gpio_keys_button a60_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = A60_KEYS_DEBOUNCE_INTERVAL,
.gpio = A60_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct at803x_platform_data a60_at803x_data = {
.disable_smarteee = 1,
.enable_rgmii_rx_delay = 1,
.enable_rgmii_tx_delay = 1,
};
static struct mdio_board_info a60_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 1,
.platform_data = &a60_at803x_data,
},
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 2,
.platform_data = &a60_at803x_data,
},
};
static void __init a60_setup_qca955x_eth_cfg(u32 mask,
unsigned int rxd,
unsigned int rxdv,
unsigned int txd,
unsigned int txe)
{
void __iomem *base;
u32 t;
base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
t = mask;
t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
iounmap(base);
}
static void __init a60_setup_common(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
u8 mac[6];
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, A60_KEYS_POLL_INTERVAL,
ARRAY_SIZE(a60_gpio_keys),
a60_gpio_keys);
ath79_init_mac(mac, art, 0x02);
ath79_register_wmac(art + A60_WMAC_CALDATA_OFFSET, mac);
a60_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(a60_mdio0_info, ARRAY_SIZE(a60_mdio0_info));
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
/* GMAC0 is connected to the PHY1 */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_mask = BIT(1);
ath79_eth0_pll_data.pll_1000 = 0x82000101;
ath79_eth0_pll_data.pll_100 = 0x80000101;
ath79_eth0_pll_data.pll_10 = 0x80001313;
ath79_register_eth(0);
/* GMAC1 is connected to MDIO1 in SGMII mode */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth1_data.phy_mask = BIT(2);
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_eth1_pll_data.pll_100 = 0x80000101;
ath79_eth1_pll_data.pll_10 = 0x80001313;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
ath79_register_pci();
}
static void __init a40_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(a40_leds_gpio), a40_leds_gpio);
a60_setup_common();
}
MIPS_MACHINE(ATH79_MACH_A40, "A40", "OpenMesh A40", a40_setup);
static void __init a60_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(a60_leds_gpio), a60_leds_gpio);
a60_setup_common();
}
MIPS_MACHINE(ATH79_MACH_A60, "A60", "OpenMesh A60", a60_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap120c.c Normal file
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/*
* ALFA Network AP120C board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2016 Luka Perkov <luka@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/ar8216_platform.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-ap9x-pci.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define ALFA_AP120C_GPIO_LED 0
#define ALFA_AP120C_GPIO_BUTTON_WIFI 16
#define ALFA_AP120C_GPIO_WATCH_DOG 20
#define ALFA_AP120C_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALFA_AP120C_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP120C_KEYS_POLL_INTERVAL)
#define ALFA_AP120C_MAC_OFFSET 0x1002
#define ALFA_AP120C_CAL0_OFFSET 0x1000
static struct gpio_keys_button alfa_ap120c_gpio_keys[] __initdata = {
{
.desc = "Wireless button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = ALFA_AP120C_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALFA_AP120C_GPIO_BUTTON_WIFI,
.active_low = 1,
}
};
static struct gpio_led alfa_ap120c_leds_gpio[] __initdata = {
{
.name = "ap120c:red:wlan",
.gpio = ALFA_AP120C_GPIO_LED,
.active_low = 0,
}
};
static struct ar8327_pad_cfg ap120c_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data ap120c_ar8327_data = {
.pad0_cfg = &ap120c_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap120c_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &ap120c_ar8327_data,
},
};
static struct flash_platform_data flash __initdata = { NULL, NULL, 0 };
#define ALFA_AP120C_LAN_PHYMASK BIT(5)
#define ALFA_AP120C_MDIO_PHYMASK ALFA_AP120C_LAN_PHYMASK
static void __init alfa_ap120c_init(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac[ETH_ALEN];
struct ath9k_platform_data *pdata;
ath79_register_leds_gpio(-1, ARRAY_SIZE(alfa_ap120c_leds_gpio),
alfa_ap120c_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALFA_AP120C_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_ap120c_gpio_keys),
alfa_ap120c_gpio_keys);
ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
AR71XX_GPIO_FUNC_SPI_CS2_EN);
ath79_register_m25p80_multi(&flash);
ath79_init_mac(mac, art + ALFA_AP120C_MAC_OFFSET, 1);
ath79_register_wmac(art + ALFA_AP120C_CAL0_OFFSET, mac);
ath79_init_mac(mac, art + ALFA_AP120C_MAC_OFFSET, 2);
ap91_pci_init(NULL, mac);
pdata = ap9x_pci_get_wmac_data(0);
if (!pdata) {
pr_err("ap120c: unable to get address of wlan data\n");
return;
}
pdata->use_eeprom = true;
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
BIT(15) | BIT(17) | BIT(19) | BIT(21));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + ALFA_AP120C_MAC_OFFSET, 0);
mdiobus_register_board_info(ap120c_mdio0_info, ARRAY_SIZE(ap120c_mdio0_info));
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = ALFA_AP120C_LAN_PHYMASK;
ath79_eth0_pll_data.pll_1000 = 0x42000000;
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_ALFA_AP120C, "ALFA-AP120C", "ALFA Network AP120C",
alfa_ap120c_init);

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target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c Normal file
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/*
* ALFA Network AP96 board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mmc/host.h>
#include <linux/spi/spi.h>
#include <linux/spi/mmc_spi.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "machtypes.h"
#include "pci.h"
#define ALFA_AP96_GPIO_PCIE_RESET 2
#define ALFA_AP96_GPIO_SIM_DETECT 3
#define ALFA_AP96_GPIO_MICROSD_CD 4
#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5
#define ALFA_AP96_GPIO_BUTTON_RESET 11
#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL)
static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALFA_AP96_GPIO_BUTTON_RESET,
.active_low = 1,
}
};
static struct mmc_spi_platform_data alfa_ap96_mmc_data = {
.flags = MMC_SPI_USE_CD_GPIO,
.cd_gpio = ALFA_AP96_GPIO_MICROSD_CD,
.cd_debounce = 1,
.caps = MMC_CAP_NEEDS_POLL,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
};
static struct spi_board_info alfa_ap96_spi_info[] = {
{
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 25000000,
.modalias = "m25p80",
}, {
.bus_num = 0,
.chip_select = 1,
.max_speed_hz = 25000000,
.modalias = "mmc_spi",
.platform_data = &alfa_ap96_mmc_data,
}, {
.bus_num = 0,
.chip_select = 2,
.max_speed_hz = 6250000,
.modalias = "rtc-pcf2123",
},
};
static struct ath79_spi_platform_data alfa_ap96_spi_data = {
.bus_num = 0,
.num_chipselect = 3,
};
static void __init alfa_ap96_gpio_setup(void)
{
ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
AR71XX_GPIO_FUNC_SPI_CS2_EN);
gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD");
gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD);
gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset");
gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1);
gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable");
gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1);
}
#define ALFA_AP96_WAN_PHYMASK BIT(4)
#define ALFA_AP96_LAN_PHYMASK BIT(5)
#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK)
static void __init alfa_ap96_init(void)
{
alfa_ap96_gpio_setup();
ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK);
ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK;
ath79_eth1_pll_data.pll_1000 = 0x110000;
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK;
ath79_eth1_pll_data.pll_1000 = 0x110000;
ath79_register_eth(1);
ath79_register_pci();
ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info,
ARRAY_SIZE(alfa_ap96_spi_info));
ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_ap96_gpio_keys),
alfa_ap96_gpio_keys);
ath79_register_usb();
}
MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96",
alfa_ap96_init);

113
target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c Normal file
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/*
* ALFA Network N2/N5 board support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#define ALFA_NX_GPIO_LED_2 17
#define ALFA_NX_GPIO_LED_3 16
#define ALFA_NX_GPIO_LED_5 12
#define ALFA_NX_GPIO_LED_6 8
#define ALFA_NX_GPIO_LED_7 6
#define ALFA_NX_GPIO_LED_8 7
#define ALFA_NX_GPIO_BTN_RESET 11
#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL)
#define ALFA_NX_MAC0_OFFSET 0
#define ALFA_NX_MAC1_OFFSET 6
#define ALFA_NX_CALDATA_OFFSET 0x1000
static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALFA_NX_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct gpio_led alfa_nx_leds_gpio[] __initdata = {
{
.name = "alfa:green:led_2",
.gpio = ALFA_NX_GPIO_LED_2,
.active_low = 1,
}, {
.name = "alfa:green:led_3",
.gpio = ALFA_NX_GPIO_LED_3,
.active_low = 1,
}, {
.name = "alfa:red:led_5",
.gpio = ALFA_NX_GPIO_LED_5,
.active_low = 1,
}, {
.name = "alfa:amber:led_6",
.gpio = ALFA_NX_GPIO_LED_6,
.active_low = 1,
}, {
.name = "alfa:green:led_7",
.gpio = ALFA_NX_GPIO_LED_7,
.active_low = 1,
}, {
.name = "alfa:green:led_8",
.gpio = ALFA_NX_GPIO_LED_8,
.active_low = 1,
}
};
static void __init alfa_nx_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio),
alfa_nx_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_nx_gpio_keys),
alfa_nx_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + ALFA_NX_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + ALFA_NX_MAC1_OFFSET, 0);
/* WAN port */
ath79_register_eth(0);
/* LAN port */
ath79_register_eth(1);
ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5",
alfa_nx_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c Normal file
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/*
* Allnet ALL0258N support
*
* Copyright (C) 2011 Daniel Golle <dgolle@allnet.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
/* found via /sys/gpio/... try and error */
#define ALL0258N_GPIO_BTN_RESET 1
#define ALL0258N_GPIO_LED_RSSIHIGH 13
#define ALL0258N_GPIO_LED_RSSIMEDIUM 15
#define ALL0258N_GPIO_LED_RSSILOW 14
/* defaults taken from others machs */
#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL)
/* showed up in the original firmware's bootlog */
#define ALL0258N_SEC_PHYMASK BIT(3)
static struct gpio_led all0258n_leds_gpio[] __initdata = {
{
.name = "all0258n:green:rssihigh",
.gpio = ALL0258N_GPIO_LED_RSSIHIGH,
.active_low = 1,
}, {
.name = "all0258n:yellow:rssimedium",
.gpio = ALL0258N_GPIO_LED_RSSIMEDIUM,
.active_low = 1,
}, {
.name = "all0258n:red:rssilow",
.gpio = ALL0258N_GPIO_LED_RSSILOW,
.active_low = 1,
}
};
static struct gpio_keys_button all0258n_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALL0258N_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init all0258n_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000);
u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio),
all0258n_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL,
ARRAY_SIZE(all0258n_gpio_keys),
all0258n_gpio_keys);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK;
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ap91_pci_init(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N",
all0258n_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-all0315n.c Normal file
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/*
* Allnet ALL0315N support
*
* Copyright (C) 2012 Daniel Golle <dgolle@allnet.de>
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-m25p80.h"
#include "dev-leds-gpio.h"
#include "machtypes.h"
#include "pci.h"
#define ALL0315N_GPIO_BTN_RESET 0
#define ALL0315N_GPIO_LED_RSSIHIGH 14
#define ALL0315N_GPIO_LED_RSSIMEDIUM 15
#define ALL0315N_GPIO_LED_RSSILOW 16
#define ALL0315N_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALL0315N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0315N_KEYS_POLL_INTERVAL)
static struct gpio_led all0315n_leds_gpio[] __initdata = {
{
.name = "all0315n:green:rssihigh",
.gpio = ALL0315N_GPIO_LED_RSSIHIGH,
.active_low = 1,
}, {
.name = "all0315n:yellow:rssimedium",
.gpio = ALL0315N_GPIO_LED_RSSIMEDIUM,
.active_low = 1,
}, {
.name = "all0315n:red:rssilow",
.gpio = ALL0315N_GPIO_LED_RSSILOW,
.active_low = 1,
}
};
static struct gpio_keys_button all0315n_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ALL0315N_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALL0315N_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init all0315n_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffc0000);
u8 *ee = (u8 *) KSEG1ADDR(0x1ffc1000);
ath79_register_m25p80(NULL);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(all0315n_leds_gpio),
all0315n_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALL0315N_KEYS_POLL_INTERVAL,
ARRAY_SIZE(all0315n_gpio_keys),
all0315n_gpio_keys);
ap9x_pci_setup_wmac_led_pin(0, 1);
ap91_pci_init(ee, NULL);
}
MIPS_MACHINE(ATH79_MACH_ALL0315N, "ALL0315N", "Allnet ALL0315N",
all0315n_setup);

98
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/*
* Bitmain Antminer S1 board support
*
* Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "dev-usb.h"
#define ANTMINER_S1_GPIO_BTN_RESET 11
#define ANTMINER_S1_GPIO_LED_SYSTEM 23
#define ANTMINER_S1_GPIO_LED_WLAN 0
#define ANTMINER_S1_GPIO_USB_POWER 26
#define ANTMINER_S1_KEYSPOLL_INTERVAL 20 /* msecs */
#define ANTMINER_S1_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S1_KEYSPOLL_INTERVAL)
static const char *ANTMINER_S1_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data ANTMINER_S1_flash_data = {
.part_probes = ANTMINER_S1_part_probes,
};
static struct gpio_led ANTMINER_S1_leds_gpio[] __initdata = {
{
.name = "antminer-s1:green:system",
.gpio = ANTMINER_S1_GPIO_LED_SYSTEM,
.active_low = 0,
},{
.name = "antminer-s1:green:wlan",
.gpio = ANTMINER_S1_GPIO_LED_WLAN,
.active_low = 0,
},
};
static struct gpio_keys_button ANTMINER_S1_GPIO_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ANTMINER_S1_KEYSDEBOUNCE_INTERVAL,
.gpio = ANTMINER_S1_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init antminer_s1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio),
ANTMINER_S1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL,
ARRAY_SIZE(ANTMINER_S1_GPIO_keys),
ANTMINER_S1_GPIO_keys);
gpio_request_one(ANTMINER_S1_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&ANTMINER_S1_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_ANTMINER_S1, "ANTMINER-S1",
"Antminer-S1", antminer_s1_setup);

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/*
* Bitmain Antminer S3 board support
*
* Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "dev-usb.h"
#define ANTMINER_S3_GPIO_LED_WLAN 0
#define ANTMINER_S3_GPIO_LED_SYSTEM 17
#define ANTMINER_S3_GPIO_LED_LAN 22
#define ANTMINER_S3_GPIO_USB_POWER 26
#define ANTMINER_S3_GPIO_BTN_RESET 11
#define ANTMINER_S3_KEYSPOLL_INTERVAL 88 /* msecs */
#define ANTMINER_S3_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S3_KEYSPOLL_INTERVAL)
static const char *ANTMINER_S3_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data ANTMINER_S3_flash_data = {
.part_probes = ANTMINER_S3_part_probes,
};
static struct gpio_led ANTMINER_S3_leds_gpio[] __initdata = {
{
.name = "antminer-s3:green:wlan",
.gpio = ANTMINER_S3_GPIO_LED_WLAN,
.active_low = 0,
},{
.name = "antminer-s3:green:system",
.gpio = ANTMINER_S3_GPIO_LED_SYSTEM,
.active_low = 0,
},{
.name = "antminer-s3:yellow:lan",
.gpio = ANTMINER_S3_GPIO_LED_LAN,
.active_low = 0,
},
};
static struct gpio_keys_button ANTMINER_S3_GPIO_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ANTMINER_S3_KEYSDEBOUNCE_INTERVAL,
.gpio = ANTMINER_S3_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init antminer_s3_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S3_leds_gpio),
ANTMINER_S3_leds_gpio);
ath79_register_gpio_keys_polled(-1, ANTMINER_S3_KEYSPOLL_INTERVAL,
ARRAY_SIZE(ANTMINER_S3_GPIO_keys),
ANTMINER_S3_GPIO_keys);
gpio_request_one(ANTMINER_S3_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&ANTMINER_S3_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_ANTMINER_S3, "ANTMINER-S3",
"Antminer-S3", antminer_s3_setup);

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/*
* Bitmain Antrouter R1 board support
*
* Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "dev-usb.h"
#define ANTROUTER_R1_GPIO_BTN_RESET 11
#define ANTROUTER_R1_GPIO_LED_WLAN 0
#define ANTROUTER_R1_GPIO_LED_BTC 22
#define ANTROUTER_R1_GPIO_USB_POWER 18
#define ANTROUTER_R1_KEYSPOLL_INTERVAL 44 /* msecs */
#define ANTROUTER_R1_KEYSDEBOUNCE_INTERVAL (4 * ANTROUTER_R1_KEYSPOLL_INTERVAL)
static const char *ANTROUTER_R1_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data ANTROUTER_R1_flash_data = {
.part_probes = ANTROUTER_R1_part_probes,
};
static struct gpio_led ANTROUTER_R1_leds_gpio[] __initdata = {
{
.name = "antrouter-r1:green:wlan",
.gpio = ANTROUTER_R1_GPIO_LED_WLAN,
.active_low = 0,
},{
.name = "antrouter-r1:green:system",
.gpio = ANTROUTER_R1_GPIO_LED_BTC,
.active_low = 0,
},
};
static struct gpio_keys_button ANTROUTER_R1_GPIO_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ANTROUTER_R1_KEYSDEBOUNCE_INTERVAL,
.gpio = ANTROUTER_R1_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init antrouter_r1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTROUTER_R1_leds_gpio),
ANTROUTER_R1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ANTROUTER_R1_KEYSPOLL_INTERVAL,
ARRAY_SIZE(ANTROUTER_R1_GPIO_keys),
ANTROUTER_R1_GPIO_keys);
gpio_request_one(ANTROUTER_R1_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&ANTROUTER_R1_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_ANTROUTER_R1, "ANTROUTER-R1",
"Antrouter-R1", antrouter_r1_setup);

103
target/linux/ar71xx/files/arch/mips/ath79/mach-ap121f.c Normal file
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/*
* ALFA Network AP121F board support
*
* Copyright (C) 2017 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define AP121F_GPIO_LED_LAN 17
#define AP121F_GPIO_LED_VPN 27
#define AP121F_GPIO_LED_WLAN 0
#define AP121F_GPIO_MICROSD_EN 26
#define AP121F_GPIO_BTN_RESET 12
#define AP121F_GPIO_BTN_SWITCH 21
#define AP121F_KEYS_POLL_INTERVAL 20
#define AP121F_KEYS_DEBOUNCE_INTERVAL (3 * AP121F_KEYS_POLL_INTERVAL)
#define AP121F_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap121f_leds_gpio[] __initdata = {
{
.name = "ap121f:green:lan",
.gpio = AP121F_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "ap121f:green:vpn",
.gpio = AP121F_GPIO_LED_VPN,
.active_low = 1,
}, {
.name = "ap121f:green:wlan",
.gpio = AP121F_GPIO_LED_WLAN,
.active_low = 0,
},
};
static struct gpio_keys_button ap121f_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP121F_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP121F_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "switch",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = AP121F_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP121F_GPIO_BTN_SWITCH,
.active_low = 0,
},
};
static void __init ap121f_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f040000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
/* LAN */
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121f_leds_gpio),
ap121f_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP121F_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap121f_gpio_keys),
ap121f_gpio_keys);
gpio_request_one(AP121F_GPIO_MICROSD_EN,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"microSD enable");
ath79_register_wmac(art + AP121F_WMAC_CALDATA_OFFSET, NULL);
ath79_register_usb();
}
MIPS_MACHINE(ATH79_MACH_AP121F, "AP121F", "ALFA Network AP121F", ap121f_setup);

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/*
* Atheros AP132 reference board support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2013 Embedded Wireless GmbH <info@embeddedwireless.de>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define AP132_GPIO_LED_USB 4
#define AP132_GPIO_LED_WLAN_5G 12
#define AP132_GPIO_LED_WLAN_2G 13
#define AP132_GPIO_LED_STATUS_RED 14
#define AP132_GPIO_LED_WPS_RED 15
#define AP132_GPIO_BTN_WPS 16
#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL)
#define AP132_MAC0_OFFSET 0
#define AP132_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap132_leds_gpio[] __initdata = {
{
.name = "ap132:red:status",
.gpio = AP132_GPIO_LED_STATUS_RED,
.active_low = 1,
},
{
.name = "ap132:red:wps",
.gpio = AP132_GPIO_LED_WPS_RED,
.active_low = 1,
},
{
.name = "ap132:red:wlan-2g",
.gpio = AP132_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "ap132:red:usb",
.gpio = AP132_GPIO_LED_USB,
.active_low = 1,
}
};
static struct gpio_keys_button ap132_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP132_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg;
static struct ar8327_platform_data ap132_ar8327_data = {
.pad0_cfg = &ap132_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap132_mdio1_info[] = {
{
.bus_id = "ag71xx-mdio.1",
.phy_addr = 0,
.platform_data = &ap132_ar8327_data,
},
};
static void __init ap132_mdio_setup(void)
{
void __iomem *base;
u32 t;
#define GPIO_IN_ENABLE3_ADDRESS 0x0050
#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000
#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16
#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK)
#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK)
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK)
base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS);
t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK;
t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19);
__raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE);
t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS);
t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK);
t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21);
__raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS);
iounmap(base);
}
static void __init ap132_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio),
ap132_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap132_gpio_keys),
ap132_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL);
/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII;
ap132_ar8327_pad0_cfg.sgmii_delay_en = true;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ap132_mdio_setup();
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0);
mdiobus_register_board_info(ap132_mdio1_info,
ARRAY_SIZE(ap132_mdio1_info));
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_mask = BIT(0);
ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_AP132, "AP132",
"Atheros AP132 reference board",
ap132_setup);

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/*
* Atheros AP143 reference board support
*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define AP143_GPIO_LED_WLAN 12
#define AP143_GPIO_LED_WPS 13
#define AP143_GPIO_LED_STATUS 13
#define AP143_GPIO_LED_WAN 4
#define AP143_GPIO_LED_LAN1 16
#define AP143_GPIO_LED_LAN2 15
#define AP143_GPIO_LED_LAN3 14
#define AP143_GPIO_LED_LAN4 11
#define AP143_GPIO_BTN_WPS 17
#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL)
#define AP143_MAC0_OFFSET 0
#define AP143_MAC1_OFFSET 6
#define AP143_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap143_leds_gpio[] __initdata = {
{
.name = "ap143:green:status",
.gpio = AP143_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "ap143:green:wlan",
.gpio = AP143_GPIO_LED_WLAN,
.active_low = 1,
}
};
static struct gpio_keys_button ap143_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP143_GPIO_BTN_WPS,
.active_low = 1,
},
};
static void __init ap143_gpio_led_setup(void)
{
ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true);
ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true);
ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true);
ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true);
ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true);
ath79_gpio_output_select(AP143_GPIO_LED_WAN,
QCA953X_GPIO_OUT_MUX_LED_LINK5);
ath79_gpio_output_select(AP143_GPIO_LED_LAN1,
QCA953X_GPIO_OUT_MUX_LED_LINK1);
ath79_gpio_output_select(AP143_GPIO_LED_LAN2,
QCA953X_GPIO_OUT_MUX_LED_LINK2);
ath79_gpio_output_select(AP143_GPIO_LED_LAN3,
QCA953X_GPIO_OUT_MUX_LED_LINK3);
ath79_gpio_output_select(AP143_GPIO_LED_LAN4,
QCA953X_GPIO_OUT_MUX_LED_LINK4);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio),
ap143_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap143_gpio_keys),
ap143_gpio_keys);
}
static void __init ap143_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ap143_gpio_led_setup();
ath79_register_usb();
ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN);
ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board",
ap143_setup);

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/*
* Atheros AP147 reference board support
*
* Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
* Copyright (C) 2015 Sven Eckelmann <sven@open-mesh.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define AP147_GPIO_LED_WAN 4
#define AP147_GPIO_LED_LAN1 16
#define AP147_GPIO_LED_LAN2 15
#define AP147_GPIO_LED_LAN3 14
#define AP147_GPIO_LED_LAN4 11
#define AP147_GPIO_LED_STATUS 13
#define AP147_GPIO_LED_WLAN_2G 12
#define AP147_GPIO_BTN_WPS 17
#define AP147_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP147_KEYS_DEBOUNCE_INTERVAL (3 * AP147_KEYS_POLL_INTERVAL)
#define AP147_MAC0_OFFSET 0x1000
static struct gpio_led ap147_leds_gpio[] __initdata = {
{
.name = "ap147:green:status",
.gpio = AP147_GPIO_LED_STATUS,
.active_low = 1,
}, {
.name = "ap147:green:wlan-2g",
.gpio = AP147_GPIO_LED_WLAN_2G,
.active_low = 1,
}, {
.name = "ap147:green:lan1",
.gpio = AP147_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "ap147:green:lan2",
.gpio = AP147_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "ap147:green:lan3",
.gpio = AP147_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "ap147:green:lan4",
.gpio = AP147_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "ap147:green:wan",
.gpio = AP147_GPIO_LED_WAN,
.active_low = 1,
},
};
static struct gpio_keys_button ap147_gpio_keys[] __initdata = {
{
.desc = "wps button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP147_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP147_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init ap147_setup(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap147_leds_gpio),
ap147_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP147_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap147_gpio_keys),
ap147_gpio_keys);
ath79_register_usb();
ath79_register_pci();
ath79_register_wmac(art + AP147_MAC0_OFFSET, NULL);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
/* LAN */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_init_mac(ath79_eth1_data.mac_addr, art, 0);
ath79_register_eth(1);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, art, 1);
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_AP147_010, "AP147-010", "Atheros AP147-010 reference board", ap147_setup);

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/*
* Qualcomm Atheros AP152 reference board support
*
* Copyright (c) 2015 Qualcomm Atheros
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define AP152_GPIO_LED_USB0 7
#define AP152_GPIO_LED_USB1 8
#define AP152_GPIO_BTN_RESET 2
#define AP152_GPIO_BTN_WPS 1
#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL)
#define AP152_MAC0_OFFSET 0
#define AP152_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap152_leds_gpio[] __initdata = {
{
.name = "ap152:green:usb0",
.gpio = AP152_GPIO_LED_USB0,
.active_low = 1,
},
{
.name = "ap152:green:usb1",
.gpio = AP152_GPIO_LED_USB1,
.active_low = 1,
},
};
static struct gpio_keys_button ap152_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data ap152_ar8337_data = {
.pad0_cfg = &ap152_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap152_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &ap152_ar8337_data,
},
};
static void __init ap152_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio),
ap152_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap152_gpio_keys),
ap152_gpio_keys);
ath79_register_usb();
platform_device_register(&ath79_mdio0_device);
mdiobus_register_board_info(ap152_mdio0_info,
ARRAY_SIZE(ap152_mdio0_info));
ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0);
/* GMAC0 is connected to an AR8337 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board",
ap152_setup);

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/*
* Rockeetech AP531B0 11ng wireless AP board support
*
* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2016 Shuanglin Liu <roboidler@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#define AP531B0_GPIO_LED_WLAN 12
#define AP531B0_GPIO_LED_STATUS 11
#define AP531B0_GPIO_RST_BTN 17
#define AP531B0_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP531B0_KEYS_DEBOUNCE_INTERVAL (3 * AP531B0_KEYS_POLL_INTERVAL)
#define AP531B0_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap531b0_leds_gpio[] __initdata = {
{
.name = "ap531b0:green:status",
.gpio = AP531B0_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "ap531b0:green:wlan",
.gpio = AP531B0_GPIO_LED_WLAN,
.active_low = 1,
}
};
static struct gpio_keys_button ap531b0_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP531B0_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP531B0_GPIO_RST_BTN,
.active_low = 1,
},
};
static void __init ap531b0_gpio_led_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap531b0_leds_gpio),
ap531b0_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP531B0_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap531b0_gpio_keys),
ap531b0_gpio_keys);
}
static void __init ap531b0_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *pmac;
ath79_register_m25p80(NULL);
ap531b0_gpio_led_setup();
ath79_register_usb();
ath79_register_pci();
ath79_register_mdio(0, 0x0);
pmac = art + AP531B0_WMAC_CALDATA_OFFSET + 2;
ath79_init_mac(ath79_eth0_data.mac_addr, pmac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, pmac, 2);
ath79_register_wmac(art + AP531B0_WMAC_CALDATA_OFFSET, pmac);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_AP531B0, "AP531B0", "Rockeetech AP531B0",
ap531b0_setup);

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/*
* Support for YunCore boards:
* - AP80Q/AP90Q
* - CPE830
*
* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
/* AP90Q */
#define AP90Q_GPIO_LED_WAN 4
#define AP90Q_GPIO_LED_WLAN 12
#define AP90Q_GPIO_LED_LAN 16
#define AP90Q_GPIO_BTN_RESET 17
#define AP90Q_KEYS_POLL_INTERVAL 20
#define AP90Q_KEYS_DEBOUNCE_INTERVAL (3 * AP90Q_KEYS_POLL_INTERVAL)
static struct gpio_led ap90q_leds_gpio[] __initdata = {
{
.name = "ap90q:green:lan",
.gpio = AP90Q_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "ap90q:green:wan",
.gpio = AP90Q_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "ap90q:green:wlan",
.gpio = AP90Q_GPIO_LED_WLAN,
.active_low = 1,
},
};
static struct gpio_keys_button ap90q_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP90Q_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP90Q_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* CPE830 */
#define CPE830_GPIO_LED_LINK4 0
#define CPE830_GPIO_LED_LINK1 1
#define CPE830_GPIO_LED_LINK2 2
#define CPE830_GPIO_LED_LINK3 3
#define CPE830_GPIO_LED_WAN 4
#define CPE830_GPIO_LED_WLAN 12
#define CPE830_GPIO_LED_LAN 16
#define CPE830_GPIO_BTN_RESET 17
static struct gpio_led cpe830_leds_gpio[] __initdata = {
{
.name = "cpe830:green:lan",
.gpio = CPE830_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "cpe830:green:wan",
.gpio = CPE830_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "cpe830:green:wlan",
.gpio = CPE830_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "cpe830:green:link1",
.gpio = CPE830_GPIO_LED_LINK1,
.active_low = 1,
},
{
.name = "cpe830:green:link2",
.gpio = CPE830_GPIO_LED_LINK2,
.active_low = 1,
},
{
.name = "cpe830:green:link3",
.gpio = CPE830_GPIO_LED_LINK3,
.active_low = 1,
},
{
.name = "cpe830:green:link4",
.gpio = CPE830_GPIO_LED_LINK4,
.active_low = 1,
},
};
static void __init ap90q_cpe830_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
/* LAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_eth(1);
/* WAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_wmac(art, NULL);
/* For LED on GPIO4 */
ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_gpio_direction_select(AP90Q_GPIO_LED_LAN, true);
ath79_gpio_direction_select(AP90Q_GPIO_LED_WAN, true);
ath79_gpio_direction_select(AP90Q_GPIO_LED_WLAN, true);
/* Mute LEDs on boot */
gpio_set_value(AP90Q_GPIO_LED_LAN, 1);
gpio_set_value(AP90Q_GPIO_LED_WAN, 1);
ath79_gpio_output_select(AP90Q_GPIO_LED_LAN, 0);
ath79_gpio_output_select(AP90Q_GPIO_LED_WAN, 0);
ath79_gpio_output_select(AP90Q_GPIO_LED_WLAN, 0);
ath79_register_gpio_keys_polled(-1, AP90Q_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap90q_gpio_keys),
ap90q_gpio_keys);
}
static void __init ap90q_setup(void)
{
ap90q_cpe830_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap90q_leds_gpio),
ap90q_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_AP90Q, "AP90Q", "YunCore AP80Q/AP90Q", ap90q_setup);
static void __init cpe830_setup(void)
{
ap90q_cpe830_common_setup();
ath79_gpio_direction_select(CPE830_GPIO_LED_LINK1, true);
ath79_gpio_direction_select(CPE830_GPIO_LED_LINK2, true);
ath79_gpio_direction_select(CPE830_GPIO_LED_LINK3, true);
ath79_gpio_direction_select(CPE830_GPIO_LED_LINK4, true);
/* Mute LEDs on boot */
gpio_set_value(CPE830_GPIO_LED_LINK1, 1);
gpio_set_value(CPE830_GPIO_LED_LINK2, 1);
gpio_set_value(CPE830_GPIO_LED_LINK3, 1);
gpio_set_value(CPE830_GPIO_LED_LINK4, 1);
ath79_gpio_output_select(CPE830_GPIO_LED_LINK1, 0);
ath79_gpio_output_select(CPE830_GPIO_LED_LINK2, 0);
ath79_gpio_output_select(CPE830_GPIO_LED_LINK3, 0);
ath79_gpio_output_select(CPE830_GPIO_LED_LINK4, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe830_leds_gpio),
cpe830_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CPE830, "CPE830", "YunCore CPE830", cpe830_setup);

118
target/linux/ar71xx/files/arch/mips/ath79/mach-ap91-5g.c Normal file
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/*
* ALFA Network AP91-5G board support
*
* Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#define AP91_5G_GPIO_LED_LAN 17
#define AP91_5G_GPIO_LED_SIGNAL1 12
#define AP91_5G_GPIO_LED_SIGNAL2 8
#define AP91_5G_GPIO_LED_SIGNAL3 6
#define AP91_5G_GPIO_LED_SIGNAL4 7
#define AP91_5G_GPIO_WDT_EN 1
#define AP91_5G_GPIO_WDT_IN 0
#define AP91_5G_GPIO_BTN_RESET 11
#define AP91_5G_KEYS_POLL_INTERVAL 20
#define AP91_5G_KEYS_DEBOUNCE_INTERVAL (3 * AP91_5G_KEYS_POLL_INTERVAL)
#define AP91_5G_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap91_5g_leds_gpio[] __initdata = {
{
.name = "ap91-5g:green:lan",
.gpio = AP91_5G_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "ap91-5g:red:signal1",
.gpio = AP91_5G_GPIO_LED_SIGNAL1,
.active_low = 1,
}, {
.name = "ap91-5g:orange:signal2",
.gpio = AP91_5G_GPIO_LED_SIGNAL2,
.active_low = 1,
}, {
.name = "ap91-5g:green:signal3",
.gpio = AP91_5G_GPIO_LED_SIGNAL3,
.active_low = 1,
}, {
.name = "ap91-5g:green:signal4",
.gpio = AP91_5G_GPIO_LED_SIGNAL4,
.active_low = 1,
},
};
static struct gpio_keys_button ap91_5g_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP91_5G_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP91_5G_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init ap91_5g_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
gpio_set_value(AP91_5G_GPIO_LED_LAN, 1);
gpio_set_value(AP91_5G_GPIO_LED_SIGNAL3, 1);
gpio_set_value(AP91_5G_GPIO_LED_SIGNAL4, 1);
ath79_register_m25p80(NULL);
ath79_register_mdio(0, 0x0);
/* LAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.speed = SPEED_100;
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap91_5g_leds_gpio),
ap91_5g_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP91_5G_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap91_5g_gpio_keys),
ap91_5g_gpio_keys);
gpio_request_one(AP91_5G_GPIO_WDT_IN,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"WDT input");
gpio_request_one(AP91_5G_GPIO_WDT_EN,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"WDT enable");
ap91_pci_init(art + AP91_5G_WMAC_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_AP91_5G, "AP91-5G", "ALFA Network AP91-5G",
ap91_5g_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c Normal file
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/*
* Atheros AP96 board support
*
* Copyright (C) 2009 Marco Porsch
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2010 Atheros Communications
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "machtypes.h"
#define AP96_GPIO_LED_12_GREEN 0
#define AP96_GPIO_LED_3_GREEN 1
#define AP96_GPIO_LED_2_GREEN 2
#define AP96_GPIO_LED_WPS_GREEN 4
#define AP96_GPIO_LED_5_GREEN 5
#define AP96_GPIO_LED_4_ORANGE 6
/* Reset button - next to the power connector */
#define AP96_GPIO_BTN_RESET 3
/* WPS button - next to a led on right */
#define AP96_GPIO_BTN_WPS 8
#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL)
#define AP96_WMAC0_MAC_OFFSET 0x120c
#define AP96_WMAC1_MAC_OFFSET 0x520c
#define AP96_CALDATA0_OFFSET 0x1000
#define AP96_CALDATA1_OFFSET 0x5000
/*
* AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
* below (from left to right on the board). Led 1 seems to be on whenever the
* board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
* others are green.
*
* In addition, there is one led next to a button on the right side for WPS.
*/
static struct gpio_led ap96_leds_gpio[] __initdata = {
{
.name = "ap96:green:led2",
.gpio = AP96_GPIO_LED_2_GREEN,
.active_low = 1,
}, {
.name = "ap96:green:led3",
.gpio = AP96_GPIO_LED_3_GREEN,
.active_low = 1,
}, {
.name = "ap96:orange:led4",
.gpio = AP96_GPIO_LED_4_ORANGE,
.active_low = 1,
}, {
.name = "ap96:green:led5",
.gpio = AP96_GPIO_LED_5_GREEN,
.active_low = 1,
}, {
.name = "ap96:green:led12",
.gpio = AP96_GPIO_LED_12_GREEN,
.active_low = 1,
}, { /* next to a button on right */
.name = "ap96:green:wps",
.gpio = AP96_GPIO_LED_WPS_GREEN,
.active_low = 1,
}
};
static struct gpio_keys_button ap96_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP96_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP96_GPIO_BTN_WPS,
.active_low = 1,
}
};
#define AP96_WAN_PHYMASK 0x10
#define AP96_LAN_PHYMASK 0x0f
static void __init ap96_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, art, 1);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK;
ath79_eth1_pll_data.pll_1000 = 0x1f000000;
ath79_register_eth(1);
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
ap96_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap96_gpio_keys),
ap96_gpio_keys);
ap94_pci_init(art + AP96_CALDATA0_OFFSET,
art + AP96_WMAC0_MAC_OFFSET,
art + AP96_CALDATA1_OFFSET,
art + AP96_WMAC1_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);

227
target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c Normal file
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/*
* TP-Link Archer C25 v1 board support
*
* Copyright (C) 2017 Ludwig Thomeczek <ledesrc@wxorx.net>
* based on mach-archer-c60/C59-v1.c
* Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/gpio.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#define ARCHER_C25_GPIO_SHIFT_OE 21 /* OE, Output Enable */
#define ARCHER_C25_GPIO_SHIFT_SER 14 /* DS, Data Serial Input */
#define ARCHER_C25_GPIO_SHIFT_SRCLK 15 /* SHCP, Shift Reg Clock Input */
#define ARCHER_C25_GPIO_SHIFT_SRCLR 19 /* MR, Master Reset */
#define ARCHER_C25_GPIO_SHIFT_RCLK 16 /* STCP, Storage Reg Clock Input */
#define ARCHER_C25_74HC_GPIO_BASE 32
#define ARCHER_C25_74HC_GPIO_LED_WAN_AMBER (ARCHER_C25_74HC_GPIO_BASE + 4)
#define ARCHER_C25_74HC_GPIO_LED_WAN_GREEN (ARCHER_C25_74HC_GPIO_BASE + 5)
#define ARCHER_C25_74HC_GPIO_LED_WLAN2 (ARCHER_C25_74HC_GPIO_BASE + 6)
#define ARCHER_C25_74HC_GPIO_LED_WLAN5 (ARCHER_C25_74HC_GPIO_BASE + 7)
#define ARCHER_C25_74HC_GPIO_LED_LAN1 (ARCHER_C25_74HC_GPIO_BASE + 0)
#define ARCHER_C25_74HC_GPIO_LED_LAN2 (ARCHER_C25_74HC_GPIO_BASE + 1)
#define ARCHER_C25_74HC_GPIO_LED_LAN3 (ARCHER_C25_74HC_GPIO_BASE + 2)
#define ARCHER_C25_74HC_GPIO_LED_LAN4 (ARCHER_C25_74HC_GPIO_BASE + 3)
#define ARCHER_C25_V1_SSR_BIT_0 0
#define ARCHER_C25_V1_SSR_BIT_1 1
#define ARCHER_C25_V1_SSR_BIT_2 2
#define ARCHER_C25_V1_SSR_BIT_3 3
#define ARCHER_C25_V1_SSR_BIT_4 4
#define ARCHER_C25_V1_SSR_BIT_5 5
#define ARCHER_C25_V1_SSR_BIT_6 6
#define ARCHER_C25_V1_SSR_BIT_7 7
#define ARCHER_C25_V1_KEYS_POLL_INTERVAL 20
#define ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL \
(3 * ARCHER_C25_V1_KEYS_POLL_INTERVAL)
#define ARCHER_C25_V1_GPIO_BTN_RESET 1
#define ARCHER_C25_V1_GPIO_BTN_RFKILL 22
#define ARCHER_C25_V1_GPIO_LED_POWER 17
#define ARCHER_C25_V1_GPIO_LED_WPS 2
#define ARCHER_C25_V1_WMAC_CALDATA_OFFSET 0x1000
static struct spi_gpio_platform_data archer_c25_v1_spi_data = {
.sck = ARCHER_C25_GPIO_SHIFT_SRCLK,
.miso = SPI_GPIO_NO_MISO,
.mosi = ARCHER_C25_GPIO_SHIFT_SER,
.num_chipselect = 1,
};
static u8 archer_c25_v1_ssr_initdata[] = {
BIT(ARCHER_C25_V1_SSR_BIT_7) |
BIT(ARCHER_C25_V1_SSR_BIT_6) |
BIT(ARCHER_C25_V1_SSR_BIT_5) |
BIT(ARCHER_C25_V1_SSR_BIT_4) |
BIT(ARCHER_C25_V1_SSR_BIT_3) |
BIT(ARCHER_C25_V1_SSR_BIT_2) |
BIT(ARCHER_C25_V1_SSR_BIT_1)
};
static struct gen_74x164_chip_platform_data archer_c25_v1_ssr_data = {
.base = ARCHER_C25_74HC_GPIO_BASE,
.num_registers = ARRAY_SIZE(archer_c25_v1_ssr_initdata),
.init_data = archer_c25_v1_ssr_initdata,
};
static struct platform_device archer_c25_v1_spi_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &archer_c25_v1_spi_data,
},
};
static struct spi_board_info archer_c25_v1_spi_info[] = {
{
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 10000000,
.modalias = "74x164",
.platform_data = &archer_c25_v1_ssr_data,
.controller_data = (void *) ARCHER_C25_GPIO_SHIFT_RCLK,
},
};
static struct gpio_led archer_c25_v1_leds_gpio[] __initdata = {
{
.name = "archer-c25-v1:green:power",
.gpio = ARCHER_C25_V1_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:wps",
.gpio = ARCHER_C25_V1_GPIO_LED_WPS,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:wlan2g",
.gpio = ARCHER_C25_74HC_GPIO_LED_WLAN2,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:wlan5g",
.gpio = ARCHER_C25_74HC_GPIO_LED_WLAN5,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:lan1",
.gpio = ARCHER_C25_74HC_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:lan2",
.gpio = ARCHER_C25_74HC_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:lan3",
.gpio = ARCHER_C25_74HC_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:lan4",
.gpio = ARCHER_C25_74HC_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "archer-c25-v1:green:wan",
.gpio = ARCHER_C25_74HC_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "archer-c25-v1:amber:wan",
.gpio = ARCHER_C25_74HC_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c25_v1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C25_V1_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "RFKILL button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C25_V1_GPIO_BTN_RFKILL,
.active_low = 1,
},
};
static void __init archer_c25_v1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0008);
u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000);
ath79_register_m25p80(NULL);
spi_register_board_info(archer_c25_v1_spi_info,
ARRAY_SIZE(archer_c25_v1_spi_info));
platform_device_register(&archer_c25_v1_spi_device);
gpio_request_one(ARCHER_C25_GPIO_SHIFT_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"LED control");
gpio_request_one(ARCHER_C25_GPIO_SHIFT_SRCLR,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LED reset");
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c25_v1_leds_gpio),
archer_c25_v1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C25_V1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c25_v1_gpio_keys),
archer_c25_v1_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
ath79_register_wmac(art + ARCHER_C25_V1_WMAC_CALDATA_OFFSET, mac);
ap91_pci_init(NULL, NULL);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C25_V1, "ARCHER-C25-V1", "TP-LINK Archer C25 v1",
archer_c25_v1_setup);

289
target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c Normal file
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/*
* TP-Link Archer C58/C59 v1 board support
*
* Copyright (C) 2017 Henryk Heisig <hyniu@o2.pl>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define ARCHER_C59_V1_KEYS_POLL_INTERVAL 20
#define ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C59_V1_KEYS_POLL_INTERVAL)
#define ARCHER_C59_V1_GPIO_BTN_RESET 21
#define ARCHER_C59_V1_GPIO_BTN_RFKILL 2
#define ARCHER_C59_V1_GPIO_BTN_WPS 1
#define ARCHER_C59_V1_GPIO_USB_POWER 22
#define ARCHER_C59_GPIO_SHIFT_OE 16
#define ARCHER_C59_GPIO_SHIFT_SER 17
#define ARCHER_C59_GPIO_SHIFT_SRCLK 18
#define ARCHER_C59_GPIO_SHIFT_SRCLR 19
#define ARCHER_C59_GPIO_SHIFT_RCLK 20
#define ARCHER_C59_74HC_GPIO_BASE 32
#define ARCHER_C59_74HC_GPIO_LED_POWER (ARCHER_C59_74HC_GPIO_BASE + 0)
#define ARCHER_C59_74HC_GPIO_LED_WLAN2 (ARCHER_C59_74HC_GPIO_BASE + 1)
#define ARCHER_C59_74HC_GPIO_LED_WLAN5 (ARCHER_C59_74HC_GPIO_BASE + 2)
#define ARCHER_C59_74HC_GPIO_LED_LAN (ARCHER_C59_74HC_GPIO_BASE + 3)
#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN (ARCHER_C59_74HC_GPIO_BASE + 4)
#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER (ARCHER_C59_74HC_GPIO_BASE + 5)
#define ARCHER_C59_74HC_GPIO_LED_WPS (ARCHER_C59_74HC_GPIO_BASE + 6)
#define ARCHER_C59_74HC_GPIO_LED_USB (ARCHER_C59_74HC_GPIO_BASE + 7)
#define ARCHER_C59_V1_SSR_BIT_0 0
#define ARCHER_C59_V1_SSR_BIT_1 1
#define ARCHER_C59_V1_SSR_BIT_2 2
#define ARCHER_C59_V1_SSR_BIT_3 3
#define ARCHER_C59_V1_SSR_BIT_4 4
#define ARCHER_C59_V1_SSR_BIT_5 5
#define ARCHER_C59_V1_SSR_BIT_6 6
#define ARCHER_C59_V1_SSR_BIT_7 7
#define ARCHER_C59_V1_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C59_V1_PCI_CALDATA_OFFSET 0x5000
static struct gpio_led archer_c58_v1_leds_gpio[] __initdata = {
{
.name = "archer-c58-v1:green:power",
.gpio = ARCHER_C59_74HC_GPIO_LED_POWER,
.active_low = 1,
},
{
.name = "archer-c58-v1:green:wlan2g",
.gpio = ARCHER_C59_74HC_GPIO_LED_WLAN2,
.active_low = 1,
},
{
.name = "archer-c58-v1:green:wlan5g",
.gpio = ARCHER_C59_74HC_GPIO_LED_WLAN5,
.active_low = 1,
},
{
.name = "archer-c58-v1:green:lan",
.gpio = ARCHER_C59_74HC_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "archer-c58-v1:green:wan",
.gpio = ARCHER_C59_74HC_GPIO_LED_WAN_GREEN,
.active_low = 1,
},
{
.name = "archer-c58-v1:amber:wan",
.gpio = ARCHER_C59_74HC_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
{
.name = "archer-c58-v1:green:wps",
.gpio = ARCHER_C59_74HC_GPIO_LED_WPS,
.active_low = 1,
},
};
static struct gpio_led archer_c59_v1_leds_gpio[] __initdata = {
{
.name = "archer-c59-v1:green:power",
.gpio = ARCHER_C59_74HC_GPIO_LED_POWER,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:wlan2g",
.gpio = ARCHER_C59_74HC_GPIO_LED_WLAN2,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:wlan5g",
.gpio = ARCHER_C59_74HC_GPIO_LED_WLAN5,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:lan",
.gpio = ARCHER_C59_74HC_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:wan",
.gpio = ARCHER_C59_74HC_GPIO_LED_WAN_GREEN,
.active_low = 1,
},
{
.name = "archer-c59-v1:amber:wan",
.gpio = ARCHER_C59_74HC_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:wps",
.gpio = ARCHER_C59_74HC_GPIO_LED_WPS,
.active_low = 1,
},
{
.name = "archer-c59-v1:green:usb",
.gpio = ARCHER_C59_74HC_GPIO_LED_USB,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c59_v1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C59_V1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C59_V1_GPIO_BTN_RFKILL,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C59_V1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct spi_gpio_platform_data archer_c59_v1_spi_data = {
.sck = ARCHER_C59_GPIO_SHIFT_SRCLK,
.miso = SPI_GPIO_NO_MISO,
.mosi = ARCHER_C59_GPIO_SHIFT_SER,
.num_chipselect = 1,
};
static u8 archer_c59_v1_ssr_initdata[] = {
BIT(ARCHER_C59_V1_SSR_BIT_7) |
BIT(ARCHER_C59_V1_SSR_BIT_6) |
BIT(ARCHER_C59_V1_SSR_BIT_5) |
BIT(ARCHER_C59_V1_SSR_BIT_4) |
BIT(ARCHER_C59_V1_SSR_BIT_3) |
BIT(ARCHER_C59_V1_SSR_BIT_2) |
BIT(ARCHER_C59_V1_SSR_BIT_1)
};
static struct gen_74x164_chip_platform_data archer_c59_v1_ssr_data = {
.base = ARCHER_C59_74HC_GPIO_BASE,
.num_registers = ARRAY_SIZE(archer_c59_v1_ssr_initdata),
.init_data = archer_c59_v1_ssr_initdata,
};
static struct platform_device archer_c59_v1_spi_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &archer_c59_v1_spi_data,
},
};
static struct spi_board_info archer_c59_v1_spi_info[] = {
{
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 10000000,
.modalias = "74x164",
.platform_data = &archer_c59_v1_ssr_data,
.controller_data = (void *) ARCHER_C59_GPIO_SHIFT_RCLK,
},
};
static void __init archer_c5x_v1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f010008);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
spi_register_board_info(archer_c59_v1_spi_info,
ARRAY_SIZE(archer_c59_v1_spi_info));
platform_device_register(&archer_c59_v1_spi_device);
ath79_register_gpio_keys_polled(-1, ARCHER_C59_V1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c59_v1_gpio_keys),
archer_c59_v1_gpio_keys);
ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP |
QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(0);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
ath79_register_wmac(art + ARCHER_C59_V1_WMAC_CALDATA_OFFSET, mac);
ap91_pci_init(art + ARCHER_C59_V1_PCI_CALDATA_OFFSET, NULL);
ath79_register_usb();
gpio_request_one(ARCHER_C59_V1_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
gpio_request_one(ARCHER_C59_GPIO_SHIFT_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"LED control");
gpio_request_one(ARCHER_C59_GPIO_SHIFT_SRCLR,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LED reset");
}
static void __init archer_c58_v1_setup(void)
{
archer_c5x_v1_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c58_v1_leds_gpio),
archer_c58_v1_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C58_V1, "ARCHER-C58-V1",
"TP-LINK Archer C58 v1", archer_c58_v1_setup);
static void __init archer_c59_v1_setup(void)
{
archer_c5x_v1_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c59_v1_leds_gpio),
archer_c59_v1_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C59_V1, "ARCHER-C59-V1",
"TP-LINK Archer C59 v1", archer_c59_v1_setup);

225
target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c Normal file
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/*
* TP-Link Archer C60 v1 board support
*
* Copyright (C) 2017 Henryk Heisig <hyniu@o2.pl>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/gpio.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define ARCHER_C60_V1_GPIO_LED_LAN 2
#define ARCHER_C60_V1_GPIO_LED_POWER 16
#define ARCHER_C60_V1_GPIO_LED_WLAN2 17
#define ARCHER_C60_V1_GPIO_LED_WLAN5 18
#define ARCHER_C60_V1_GPIO_LED_WPS 19
#define ARCHER_C60_V1_GPIO_LED_WAN_GREEN 20
#define ARCHER_C60_V1_GPIO_LED_WAN_AMBER 22
#define ARCHER_C60_V1_KEYS_POLL_INTERVAL 20
#define ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C60_V1_KEYS_POLL_INTERVAL)
#define ARCHER_C60_V1_GPIO_BTN_RESET 21
#define ARCHER_C60_V1_GPIO_BTN_RFKILL 1
#define ARCHER_C60_V1_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C60_V1_PCI_CALDATA_OFFSET 0x5000
static struct gpio_led archer_c60_v1_leds_gpio[] __initdata = {
{
.name = "archer-c60-v1:green:power",
.gpio = ARCHER_C60_V1_GPIO_LED_POWER,
.active_low = 1,
},
{
.name = "archer-c60-v1:green:wlan2g",
.gpio = ARCHER_C60_V1_GPIO_LED_WLAN2,
.active_low = 1,
},
{
.name = "archer-c60-v1:green:wlan5g",
.gpio = ARCHER_C60_V1_GPIO_LED_WLAN5,
.active_low = 1,
},
{
.name = "archer-c60-v1:green:lan",
.gpio = ARCHER_C60_V1_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "archer-c60-v1:green:wan",
.gpio = ARCHER_C60_V1_GPIO_LED_WAN_GREEN,
.active_low = 1,
},
{
.name = "archer-c60-v1:amber:wan",
.gpio = ARCHER_C60_V1_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
{
.name = "archer-c60-v1:green:wps",
.gpio = ARCHER_C60_V1_GPIO_LED_WPS,
.active_low = 1,
},
};
static struct gpio_led archer_c60_v2_leds_gpio[] __initdata = {
{
.name = "archer-c60-v2:green:power",
.gpio = ARCHER_C60_V1_GPIO_LED_POWER,
.active_low = 1,
},
{
.name = "archer-c60-v2:green:wlan2g",
.gpio = ARCHER_C60_V1_GPIO_LED_WLAN2,
.active_low = 1,
},
{
.name = "archer-c60-v2:green:wlan5g",
.gpio = ARCHER_C60_V1_GPIO_LED_WLAN5,
.active_low = 1,
},
{
.name = "archer-c60-v2:green:lan",
.gpio = ARCHER_C60_V1_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "archer-c60-v2:green:wan",
.gpio = ARCHER_C60_V1_GPIO_LED_WAN_GREEN,
.active_low = 1,
},
{
.name = "archer-c60-v2:amber:wan",
.gpio = ARCHER_C60_V1_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
{
.name = "archer-c60-v2:green:wps",
.gpio = ARCHER_C60_V1_GPIO_LED_WPS,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c60_v1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C60_V1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C60_V1_GPIO_BTN_RFKILL,
.active_low = 1,
},
};
static void __init archer_c60_v1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f010008);
u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c60_v1_leds_gpio),
archer_c60_v1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C60_V1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c60_v1_gpio_keys),
archer_c60_v1_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
ath79_register_wmac(art + ARCHER_C60_V1_WMAC_CALDATA_OFFSET, mac);
ap91_pci_init(art + ARCHER_C60_V1_PCI_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C60_V1, "ARCHER-C60-V1",
"TP-LINK Archer C60 v1", archer_c60_v1_setup);
static void __init archer_c60_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fb08);
u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c60_v2_leds_gpio),
archer_c60_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C60_V1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c60_v1_gpio_keys),
archer_c60_v1_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
ath79_register_wmac(art + ARCHER_C60_V1_WMAC_CALDATA_OFFSET, mac);
ap91_pci_init(art + ARCHER_C60_V1_PCI_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C60_V2, "ARCHER-C60-V2",
"TP-LINK Archer C60 v2", archer_c60_v2_setup);

260
target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7-v4.c Normal file
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/*
* Atheros ARCHER_C7 reference board support
*
* Copyright (c) 2017 Felix Fietkau <nbd@nbd.name>
* Copyright (c) 2014 The Linux Foundation. All rights reserved.
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/proc_fs.h>
#include <linux/gpio.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define ARCHER_C7_GPIO_SHIFT_OE 1
#define ARCHER_C7_GPIO_SHIFT_SER 14
#define ARCHER_C7_GPIO_SHIFT_SRCLK 15
#define ARCHER_C7_GPIO_SHIFT_RCLK 16
#define ARCHER_C7_GPIO_SHIFT_SRCLR 21
#define ARCHER_C7_GPIO_BTN_RESET 5
#define ARCHER_C7_GPIO_BTN_WPS_WIFI 2
#define ARCHER_C7_GPIO_LED_WLAN5 9
#define ARCHER_C7_GPIO_LED_POWER 6
#define ARCHER_C7_GPIO_LED_USB1 7
#define ARCHER_C7_GPIO_LED_USB2 8
#define ARCHER_C7_74HC_GPIO_BASE 32
#define ARCHER_C7_GPIO_LED_WPS (ARCHER_C7_74HC_GPIO_BASE + 0)
#define ARCHER_C7_GPIO_LED_LAN1 (ARCHER_C7_74HC_GPIO_BASE + 1)
#define ARCHER_C7_GPIO_LED_LAN2 (ARCHER_C7_74HC_GPIO_BASE + 2)
#define ARCHER_C7_GPIO_LED_LAN3 (ARCHER_C7_74HC_GPIO_BASE + 3)
#define ARCHER_C7_GPIO_LED_LAN4 (ARCHER_C7_74HC_GPIO_BASE + 4)
#define ARCHER_C7_GPIO_LED_WAN_GREEN (ARCHER_C7_74HC_GPIO_BASE + 5)
#define ARCHER_C7_GPIO_LED_WAN_AMBER (ARCHER_C7_74HC_GPIO_BASE + 6)
#define ARCHER_C7_GPIO_LED_WLAN2 (ARCHER_C7_74HC_GPIO_BASE + 7)
#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */
#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
#define ARCHER_C7_MAC0_OFFSET 0
#define ARCHER_C7_MAC1_OFFSET 6
#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C7_GPIO_MDC 3
#define ARCHER_C7_GPIO_MDIO 4
static struct spi_gpio_platform_data archer_c7_v4_spi_data = {
.sck = ARCHER_C7_GPIO_SHIFT_SRCLK,
.miso = SPI_GPIO_NO_MISO,
.mosi = ARCHER_C7_GPIO_SHIFT_SER,
.num_chipselect = 1,
};
static u8 archer_c7_v4_ssr_initdata = 0xff;
static struct gen_74x164_chip_platform_data archer_c7_v4_ssr_data = {
.base = ARCHER_C7_74HC_GPIO_BASE,
.num_registers = 1,
.init_data = &archer_c7_v4_ssr_initdata,
};
static struct platform_device archer_c7_v4_spi_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &archer_c7_v4_spi_data,
},
};
static struct spi_board_info archer_c7_v4_spi_info[] = {
{
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 10000000,
.modalias = "74x164",
.platform_data = &archer_c7_v4_ssr_data,
.controller_data = (void *) ARCHER_C7_GPIO_SHIFT_RCLK,
},
};
static struct gpio_led archer_c7_v4_leds_gpio[] __initdata = {
{
.name = "archer-c7-v4:green:power",
.gpio = ARCHER_C7_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wps",
.gpio = ARCHER_C7_GPIO_LED_WPS,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wlan5g",
.gpio = ARCHER_C7_GPIO_LED_WLAN5,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan1",
.gpio = ARCHER_C7_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan2",
.gpio = ARCHER_C7_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan3",
.gpio = ARCHER_C7_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan4",
.gpio = ARCHER_C7_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "archer-c7-v4:amber:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_AMBER,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:usb1",
.gpio = ARCHER_C7_GPIO_LED_USB1,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:usb2",
.gpio = ARCHER_C7_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c7_v4_gpio_keys[] __initdata = {
{
.desc = "WPS and WIFI button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_WPS_WIFI,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg archer_c7_v4_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data archer_c7_v4_ar8337_data = {
.pad0_cfg = &archer_c7_v4_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info archer_c7_v4_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &archer_c7_v4_ar8337_data,
},
};
static void __init archer_c7_v4_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1ff00008);
ath79_register_m25p80(NULL);
spi_register_board_info(archer_c7_v4_spi_info,
ARRAY_SIZE(archer_c7_v4_spi_info));
platform_device_register(&archer_c7_v4_spi_device);
gpio_request_one(ARCHER_C7_GPIO_SHIFT_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"LED control");
gpio_request_one(ARCHER_C7_GPIO_SHIFT_SRCLR,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LED reset");
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_v4_leds_gpio),
archer_c7_v4_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_v4_gpio_keys),
archer_c7_v4_gpio_keys);
ath79_register_usb();
ath79_gpio_output_select(ARCHER_C7_GPIO_MDC, QCA956X_GPIO_OUT_MUX_GE0_MDC);
ath79_gpio_output_select(ARCHER_C7_GPIO_MDIO, QCA956X_GPIO_OUT_MUX_GE0_MDO);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(archer_c7_v4_mdio0_info,
ARRAY_SIZE(archer_c7_v4_mdio0_info));
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
/* GMAC0 is connected to an AR8337 switch */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V4, "ARCHER-C7-V4", "TP-LINK Archer C7 v4",
archer_c7_v4_setup);

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/*
* Atheros ARCHER_C7 reference board support
*
* Copyright (c) 2018 Arvid E. Picciani <aep@exys.org>
* Copyright (c) 2017 Felix Fietkau <nbd@nbd.name>
* Copyright (c) 2014 The Linux Foundation. All rights reserved.
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/proc_fs.h>
#include <linux/gpio.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define ARCHER_C7_GPIO_BTN_RESET 5
#define ARCHER_C7_GPIO_BTN_WPS_WIFI 2
#define ARCHER_C7_GPIO_LED_WLAN5 9
#define ARCHER_C7_GPIO_LED_POWER 6
#define ARCHER_C7_GPIO_LED_USB 7
#define ARCHER_C7_GPIO_LED_WPS 1
#define ARCHER_C7_GPIO_LED_LAN1 8
#define ARCHER_C7_GPIO_LED_LAN2 17
#define ARCHER_C7_GPIO_LED_LAN3 16
#define ARCHER_C7_GPIO_LED_LAN4 15
#define ARCHER_C7_GPIO_LED_WAN_GREEN 21
#define ARCHER_C7_GPIO_LED_WAN_AMBER 20
#define ARCHER_C7_GPIO_LED_WLAN2 14
#define ARCHER_C7_GPIO_USB_PWR 19
#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */
#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
#define ARCHER_C7_MAC0_OFFSET 0
#define ARCHER_C7_MAC1_OFFSET 6
#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C7_GPIO_MDC 3
#define ARCHER_C7_GPIO_MDIO 4
static struct gpio_led archer_c7_v5_leds_gpio[] __initdata = {
{
.name = "archer-c7-v5:green:power",
.gpio = ARCHER_C7_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:wps",
.gpio = ARCHER_C7_GPIO_LED_WPS,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:wlan5g",
.gpio = ARCHER_C7_GPIO_LED_WLAN5,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:lan1",
.gpio = ARCHER_C7_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:lan2",
.gpio = ARCHER_C7_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:lan3",
.gpio = ARCHER_C7_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:lan4",
.gpio = ARCHER_C7_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "archer-c7-v5:amber:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_AMBER,
.active_low = 1,
}, {
.name = "archer-c7-v5:green:usb",
.gpio = ARCHER_C7_GPIO_LED_USB,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c7_v5_gpio_keys[] __initdata = {
{
.desc = "WPS and WIFI button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_WPS_WIFI,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg archer_c7_v5_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data archer_c7_v5_ar8337_data = {
.pad0_cfg = &archer_c7_v5_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info archer_c7_v5_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &archer_c7_v5_ar8337_data,
},
};
static void __init archer_c7_v5_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f050000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f060008);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_v5_leds_gpio),
archer_c7_v5_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_v5_gpio_keys),
archer_c7_v5_gpio_keys);
ath79_register_usb();
ath79_gpio_output_select(ARCHER_C7_GPIO_MDC, QCA956X_GPIO_OUT_MUX_GE0_MDC);
ath79_gpio_output_select(ARCHER_C7_GPIO_MDIO, QCA956X_GPIO_OUT_MUX_GE0_MDO);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(archer_c7_v5_mdio0_info,
ARRAY_SIZE(archer_c7_v5_mdio0_info));
gpio_request_one(ARCHER_C7_GPIO_USB_PWR,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
/* GMAC0 is connected to an AR8337 switch */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V5, "ARCHER-C7-V5", "TP-LINK Archer C7 v5",
archer_c7_v5_setup);

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/*
* TP-LINK Archer C5/C7/TL-WDR4900 v2 board support
*
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2014 施康成 <tenninjas@tenninjas.ca>
* Copyright (c) 2014 Imre Kaloz <kaloz@openwrt.org>
*
* Based on the Qualcomm Atheros AP135/AP136 reference board support code
* Copyright (c) 2012 Qualcomm Atheros
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define ARCHER_C7_GPIO_LED_WLAN2G 12
#define ARCHER_C7_GPIO_LED_SYSTEM 14
#define ARCHER_C7_GPIO_LED_QSS 15
#define ARCHER_C7_GPIO_LED_WLAN5G 17
#define ARCHER_C7_GPIO_LED_USB1 18
#define ARCHER_C7_GPIO_LED_USB2 19
#define ARCHER_C7_GPIO_BTN_RFKILL 13
#define ARCHER_C7_V2_GPIO_BTN_RFKILL 23
#define ARCHER_C7_GPIO_BTN_RESET 16
#define ARCHER_C7_GPIO_USB1_POWER 22
#define ARCHER_C7_GPIO_USB2_POWER 21
#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */
#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C7_PCIE_CALDATA_OFFSET 0x5000
static const char *archer_c7_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data archer_c7_flash_data = {
.part_probes = archer_c7_part_probes,
};
static struct gpio_led archer_c7_leds_gpio[] __initdata = {
{
.name = "tp-link:blue:qss",
.gpio = ARCHER_C7_GPIO_LED_QSS,
.active_low = 1,
},
{
.name = "tp-link:blue:system",
.gpio = ARCHER_C7_GPIO_LED_SYSTEM,
.active_low = 1,
},
{
.name = "tp-link:blue:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2G,
.active_low = 1,
},
{
.name = "tp-link:blue:wlan5g",
.gpio = ARCHER_C7_GPIO_LED_WLAN5G,
.active_low = 1,
},
{
.name = "tp-link:green:usb1",
.gpio = ARCHER_C7_GPIO_LED_USB1,
.active_low = 1,
},
{
.name = "tp-link:green:usb2",
.gpio = ARCHER_C7_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_led wdr4900_leds_gpio[] __initdata = {
{
.name = "tp-link:blue:qss",
.gpio = ARCHER_C7_GPIO_LED_QSS,
.active_low = 1,
},
{
.name = "tp-link:blue:system",
.gpio = ARCHER_C7_GPIO_LED_SYSTEM,
.active_low = 1,
},
{
.name = "tp-link:blue:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2G,
.active_low = 1,
},
{
.name = "tp-link:green:usb1",
.gpio = ARCHER_C7_GPIO_LED_USB1,
.active_low = 1,
},
{
.name = "tp-link:green:usb2",
.gpio = ARCHER_C7_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL switch",
.type = EV_SW,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RFKILL,
},
};
static struct gpio_keys_button archer_c7_v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL switch",
.type = EV_SW,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_V2_GPIO_BTN_RFKILL,
},
};
static struct gpio_keys_button wdr4900_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
};
static const struct ar8327_led_info archer_c7_leds_ar8327[] = {
AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
};
/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = {
.led_ctrl0 = 0xc737c737,
.led_ctrl1 = 0x00000000,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x0030c300,
.open_drain = false,
};
static struct ar8327_platform_data archer_c7_ar8327_data = {
.pad0_cfg = &archer_c7_ar8327_pad0_cfg,
.pad6_cfg = &archer_c7_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &archer_c7_ar8327_led_cfg,
.num_leds = ARRAY_SIZE(archer_c7_leds_ar8327),
.leds = archer_c7_leds_ar8327,
};
static struct mdio_board_info archer_c7_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &archer_c7_ar8327_data,
},
};
static void __init common_setup(bool pcie_slot)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
u8 tmpmac2[ETH_ALEN];
ath79_register_m25p80(&archer_c7_flash_data);
if (pcie_slot) {
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
} else {
ath79_init_mac(tmpmac, mac, -1);
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac2, mac, -2);
ap9x_pci_setup_wmac_led_pin(0, 0);
ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac2);
}
mdiobus_register_board_info(archer_c7_mdio0_info,
ARRAY_SIZE(archer_c7_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
gpio_request_one(ARCHER_C7_GPIO_USB1_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB1 power");
gpio_request_one(ARCHER_C7_GPIO_USB2_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB2 power");
ath79_register_usb();
}
static void __init archer_c5_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5",
archer_c5_setup);
static void __init archer_c7_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7",
archer_c7_setup);
static void __init archer_c7_v2_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_v2_gpio_keys),
archer_c7_v2_gpio_keys);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V2, "ARCHER-C7-V2", "TP-LINK Archer C7",
archer_c7_v2_setup);
static void __init tl_wdr4900_v2_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wdr4900_gpio_keys),
wdr4900_gpio_keys);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4900_leds_gpio),
wdr4900_leds_gpio);
common_setup(false);
}
MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2", "TP-LINK TL-WDR4900 v2",
tl_wdr4900_v2_setup)

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/*
* Arduino Yun support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include <linux/gpio.h>
#include "common.h"
// Uncomment to have reset on gpio18 instead of gipo7
#define DS2_B
#define DS_GPIO_LED_WLAN 0
#define DS_GPIO_LED_USB 1
#define DS_GPIO_OE 21
#define DS_GPIO_AVR_RESET 18
// Maintained to have the console in the previous version of DS2 working
#define DS_GPIO_AVR_RESET_DS2 7
#define DS_GPIO_OE2 22
#define DS_GPIO_UART_ENA 23
#define DS_GPIO_CONF_BTN 20
#define DS_KEYS_POLL_INTERVAL 20 /* msecs */
#define DS_KEYS_DEBOUNCE_INTERVAL (3 * DS_KEYS_POLL_INTERVAL)
#define DS_MAC0_OFFSET 0x0000
#define DS_MAC1_OFFSET 0x0006
#define DS_CALDATA_OFFSET 0x1000
#define DS_WMAC_MAC_OFFSET 0x1002
static struct gpio_led ds_leds_gpio[] __initdata = {
{
.name = "arduino:white:usb",
.gpio = DS_GPIO_LED_USB,
.active_low = 0,
},
{
.name = "arduino:blue:wlan",
.gpio = DS_GPIO_LED_WLAN,
.active_low = 0,
},
};
static struct gpio_keys_button ds_gpio_keys[] __initdata = {
{
.desc = "configuration button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DS_KEYS_DEBOUNCE_INTERVAL,
.gpio = DS_GPIO_CONF_BTN,
.active_low = 1,
},
};
static void __init ds_common_setup(void)
{
static u8 mac[6];
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DS_CALDATA_OFFSET,
art + DS_WMAC_MAC_OFFSET);
memcpy(mac, art + DS_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x08;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
mac[3] &= 0xF7;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
}
static void __init ds_setup(void)
{
u32 t;
ds_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio),
ds_leds_gpio);
ath79_register_gpio_keys_polled(-1, DS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ds_gpio_keys),
ds_gpio_keys);
ath79_register_usb();
/* use the swtich_led directly form sysfs */
ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN);
//Disable the Function for some pins to have GPIO functionality active
// GPIO6-7-8 and GPIO11
ath79_gpio_function_setup(AR933X_GPIO_FUNC_JTAG_DISABLE | AR933X_GPIO_FUNC_I2S_MCK_EN, 0);
ath79_gpio_function2_setup(AR933X_GPIO_FUNC2_JUMPSTART_DISABLE, 0);
printk("Setting DogStick2 GPIO\n");
t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
// Put the avr reset to high
if (gpio_request_one(DS_GPIO_AVR_RESET_DS2,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0)
printk("Error setting GPIO OE\n");
gpio_unexport(DS_GPIO_AVR_RESET_DS2);
gpio_free(DS_GPIO_AVR_RESET_DS2);
// enable OE of level shifter
if (gpio_request_one(DS_GPIO_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0)
printk("Error setting GPIO OE\n");
if (gpio_request_one(DS_GPIO_UART_ENA,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "UART-ENA") != 0)
printk("Error setting GPIO Uart Enable\n");
// enable OE of level shifter
if (gpio_request_one(DS_GPIO_OE2,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-2") != 0)
printk("Error setting GPIO OE2\n");
}
MIPS_MACHINE(ATH79_MACH_ARDUINO_YUN, "Yun", "Arduino Yun", ds_setup);

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/*
* AzureWave AW-NR580 board support
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-m25p80.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "machtypes.h"
#include "pci.h"
#define AW_NR580_GPIO_LED_READY_RED 0
#define AW_NR580_GPIO_LED_WLAN 1
#define AW_NR580_GPIO_LED_READY_GREEN 2
#define AW_NR580_GPIO_LED_WPS_GREEN 4
#define AW_NR580_GPIO_LED_WPS_AMBER 5
#define AW_NR580_GPIO_BTN_WPS 3
#define AW_NR580_GPIO_BTN_RESET 11
#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */
#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL)
static struct gpio_led aw_nr580_leds_gpio[] __initdata = {
{
.name = "aw-nr580:red:ready",
.gpio = AW_NR580_GPIO_LED_READY_RED,
.active_low = 0,
}, {
.name = "aw-nr580:green:ready",
.gpio = AW_NR580_GPIO_LED_READY_GREEN,
.active_low = 0,
}, {
.name = "aw-nr580:green:wps",
.gpio = AW_NR580_GPIO_LED_WPS_GREEN,
.active_low = 0,
}, {
.name = "aw-nr580:amber:wps",
.gpio = AW_NR580_GPIO_LED_WPS_AMBER,
.active_low = 0,
}, {
.name = "aw-nr580:green:wlan",
.gpio = AW_NR580_GPIO_LED_WLAN,
.active_low = 0,
}
};
static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL,
.gpio = AW_NR580_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL,
.gpio = AW_NR580_GPIO_BTN_WPS,
.active_low = 1,
}
};
static const char *aw_nr580_part_probes[] = {
"RedBoot",
NULL,
};
static struct flash_platform_data aw_nr580_flash_data = {
.part_probes = aw_nr580_part_probes,
};
static void __init aw_nr580_setup(void)
{
ath79_register_mdio(0, 0x0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_pci();
ath79_register_m25p80(&aw_nr580_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio),
aw_nr580_leds_gpio);
ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL,
ARRAY_SIZE(aw_nr580_gpio_keys),
aw_nr580_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580",
aw_nr580_setup);

171
target/linux/ar71xx/files/arch/mips/ath79/mach-bhr-4grv2.c Normal file
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/*
* Buffalo BHR-4GRV2 board support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
*
* Based on mach-ap136.c and mach-wzr-450hp2.c
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#define BHR_4GRV2_GPIO_LED_VPN_RED 3
#define BHR_4GRV2_GPIO_LED_VPN_GREEN 18
#define BHR_4GRV2_GPIO_LED_POWER_GREEN 19
#define BHR_4GRV2_GPIO_LED_DIAG_RED 20
#define BHR_4GRV2_GPIO_BTN_RESET 17
#define BHR_4GRV2_GPIO_BTN_ECO 21
#define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */
#define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL)
#define BHR_4GRV2_MAC0_OFFSET 0
#define BHR_4GRV2_MAC1_OFFSET 6
static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = {
{
.name = "buffalo:red:vpn",
.gpio = BHR_4GRV2_GPIO_LED_VPN_RED,
.active_low = 1,
},
{
.name = "buffalo:green:vpn",
.gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN,
.active_low = 1,
},
{
.name = "buffalo:green:power",
.gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN,
.active_low = 1,
},
{
.name = "buffalo:red:diag",
.gpio = BHR_4GRV2_GPIO_LED_DIAG_RED,
.active_low = 1,
}
};
static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
.gpio = BHR_4GRV2_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "ECO button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
.gpio = BHR_4GRV2_GPIO_BTN_ECO,
.active_low = 1,
},
};
/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data bhr_4grv2_ar8327_data = {
.pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg,
.pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info bhr_4grv2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &bhr_4grv2_ar8327_data,
},
};
static void __init bhr_4grv2_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio),
bhr_4grv2_leds_gpio);
ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(bhr_4grv2_gpio_keys),
bhr_4grv2_gpio_keys);
mdiobus_register_board_info(bhr_4grv2_mdio0_info,
ARRAY_SIZE(bhr_4grv2_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RGMII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0);
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2",
"Buffalo BHR-4GRV2", bhr_4grv2_setup);

120
target/linux/ar71xx/files/arch/mips/ath79/mach-bhu-bxu2000n2-a.c Normal file
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/*
* BHU BXU2000n-2 A1 board support
*
* Copyright (C) 2013 Terry Yang <yangbo@bhunetworks.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define BHU_BXU2000N2_A1_GPIO_LED_WLAN 13
#define BHU_BXU2000N2_A1_GPIO_LED_WAN 19
#define BHU_BXU2000N2_A1_GPIO_LED_LAN 21
#define BHU_BXU2000N2_A1_GPIO_LED_SYSTEM 14
#define BHU_BXU2000N2_A1_GPIO_BTN_RESET 17
#define BHU_BXU2000N2_KEYS_POLL_INTERVAL 20 /* msecs */
#define BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL \
(3 * BHU_BXU2000N2_KEYS_POLL_INTERVAL)
static const char *bhu_bxu2000n2_part_probes[] = {
"cmdlinepart",
NULL,
};
static struct flash_platform_data bhu_bxu2000n2_flash_data = {
.part_probes = bhu_bxu2000n2_part_probes,
};
static struct gpio_led bhu_bxu2000n2_a1_leds_gpio[] __initdata = {
{
.name = "bhu:green:status",
.gpio = BHU_BXU2000N2_A1_GPIO_LED_SYSTEM,
.active_low = 1,
}, {
.name = "bhu:green:lan",
.gpio = BHU_BXU2000N2_A1_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "bhu:green:wan",
.gpio = BHU_BXU2000N2_A1_GPIO_LED_WAN,
.active_low = 1,
}, {
.name = "bhu:green:wlan",
.gpio = BHU_BXU2000N2_A1_GPIO_LED_WLAN,
.active_low = 1,
},
};
static struct gpio_keys_button bhu_bxu2000n2_a1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL,
.gpio = BHU_BXU2000N2_A1_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init bhu_ap123_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&bhu_bxu2000n2_flash_data);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
/* GMAC0 is connected to the PHY4 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
/* GMAC1 is connected to the internal switch. Only use PHY3 */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.phy_mask = BIT(3);
ath79_register_eth(1);
ath79_register_wmac(ee, ee+2);
}
static void __init bhu_bxu2000n2_a1_setup(void)
{
bhu_ap123_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(bhu_bxu2000n2_a1_leds_gpio),
bhu_bxu2000n2_a1_leds_gpio);
ath79_register_gpio_keys_polled(1, BHU_BXU2000N2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(bhu_bxu2000n2_a1_gpio_keys),
bhu_bxu2000n2_a1_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_BHU_BXU2000N2_A1, "BXU2000n-2-A1",
"BHU BXU2000n-2 rev. A1",
bhu_bxu2000n2_a1_setup);

83
target/linux/ar71xx/files/arch/mips/ath79/mach-bsb.c Normal file
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/*
* Smart Electronics Black Swift board support
*
* Copyright (C) 2014 Dmitriy Zherebkov dzh@black-swift.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define BSB_GPIO_LED_SYS 27
#define BSB_GPIO_BTN_RESET 11
#define BSB_KEYS_POLL_INTERVAL 20 /* msecs */
#define BSB_KEYS_DEBOUNCE_INTERVAL (3 * BSB_KEYS_POLL_INTERVAL)
#define BSB_MAC_OFFSET 0x0000
#define BSB_CALDATA_OFFSET 0x1000
static struct gpio_led bsb_leds_gpio[] __initdata = {
{
.name = "bsb:red:sys",
.gpio = BSB_GPIO_LED_SYS,
.active_low = 1,
}
};
static struct gpio_keys_button bsb_gpio_keys[] __initdata = {
{
.desc = "reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = BSB_KEYS_DEBOUNCE_INTERVAL,
.gpio = BSB_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init bsb_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false,false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(bsb_leds_gpio),
bsb_leds_gpio);
ath79_register_gpio_keys_polled(-1, BSB_KEYS_POLL_INTERVAL,
ARRAY_SIZE(bsb_gpio_keys),
bsb_gpio_keys);
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_init_mac(ath79_eth0_data.mac_addr, art + BSB_MAC_OFFSET, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, art + BSB_MAC_OFFSET, 2);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(art + BSB_CALDATA_OFFSET,
art + BSB_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_BSB, "BSB", "Smart Electronics Black Swift board",
bsb_setup);

132
target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c Normal file
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/*
* AirTight Networks C-55 board support
*
* Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
*
* Based on Senao CAP4200AG board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define C55_GPIO_LED_PWR_GREEN 12
#define C55_GPIO_LED_PWR_AMBER 13
#define C55_GPIO_LED_LAN_GREEN 14
#define C55_GPIO_LED_LAN_AMBER 15
#define C55_GPIO_LED_WLAN_GREEN 18
#define C55_GPIO_LED_WLAN_AMBER 19
#define C55_GPIO_BTN_RESET 17
#define C55_KEYS_POLL_INTERVAL 20 /* msecs */
#define C55_KEYS_DEBOUNCE_INTERVAL (3 * C55_KEYS_POLL_INTERVAL)
#define C55_MAC_OFFSET 0
#define C55_WMAC_CALDATA_OFFSET 0x1000
#define C55_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led c55_leds_gpio[] __initdata = {
{
.name = "c-55:green:pwr",
.gpio = C55_GPIO_LED_PWR_GREEN,
.active_low = 1,
},
{
.name = "c-55:amber:pwr",
.gpio = C55_GPIO_LED_PWR_AMBER,
.active_low = 1,
},
{
.name = "c-55:green:lan",
.gpio = C55_GPIO_LED_LAN_GREEN,
.active_low = 1,
},
{
.name = "c-55:amber:lan",
.gpio = C55_GPIO_LED_LAN_AMBER,
.active_low = 1,
},
{
.name = "c-55:green:wlan",
.gpio = C55_GPIO_LED_WLAN_GREEN,
.active_low = 1,
},
{
.name = "c-55:amber:wlan",
.gpio = C55_GPIO_LED_WLAN_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button c55_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = C55_KEYS_DEBOUNCE_INTERVAL,
.gpio = C55_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init c55_setup(void)
{
/* SPI Storage*/
ath79_register_m25p80(NULL);
/* MDIO Interface */
ath79_register_mdio(0, 0x0);
/* AR8035-A Ethernet */
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_init_mac(ath79_eth0_data.mac_addr, NULL, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
/* LEDs & GPIO */
ath79_gpio_output_select(C55_GPIO_LED_LAN_GREEN,
AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(C55_GPIO_LED_LAN_AMBER,
AR934X_GPIO_OUT_GPIO);
ath79_register_leds_gpio(-1, ARRAY_SIZE(c55_leds_gpio),
c55_leds_gpio);
ath79_register_gpio_keys_polled(-1, C55_KEYS_POLL_INTERVAL,
ARRAY_SIZE(c55_gpio_keys),
c55_gpio_keys);
/* WiFi */
ath79_wmac_disable_2ghz();
ath79_register_wmac_simple();
ap91_pci_init_simple();
}
MIPS_MACHINE(ATH79_MACH_C55, "C-55", "AirTight Networks C-55",
c55_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c Normal file
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/*
* AirTight Networks C-60 board support
*
* Copyright (C) 2016 Christian Lamparter <chunkeey@googlemail.com>
*
* Based on AirTight Networks C-55 board support
*
* Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/platform/ar934x_nfc.h>
#include <linux/ar8216_platform.h>
#include <linux/ath9k_platform.h>
#include <linux/version.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "dev-usb.h"
#include "dev-nfc.h"
#include "machtypes.h"
#define C60_GPIO_LED_PWR_AMBER 11
#define C60_GPIO_LED_WLAN2_GREEN 12
#define C60_GPIO_LED_WLAN2_AMBER 13
#define C60_GPIO_LED_PWR_GREEN 16
#define C60_GPIO_BTN_RESET 17
/* GPIOs of the AR9300 PCIe chip */
#define C60_GPIO_WMAC_LED_WLAN1_AMBER 0
#define C60_GPIO_WMAC_LED_WLAN1_GREEN 3
#define C60_KEYS_POLL_INTERVAL 20 /* msecs */
#define C60_KEYS_DEBOUNCE_INTERVAL (3 * C60_KEYS_POLL_INTERVAL)
#define C60_ART_ADDR 0x1f7f0000
#define C60_ART_SIZE 0xffff
#define C60_MAC_OFFSET 0
#define C60_WMAC_CALDATA_OFFSET 0x1000
#define C60_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led c60_leds_gpio[] __initdata = {
{
.name = "c-60:amber:pwr",
.gpio = C60_GPIO_LED_PWR_AMBER,
.active_low = 1,
},
{
.name = "c-60:green:pwr",
.gpio = C60_GPIO_LED_PWR_GREEN,
.active_low = 1,
},
{
.name = "c-60:green:wlan2",
.gpio = C60_GPIO_LED_WLAN2_GREEN,
.active_low = 1,
},
{
.name = "c-60:amber:wlan2",
.gpio = C60_GPIO_LED_WLAN2_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button c60_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = C60_KEYS_DEBOUNCE_INTERVAL,
.gpio = C60_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg c60_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data c60_ar8327_data = {
.pad0_cfg = &c60_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
}
};
static struct mdio_board_info c60_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &c60_ar8327_data,
},
};
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
static struct nand_ecclayout c60_nand_ecclayout = {
.eccbytes = 7,
.eccpos = { 4, 8, 9, 10, 13, 14, 15 },
.oobavail = 9,
.oobfree = { { 0, 3 }, { 6, 2 }, { 11, 2 }, }
};
#else
static int c60_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
switch (section) {
case 0:
oobregion->offset = 4;
oobregion->length = 1;
return 0;
case 1:
oobregion->offset = 8;
oobregion->length = 3;
return 0;
case 2:
oobregion->offset = 13;
oobregion->length = 3;
return 0;
default:
return -ERANGE;
}
}
static int c60_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
switch (section) {
case 0:
oobregion->offset = 0;
oobregion->length = 3;
return 0;
case 1:
oobregion->offset = 6;
oobregion->length = 2;
return 0;
case 2:
oobregion->offset = 11;
oobregion->length = 2;
return 0;
default:
return -ERANGE;
}
}
static const struct mtd_ooblayout_ops c60_nand_ecclayout_ops = {
.ecc = c60_ooblayout_ecc,
.free = c60_ooblayout_free,
};
#endif /* < 4.6 */
static int c60_nand_scan_fixup(struct mtd_info *mtd)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
struct nand_chip *chip = mtd->priv;
#else
struct nand_chip *chip = mtd_to_nand(mtd);
#endif
chip->ecc.size = 512;
chip->ecc.strength = 4;
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
chip->ecc.layout = &c60_nand_ecclayout;
#else
mtd_set_ooblayout(mtd, &c60_nand_ecclayout_ops);
#endif
return 0;
}
static struct gpio_led c60_wmac0_leds_gpio[] = {
{
.name = "c-60:amber:wlan1",
.gpio = C60_GPIO_WMAC_LED_WLAN1_AMBER,
.active_low = 1,
},
{
.name = "c-60:green:wlan1",
.gpio = C60_GPIO_WMAC_LED_WLAN1_GREEN,
.active_low = 1,
},
};
static void __init c60_setup(void)
{
u8 tmpmac[6];
u8 *art = (u8 *) KSEG1ADDR(C60_ART_ADDR);
/* NAND */
ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_SOFT_BCH);
ath79_nfc_set_scan_fixup(c60_nand_scan_fixup);
ath79_register_nfc();
/* SPI Storage*/
ath79_register_m25p80(NULL);
/* AR8327 Switch Ethernet */
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(c60_mdio0_info,
ARRAY_SIZE(c60_mdio0_info));
ath79_register_mdio(0, 0x0);
/* GMAC0 is connected to an AR8327N switch */
ath79_init_mac(ath79_eth0_data.mac_addr, art + C60_MAC_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
/* LEDs & GPIO */
ath79_register_leds_gpio(-1, ARRAY_SIZE(c60_leds_gpio),
c60_leds_gpio);
ath79_register_gpio_keys_polled(-1, C60_KEYS_POLL_INTERVAL,
ARRAY_SIZE(c60_gpio_keys),
c60_gpio_keys);
ap9x_pci_setup_wmac_leds(0, c60_wmac0_leds_gpio,
ARRAY_SIZE(c60_wmac0_leds_gpio));
/* USB */
ath79_register_usb();
/* WiFi */
ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 1);
ap91_pci_init(art + C60_PCIE_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 2);
ath79_register_wmac(art + C60_WMAC_CALDATA_OFFSET, tmpmac);
}
MIPS_MACHINE(ATH79_MACH_C60, "C-60", "AirTight Networks C-60",
c60_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-cap324.c Normal file
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/*
* PowerCloud Systems CAP324 board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012-2013 PowerCloud Systems
* Copyright (C) 2015 Daniel Dickinson
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CAP324_GPIO_LED_POWER_GREEN 12
#define CAP324_GPIO_LED_POWER_AMBER 13
#define CAP324_GPIO_LED_LAN_GREEN 14
#define CAP324_GPIO_LED_LAN_AMBER 15
#define CAP324_GPIO_LED_WLAN_GREEN 18
#define CAP324_GPIO_LED_WLAN_AMBER 19
#define CAP324_GPIO_BTN_RESET 17
#define CAP324_KEYS_POLL_INTERVAL 20 /* msecs */
#define CAP324_KEYS_DEBOUNCE_INTERVAL (3 * CAP324_KEYS_POLL_INTERVAL)
#define CAP324_MAC_OFFSET 0
#define CAP324_WMAC_CALDATA_OFFSET 0x1000
#define CAP324_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led cap324_leds_gpio[] __initdata = {
{
.name = "pcs:green:power",
.gpio = CAP324_GPIO_LED_POWER_GREEN,
.active_low = 1,
},
{
.name = "pcs:amber:power",
.gpio = CAP324_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "pcs:green:lan",
.gpio = CAP324_GPIO_LED_LAN_GREEN,
.active_low = 1,
},
{
.name = "pcs:amber:lan",
.gpio = CAP324_GPIO_LED_LAN_AMBER,
.active_low = 1,
},
{
.name = "pcs:green:wlan",
.gpio = CAP324_GPIO_LED_WLAN_GREEN,
.active_low = 1,
},
{
.name = "pcs:amber:wlan",
.gpio = CAP324_GPIO_LED_WLAN_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button cap324_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CAP324_KEYS_DEBOUNCE_INTERVAL,
.gpio = CAP324_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init cap324_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac[6];
ath79_gpio_output_select(CAP324_GPIO_LED_LAN_GREEN,
AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CAP324_GPIO_LED_LAN_AMBER,
AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cap324_leds_gpio),
cap324_leds_gpio);
ath79_register_gpio_keys_polled(-1, CAP324_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cap324_gpio_keys),
cap324_gpio_keys);
ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -1);
ath79_wmac_disable_2ghz();
ath79_register_wmac(art + CAP324_WMAC_CALDATA_OFFSET, mac);
ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -2);
ap91_pci_init(art + CAP324_PCIE_CALDATA_OFFSET, mac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + CAP324_MAC_OFFSET, -2);
/* GMAC0 is connected to an external PHY */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_CAP324, "CAP324", "PowerCloud CAP324",
cap324_setup);

131
target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c Normal file
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/*
* Senao CAP4200AG board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CAP4200AG_GPIO_LED_PWR_GREEN 12
#define CAP4200AG_GPIO_LED_PWR_AMBER 13
#define CAP4200AG_GPIO_LED_LAN_GREEN 14
#define CAP4200AG_GPIO_LED_LAN_AMBER 15
#define CAP4200AG_GPIO_LED_WLAN_GREEN 18
#define CAP4200AG_GPIO_LED_WLAN_AMBER 19
#define CAP4200AG_GPIO_BTN_RESET 17
#define CAP4200AG_KEYS_POLL_INTERVAL 20 /* msecs */
#define CAP4200AG_KEYS_DEBOUNCE_INTERVAL (3 * CAP4200AG_KEYS_POLL_INTERVAL)
#define CAP4200AG_MAC_OFFSET 0
#define CAP4200AG_WMAC_CALDATA_OFFSET 0x1000
#define CAP4200AG_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led cap4200ag_leds_gpio[] __initdata = {
{
.name = "senao:green:pwr",
.gpio = CAP4200AG_GPIO_LED_PWR_GREEN,
.active_low = 1,
},
{
.name = "senao:amber:pwr",
.gpio = CAP4200AG_GPIO_LED_PWR_AMBER,
.active_low = 1,
},
{
.name = "senao:green:lan",
.gpio = CAP4200AG_GPIO_LED_LAN_GREEN,
.active_low = 1,
},
{
.name = "senao:amber:lan",
.gpio = CAP4200AG_GPIO_LED_LAN_AMBER,
.active_low = 1,
},
{
.name = "senao:green:wlan",
.gpio = CAP4200AG_GPIO_LED_WLAN_GREEN,
.active_low = 1,
},
{
.name = "senao:amber:wlan",
.gpio = CAP4200AG_GPIO_LED_WLAN_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button cap4200ag_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CAP4200AG_KEYS_DEBOUNCE_INTERVAL,
.gpio = CAP4200AG_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init cap4200ag_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac[6];
ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_GREEN,
AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_AMBER,
AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cap4200ag_leds_gpio),
cap4200ag_leds_gpio);
ath79_register_gpio_keys_polled(-1, CAP4200AG_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cap4200ag_gpio_keys),
cap4200ag_gpio_keys);
ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -1);
ath79_wmac_disable_2ghz();
ath79_register_wmac(art + CAP4200AG_WMAC_CALDATA_OFFSET, mac);
ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -2);
ap91_pci_init(art + CAP4200AG_PCIE_CALDATA_OFFSET, mac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + CAP4200AG_MAC_OFFSET, -2);
/* GMAC0 is connected to an external PHY */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_CAP4200AG, "CAP4200AG", "Senao CAP4200AG",
cap4200ag_setup);

105
target/linux/ar71xx/files/arch/mips/ath79/mach-carambola2.c Normal file
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/*
* 8devices Carambola2 board support
*
* Copyright (C) 2013 Darius Augulis <darius@8devices.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CARAMBOLA2_GPIO_LED_WLAN 0
#define CARAMBOLA2_GPIO_LED_ETH0 14
#define CARAMBOLA2_GPIO_LED_ETH1 13
#define CARAMBOLA2_GPIO_BTN_JUMPSTART 11
#define CARAMBOLA2_KEYS_POLL_INTERVAL 20 /* msecs */
#define CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL (3 * CARAMBOLA2_KEYS_POLL_INTERVAL)
#define CARAMBOLA2_MAC0_OFFSET 0x0000
#define CARAMBOLA2_MAC1_OFFSET 0x0006
#define CARAMBOLA2_CALDATA_OFFSET 0x1000
#define CARAMBOLA2_WMAC_MAC_OFFSET 0x1002
static struct gpio_led carambola2_leds_gpio[] __initdata = {
{
.name = "carambola2:green:wlan",
.gpio = CARAMBOLA2_GPIO_LED_WLAN,
.active_low = 1,
}, {
.name = "carambola2:orange:eth0",
.gpio = CARAMBOLA2_GPIO_LED_ETH0,
.active_low = 0,
}, {
.name = "carambola2:orange:eth1",
.gpio = CARAMBOLA2_GPIO_LED_ETH1,
.active_low = 0,
}
};
static struct gpio_keys_button carambola2_gpio_keys[] __initdata = {
{
.desc = "jumpstart button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL,
.gpio = CARAMBOLA2_GPIO_BTN_JUMPSTART,
.active_low = 1,
},
};
static void __init carambola2_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET,
art + CARAMBOLA2_WMAC_MAC_OFFSET);
ath79_setup_ar933x_phy4_switch(true, true);
ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
}
static void __init carambola2_setup(void)
{
carambola2_common_setup();
ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(carambola2_leds_gpio),
carambola2_leds_gpio);
ath79_register_gpio_keys_polled(-1, CARAMBOLA2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(carambola2_gpio_keys),
carambola2_gpio_keys);
ath79_register_usb();
}
MIPS_MACHINE(ATH79_MACH_CARAMBOLA2, "CARAMBOLA2", "8devices Carambola2 board",
carambola2_setup);

765
target/linux/ar71xx/files/arch/mips/ath79/mach-cf-e316n-v2.c Normal file
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@@ -0,0 +1,765 @@
/*
* Support for COMFAST boards:
* - CF-E316N v2 (AR9341)
* - CF-E320N v2 (QCA9531)
* - CF-E355AC v1 (QCA9531 + QCA9882)
* - CF-E355AC v2 (QCA9531 + QCA9886)
* - CF-E375AC (QCA9563 + QCA9886 + QCA8337)
* - CF-E380AC v1/v2 (QCA9558)
* - CF-E385AC (QCA9558 + QCA9984 + QCA8337)
* - CF-E520N/CF-E530N (QCA9531)
*
* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
* Copyright (C) 2016 Gareth Parker <gareth41@orcon.net.nz>
* Copyright (C) 2015 Paul Fertser <fercerpav@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/ar8216_platform.h>
#include <linux/platform_data/phy-at803x.h>
#include <linux/platform_device.h>
#include <linux/timer.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "dev-usb.h"
#include "machtypes.h"
#include "pci.h"
#define CF_EXXXN_KEYS_POLL_INTERVAL 20
#define CF_EXXXN_KEYS_DEBOUNCE_INTERVAL (3 * CF_EXXXN_KEYS_POLL_INTERVAL)
/* CF-E316N v2 */
#define CF_E316N_V2_GPIO_LED_DIAG_B 0
#define CF_E316N_V2_GPIO_LED_DIAG_R 2
#define CF_E316N_V2_GPIO_LED_DIAG_G 3
#define CF_E316N_V2_GPIO_LED_WLAN 12
#define CF_E316N_V2_GPIO_LED_WAN 17
#define CF_E316N_V2_GPIO_LED_LAN 19
#define CF_E316N_V2_GPIO_EXT_WDT 16
#define CF_E316N_V2_GPIO_EXTERNAL_PA0 13
#define CF_E316N_V2_GPIO_EXTERNAL_PA1 14
#define CF_E316N_V2_GPIO_BTN_RESET 20
static struct gpio_led cf_e316n_v2_leds_gpio[] __initdata = {
{
.name = "cf-e316n-v2:blue:diag",
.gpio = CF_E316N_V2_GPIO_LED_DIAG_B,
.active_low = 0,
}, {
.name = "cf-e316n-v2:red:diag",
.gpio = CF_E316N_V2_GPIO_LED_DIAG_R,
.active_low = 0,
}, {
.name = "cf-e316n-v2:green:diag",
.gpio = CF_E316N_V2_GPIO_LED_DIAG_G,
.active_low = 0,
}, {
.name = "cf-e316n-v2:blue:wlan",
.gpio = CF_E316N_V2_GPIO_LED_WLAN,
.active_low = 1,
}, {
.name = "cf-e316n-v2:blue:wan",
.gpio = CF_E316N_V2_GPIO_LED_WAN,
.active_low = 1,
}, {
.name = "cf-e316n-v2:blue:lan",
.gpio = CF_E316N_V2_GPIO_LED_LAN,
.active_low = 1,
},
};
static struct gpio_keys_button cf_e316n_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
.gpio = CF_E316N_V2_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* CF-E320N v2 */
#define CF_E320N_V2_GPIO_LED_WLAN 0
#define CF_E320N_V2_GPIO_LED_WAN 2
#define CF_E320N_V2_GPIO_LED_LAN 3
#define CF_E320N_V2_GPIO_HEADER_J9_1 14
#define CF_E320N_V2_GPIO_HEADER_J9_2 12
#define CF_E320N_V2_GPIO_HEADER_J9_3 11
#define CF_E320N_V2_GPIO_HEADER_J9_4 16
#define CF_E320N_V2_GPIO_EXT_WDT 13
#define CF_E320N_V2_GPIO_BTN_RESET 17
static struct gpio_led cf_e320n_v2_leds_gpio[] __initdata = {
{
.name = "cf-e320n-v2:green:lan",
.gpio = CF_E320N_V2_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e320n-v2:red:wan",
.gpio = CF_E320N_V2_GPIO_LED_WAN,
.active_low = 0,
}, {
.name = "cf-e320n-v2:blue:wlan",
.gpio = CF_E320N_V2_GPIO_LED_WLAN,
.active_low = 0,
},
};
static struct gpio_keys_button cf_e320n_v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
.gpio = CF_E320N_V2_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* CF-E355AC v1/v2 */
#define CF_E355AC_GPIO_LED_LAN 3
#define CF_E355AC_GPIO_LED_WLAN2G 0
#define CF_E355AC_GPIO_LED_WLAN5G 2
#define CF_E355AC_GPIO_EXT_WDT 13
#define CF_E355AC_GPIO_BTN_RESET 17
static struct gpio_led cf_e355ac_v1_leds_gpio[] __initdata = {
{
.name = "cf-e355ac-v1:green:lan",
.gpio = CF_E355AC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e355ac-v1:blue:wlan2g",
.gpio = CF_E355AC_GPIO_LED_WLAN2G,
.active_low = 0,
}, {
.name = "cf-e355ac-v1:red:wlan5g",
.gpio = CF_E355AC_GPIO_LED_WLAN5G,
.active_low = 0,
},
};
static struct gpio_led cf_e355ac_v2_leds_gpio[] __initdata = {
{
.name = "cf-e355ac-v2:green:lan",
.gpio = CF_E355AC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e355ac-v2:blue:wlan2g",
.gpio = CF_E355AC_GPIO_LED_WLAN2G,
.active_low = 0,
}, {
.name = "cf-e355ac-v2:red:wlan5g",
.gpio = CF_E355AC_GPIO_LED_WLAN5G,
.active_low = 0,
},
};
static struct gpio_keys_button cf_e355ac_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
.gpio = CF_E355AC_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* CF-E375AC */
#define CF_E375AC_GPIO_LED_LAN 17
#define CF_E375AC_GPIO_LED_WLAN2G 16
#define CF_E375AC_GPIO_LED_WLAN5G 15
#define CF_E375AC_GPIO_EXT_WDT 6
#define CF_E375AC_GPIO_BTN_RESET 2
static struct gpio_led cf_e375ac_leds_gpio[] __initdata = {
{
.name = "cf-e375ac:green:lan",
.gpio = CF_E375AC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e375ac:red:wlan5g",
.gpio = CF_E375AC_GPIO_LED_WLAN5G,
.active_low = 0,
}, {
.name = "cf-e375ac:blue:wlan2g",
.gpio = CF_E375AC_GPIO_LED_WLAN2G,
.active_low = 0,
},
};
static struct gpio_keys_button cf_e375ac_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
.gpio = CF_E375AC_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg cf_e375ac_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data cf_e375ac_ar8337_data = {
.pad0_cfg = &cf_e375ac_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info cf_e375ac_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &cf_e375ac_ar8337_data,
},
};
/* CF-E380AC v1/v2, CF-E385AC */
#define CF_E38XAC_GPIO_LED_LAN 0
#define CF_E38XAC_GPIO_LED_WLAN2G 2
#define CF_E38XAC_GPIO_LED_WLAN5G 3
#define CF_E38XAC_GPIO_EXT_WDT 17
#define CF_E38XAC_GPIO_BTN_RESET 19
static struct gpio_led cf_e380ac_v1_leds_gpio[] __initdata = {
{
.name = "cf-e380ac-v1:green:lan",
.gpio = CF_E38XAC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e380ac-v1:blue:wlan2g",
.gpio = CF_E38XAC_GPIO_LED_WLAN2G,
.active_low = 0,
}, {
.name = "cf-e380ac-v1:red:wlan5g",
.gpio = CF_E38XAC_GPIO_LED_WLAN5G,
.active_low = 0,
},
};
static struct gpio_led cf_e380ac_v2_leds_gpio[] __initdata = {
{
.name = "cf-e380ac-v2:green:lan",
.gpio = CF_E38XAC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e380ac-v2:blue:wlan2g",
.gpio = CF_E38XAC_GPIO_LED_WLAN2G,
.active_low = 0,
}, {
.name = "cf-e380ac-v2:red:wlan5g",
.gpio = CF_E38XAC_GPIO_LED_WLAN5G,
.active_low = 0,
},
};
static struct gpio_led cf_e385ac_leds_gpio[] __initdata = {
{
.name = "cf-e385ac:green:lan",
.gpio = CF_E38XAC_GPIO_LED_LAN,
.active_low = 0,
}, {
.name = "cf-e385ac:blue:wlan2g",
.gpio = CF_E38XAC_GPIO_LED_WLAN2G,
.active_low = 0,
}, {
.name = "cf-e385ac:red:wlan5g",
.gpio = CF_E38XAC_GPIO_LED_WLAN5G,
.active_low = 0,
},
};
static struct gpio_keys_button cf_e38xac_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
.gpio = CF_E38XAC_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct at803x_platform_data cf_e380ac_v1v2_at803x_data = {
.disable_smarteee = 1,
};
static struct mdio_board_info cf_e380ac_v1v2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &cf_e380ac_v1v2_at803x_data,
},
};
/* CF-E520N/CF-E530N */
#define CF_E5X0N_GPIO_LED_WAN 11
#define CF_E5X0N_GPIO_BTN_RESET 17
static struct gpio_led cf_e520n_leds_gpio[] __initdata = {
{
.name = "cf-e520n:blue:wan",
.gpio = CF_E5X0N_GPIO_LED_WAN,
.active_low = 1,
}
};
static struct gpio_led cf_e530n_leds_gpio[] __initdata = {
{
.name = "cf-e530n:blue:wan",
.gpio = CF_E5X0N_GPIO_LED_WAN,
.active_low = 1,
}
};
/*
* Some COMFAST devices include external hardware watchdog chip,
* Pericon Technology PT7A7514, connected to a selected GPIO
* and WiSoC RESET_L input. Watchdog time-out is ~1.6 s.
*/
#define CF_EXXXN_EXT_WDT_TIMEOUT_MS 500
static struct timer_list gpio_wdt_timer;
static void gpio_wdt_toggle(unsigned long gpio)
{
static int state;
state = !state;
gpio_set_value(gpio, state);
mod_timer(&gpio_wdt_timer,
jiffies + msecs_to_jiffies(CF_EXXXN_EXT_WDT_TIMEOUT_MS));
}
static void __init cf_exxxn_common_setup(unsigned long art_ofs, int gpio_wdt)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f001000 + art_ofs);
if (gpio_wdt > -1) {
gpio_request_one(gpio_wdt, GPIOF_OUT_INIT_HIGH,
"PT7A7514 watchdog");
setup_timer(&gpio_wdt_timer, gpio_wdt_toggle, gpio_wdt);
gpio_wdt_toggle(gpio_wdt);
}
ath79_register_m25p80(NULL);
ath79_register_wmac(art, NULL);
ath79_register_usb();
}
static void __init cf_e316n_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);
cf_exxxn_common_setup(0x10000, CF_E316N_V2_GPIO_EXT_WDT);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
ath79_register_mdio(1, 0x0);
/* GMAC0 is connected to the PHY0 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
ath79_register_eth(1);
/* Enable 2x Skyworks SE2576L WLAN power amplifiers */
gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA0, GPIOF_OUT_INIT_HIGH,
"WLAN PA0");
gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA1, GPIOF_OUT_INIT_HIGH,
"WLAN PA1");
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e316n_v2_leds_gpio),
cf_e316n_v2_leds_gpio);
ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e316n_v2_gpio_keys),
cf_e316n_v2_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_CF_E316N_V2, "CF-E316N-V2", "COMFAST CF-E316N v2",
cf_e316n_v2_setup);
static void __init cf_exxxn_qca953x_eth_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
/* LAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
ath79_register_eth(1);
/* WAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
}
static void __init cf_e320n_v2_setup(void)
{
cf_exxxn_common_setup(0x10000, CF_E320N_V2_GPIO_EXT_WDT);
cf_exxxn_qca953x_eth_setup();
/* Disable JTAG (enables GPIO0-3) */
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_LAN, true);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WAN, true);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WLAN, true);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WAN, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WLAN, 0);
/* Enable GPIO function for GPIOs in J9 header */
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_1, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_2, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_3, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_4, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e320n_v2_leds_gpio),
cf_e320n_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e320n_v2_gpio_keys),
cf_e320n_v2_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_CF_E320N_V2, "CF-E320N-V2", "COMFAST CF-E320N v2",
cf_e320n_v2_setup);
static void __init cf_e355ac_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f010000);
/* Disable JTAG, enabling GPIOs 0-3 */
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);
cf_exxxn_common_setup(0x10000, CF_E355AC_GPIO_EXT_WDT);
cf_exxxn_qca953x_eth_setup();
ath79_gpio_output_select(CF_E355AC_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN2G, 0);
ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN5G, 0);
ap91_pci_init(art + 0x5000, NULL);
ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e355ac_gpio_keys),
cf_e355ac_gpio_keys);
}
static void __init cf_e355ac_v1_setup(void)
{
cf_e355ac_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_v1_leds_gpio),
cf_e355ac_v1_leds_gpio);
}
static void __init cf_e355ac_v2_setup(void)
{
cf_e355ac_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_v2_leds_gpio),
cf_e355ac_v2_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CF_E355AC, "CF-E355AC-V1", "COMFAST CF-E355AC v1",
cf_e355ac_v1_setup);
MIPS_MACHINE(ATH79_MACH_CF_E355AC_V2, "CF-E355AC-V2", "COMFAST CF-E355AC v2",
cf_e355ac_v2_setup);
static void __init cf_e375ac_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);
/* Disable JTAG, enabling GPIOs 0-3 */
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);
cf_exxxn_common_setup(0x40000, CF_E375AC_GPIO_EXT_WDT);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN2G, 0);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN5G, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e375ac_leds_gpio),
cf_e375ac_leds_gpio);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e375ac_gpio_keys),
cf_e375ac_gpio_keys);
platform_device_register(&ath79_mdio0_device);
mdiobus_register_board_info(cf_e375ac_mdio0_info,
ARRAY_SIZE(cf_e375ac_mdio0_info));
/* GMAC0 is connected to an AR8337 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_CF_E375AC, "CF-E375AC", "COMFAST CF-E375AC",
cf_e375ac_setup);
static void __init cf_e38xac_common_setup(unsigned long art_ofs)
{
cf_exxxn_common_setup(art_ofs, CF_E38XAC_GPIO_EXT_WDT);
ath79_register_pci();
/* Disable JTAG (enables GPIO0-3) */
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_LAN, true);
ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN2G, true);
ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN5G, true);
ath79_gpio_output_select(CF_E38XAC_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN2G, 0);
ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN5G, 0);
/* For J7-4 */
ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e38xac_gpio_keys),
cf_e38xac_gpio_keys);
}
static void __init cf_e380ac_v1v2_common_setup(unsigned long art_ofs)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f000000 + art_ofs);
cf_e38xac_common_setup(art_ofs);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(cf_e380ac_v1v2_mdio0_info,
ARRAY_SIZE(cf_e380ac_v1v2_mdio0_info));
/* LAN */
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_pll_data.pll_1000 = 0xbe000000;
ath79_eth0_pll_data.pll_100 = 0xb0000101;
ath79_eth0_pll_data.pll_10 = 0xb0001313;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
}
static void __init cf_e380ac_v1_setup(void)
{
cf_e380ac_v1v2_common_setup(0x20000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e380ac_v1_leds_gpio),
cf_e380ac_v1_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CF_E380AC_V1, "CF-E380AC-V1", "COMFAST CF-E380AC v1",
cf_e380ac_v1_setup);
static void __init cf_e380ac_v2_setup(void)
{
cf_e380ac_v1v2_common_setup(0x40000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e380ac_v2_leds_gpio),
cf_e380ac_v2_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CF_E380AC_V2, "CF-E380AC-V2", "COMFAST CF-E380AC v2",
cf_e380ac_v2_setup);
/* QCA8337 GMAC0 is connected with QCA9558 over RGMII */
static struct ar8327_pad_cfg cf_e385ac_qca8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL1,
};
/* QCA8337 GMAC6 is connected with QCA9558 over SGMII */
static struct ar8327_pad_cfg cf_e385ac_qca8337_pad6_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
};
static struct ar8327_platform_data cf_e385ac_qca8337_data = {
.pad0_cfg = &cf_e385ac_qca8337_pad0_cfg,
.pad6_cfg = &cf_e385ac_qca8337_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info cf_e385ac_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &cf_e385ac_qca8337_data,
},
};
static void __init cf_e385ac_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);
cf_e38xac_common_setup(0x40000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e385ac_leds_gpio),
cf_e385ac_leds_gpio);
mdiobus_register_board_info(cf_e385ac_mdio0_info,
ARRAY_SIZE(cf_e385ac_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* QCA9558 GMAC0 is connected to RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x96000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
/* QCA9558 GMAC1 is connected to SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_CF_E385AC, "CF-E385AC", "COMFAST CF-E385AC",
cf_e385ac_setup);
static void __init cf_e5x0n_gpio_setup(void)
{
ath79_gpio_direction_select(CF_E5X0N_GPIO_LED_WAN, true);
ath79_gpio_output_select(CF_E5X0N_GPIO_LED_WAN, 0);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e320n_v2_gpio_keys),
cf_e320n_v2_gpio_keys);
}
static void __init cf_e520n_setup(void)
{
cf_exxxn_common_setup(0x10000, -1);
cf_exxxn_qca953x_eth_setup();
cf_e5x0n_gpio_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e520n_leds_gpio),
cf_e520n_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CF_E520N, "CF-E520N", "COMFAST CF-E520N",
cf_e520n_setup);
static void __init cf_e530n_setup(void)
{
cf_exxxn_common_setup(0x10000, -1);
cf_exxxn_qca953x_eth_setup();
cf_e5x0n_gpio_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e530n_leds_gpio),
cf_e530n_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_CF_E530N, "CF-E530N", "COMFAST CF-E530N",
cf_e530n_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c Normal file
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/*
* TP-LINK CPE210/210 v2/220/510/520 board support
*
* Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
* Copyright (C) 2017 Robert Marko <robimarko@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CPE510_GPIO_LED_LAN0 11
#define CPE510_GPIO_LED_LAN1 12
#define CPE510_GPIO_LED_L1 13
#define CPE510_GPIO_LED_L2 14
#define CPE510_GPIO_LED_L3 15
#define CPE510_GPIO_LED_L4 16
/* All LEDs/button except for link4 are the same for CPE and WBS series */
#define WBS510_GPIO_LED_L4 2
#define CPE510_GPIO_EXTERNAL_LNA0 18
#define CPE510_GPIO_EXTERNAL_LNA1 19
#define CPE510_GPIO_BTN_RESET 4
#define CPE510_KEYS_POLL_INTERVAL 20 /* msecs */
#define CPE510_KEYS_DEBOUNCE_INTERVAL (3 * CPE510_KEYS_POLL_INTERVAL)
/* CPE210 v2 reset GPIO */
#define CPE210_V2_GPIO_BTN_RESET 17
static struct gpio_led cpe510_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:lan1",
.gpio = CPE510_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = CPE510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_led wbs510_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:lan1",
.gpio = CPE510_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = WBS510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_led cpe210_v2_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = CPE510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_keys_button cpe510_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL,
.gpio = CPE510_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct gpio_keys_button cpe210_v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL,
.gpio = CPE210_V2_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init cpe_setup(u8 *mac)
{
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe510_gpio_keys),
cpe510_gpio_keys);
ath79_wmac_set_ext_lna_gpio(0, CPE510_GPIO_EXTERNAL_LNA0);
ath79_wmac_set_ext_lna_gpio(1, CPE510_GPIO_EXTERNAL_LNA1);
ath79_register_m25p80(NULL);
ath79_register_mdio(1, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
}
static void __init cpe210_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio),
cpe510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init cpe510_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio),
cpe510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init wbs_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wbs510_leds_gpio),
wbs510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init cpe210_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe210_v2_leds_gpio),
cpe210_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, CPE510_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe210_v2_gpio_keys),
cpe210_v2_gpio_keys);
ath79_register_m25p80(NULL);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_CPE210, "CPE210", "TP-LINK CPE210/220",
cpe210_setup);
MIPS_MACHINE(ATH79_MACH_CPE210_V2, "CPE210V2", "TP-LINK CPE210 v2",
cpe210_v2_setup);
MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE510/520",
cpe510_setup);
MIPS_MACHINE(ATH79_MACH_WBS210, "WBS210", "TP-LINK WBS210",
wbs_setup);
MIPS_MACHINE(ATH79_MACH_WBS510, "WBS510", "TP-LINK WBS510",
wbs_setup);

152
target/linux/ar71xx/files/arch/mips/ath79/mach-cpe870.c Normal file
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/*
* YunCore CPE870 board support
*
* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CPE870_GPIO_LED_LINK1 0
#define CPE870_GPIO_LED_LINK2 1
#define CPE870_GPIO_LED_LINK3 2
#define CPE870_GPIO_LED_LINK4 3
#define CPE870_GPIO_LED_WLAN 13
#define CPE870_GPIO_LED_WAN 19
#define CPE870_GPIO_LED_LAN 20
#define CPE870_GPIO_BTN_RESET 16
#define CPE870_KEYS_POLL_INTERVAL 20
#define CPE870_KEYS_DEBOUNCE_INTERVAL (3 * CPE870_KEYS_POLL_INTERVAL)
static struct gpio_led cpe870_leds_gpio[] __initdata = {
{
.name = "cpe870:green:lan",
.gpio = CPE870_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "cpe870:green:wan",
.gpio = CPE870_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "cpe870:green:wlan",
.gpio = CPE870_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "cpe870:green:link1",
.gpio = CPE870_GPIO_LED_LINK1,
.active_low = 1,
},
{
.name = "cpe870:green:link2",
.gpio = CPE870_GPIO_LED_LINK2,
.active_low = 1,
},
{
.name = "cpe870:green:link3",
.gpio = CPE870_GPIO_LED_LINK3,
.active_low = 1,
},
{
.name = "cpe870:green:link4",
.gpio = CPE870_GPIO_LED_LINK4,
.active_low = 1,
},
};
static struct gpio_keys_button cpe870_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CPE870_KEYS_DEBOUNCE_INTERVAL,
.gpio = CPE870_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init cpe870_gpio_setup(void)
{
/* Disable JTAG (enables GPIO0-3) */
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_direction_select(CPE870_GPIO_LED_LINK1, true);
ath79_gpio_direction_select(CPE870_GPIO_LED_LINK2, true);
ath79_gpio_direction_select(CPE870_GPIO_LED_LINK3, true);
ath79_gpio_direction_select(CPE870_GPIO_LED_LINK4, true);
/* Mute LEDs on boot */
gpio_set_value(CPE870_GPIO_LED_LAN, 1);
gpio_set_value(CPE870_GPIO_LED_WAN, 1);
gpio_set_value(CPE870_GPIO_LED_LINK1, 1);
gpio_set_value(CPE870_GPIO_LED_LINK2, 1);
gpio_set_value(CPE870_GPIO_LED_LINK3, 1);
gpio_set_value(CPE870_GPIO_LED_LINK4, 1);
ath79_gpio_output_select(CPE870_GPIO_LED_LINK1, 0);
ath79_gpio_output_select(CPE870_GPIO_LED_LINK2, 0);
ath79_gpio_output_select(CPE870_GPIO_LED_LINK3, 0);
ath79_gpio_output_select(CPE870_GPIO_LED_LINK4, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe870_leds_gpio),
cpe870_leds_gpio);
ath79_register_gpio_keys_polled(-1, CPE870_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe870_gpio_keys),
cpe870_gpio_keys);
}
static void __init cpe870_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
cpe870_gpio_setup();
ath79_register_mdio(1, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
/* LAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_eth(1);
/* WAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_CPE870, "CPE870", "YunCore CPE870", cpe870_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-cr3000.c Normal file
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/*
* PowerCloud Systems CR3000 support
*
* Copyright (c) 2011 Qualcomm Atheros
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2012-2013 PowerCloud Systems
* Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/gpio.h>
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CR3000_GPIO_LED_WLAN_2G 13
#define CR3000_GPIO_LED_POWER_AMBER 15
#define CR3000_GPIO_LED_WAN 18
#define CR3000_GPIO_LED_LAN1 19
#define CR3000_GPIO_LED_LAN2 20
#define CR3000_GPIO_LED_LAN3 21
#define CR3000_GPIO_LED_LAN4 22
#define CR3000_GPIO_BTN_WPS 16
#define CR3000_GPIO_BTN_RESET 17
#define CR3000_KEYS_POLL_INTERVAL 20 /* msecs */
#define CR3000_KEYS_DEBOUNCE_INTERVAL (3 * CR3000_KEYS_POLL_INTERVAL)
#define CR3000_MAC0_OFFSET 0
#define CR3000_MAC1_OFFSET 6
#define CR3000_WMAC_CALDATA_OFFSET 0x1000
#define CR3000_WMAC_MAC_OFFSET 0x1002
#define CR3000_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led cr3000_leds_gpio[] __initdata = {
{
.name = "pcs:amber:power",
.gpio = CR3000_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "pcs:blue:wlan",
.gpio = CR3000_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "pcs:blue:wan",
.gpio = CR3000_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "pcs:blue:lan1",
.gpio = CR3000_GPIO_LED_LAN1,
.active_low = 1,
},
{
.name = "pcs:blue:lan2",
.gpio = CR3000_GPIO_LED_LAN2,
.active_low = 1,
},
{
.name = "pcs:blue:lan3",
.gpio = CR3000_GPIO_LED_LAN3,
.active_low = 1,
},
{
.name = "pcs:blue:lan4",
.gpio = CR3000_GPIO_LED_LAN4,
.active_low = 1,
},
};
static struct gpio_keys_button cr3000_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR3000_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR3000_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init cr3000_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cr3000_leds_gpio),
cr3000_leds_gpio);
ath79_register_gpio_keys_polled(-1, CR3000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cr3000_gpio_keys),
cr3000_gpio_keys);
/* WLAN 2GHz onboard */
ath79_register_wmac(art + CR3000_WMAC_CALDATA_OFFSET, art + CR3000_WMAC_MAC_OFFSET);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
/* Lan 4-port switch attached to GMAC1 internal switch */
ath79_init_mac(ath79_eth1_data.mac_addr, art + CR3000_MAC0_OFFSET, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
ath79_init_mac(ath79_eth0_data.mac_addr, art + CR3000_MAC1_OFFSET, 0);
/* WAN Fast Ethernet interface attached to GMAC0 */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(0);
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_CR3000, "CR3000", "PowerCloud CR3000",
cr3000_setup);

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/*
* PowerCloud CR5000 support
*
* Copyright (c) 2011 Qualcomm Atheros
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2012-2013 PowerCloud Systems
* Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/gpio.h>
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CR5000_GPIO_LED_WLAN_2G 14
#define CR5000_GPIO_LED_WPS 12
#define CR5000_GPIO_LED_POWER_AMBER 4
/* GPIO2 has to have JTAG disabled as it is also to
* power led
*/
#define CR5000_GPIO_LED_POWER_ENABLE 2
#define CR5000_GPIO_BTN_WPS 16
#define CR5000_GPIO_BTN_RESET 17
#define CR5000_KEYS_POLL_INTERVAL 20 /* msecs */
#define CR5000_KEYS_DEBOUNCE_INTERVAL (3 * CR5000_KEYS_POLL_INTERVAL)
#define CR5000_MAC0_OFFSET 0
#define CR5000_WMAC_CALDATA_OFFSET 0x1000
#define CR5000_WMAC_MAC_OFFSET 0x1002
#define CR5000_PCIE_CALDATA_OFFSET 0x5000
#define CR5000_PCIE_MAC_OFFSET 0x5002
static struct gpio_led cr5000_leds_gpio[] __initdata = {
{
.name = "pcs:amber:power",
.gpio = CR5000_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "pcs:white:wps",
.gpio = CR5000_GPIO_LED_WPS,
.active_low = 1,
},
{
.name = "pcs:blue:wlan",
.gpio = CR5000_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_keys_button cr5000_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR5000_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR5000_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg cr5000_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg cr5000_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data cr5000_ar8327_data = {
.pad0_cfg = &cr5000_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &cr5000_ar8327_led_cfg,
};
static struct mdio_board_info cr5000_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &cr5000_ar8327_data,
},
};
static void __init cr5000_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
gpio_request_one(CR5000_GPIO_LED_POWER_ENABLE,
GPIOF_OUT_INIT_LOW, "Power LED enable");
ath79_gpio_output_select(CR5000_GPIO_LED_POWER_AMBER, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CR5000_GPIO_LED_WLAN_2G, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CR5000_GPIO_LED_WPS, AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cr5000_leds_gpio),
cr5000_leds_gpio);
ath79_register_gpio_keys_polled(-1, CR5000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cr5000_gpio_keys),
cr5000_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + CR5000_WMAC_CALDATA_OFFSET, art + CR5000_WMAC_MAC_OFFSET);
ap94_pci_init(NULL, NULL, NULL, art + CR5000_PCIE_MAC_OFFSET);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + CR5000_MAC0_OFFSET, 0);
mdiobus_register_board_info(cr5000_mdio0_info,
ARRAY_SIZE(cr5000_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_CR5000, "CR5000", "PowerCloud CR5000",
cr5000_setup);

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/*
* D-Link DAP-1330
*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2017 Nicolò Veronese <nicveronese@gmail.com>
* Copyright (c) 2017 Federico Cappon <dududede371@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#include <linux/kernel.h>
#include <linux/vmalloc.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/string.h>
#define DAP_1330_GPIO_LED_GREEN_POWER 13
#define DAP_1330_GPIO_LED_RED_POWER 3
#define DAP_1330_GPIO_LED_GREEN_WIFI 14
#define DAP_1330_GPIO_LED_RED_WIFI 11
#define DAP_1330_GPIO_LED_SIGNAL1 15
#define DAP_1330_GPIO_LED_SIGNAL2 16
#define DAP_1330_GPIO_BTN_WPS 2
#define DAP_1330_GPIO_BTN_RESET 17
#define DAP_1330_KEYS_POLL_INTERVAL 20 /* msecs */
#define DAP_1330_KEYS_DEBOUNCE_INTERVAL (3 * DAP_1330_KEYS_POLL_INTERVAL)
#define DAP1330_MAC_ADDR 0x1f020001
#define DAP1330_WMAC_CALDATA_ADDR 0x1f010000
#define DAP_1330_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led dap_1330_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DAP_1330_GPIO_LED_GREEN_POWER,
.active_low = 1,
},
{
.name = "d-link:red:power",
.gpio = DAP_1330_GPIO_LED_RED_POWER,
.active_low = 1,
},
{
.name = "d-link:green:wifi",
.gpio = DAP_1330_GPIO_LED_GREEN_WIFI,
.active_low = 1,
},
{
.name = "d-link:red:wifi",
.gpio = DAP_1330_GPIO_LED_RED_WIFI,
.active_low = 1,
},
{
.name = "d-link:green:signal1",
.gpio = DAP_1330_GPIO_LED_SIGNAL1,
.active_low = 1,
},
{
.name = "d-link:green:signal2",
.gpio = DAP_1330_GPIO_LED_SIGNAL2,
.active_low = 1,
}
};
static struct gpio_keys_button dap_1330_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DAP_1330_KEYS_DEBOUNCE_INTERVAL,
.gpio = DAP_1330_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DAP_1330_KEYS_DEBOUNCE_INTERVAL,
.gpio = DAP_1330_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init dap_1330_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DAP1330_WMAC_CALDATA_ADDR);
u8 *mac_ptr = (u8 *) KSEG1ADDR(DAP1330_MAC_ADDR);
u8 mac[ETH_ALEN];
ath79_parse_ascii_mac((char *) mac_ptr, mac);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dap_1330_leds_gpio),
dap_1330_leds_gpio);
ath79_register_gpio_keys_polled(-1, DAP_1330_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dap_1330_gpio_keys),
dap_1330_gpio_keys);
ath79_register_wmac(art + DAP_1330_WMAC_CALDATA_OFFSET, mac);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_DAP_1330_A1, "DAP-1330-A1",
"D-Link DAP-1330 Rev. A1", dap_1330_setup);

191
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/*
* D-Link DAP-2695 rev. A1 support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2016 Stijn Tintel <stijn@linux-ipv6.be>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define DAP2695_GPIO_LED_GREEN_POWER 23
#define DAP2695_GPIO_LED_RED_POWER 14
#define DAP2695_GPIO_LED_WLAN_2G 13
#define DAP2695_GPIO_BTN_RESET 17
#define DAP2695_KEYS_POLL_INTERVAL 20 /* msecs */
#define DAP2695_KEYS_DEBOUNCE_INTERVAL (3 * DAP2695_KEYS_POLL_INTERVAL)
#define DAP2695_NVRAM_ADDR 0x1f040000
#define DAP2695_NVRAM_SIZE 0x10000
#define DAP2695_MAC0_OFFSET 1
#define DAP2695_MAC1_OFFSET 2
#define DAP2695_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led dap2695_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DAP2695_GPIO_LED_GREEN_POWER,
.active_low = 1,
},
{
.name = "d-link:red:power",
.gpio = DAP2695_GPIO_LED_RED_POWER,
.active_low = 1,
},
{
.name = "d-link:green:wlan2g",
.gpio = DAP2695_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_keys_button dap2695_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DAP2695_KEYS_DEBOUNCE_INTERVAL,
.gpio = DAP2695_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dap2695_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.mac06_exchange_dis = true,
};
static struct ar8327_pad_cfg dap2695_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dap2695_ar8327_data = {
.pad0_cfg = &dap2695_ar8327_pad0_cfg,
.pad6_cfg = &dap2695_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dap2695_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dap2695_ar8327_data,
},
};
static struct flash_platform_data dap2695_flash_data = {
.type = "mx25l12805d",
};
static void dap2695_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(DAP2695_NVRAM_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, DAP2695_NVRAM_SIZE,
name, mac);
if (err)
pr_err("no MAC address found for %s\n", name);
}
static void __init dap2695_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN], wmac0[ETH_ALEN];
dap2695_get_mac("lanmac=", mac0);
dap2695_get_mac("wanmac=", mac1);
dap2695_get_mac("wlanmac=", wmac0);
ath79_register_m25p80(&dap2695_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dap2695_leds_gpio),
dap2695_leds_gpio);
ath79_register_gpio_keys_polled(-1, DAP2695_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dap2695_gpio_keys),
dap2695_gpio_keys);
ath79_register_wmac(art + DAP2695_WMAC_CALDATA_OFFSET, wmac0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(dap2695_mdio0_info,
ARRAY_SIZE(dap2695_mdio0_info));
/* GMAC0 is connected to the RGMII interface */
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, DAP2695_MAC0_OFFSET);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, DAP2695_MAC1_OFFSET);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_DAP_2695_A1, "DAP-2695-A1",
"D-Link DAP-2695 rev. A1",
dap2695_setup);

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/*
* D-Link DGL-5500 board support
*
* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14
#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19
#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22
#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23
#define DGL_5500_A1_GPIO_BTN_WPS 16
#define DGL_5500_A1_GPIO_BTN_RESET 17
#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \
(3 * DGL_5500_A1_KEYS_POLL_INTERVAL)
#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000
#define DGL_5500_A1_LAN_MAC_OFFSET 0x04
#define DGL_5500_A1_WAN_MAC_OFFSET 0x16
static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN,
.active_low = 1,
},
{
.name = "d-link:orange:power",
.gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN,
.active_low = 1,
},
{
.name = "d-link:orange:planet",
.gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE,
.active_low = 1,
},
};
static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DGL_5500_A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DGL_5500_A1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = {
/* Use the SGMII interface for the GMAC0 of the AR8327 switch */
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dgl_5500_a1_ar8327_data = {
.pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dgl_5500_a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dgl_5500_a1_ar8327_data,
},
};
static void __init dgl_5500_a1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 lan_mac[ETH_ALEN];
ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio),
dgl_5500_a1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dgl_5500_a1_gpio_keys),
dgl_5500_a1_gpio_keys);
ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(dgl_5500_a1_mdio0_info,
ARRAY_SIZE(dgl_5500_a1_mdio0_info));
ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
/* GMAC1 is connected to an AR8327N switch via the SMGII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.phy_mask = BIT(0);
ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
ath79_register_usb();
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1",
dgl_5500_a1_setup);

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/*
* D-Link DHP-1565 rev. A1 board support
*
* Copyright (C) 2014 Jacek Kikiewicz
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DHP1565A1_GPIO_LED_BLUE_USB 11
#define DHP1565A1_GPIO_LED_AMBER_POWER 14
#define DHP1565A1_GPIO_LED_BLUE_POWER 22
#define DHP1565A1_GPIO_LED_BLUE_WPS 15
#define DHP1565A1_GPIO_LED_AMBER_PLANET 19
#define DHP1565A1_GPIO_LED_BLUE_PLANET 18
#define DHP1565A1_GPIO_LED_WLAN_2G 13
#define DHP1565A1_GPIO_WAN_LED_ENABLE 20
#define DHP1565A1_GPIO_BTN_RESET 17
#define DHP1565A1_GPIO_BTN_WPS 16
#define DHP1565A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DHP1565A1_KEYS_DEBOUNCE_INTERVAL (3 * DHP1565A1_KEYS_POLL_INTERVAL)
#define DHP1565A1_MAC0_OFFSET 0xFFA0
#define DHP1565A1_MAC1_OFFSET 0xFFB4
#define DHP1565A1_WMAC0_OFFSET 0x5
#define DHP1565A1_WMAC_CALDATA_OFFSET 0x1000
#define DHP1565A1_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dhp1565a1_leds_gpio[] __initdata = {
{
.name = "d-link:amber:power",
.gpio = DHP1565A1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:green:power",
.gpio = DHP1565A1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DHP1565A1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DHP1565A1_GPIO_LED_BLUE_PLANET,
.active_low = 1,
},
};
static struct gpio_keys_button dhp1565a1_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DHP1565A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DHP1565A1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dhp1565a1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data dhp1565a1_ar8327_data = {
.pad0_cfg = &dhp1565a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dhp1565a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dhp1565a1_ar8327_data,
},
};
static void __init dhp1565a1_generic_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN];
ath79_parse_ascii_mac(mac + DHP1565A1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(mac + DHP1565A1_MAC1_OFFSET, mac1);
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, DHP1565A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dhp1565a1_gpio_keys),
dhp1565a1_gpio_keys);
ath79_init_mac(wmac0, mac0, 0);
ath79_register_wmac(art + DHP1565A1_WMAC_CALDATA_OFFSET, wmac0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(dhp1565a1_mdio0_info,
ARRAY_SIZE(dhp1565a1_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 1);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
ath79_register_usb();
}
static void __init dhp1565a1_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(dhp1565a1_leds_gpio),
dhp1565a1_leds_gpio);
dhp1565a1_generic_setup();
}
MIPS_MACHINE(ATH79_MACH_DHP_1565_A1, "DHP-1565-A1",
"D-Link DHP-1565 rev. A1",
dhp1565a1_setup);

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/*
* DLink DIR-505 A1 board support
*
* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "dev-usb.h"
#include "machtypes.h"
#define DIR_505A1_GPIO_BTN_WPS 11 /* verify */
#define DIR_505A1_GPIO_BTN_RESET 12 /* verify */
#define DIR_505A1_GPIO_LED_RED 26 /* unused, fyi */
#define DIR_505A1_GPIO_LED_GREEN 27
#define DIR_505A1_GPIO_WAN_LED_ENABLE 1
#define DIR_505A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL)
#define DIR_505A1_ART_ADDRESS 0x1f010000
#define DIR_505A1_CALDATA_OFFSET 0x1000
#define DIR_505A1_MAC_PART_ADDRESS 0x1f020000
#define DIR_505A1_LAN_MAC_OFFSET 0x04
#define DIR_505A1_WAN_MAC_OFFSET 0x16
static struct gpio_led dir_505_a1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_505A1_GPIO_LED_GREEN,
.active_low = 1,
}, {
.name = "d-link:red:status",
.gpio = DIR_505A1_GPIO_LED_RED,
.active_low = 1,
},
};
static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_505A1_GPIO_BTN_RESET,
.active_low = 0,
}, {
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_505A1_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_505_a1_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS);
u8 *mac = (u8 *) KSEG1ADDR(DIR_505A1_MAC_PART_ADDRESS);
u8 lan_mac[ETH_ALEN];
u8 wan_mac[ETH_ALEN];
ath79_setup_ar933x_phy4_switch(false, false);
ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE,
GPIOF_OUT_INIT_LOW, "WAN LED enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio),
dir_505_a1_leds_gpio);
ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_505_a1_gpio_keys),
dir_505_a1_gpio_keys);
ath79_register_m25p80(NULL);
ath79_register_usb();
ath79_parse_ascii_mac(mac + DIR_505A1_LAN_MAC_OFFSET, lan_mac);
ath79_parse_ascii_mac(mac + DIR_505A1_WAN_MAC_OFFSET, wan_mac);
ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(1);
ath79_register_eth(0);
ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1",
"D-Link DIR-505 rev. A1", dir_505_a1_setup);

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/*
* D-Link DIR-600 rev. A1 board support
*
* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "nvram.h"
#define DIR_600_A1_GPIO_LED_WPS 0
#define DIR_600_A1_GPIO_LED_POWER_AMBER 1
#define DIR_600_A1_GPIO_LED_POWER_GREEN 6
#define DIR_600_A1_GPIO_LED_LAN1 13
#define DIR_600_A1_GPIO_LED_LAN2 14
#define DIR_600_A1_GPIO_LED_LAN3 15
#define DIR_600_A1_GPIO_LED_LAN4 16
#define DIR_600_A1_GPIO_LED_WAN_AMBER 7
#define DIR_600_A1_GPIO_LED_WAN_GREEN 17
#define DIR_600_A1_GPIO_BTN_RESET 8
#define DIR_600_A1_GPIO_BTN_WPS 12
#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
#define DIR_600_A1_NVRAM_ADDR 0x1f030000
#define DIR_600_A1_NVRAM_SIZE 0x10000
static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_600_A1_GPIO_LED_POWER_GREEN,
}, {
.name = "d-link:amber:power",
.gpio = DIR_600_A1_GPIO_LED_POWER_AMBER,
}, {
.name = "d-link:amber:wan",
.gpio = DIR_600_A1_GPIO_LED_WAN_AMBER,
}, {
.name = "d-link:green:wan",
.gpio = DIR_600_A1_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan1",
.gpio = DIR_600_A1_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "d-link:green:lan2",
.gpio = DIR_600_A1_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "d-link:green:lan3",
.gpio = DIR_600_A1_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "d-link:green:lan4",
.gpio = DIR_600_A1_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_600_A1_GPIO_LED_WPS,
.active_low = 1,
}
};
static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_600_A1_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_600_A1_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_600_a1_setup(void)
{
const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac_buff[6];
u8 *mac = NULL;
if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
"lan_mac=", mac_buff) == 0) {
ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
mac = mac_buff;
}
ath79_register_m25p80(NULL);
ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
dir_600_a1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_600_a1_gpio_keys),
dir_600_a1_gpio_keys);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
ap91_pci_init(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
dir_600_a1_setup);
MIPS_MACHINE(ATH79_MACH_EBR_2310_C1, "EBR-2310-C1", "D-Link EBR-2310 rev. C1",
dir_600_a1_setup);
static void __init dir_615_e1_setup(void)
{
dir_600_a1_setup();
}
MIPS_MACHINE(ATH79_MACH_DIR_615_E1, "DIR-615-E1", "D-Link DIR-615 rev. E1",
dir_615_e1_setup);
static void __init dir_615_e4_setup(void)
{
dir_600_a1_setup();
ap9x_pci_setup_wmac_led_pin(0, 1);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
dir_615_e4_setup);

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/*
* D-Link DIR-615 rev C1 board support
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */
#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */
#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */
#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */
#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */
#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */
#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */
/* buttons may need refinement */
#define DIR_615C1_GPIO_BTN_WPS 12
#define DIR_615C1_GPIO_BTN_RESET 21
#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL)
#define DIR_615C1_CONFIG_ADDR 0x1f020000
#define DIR_615C1_CONFIG_SIZE 0x10000
#define DIR_615C1_WLAN_MAC_ADDR 0x1f3fffb4
static struct gpio_led dir_615c1_leds_gpio[] __initdata = {
{
.name = "d-link:orange:status",
.gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_615C1_GPIO_LED_BLUE_WPS,
.active_low = 1,
}, {
.name = "d-link:green:wan",
.gpio = DIR_615C1_GPIO_LED_GREEN_WAN,
.active_low = 1,
}, {
.name = "d-link:green:wancpu",
.gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU,
.active_low = 1,
}, {
.name = "d-link:green:wlan",
.gpio = DIR_615C1_GPIO_LED_GREEN_WLAN,
.active_low = 1,
}, {
.name = "d-link:green:status",
.gpio = DIR_615C1_GPIO_LED_GREEN_STATUS,
.active_low = 1,
}, {
.name = "d-link:orange:wan",
.gpio = DIR_615C1_GPIO_LED_ORANGE_WAN,
.active_low = 1,
}
};
static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615C1_GPIO_BTN_RESET,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615C1_GPIO_BTN_WPS,
}
};
#define DIR_615C1_LAN_PHYMASK BIT(0)
#define DIR_615C1_WAN_PHYMASK BIT(4)
#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \
DIR_615C1_WAN_PHYMASK))
static void __init dir_615c1_setup(void)
{
const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac[ETH_ALEN], wlan_mac[ETH_ALEN];
if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE,
"lan_mac=", mac) == 0) {
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
}
ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615C1_WLAN_MAC_ADDR), wlan_mac);
ath79_register_mdio(0, DIR_615C1_MDIO_MASK);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio),
dir_615c1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_615c1_gpio_keys),
dir_615c1_gpio_keys);
ath79_register_wmac(eeprom, wlan_mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1",
dir_615c1_setup);

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/*
* D-Link DIR-615 rev. I1 board support
* Copyright (C) 2013-2015 Jaehoon You <teslamint@gmail.com>
*
* based on the DIR-600 rev. A1 board support code
* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DIR_615_I1_GPIO_LED_WPS 15
#define DIR_615_I1_GPIO_LED_POWER_AMBER 14
#define DIR_615_I1_GPIO_LED_POWER_GREEN 4
#define DIR_615_I1_GPIO_LED_WAN_AMBER 22
#define DIR_615_I1_GPIO_LED_WAN_GREEN 12
#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13
#define DIR_615_I1_GPIO_BTN_WPS 16
#define DIR_615_I1_GPIO_BTN_RESET 17
#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL)
#define DIR_615_I1_LAN_PHYMASK BIT(0)
#define DIR_615_I1_WAN_PHYMASK BIT(4)
#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4
static struct gpio_led dir_615_i1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_615_I1_GPIO_LED_POWER_GREEN,
}, {
.name = "d-link:amber:power",
.gpio = DIR_615_I1_GPIO_LED_POWER_AMBER,
}, {
.name = "d-link:amber:wan",
.gpio = DIR_615_I1_GPIO_LED_WAN_AMBER,
}, {
.name = "d-link:green:wan",
.gpio = DIR_615_I1_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:wlan",
.gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_615_I1_GPIO_LED_WPS,
.active_low = 1,
}
};
static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_I1_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_I1_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_615_i1_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac[ETH_ALEN];
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK));
ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
/* GMAC0 is connected to the PHY0 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK;
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio),
dir_615_i1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_615_i1_gpio_keys),
dir_615_i1_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1",
dir_615_i1_setup);

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/*
* D-Link DIR-825 rev. B1 board support
*
* Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
*
* based on mach-wndr3700.c
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/rtl8366.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "machtypes.h"
#define DIR825B1_GPIO_LED_BLUE_USB 0
#define DIR825B1_GPIO_LED_ORANGE_POWER 1
#define DIR825B1_GPIO_LED_BLUE_POWER 2
#define DIR825B1_GPIO_LED_BLUE_WPS 4
#define DIR825B1_GPIO_LED_ORANGE_PLANET 6
#define DIR825B1_GPIO_LED_BLUE_PLANET 11
#define DIR825B1_GPIO_BTN_RESET 3
#define DIR825B1_GPIO_BTN_WPS 8
#define DIR825B1_GPIO_RTL8366_SDA 5
#define DIR825B1_GPIO_RTL8366_SCK 7
#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL)
#define DIR825B1_CAL0_OFFSET 0x1000
#define DIR825B1_CAL1_OFFSET 0x5000
#define DIR825B1_MAC0_OFFSET 0xffa0
#define DIR825B1_MAC1_OFFSET 0xffb4
#define DIR825B1_CAL_LOCATION_0 0x1f660000
#define DIR825B1_CAL_LOCATION_1 0x1f7f0000
static struct gpio_led dir825b1_leds_gpio[] __initdata = {
{
.name = "d-link:blue:usb",
.gpio = DIR825B1_GPIO_LED_BLUE_USB,
.active_low = 1,
}, {
.name = "d-link:orange:power",
.gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
.active_low = 1,
}, {
.name = "d-link:blue:power",
.gpio = DIR825B1_GPIO_LED_BLUE_POWER,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR825B1_GPIO_LED_BLUE_WPS,
.active_low = 1,
}, {
.name = "d-link:orange:planet",
.gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
.active_low = 1,
}, {
.name = "d-link:blue:planet",
.gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
.active_low = 1,
}
};
static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825B1_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825B1_GPIO_BTN_WPS,
.active_low = 1,
}
};
static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
{ .reg = 0x06, .val = 0x0108 },
};
static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
.gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
.gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
.num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
.initvals = dir825b1_rtl8366s_initvals,
};
static struct platform_device dir825b1_rtl8366s_device = {
.name = RTL8366S_DRIVER_NAME,
.id = -1,
.dev = {
.platform_data = &dir825b1_rtl8366s_data,
}
};
static bool __init dir825b1_is_caldata_valid(u8 *p)
{
u16 *magic0, *magic1;
magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET);
magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET);
return (*magic0 == 0xa55a && *magic1 == 0xa55a);
}
static void __init dir825b1_wlan_init(void)
{
u8 *caldata;
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0);
if (!dir825b1_is_caldata_valid(caldata)) {
caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1);
if (!dir825b1_is_caldata_valid(caldata)) {
pr_err("no calibration data found\n");
return;
}
}
ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0);
ath79_init_mac(wmac0, mac0, 0);
ath79_init_mac(wmac1, mac1, 1);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0,
caldata + DIR825B1_CAL1_OFFSET, wmac1);
}
static void __init dir825b1_setup(void)
{
dir825b1_wlan_init();
ath79_register_mdio(0, 0x0);
ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_eth1_pll_data.pll_1000 = 0x11110000;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
dir825b1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825b1_gpio_keys),
dir825b1_gpio_keys);
ath79_register_usb();
platform_device_register(&dir825b1_rtl8366s_device);
}
MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
dir825b1_setup);

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/*
* D-Link DIR-825 rev. C1 board support
*
* Copyright (C) 2013 Alexander Stadler
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DIR825C1_GPIO_LED_BLUE_USB 11
#define DIR825C1_GPIO_LED_AMBER_POWER 14
#define DIR825C1_GPIO_LED_BLUE_POWER 22
#define DIR825C1_GPIO_LED_BLUE_WPS 15
#define DIR825C1_GPIO_LED_AMBER_PLANET 19
#define DIR825C1_GPIO_LED_BLUE_PLANET 18
#define DIR825C1_GPIO_LED_WLAN_2G 13
#define DIR825C1_GPIO_WAN_LED_ENABLE 20
#define DIR825C1_GPIO_BTN_RESET 17
#define DIR825C1_GPIO_BTN_WPS 16
#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL)
#define DIR825C1_MAC0_OFFSET 0x4
#define DIR825C1_MAC1_OFFSET 0x18
#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000
#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dir825c1_leds_gpio[] __initdata = {
{
.name = "d-link:blue:usb",
.gpio = DIR825C1_GPIO_LED_BLUE_USB,
.active_low = 1,
},
{
.name = "d-link:amber:power",
.gpio = DIR825C1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:power",
.gpio = DIR825C1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:wps",
.gpio = DIR825C1_GPIO_LED_BLUE_WPS,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:blue:wlan2g",
.gpio = DIR825C1_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_led dir835a1_leds_gpio[] __initdata = {
{
.name = "d-link:amber:power",
.gpio = DIR825C1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:green:power",
.gpio = DIR825C1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:wps",
.gpio = DIR825C1_GPIO_LED_BLUE_WPS,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DIR825C1_GPIO_LED_BLUE_PLANET,
.active_low = 1,
},
};
static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825C1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825C1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data dir825c1_ar8327_data = {
.pad0_cfg = &dir825c1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &dir825c1_ar8327_led_cfg,
};
static struct mdio_board_info dir825c1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dir825c1_ar8327_data,
},
};
static void __init dir825c1_generic_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1);
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825c1_gpio_keys),
dir825c1_gpio_keys);
ath79_init_mac(wmac0, mac0, 0);
ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0);
ath79_init_mac(wmac1, mac1, 1);
ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(dir825c1_mdio0_info,
ARRAY_SIZE(dir825c1_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
ath79_register_usb();
}
static void __init dir825c1_setup(void)
{
ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
AR934X_GPIO_OUT_GPIO);
gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE,
GPIOF_OUT_INIT_LOW, "WAN LED enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
dir825c1_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, 0);
dir825c1_generic_setup();
}
static void __init dir835a1_setup(void)
{
dir825c1_ar8327_data.led_cfg = NULL;
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio),
dir835a1_leds_gpio);
dir825c1_generic_setup();
}
MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
"D-Link DIR-825 rev. C1",
dir825c1_setup);
MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1",
"D-Link DIR-835 rev. A1",
dir835a1_setup);

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/*
* D-Link DIR-869 A1 support
*
* Copyright (C) 2015-2016 P. Wassi <p.wassi at gmx.at>
* Copyright (C) 2016 Matthias Schiffer <mschiffer@universe-factory.net>
*
* Derived from: mach-ubnt-unifiac.c
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/irq.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/platform_data/phy-at803x.h>
#include <linux/ar8216_platform.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define DIR869A1_GPIO_BTN_RESET 1
#define DIR869A1_GPIO_BTN_WPS 2
#define DIR869A1_GPIO_SWITCH_MODE 8
#define DIR869A1_GPIO_ENABLE_SWITCH 11
#define DIR869A1_GPIO_LED_ORANGE 15
#define DIR869A1_GPIO_LED_WHITE 16
#define DIR869A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR869A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR869A1_KEYS_POLL_INTERVAL)
#define DIR869A1_DEVDATA_ADDR 0x1f050000
#define DIR869A1_DEVDATA_SIZE 0x10000
#define DIR869A1_EEPROM_ADDR 0x1fff0000
#define DIR869A1_WMAC_CALDATA_OFFSET 0x1000
#define DIR869A1_PCI_CALDATA_OFFSET 0x5000
static struct gpio_led dir869a1_leds_gpio[] __initdata = {
{
.name = "d-link:white:status",
.gpio = DIR869A1_GPIO_LED_WHITE,
.active_low = 1,
},
{
.name = "d-link:orange:status",
.gpio = DIR869A1_GPIO_LED_ORANGE,
.active_low = 1,
},
};
static struct gpio_keys_button dir869a1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "mode",
.type = EV_SW,
.code = BTN_0,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_SWITCH_MODE,
.active_low = 0,
},
};
static struct ar8327_pad_cfg dir869a1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dir869a1_ar8327_data = {
.pad0_cfg = &dir869a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dir869a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dir869a1_ar8327_data,
},
};
static void dir869a1_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(DIR869A1_DEVDATA_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, DIR869A1_DEVDATA_SIZE,
name, mac);
if (err)
pr_err("no MAC address found for %s\n", name);
}
static void __init dir869a1_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(DIR869A1_EEPROM_ADDR);
u8 wlan24mac[ETH_ALEN] = {}, wlan5mac[ETH_ALEN] = {};
ath79_register_m25p80(NULL);
gpio_request_one(DIR869A1_GPIO_ENABLE_SWITCH,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"Switch power");
dir869a1_get_mac("lanmac=", ath79_eth0_data.mac_addr);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_mask = BIT(0);
mdiobus_register_board_info(dir869a1_mdio0_info,
ARRAY_SIZE(dir869a1_mdio0_info));
ath79_register_mdio(0, 0);
ath79_register_eth(0);
dir869a1_get_mac("wlan24mac=", wlan24mac);
ath79_register_wmac(eeprom + DIR869A1_WMAC_CALDATA_OFFSET, wlan24mac);
dir869a1_get_mac("wlan5mac=", wlan5mac);
ap91_pci_init(eeprom + DIR869A1_PCI_CALDATA_OFFSET, wlan5mac);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir869a1_leds_gpio),
dir869a1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR869A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir869a1_gpio_keys),
dir869a1_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_DIR_869_A1, "DIR-869-A1", "D-Link DIR-869 rev. A1",
dir869a1_setup);

117
target/linux/ar71xx/files/arch/mips/ath79/mach-dlan-hotspot.c Normal file
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/*
* devolo dLAN Hotspot board support
*
* Copyright (C) 2015 Torsten Schnuis <torsten.schnuis@gik.de>
* Copyright (C) 2015 devolo AG
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DLAN_HOTSPOT_GPIO_LED_WIFI 0
#define DLAN_HOTSPOT_GPIO_BTN_RESET 11
#define DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING 12
#define DLAN_HOTSPOT_GPIO_BTN_WIFI 21
#define DLAN_HOTSPOT_GPIO_PLC_POWER 22
#define DLAN_HOTSPOT_GPIO_PLC_RESET 20
#define DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS 18
#define DLAN_HOTSPOT_KEYS_POLL_INTERVAL 20 /* msecs */
#define DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_HOTSPOT_KEYS_POLL_INTERVAL)
#define DLAN_HOTSPOT_ART_ADDRESS 0x1fff0000
#define DLAN_HOTSPOT_CALDATA_OFFSET 0x00001000
#define DLAN_HOTSPOT_MAC_ADDRESS_OFFSET 0x00001002
static struct gpio_led dlan_hotspot_leds_gpio[] __initdata = {
{
.name = "devolo:green:wifi",
.gpio = DLAN_HOTSPOT_GPIO_LED_WIFI,
.active_low = 0,
}
};
static struct gpio_keys_button dlan_hotspot_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_HOTSPOT_GPIO_BTN_RESET,
.active_low = 0,
},
{
.desc = "Pairing button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING,
.active_low = 0,
},
{
.desc = "WLAN button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_HOTSPOT_GPIO_BTN_WIFI,
.active_low = 0,
}
};
static void __init dlan_hotspot_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DLAN_HOTSPOT_ART_ADDRESS);
u8 *cal = art + DLAN_HOTSPOT_CALDATA_OFFSET;
u8 *wifi_mac = art + DLAN_HOTSPOT_MAC_ADDRESS_OFFSET;
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_hotspot_leds_gpio),
dlan_hotspot_leds_gpio);
ath79_register_gpio_keys_polled(-1, DLAN_HOTSPOT_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dlan_hotspot_gpio_keys),
dlan_hotspot_gpio_keys);
gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"PLC power");
gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_RESET,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"PLC reset");
gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"PLC LEDs");
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 2);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(cal, wifi_mac);
}
MIPS_MACHINE(ATH79_MACH_DLAN_HOTSPOT, "dLAN-Hotspot",
"dLAN Hotspot", dlan_hotspot_setup);

190
target/linux/ar71xx/files/arch/mips/ath79/mach-dlan-pro-1200-ac.c Normal file
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/*
* devolo dLAN pro 500 Wireless+ support
*
* Copyright (c) 2013-2015 devolo AG
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/gpio.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-nfc.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE 13
#define DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE 21
#define DLAN_PRO_1200_AC_GPIO_LED_WLAN 12
#define DLAN_PRO_1200_AC_GPIO_LED_DLAN 14
#define DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR 15
#define DLAN_PRO_1200_AC_GPIO_BTN_WLAN 20
#define DLAN_PRO_1200_AC_GPIO_BTN_DLAN 22
#define DLAN_PRO_1200_AC_GPIO_BTN_RESET 4
#define DLAN_PRO_1200_AC_GPIO_DLAN_IND 17
#define DLAN_PRO_1200_AC_GPIO_DLAN_ERR_IND 16
#define DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL 20 /* msecs */
#define DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL)
#define DLAN_PRO_1200_AC_ART_ADDRESS 0x1fff0000
#define DLAN_PRO_1200_AC_CALDATA_OFFSET 0x1000
#define DLAN_PRO_1200_AC_WIFIMAC_OFFSET 0x1002
#define DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dlan_pro_1200_ac_leds_gpio[] __initdata = {
{
.name = "devolo:status:wlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "devolo:status:dlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN,
.active_low = 1,
},
{
.name = "devolo:error:dlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR,
.active_low = 0,
}
};
static struct gpio_keys_button dlan_pro_1200_ac_gpio_keys[] __initdata = {
{
.desc = "dLAN button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_DLAN,
.active_low = 1,
},
{
.desc = "WLAN button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_WLAN,
.active_low = 0,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = false,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
.mac06_exchange_dis = true,
};
static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad5_cfg = {
.mode = 0,
.txclk_delay_en = 0,
.rxclk_delay_en = 0,
.txclk_delay_sel = 0,
.rxclk_delay_sel = 0,
};
static struct ar8327_platform_data dlan_pro_1200_ac_ar8327_data = {
.pad0_cfg = &dlan_pro_1200_ac_ar8327_pad0_cfg,
.pad5_cfg = &dlan_pro_1200_ac_ar8327_pad5_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dlan_pro_1200_ac_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dlan_pro_1200_ac_ar8327_data,
},
};
static void __init dlan_pro_1200_ac_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_1200_AC_ART_ADDRESS);
u8 *cal = art + DLAN_PRO_1200_AC_CALDATA_OFFSET;
u8 *wifi_mac = art + DLAN_PRO_1200_AC_WIFIMAC_OFFSET;
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_1200_ac_leds_gpio),
dlan_pro_1200_ac_leds_gpio);
ath79_register_gpio_keys_polled(-1, DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dlan_pro_1200_ac_gpio_keys),
dlan_pro_1200_ac_gpio_keys);
/* dLAN power must be enabled from user-space as soon as the boot-from-host daemon is running */
gpio_request_one(DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"dLAN power");
/* WLAN power is turned on initially to allow the PCI bus scan to succeed */
gpio_request_one(DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"WLAN power");
ath79_register_wmac(cal, wifi_mac);
ap91_pci_init(art + DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET, NULL);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2);
mdiobus_register_board_info(dlan_pro_1200_ac_mdio0_info,
ARRAY_SIZE(dlan_pro_1200_ac_mdio0_info));
/* GMAC0 is connected to an AR8337 */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x02000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_DLAN_PRO_1200_AC, "dLAN-pro-1200-ac", "devolo dLAN pro 1200+ WiFi ac",
dlan_pro_1200_ac_setup);

203
target/linux/ar71xx/files/arch/mips/ath79/mach-dlan-pro-500-wp.c Normal file
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/*
* devolo dLAN pro 500 Wireless+ support
*
* Copyright (c) 2013-2015 devolo AG
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/gpio.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE 13
#define DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE 17
#define DLAN_PRO_500_WP_GPIO_LED_WLAN_5G 11
#define DLAN_PRO_500_WP_GPIO_LED_WLAN_2G 12
#define DLAN_PRO_500_WP_GPIO_LED_STATUS 16
#define DLAN_PRO_500_WP_GPIO_LED_ETH 14
#define DLAN_PRO_500_WP_GPIO_BTN_WPS 20
#define DLAN_PRO_500_WP_GPIO_BTN_WLAN 22
#define DLAN_PRO_500_WP_GPIO_BTN_DLAN 21
#define DLAN_PRO_500_WP_GPIO_BTN_RESET 4
#define DLAN_PRO_500_WP_KEYS_POLL_INTERVAL 20 /* msecs */
#define DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_500_WP_KEYS_POLL_INTERVAL)
#define DLAN_PRO_500_WP_ART_ADDRESS 0x1fff0000
#define DLAN_PRO_500_WP_CALDATA_OFFSET 0x1000
#define DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET 0x1002
#define DLAN_PRO_500_WP_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dlan_pro_500_wp_leds_gpio[] __initdata = {
{
.name = "devolo:green:status",
.gpio = DLAN_PRO_500_WP_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "devolo:green:eth",
.gpio = DLAN_PRO_500_WP_GPIO_LED_ETH,
.active_low = 1,
},
{
.name = "devolo:blue:wlan-5g",
.gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_5G,
.active_low = 1,
},
{
.name = "devolo:green:wlan-2g",
.gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_2G,
.active_low = 1,
}
};
static struct gpio_keys_button dlan_pro_500_wp_gpio_keys[] __initdata = {
{
.desc = "dLAN button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_500_WP_GPIO_BTN_DLAN,
.active_low = 0,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_500_WP_GPIO_BTN_WPS,
.active_low = 0,
},
{
.desc = "WLAN button",
.type = EV_KEY,
.code = BTN_2,
.debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_500_WP_GPIO_BTN_WLAN,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_500_WP_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct ar8327_pad_cfg dlan_pro_500_wp_ar8327_pad0_cfg = {
.mode = AR8327_PAD_PHY_RGMII,
.txclk_delay_en = false,
.rxclk_delay_en = false,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL0,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
};
static struct ar8327_led_cfg dlan_pro_500_wp_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data dlan_pro_500_wp_ar8327_data = {
.pad0_cfg = &dlan_pro_500_wp_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 0,
.rxpause = 0,
},
.led_cfg = &dlan_pro_500_wp_ar8327_led_cfg,
};
static struct mdio_board_info dlan_pro_500_wp_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dlan_pro_500_wp_ar8327_data,
},
};
static void __init dlan_pro_500_wp_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_500_WP_ART_ADDRESS);
u8 *cal = art + DLAN_PRO_500_WP_CALDATA_OFFSET;
u8 *wifi_mac = art + DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET;
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_500_wp_leds_gpio),
dlan_pro_500_wp_leds_gpio);
ath79_register_gpio_keys_polled(-1, DLAN_PRO_500_WP_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dlan_pro_500_wp_gpio_keys),
dlan_pro_500_wp_gpio_keys);
gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"PLC power");
gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"PLC LEDs");
ath79_register_wmac(cal, wifi_mac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(dlan_pro_500_wp_mdio0_info,
ARRAY_SIZE(dlan_pro_500_wp_mdio0_info));
/* GMAC0 is connected to a AR7400 PLC in PHY mode */
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_pll_data.pll_1000 = 0x0e000000;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
/* GMAC1 is connected to the internal switch */
ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 1);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_DLAN_PRO_500_WP, "dLAN-pro-500-wp", "devolo dLAN pro 500 Wireless+",
dlan_pro_500_wp_setup);

187
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/*
* DomyWifi DW33D support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/platform/ar934x_nfc.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-nfc.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DW33D_GPIO_LED_MMC 4
#define DW33D_GPIO_LED_WLAN_2G 13
#define DW33D_GPIO_LED_STATUS 14
#define DW33D_GPIO_LED_USB 15
#define DW33D_GPIO_LED_INTERNET 22
#define DW33D_GPIO_BTN_RESET 17
#define DW33D_KEYS_POLL_INTERVAL 20 /* msecs */
#define DW33D_KEYS_DEBOUNCE_INTERVAL (3 * DW33D_KEYS_POLL_INTERVAL)
#define DW33D_MAC0_OFFSET 0
#define DW33D_MAC1_OFFSET 6
#define DW33D_WMAC_OFFSET 12
#define DW33D_WMAC_CALDATA_OFFSET 0x1000
#define DW33D_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dw33d_leds_gpio[] __initdata = {
{
.name = "dw33d:blue:status",
.gpio = DW33D_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "dw33d:blue:mmc",
.gpio = DW33D_GPIO_LED_MMC,
.active_low = 1,
},
{
.name = "dw33d:blue:usb",
.gpio = DW33D_GPIO_LED_USB,
.active_low = 1,
},
{
.name = "dw33d:blue:wlan-2g",
.gpio = DW33D_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "dw33d:blue:internet",
.gpio = DW33D_GPIO_LED_INTERNET,
.active_low = 1,
}
};
static struct gpio_keys_button dw33d_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DW33D_KEYS_DEBOUNCE_INTERVAL,
.gpio = DW33D_GPIO_BTN_RESET,
.active_low = 1,
}
};
/* GMAC6 of the QCA8337 switch is connected to the QCA9558 SoC via SGMII */
static struct ar8327_pad_cfg dw33d_qca8337_pad6_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC0 of the QCA8337 switch is connected to the QCA9558 SoC via RGMII */
static struct ar8327_pad_cfg dw33d_qca8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data dw33d_qca8337_data = {
.pad0_cfg = &dw33d_qca8337_pad0_cfg,
.pad6_cfg = &dw33d_qca8337_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dw33d_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dw33d_qca8337_data,
},
};
static void __init dw33d_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dw33d_leds_gpio),
dw33d_leds_gpio);
ath79_register_gpio_keys_polled(-1, DW33D_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dw33d_gpio_keys),
dw33d_gpio_keys);
ath79_register_usb();
ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
ath79_register_nfc();
ath79_register_pci();
ath79_register_wmac(art + DW33D_WMAC_CALDATA_OFFSET, art + DW33D_WMAC_OFFSET);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + DW33D_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + DW33D_MAC1_OFFSET, 0);
mdiobus_register_board_info(dw33d_mdio0_info,
ARRAY_SIZE(dw33d_mdio0_info));
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_register_eth(0);
/* GMAC1 is connected tot eh SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_DOMYWIFI_DW33D, "DW33D",
"DomyWifi DW33D",
dw33d_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c Normal file
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/*
* Wallys DR342/DR344 boards support
*
* Copyright (c) 2011 Qualcomm Atheros
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2015 Philippe Duchein <wireless-dev@duchein.net>
* Copyright (c) 2017 Piotr Dymacz <pepe2k@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/gpio.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/platform_data/phy-at803x.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-usb.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DR34X_GPIO_LED_SIG1 12
#define DR34X_GPIO_LED_SIG2 13
#define DR34X_GPIO_LED_SIG3 14
#define DR34X_GPIO_LED_SIG4 15
#define DR34X_GPIO_LED_STATUS 11
#define DR344_GPIO_LED_LAN 17
#define DR344_GPIO_EXTERNAL_LNA0 18
#define DR344_GPIO_EXTERNAL_LNA1 19
#define DR34X_GPIO_BTN_RESET 16
#define DR344_KEYS_POLL_INTERVAL 20 /* msecs */
#define DR344_KEYS_DEBOUNCE_INTERVAL (3 * DR344_KEYS_POLL_INTERVAL)
#define DR34X_MAC0_OFFSET 0
#define DR34X_MAC1_OFFSET 8
#define DR34X_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led dr342_leds_gpio[] __initdata = {
{
.name = "dr342:green:status",
.gpio = DR34X_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "dr342:green:sig1",
.gpio = DR34X_GPIO_LED_SIG1,
.active_low = 1,
},
{
.name = "dr342:green:sig2",
.gpio = DR34X_GPIO_LED_SIG2,
.active_low = 1,
},
{
.name = "dr342:green:sig3",
.gpio = DR34X_GPIO_LED_SIG3,
.active_low = 1,
},
{
.name = "dr342:green:sig4",
.gpio = DR34X_GPIO_LED_SIG4,
.active_low = 1,
}
};
static struct gpio_led dr344_leds_gpio[] __initdata = {
{
.name = "dr344:green:lan",
.gpio = DR344_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "dr344:green:status",
.gpio = DR34X_GPIO_LED_STATUS,
.active_low = 1,
},
{
.name = "dr344:green:sig1",
.gpio = DR34X_GPIO_LED_SIG1,
.active_low = 1,
},
{
.name = "dr344:green:sig2",
.gpio = DR34X_GPIO_LED_SIG2,
.active_low = 1,
},
{
.name = "dr344:green:sig3",
.gpio = DR34X_GPIO_LED_SIG3,
.active_low = 1,
},
{
.name = "dr344:green:sig4",
.gpio = DR34X_GPIO_LED_SIG4,
.active_low = 1,
}
};
static struct gpio_keys_button dr34x_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DR344_KEYS_DEBOUNCE_INTERVAL,
.gpio = DR34X_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct at803x_platform_data dr34x_at803x_data = {
.disable_smarteee = 1,
.enable_rgmii_rx_delay = 1,
.enable_rgmii_tx_delay = 1,
};
static struct mdio_board_info dr34x_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &dr34x_at803x_data,
},
};
static void __init dr34x_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
ath79_register_m25p80(NULL);
ath79_gpio_direction_select(DR34X_GPIO_LED_STATUS, true);
gpio_set_value(DR34X_GPIO_LED_STATUS, 1);
ath79_gpio_output_select(DR34X_GPIO_LED_STATUS, 0);
ath79_register_gpio_keys_polled(-1, DR344_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dr34x_gpio_keys),
dr34x_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + DR34X_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
mdiobus_register_board_info(dr34x_mdio0_info,
ARRAY_SIZE(dr34x_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
/* GMAC0 is connected to an AR8035 Gbps PHY */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x02000000;
ath79_eth0_pll_data.pll_100 = 0x0101;
ath79_eth0_pll_data.pll_10 = 0x1313;
ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR34X_MAC0_OFFSET, 0);
ath79_register_eth(0);
}
static void __init dr342_setup(void)
{
dr34x_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(dr342_leds_gpio),
dr342_leds_gpio);
}
static void __init dr344_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
dr34x_setup();
ath79_gpio_direction_select(DR344_GPIO_LED_LAN, true);
gpio_set_value(DR344_GPIO_LED_LAN, 1);
ath79_gpio_output_select(DR344_GPIO_LED_LAN, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
dr344_leds_gpio);
ath79_wmac_set_ext_lna_gpio(0, DR344_GPIO_EXTERNAL_LNA0);
ath79_wmac_set_ext_lna_gpio(1, DR344_GPIO_EXTERNAL_LNA1);
ath79_register_mdio(1, 0x0);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR34X_MAC1_OFFSET, 0);
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_DR342, "DR342", "Wallys DR342", dr342_setup);
MIPS_MACHINE(ATH79_MACH_DR344, "DR344", "Wallys DR344", dr344_setup);

155
target/linux/ar71xx/files/arch/mips/ath79/mach-dr531.c Normal file
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/*
* Wallys DR531 board support
*
* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
*
* Based on mach-wpj531.c
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define DR531_GPIO_BUZZER 4
#define DR531_GPIO_LED_WAN 11
#define DR531_GPIO_LED_LAN 14
#define DR531_GPIO_LED_SIG1 12
#define DR531_GPIO_LED_SIG2 16
#define DR531_GPIO_LED_SIG3 15
#define DR531_GPIO_LED_SIG4 13
#define DR531_GPIO_BTN_RESET 17
#define DR531_KEYS_POLL_INTERVAL 20 /* msecs */
#define DR531_KEYS_DEBOUNCE_INTERVAL (3 * DR531_KEYS_POLL_INTERVAL)
#define DR531_MAC0_OFFSET 0x0
#define DR531_MAC1_OFFSET 0x8
#define DR531_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led dr531_leds_gpio[] __initdata = {
{
.name = "dr531:green:wan",
.gpio = DR531_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "dr531:green:lan",
.gpio = DR531_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "dr531:green:sig1",
.gpio = DR531_GPIO_LED_SIG1,
.active_low = 1,
},
{
.name = "dr531:green:sig2",
.gpio = DR531_GPIO_LED_SIG2,
.active_low = 1,
},
{
.name = "dr531:green:sig3",
.gpio = DR531_GPIO_LED_SIG3,
.active_low = 1,
},
{
.name = "dr531:green:sig4",
.gpio = DR531_GPIO_LED_SIG4,
.active_low = 1,
},
{
.name = "dr531:buzzer",
.gpio = DR531_GPIO_BUZZER,
.active_low = 0,
}
};
static struct gpio_keys_button dr531_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DR531_KEYS_DEBOUNCE_INTERVAL,
.gpio = DR531_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init dr531_gpio_setup(void)
{
ath79_gpio_direction_select(DR531_GPIO_BUZZER, true);
ath79_gpio_direction_select(DR531_GPIO_LED_WAN, true);
ath79_gpio_direction_select(DR531_GPIO_LED_LAN, true);
ath79_gpio_direction_select(DR531_GPIO_LED_SIG1, true);
ath79_gpio_direction_select(DR531_GPIO_LED_SIG2, true);
ath79_gpio_direction_select(DR531_GPIO_LED_SIG3, true);
ath79_gpio_direction_select(DR531_GPIO_LED_SIG4, true);
ath79_gpio_output_select(DR531_GPIO_BUZZER, 0);
ath79_gpio_output_select(DR531_GPIO_LED_WAN, 0);
ath79_gpio_output_select(DR531_GPIO_LED_LAN, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dr531_leds_gpio),
dr531_leds_gpio);
ath79_register_gpio_keys_polled(-1, DR531_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dr531_gpio_keys),
dr531_gpio_keys);
}
static void __init dr531_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
ath79_register_m25p80(NULL);
dr531_gpio_setup();
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
/* LAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR531_MAC1_OFFSET, 0);
ath79_register_eth(0);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR531_MAC0_OFFSET, 0);
ath79_register_eth(1);
ath79_register_wmac(art + DR531_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
ath79_register_usb();
}
MIPS_MACHINE(ATH79_MACH_DR531, "DR531", "Wallys DR531", dr531_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-dragino2.c Normal file
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/*
* DRAGINO V2 board support, based on Atheros AP121 board support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Elektra Wagenrad <elektra@villagetelco.org>
* Copyright (C) 2014 Vittorio Gambaletta <openwrt@vittgam.net>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DRAGINO2_GPIO_LED_WLAN 0
#define DRAGINO2_GPIO_LED_LAN 13
#define DRAGINO2_GPIO_LED_WAN 17
/*
* The following GPIO is named "SYS" on newer revisions of the the board.
* It was previously used to indicate USB activity, even though it was
* named "Router".
*/
#define DRAGINO2_GPIO_LED_SYS 28
#define DRAGINO2_GPIO_BTN_JUMPSTART 11
#define DRAGINO2_GPIO_BTN_RESET 12
#define DRAGINO2_KEYS_POLL_INTERVAL 20 /* msecs */
#define DRAGINO2_KEYS_DEBOUNCE_INTERVAL (3 * DRAGINO2_KEYS_POLL_INTERVAL)
#define DRAGINO2_MAC0_OFFSET 0x0000
#define DRAGINO2_MAC1_OFFSET 0x0006
#define DRAGINO2_CALDATA_OFFSET 0x1000
#define DRAGINO2_WMAC_MAC_OFFSET 0x1002
static struct gpio_led dragino2_leds_gpio[] __initdata = {
{
.name = "dragino2:red:wlan",
.gpio = DRAGINO2_GPIO_LED_WLAN,
.active_low = 0,
},
{
.name = "dragino2:red:wan",
.gpio = DRAGINO2_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "dragino2:red:lan",
.gpio = DRAGINO2_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "dragino2:red:system",
.gpio = DRAGINO2_GPIO_LED_SYS,
.active_low = 0,
},
};
static struct gpio_keys_button dragino2_gpio_keys[] __initdata = {
{
.desc = "jumpstart button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL,
.gpio = DRAGINO2_GPIO_BTN_JUMPSTART,
.active_low = 1,
},
{
.desc = "reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL,
.gpio = DRAGINO2_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init dragino2_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_wmac(art + DRAGINO2_CALDATA_OFFSET,
art + DRAGINO2_WMAC_MAC_OFFSET);
ath79_init_mac(ath79_eth0_data.mac_addr, art + DRAGINO2_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + DRAGINO2_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
/* Enable GPIO13, GPIO14, GPIO15, GPIO16 and GPIO17 */
ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
/* LAN port */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
/* Enable GPIO26 and GPIO27 */
ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP,
ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) |
AR933X_BOOTSTRAP_MDIO_GPIO_EN);
}
static void __init dragino2_setup(void)
{
dragino2_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(dragino2_leds_gpio),
dragino2_leds_gpio);
ath79_register_gpio_keys_polled(-1, DRAGINO2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dragino2_gpio_keys),
dragino2_gpio_keys);
ath79_register_usb();
}
MIPS_MACHINE(ATH79_MACH_DRAGINO2, "DRAGINO2", "Dragino Dragino v2",
dragino2_setup);

145
target/linux/ar71xx/files/arch/mips/ath79/mach-e1700ac-v2.c Normal file
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/*
* Qxwlan E1700AC v2 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
* Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define E1700AC_V2_GPIO_LED_SYS 1
#define E1700AC_V2_GPIO_LED_USB 7
#define E1700AC_V2_GPIO_LED_WLAN2G 19
#define E1700AC_V2_GPIO_BTN_SW1 2
#define E1700AC_V2_GPIO_BTN_RESET 11
#define E1700AC_V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define E1700AC_V2_KEYS_DEBOUNCE_INTERVAL \
(3 * E1700AC_V2_KEYS_POLL_INTERVAL)
static struct gpio_led e1700ac_v2_leds_gpio[] __initdata = {
{
.name = "e1700ac-v2:green:system",
.gpio = E1700AC_V2_GPIO_LED_SYS,
.active_low = 1,
}, {
.name = "e1700ac-v2:green:usb",
.gpio = E1700AC_V2_GPIO_LED_USB,
.active_low = 1,
}, {
.name = "e1700ac-v2:green:wlan2g",
.gpio = E1700AC_V2_GPIO_LED_WLAN2G,
.active_low = 1,
},
};
static struct gpio_keys_button e1700ac_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E1700AC_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E1700AC_V2_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "sw1",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = E1700AC_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E1700AC_V2_GPIO_BTN_SW1,
.active_low = 1,
},
};
static const struct ar8327_led_info e1700ac_v2_leds_qca8334[] = {
AR8327_LED_INFO(PHY1_0, HW, "e1700ac-v2:green:lan"),
AR8327_LED_INFO(PHY2_0, HW, "e1700ac-v2:green:wan"),
};
/* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */
static struct ar8327_led_cfg e1700ac_v2_qca8334_led_cfg = {
.led_ctrl0 = 0xcf37cf37,
.led_ctrl1 = 0xcf37cf37,
.led_ctrl2 = 0xcf37cf37,
.led_ctrl3 = 0x0,
.open_drain = true,
};
static struct ar8327_pad_cfg e1700ac_v2_qca8334_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data e1700ac_v2_qca8334_data = {
.pad0_cfg = &e1700ac_v2_qca8334_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &e1700ac_v2_qca8334_led_cfg,
.leds = e1700ac_v2_leds_qca8334,
.num_leds = ARRAY_SIZE(e1700ac_v2_leds_qca8334),
};
static struct mdio_board_info e1700ac_v2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &e1700ac_v2_qca8334_data,
},
};
static void __init e1700ac_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e1700ac_v2_leds_gpio),
e1700ac_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, E1700AC_V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e1700ac_v2_gpio_keys),
e1700ac_v2_gpio_keys);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(e1700ac_v2_mdio0_info,
ARRAY_SIZE(e1700ac_v2_mdio0_info));
/* GMAC0 is connected to QCA8334 switch */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_E1700AC_V2, "E1700AC-V2", "Qxwlan E1700AC v2",
e1700ac_v2_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-e2100l.c Normal file
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/*
* Linksys E2100L board support
*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "nvram.h"
#include "machtypes.h"
#define E2100L_GPIO_LED_POWER 14
#define E2100L_GPIO_LED_WPS_AMBER 9
#define E2100L_GPIO_LED_WPS_BLUE 8
#define E2100L_GPIO_LED_WLAN 6
#define E2100L_GPIO_BTN_WPS 7
#define E2100L_GPIO_BTN_RESET 21
#define E2100L_KEYS_POLL_INTERVAL 20 /* msecs */
#define E2100L_KEYS_DEBOUNCE_INTERVAL (3 * E2100L_KEYS_POLL_INTERVAL)
#define E2100L_NVRAM_ADDR 0x1f7e0000
#define E2100L_NVRAM_SIZE 0x10000
static const char *e2100l_part_probes[] = {
"cybertan",
NULL,
};
static struct flash_platform_data e2100l_flash_data = {
.part_probes = e2100l_part_probes,
};
static struct gpio_led e2100l_leds_gpio[] __initdata = {
{
.name = "e2100l:blue:power",
.gpio = E2100L_GPIO_LED_POWER,
.active_low = 1,
.default_trigger = "default-on",
}, {
.name = "e2100l:amber:wps",
.gpio = E2100L_GPIO_LED_WPS_AMBER,
.active_low = 1,
}, {
.name = "e2100l:blue:wps",
.gpio = E2100L_GPIO_LED_WPS_BLUE,
.active_low = 1,
}, {
.name = "e2100l:blue:wlan",
.gpio = E2100L_GPIO_LED_WLAN,
.active_low = 1,
}
};
static struct gpio_keys_button e2100l_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E2100L_KEYS_DEBOUNCE_INTERVAL,
.gpio = E2100L_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = E2100L_KEYS_DEBOUNCE_INTERVAL,
.gpio = E2100L_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init e2100l_setup(void)
{
const char *nvram = (char *) KSEG1ADDR(E2100L_NVRAM_ADDR);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac[6];
if (ath79_nvram_parse_mac_addr(nvram, E2100L_NVRAM_SIZE,
"lan_hwaddr=", mac) == 0) {
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
}
ath79_register_mdio(0, 0x0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.phy_mask = 0x01;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(&e2100l_flash_data);
ath79_register_usb();
if (ath79_nvram_parse_mac_addr(nvram, E2100L_NVRAM_SIZE,
"wl0_hwaddr=", mac) == 0)
ath79_register_wmac(eeprom, mac);
else
ath79_register_wmac(eeprom, NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e2100l_leds_gpio),
e2100l_leds_gpio);
ath79_register_gpio_keys_polled(-1, E2100L_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e2100l_gpio_keys),
e2100l_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_E2100L, "E2100L", "Linksys E2100L",
e2100l_setup);

170
target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c Normal file
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/*
* Qxwlan E558 v2 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define E558_V2_GPIO_LED_WLAN 13
#define E558_V2_GPIO_LED_SYSTEM 14
#define E558_V2_GPIO_LED_QSS 15
#define E558_V2_GPIO_BTN_RESET 16
#define E558_V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL)
static struct gpio_led e558_v2_leds_gpio[] __initdata = {
{
.name = "e558-v2:green:qss",
.gpio = E558_V2_GPIO_LED_QSS,
.active_low = 1,
},
{
.name = "e558-v2:green:system",
.gpio = E558_V2_GPIO_LED_SYSTEM,
.active_low = 1,
},
{
.name = "e558-v2:green:wlan",
.gpio = E558_V2_GPIO_LED_WLAN,
.active_low = 1,
},
};
static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E558_V2_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static const struct ar8327_led_info e558_v2_leds_qca8334[] = {
AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"),
AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"),
AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"),
};
static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = {
.led_ctrl0 = 0xc737c737,
.led_ctrl1 = 0x00000000,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x0030c300,
.open_drain = false,
};
static struct ar8327_platform_data e558_v2_ar8327_data = {
.pad0_cfg = &e558_v2_ar8327_pad0_cfg,
.pad6_cfg = &e558_v2_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &e558_v2_ar8327_led_cfg,
.leds = e558_v2_leds_qca8334,
.num_leds = ARRAY_SIZE(e558_v2_leds_qca8334),
};
static struct mdio_board_info e558_v2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &e558_v2_ar8327_data,
},
};
static void __init e558_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio),
e558_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e558_v2_gpio_keys),
e558_v2_gpio_keys);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(e558_v2_mdio0_info,
ARRAY_SIZE(e558_v2_mdio0_info));
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2",
e558_v2_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-e600g-v2.c Normal file
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/*
* Qxwlan E600G/E600GAC v2 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
* Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define E600G_V2_GPIO_LED_LAN 16
#define E600G_V2_GPIO_LED_SYS 13
#define E600G_V2_GPIO_LED_WAN_B 4
#define E600G_V2_GPIO_LED_WAN_G 15
#define E600GAC_V2_GPIO_LED_CTRL_B 14
#define E600GAC_V2_GPIO_LED_CTRL_G 11
#define E600GAC_V2_GPIO_LED_CTRL_R 12
#define E600GAC_V2_GPIO_LED_LAN 16
#define E600GAC_V2_GPIO_LED_SYS 13
#define E600GAC_V2_GPIO_LED_WAN_G 15
#define E600GAC_V2_GPIO_LED_WAN_O 4
#define E600G_V2_GPIO_BTN_RESET 17
#define E600GAC_V2_GPIO_BTN_WPS 1
#define E600G_V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define E600G_V2_KEYS_DEBOUNCE_INTERVAL (3 * E600G_V2_KEYS_POLL_INTERVAL)
static struct gpio_led e600g_v2_leds_gpio[] __initdata = {
{
.name = "e600g-v2:blue:system",
.gpio = E600G_V2_GPIO_LED_SYS,
.active_low = 1,
}, {
.name = "e600g-v2:blue:wan",
.gpio = E600G_V2_GPIO_LED_WAN_B,
.active_low = 1,
}, {
.name = "e600g-v2:green:lan",
.gpio = E600G_V2_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "e600g-v2:green:wan",
.gpio = E600G_V2_GPIO_LED_WAN_G,
.active_low = 1,
},
};
static struct gpio_led e600gac_v2_leds_gpio[] __initdata = {
{
.name = "e600gac-v2:blue:control",
.gpio = E600GAC_V2_GPIO_LED_CTRL_B,
.active_low = 1,
}, {
.name = "e600gac-v2:green:control",
.gpio = E600GAC_V2_GPIO_LED_CTRL_G,
.active_low = 1,
}, {
.name = "e600gac-v2:red:control",
.gpio = E600GAC_V2_GPIO_LED_CTRL_R,
.active_low = 1,
}, {
.name = "e600gac-v2:green:system",
.gpio = E600GAC_V2_GPIO_LED_SYS,
.active_low = 1,
}, {
.name = "e600gac-v2:orange:wan",
.gpio = E600GAC_V2_GPIO_LED_WAN_O,
.active_low = 1,
}, {
.name = "e600gac-v2:green:lan",
.gpio = E600GAC_V2_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "e600gac-v2:green:wan",
.gpio = E600GAC_V2_GPIO_LED_WAN_G,
.active_low = 1,
},
};
static struct gpio_keys_button e600g_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E600G_V2_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct gpio_keys_button e600gac_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E600G_V2_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E600GAC_V2_GPIO_BTN_WPS,
.active_low = 1,
},
};
static void __init e600g_v2_common_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = 0xfe;
/* LAN */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.speed = SPEED_100;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* WAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.phy_mask = BIT(0);
ath79_eth1_data.speed = SPEED_1000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
static void __init e600g_v2_setup(void)
{
e600g_v2_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(e600g_v2_leds_gpio),
e600g_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, E600G_V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e600g_v2_gpio_keys),
e600g_v2_gpio_keys);
}
static void __init e600gac_v2_setup(void)
{
e600g_v2_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(e600gac_v2_leds_gpio),
e600gac_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, E600G_V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e600gac_v2_gpio_keys),
e600gac_v2_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_E600G_V2, "E600G-V2", "Qxwlan E600G v2",
e600g_v2_setup);
MIPS_MACHINE(ATH79_MACH_E600GAC_V2, "E600GAC-V2", "Qxwlan E600GAC v2",
e600gac_v2_setup);

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/*
* Qxwlan E750A v4 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define E750A_V4_GPIO_LED_SYS 14
#define E750A_V4_GPIO_LED_LAN 19
#define E750A_V4_GPIO_LED_WAN 18
#define E750A_V4_GPIO_LED_DS10 15
#define E750A_V4_GPIO_LED_DS20 20
#define E750A_V4_GPIO_LED_WLAN 21
#define E750A_V4_GPIO_BTN_RESET 12
#define E750A_V4_KEYS_POLL_INTERVAL 20 /* msecs */
#define E750A_V4_KEYS_DEBOUNCE_INTERVAL (3 * E750A_V4_KEYS_POLL_INTERVAL)
static struct gpio_led e750a_v4_leds_gpio[] __initdata = {
{
.name = "e750a-v4:green:system",
.gpio = E750A_V4_GPIO_LED_SYS,
.active_low = 1,
},
{
.name = "e750a-v4:green:lan",
.gpio = E750A_V4_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "e750a-v4:green:wan",
.gpio = E750A_V4_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "e750a-v4:green:wlan",
.gpio = E750A_V4_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "e750a-v4:green:ds10",
.gpio = E750A_V4_GPIO_LED_DS10,
.active_low = 1,
},
{
.name = "e750a-v4:green:ds20",
.gpio = E750A_V4_GPIO_LED_DS20,
.active_low = 1,
},
};
static struct gpio_keys_button e750a_v4_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E750A_V4_KEYS_DEBOUNCE_INTERVAL,
.gpio = E750A_V4_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init e750a_v4_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e750a_v4_leds_gpio),
e750a_v4_leds_gpio);
ath79_register_gpio_keys_polled(-1, E750A_V4_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e750a_v4_gpio_keys),
e750a_v4_gpio_keys);
ath79_register_mdio(1, 0x0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* GMAC0 is connected to the PHY4 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_E750A_V4, "E750A-V4", "Qxlan E750A v4",
e750a_v4_setup);

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/*
* Qxwlan E750G v8 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-usb.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define E750G_V8_GPIO_LED_SYS 14
#define E750G_V8_GPIO_LED_DS20 15
#define E750G_V8_GPIO_LED_DS10 20
#define E750G_V8_GPIO_LED_WLAN 21
#define E750G_V8_GPIO_BTN_RESET 12
#define E750G_V8_KEYS_POLL_INTERVAL 20 /* msecs */
#define E750G_V8_KEYS_DEBOUNCE_INTERVAL (3 * E750G_V8_KEYS_POLL_INTERVAL)
static struct gpio_led e750g_v8_leds_gpio[] __initdata = {
{
.name = "e750g-v8:green:system",
.gpio = E750G_V8_GPIO_LED_SYS,
.active_low = 1,
},
{
.name = "e750g-v8:green:ds10",
.gpio = E750G_V8_GPIO_LED_DS10,
.active_low = 1,
},
{
.name = "e750g-v8:green:ds20",
.gpio = E750G_V8_GPIO_LED_DS20,
.active_low = 1,
},
{
.name = "e750g-v8:green:wlan",
.gpio = E750G_V8_GPIO_LED_WLAN,
.active_low = 1,
},
};
static struct gpio_keys_button e750g_v8_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E750G_V8_KEYS_DEBOUNCE_INTERVAL,
.gpio = E750G_V8_GPIO_BTN_RESET,
.active_low = 1,
},
};
static const struct ar8327_led_info e750g_v8_leds_qca8334[] = {
AR8327_LED_INFO(PHY1_0, HW, "e750g-v8:green:lan"),
AR8327_LED_INFO(PHY2_0, HW, "e750g-v8:green:wan"),
};
static struct ar8327_pad_cfg e750g_v8_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.mac06_exchange_dis = true,
};
static struct ar8327_led_cfg e750g_v8_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data e750g_v8_ar8327_data = {
.pad0_cfg = &e750g_v8_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &e750g_v8_ar8327_led_cfg,
.leds = e750g_v8_leds_qca8334,
.num_leds = ARRAY_SIZE(e750g_v8_leds_qca8334),
};
static struct mdio_board_info e750g_v8_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &e750g_v8_ar8327_data,
},
};
static void __init e750g_v8_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e750g_v8_leds_gpio),
e750g_v8_leds_gpio);
ath79_register_gpio_keys_polled(-1, E750G_V8_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e750g_v8_gpio_keys),
e750g_v8_gpio_keys);
mdiobus_register_board_info(e750g_v8_mdio0_info,
ARRAY_SIZE(e750g_v8_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_E750G_V8, "E750G-V8", "Qxwlan E750G v8",
e750g_v8_setup);

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/*
* TP-LINK EAP120 board support
*
* Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/platform_data/mdio-gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/platform_data/phy-at803x.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define EAP120_GPIO_LED_RED 12
#define EAP120_GPIO_LED_YEL 13
#define EAP120_GPIO_LED_GRN 15
#define EAP120_GPIO_BTN_RESET 4
#define EAP120_KEYS_POLL_INTERVAL 20 /* msecs */
#define EAP120_KEYS_DEBOUNCE_INTERVAL (3 * EAP120_KEYS_POLL_INTERVAL)
#define EAP120_GPIO_SMI_MDIO 16
#define EAP120_GPIO_SMI_MDC 17
#define EAP120_LAN_PHYADDR 4
static struct gpio_led eap120_leds_gpio[] __initdata = {
{
.name = "eap120:red:system",
.gpio = EAP120_GPIO_LED_RED,
.active_low = 1,
}, {
.name = "eap120:yellow:system",
.gpio = EAP120_GPIO_LED_YEL,
.active_low = 1,
}, {
.name = "eap120:green:system",
.gpio = EAP120_GPIO_LED_GRN,
.active_low = 1,
},
};
static struct gpio_keys_button eap120_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = EAP120_KEYS_DEBOUNCE_INTERVAL,
.gpio = EAP120_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct mdio_gpio_platform_data eap120_mdio = {
.mdc = EAP120_GPIO_SMI_MDC,
.mdio = EAP120_GPIO_SMI_MDIO,
.phy_mask = ~BIT(EAP120_LAN_PHYADDR),
};
static struct at803x_platform_data eap120_ar8035_data = {
.disable_smarteee = 0,
.enable_rgmii_rx_delay = 1,
.enable_rgmii_tx_delay = 0,
.fixup_rgmii_tx_delay = 1,
};
static struct platform_device eap120_phy_device = {
.name = "mdio-gpio",
.id = 0,
.dev = {
.platform_data = &eap120_mdio, &eap120_ar8035_data
},
};
static void __init eap_setup(u8 *mac)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(eap120_leds_gpio),
eap120_leds_gpio);
ath79_register_gpio_keys_polled(1, EAP120_KEYS_POLL_INTERVAL,
ARRAY_SIZE(eap120_gpio_keys),
eap120_gpio_keys);
ath79_register_m25p80(NULL);
/* MDIO Interface */
platform_device_register(&eap120_phy_device);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
/* GMAC0 is connected to the RGMII interface to an Atheros AR8035-A */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.mii_bus_dev = &eap120_phy_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(EAP120_LAN_PHYADDR);
ath79_eth0_pll_data.pll_1000 = 0x0e000000;
ath79_eth0_pll_data.pll_100 = 0x00000101;
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_register_eth(0);
}
static void __init eap120_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f030008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
eap_setup(mac);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_EAP120, "EAP120", "TP-LINK EAP120",
eap120_setup);

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/*
* EnGenius EAP300 v2 board support
*
* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define EAP300V2_GPIO_LED_POWER 0
#define EAP300V2_GPIO_LED_LAN 16
#define EAP300V2_GPIO_LED_WLAN 17
#define EAP300V2_GPIO_BTN_RESET 1
#define EAP300V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define EAP300V2_KEYS_DEBOUNCE_INTERVAL (3 * EAP300V2_KEYS_POLL_INTERVAL)
static struct gpio_led eap300v2_leds_gpio[] __initdata = {
{
.name = "engenius:blue:power",
.gpio = EAP300V2_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "engenius:blue:lan",
.gpio = EAP300V2_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "engenius:blue:wlan",
.gpio = EAP300V2_GPIO_LED_WLAN,
.active_low = 1,
}
};
static struct gpio_keys_button eap300v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = EAP300V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = EAP300V2_GPIO_BTN_RESET,
.active_low = 1,
}
};
#define EAP300V2_ART_MAC_OFFSET 2
#define EAP300V2_LAN_PHYMASK BIT(0)
static void __init eap300v2_setup(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff1000);
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_output_select(EAP300V2_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(EAP300V2_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(EAP300V2_GPIO_LED_WLAN, AR934X_GPIO_OUT_GPIO);
ath79_register_leds_gpio(-1, ARRAY_SIZE(eap300v2_leds_gpio),
eap300v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, EAP300V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(eap300v2_gpio_keys),
eap300v2_gpio_keys);
ath79_register_m25p80(NULL);
ath79_register_wmac(art, NULL);
ath79_register_mdio(1, 0x0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + EAP300V2_ART_MAC_OFFSET, 0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = EAP300V2_LAN_PHYMASK;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = EAP300V2_LAN_PHYMASK;
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_EAP300V2, "EAP300V2", "EnGenius EAP300 v2",
eap300v2_setup);

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/*
* Senao EAP7660D board support
*
* Copyright (C) 2010 Daniel Golle <daniel.golle@gmail.com>
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/ath5k_platform.h>
#include <linux/delay.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */
#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL)
#define EAP7660D_GPIO_DS4 7
#define EAP7660D_GPIO_DS5 2
#define EAP7660D_GPIO_DS7 0
#define EAP7660D_GPIO_DS8 4
#define EAP7660D_GPIO_SW1 3
#define EAP7660D_GPIO_SW3 8
#define EAP7660D_PHYMASK BIT(20)
#define EAP7660D_BOARDCONFIG 0x1F7F0000
#define EAP7660D_GBIC_MAC_OFFSET 0x1000
#define EAP7660D_WMAC0_MAC_OFFSET 0x1010
#define EAP7660D_WMAC1_MAC_OFFSET 0x1016
#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000
#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000
#ifdef CONFIG_PCI
static struct ath5k_platform_data eap7660d_wmac0_data;
static struct ath5k_platform_data eap7660d_wmac1_data;
static char eap7660d_wmac0_mac[6];
static char eap7660d_wmac1_mac[6];
static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
static int eap7660d_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &eap7660d_wmac0_data;
break;
case 18:
dev->dev.platform_data = &eap7660d_wmac1_data;
break;
}
return 0;
}
void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
if (cal_data0 && *cal_data0 == 0xa55a) {
memcpy(eap7660d_wmac0_eeprom, cal_data0,
ATH5K_PLAT_EEP_MAX_WORDS);
eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom;
}
if (cal_data1 && *cal_data1 == 0xa55a) {
memcpy(eap7660d_wmac1_eeprom, cal_data1,
ATH5K_PLAT_EEP_MAX_WORDS);
eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom;
}
if (mac_addr0) {
memcpy(eap7660d_wmac0_mac, mac_addr0,
sizeof(eap7660d_wmac0_mac));
eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
}
if (mac_addr1) {
memcpy(eap7660d_wmac1_mac, mac_addr1,
sizeof(eap7660d_wmac1_mac));
eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
}
ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init);
ath79_register_pci();
}
#else
static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
}
#endif /* CONFIG_PCI */
static struct gpio_led eap7660d_leds_gpio[] __initdata = {
{
.name = "eap7660d:green:ds8",
.gpio = EAP7660D_GPIO_DS8,
.active_low = 0,
},
{
.name = "eap7660d:green:ds5",
.gpio = EAP7660D_GPIO_DS5,
.active_low = 0,
},
{
.name = "eap7660d:green:ds7",
.gpio = EAP7660D_GPIO_DS7,
.active_low = 0,
},
{
.name = "eap7660d:green:ds4",
.gpio = EAP7660D_GPIO_DS4,
.active_low = 0,
}
};
static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL,
.gpio = EAP7660D_GPIO_SW1,
.active_low = 1,
},
{
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL,
.gpio = EAP7660D_GPIO_SW3,
.active_low = 1,
}
};
static const char *eap7660d_part_probes[] = {
"RedBoot",
NULL,
};
static struct flash_platform_data eap7660d_flash_data = {
.part_probes = eap7660d_part_probes,
};
static void __init eap7660d_setup(void)
{
u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG);
ath79_register_mdio(0, ~EAP7660D_PHYMASK);
ath79_init_mac(ath79_eth0_data.mac_addr,
boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = EAP7660D_PHYMASK;
ath79_register_eth(0);
ath79_register_m25p80(&eap7660d_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio),
eap7660d_leds_gpio);
ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL,
ARRAY_SIZE(eap7660d_gpio_keys),
eap7660d_gpio_keys);
eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET,
boardconfig + EAP7660D_WMAC0_MAC_OFFSET,
boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET,
boardconfig + EAP7660D_WMAC1_MAC_OFFSET);
};
MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D",
eap7660d_setup);
MIPS_MACHINE(ATH79_MACH_ALL0305, "ALL0305", "Allnet ALL0305",
eap7660d_setup);

112
target/linux/ar71xx/files/arch/mips/ath79/mach-el-m150.c Normal file
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/*
* Easy-Link EL-M150 board support
*
* Copyright (C) 2012 huangfc <huangfangcheng@163.com>
* Copyright (C) 2012 HYS <550663898@qq.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "dev-usb.h"
#define EL_M150_GPIO_BTN6 6
#define EL_M150_GPIO_BTN7 7
#define EL_M150_GPIO_BTN_RESET 11
#define EL_M150_GPIO_LED_SYSTEM 27
#define EL_M150_GPIO_USB_POWER 8
#define EL_M150_KEYS_POLL_INTERVAL 20 /* msecs */
#define EL_M150_KEYS_DEBOUNCE_INTERVAL (3 * EL_M150_KEYS_POLL_INTERVAL)
static const char *EL_M150_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data EL_M150_flash_data = {
.part_probes = EL_M150_part_probes,
};
static struct gpio_led EL_M150_leds_gpio[] __initdata = {
{
.name = "easylink:green:system",
.gpio = EL_M150_GPIO_LED_SYSTEM,
.active_low = 1,
},
};
static struct gpio_keys_button EL_M150_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL,
.gpio = EL_M150_GPIO_BTN_RESET,
.active_low = 0,
},
{
.desc = "BTN_6",
.type = EV_KEY,
.code = BTN_6,
.debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL,
.gpio = EL_M150_GPIO_BTN6,
.active_low = 1,
},
{
.desc = "BTN_7",
.type = EV_KEY,
.code = BTN_7,
.debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL,
.gpio = EL_M150_GPIO_BTN7,
.active_low = 1,
},
};
static void __init el_m150_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(EL_M150_leds_gpio),
EL_M150_leds_gpio);
ath79_register_gpio_keys_polled(-1, EL_M150_KEYS_POLL_INTERVAL,
ARRAY_SIZE(EL_M150_gpio_keys),
EL_M150_gpio_keys);
gpio_request_one(EL_M150_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&EL_M150_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_EL_M150, "EL-M150",
"EasyLink EL-M150", el_m150_setup);

86
target/linux/ar71xx/files/arch/mips/ath79/mach-el-mini.c Normal file
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/*
* Easy-Link EL-MINI board support
*
* Copyright (C) 2012 huangfc <huangfangcheng@163.com>
* Copyright (C) 2011 hys <550663898@qq.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define MINI_GPIO_LED_SYSTEM 27
#define MINI_GPIO_BTN_RESET 11
#define MINI_GPIO_USB_POWER 8
#define MINI_KEYS_POLL_INTERVAL 20 /* msecs */
#define MINI_KEYS_DEBOUNCE_INTERVAL (3 * MINI_KEYS_POLL_INTERVAL)
static const char *mini_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data mini_flash_data = {
.part_probes = mini_part_probes,
};
static struct gpio_led mini_leds_gpio[] __initdata = {
{
.name = "easylink:green:system",
.gpio = MINI_GPIO_LED_SYSTEM,
.active_low = 1,
},
};
static struct gpio_keys_button mini_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = MINI_KEYS_DEBOUNCE_INTERVAL,
.gpio = MINI_GPIO_BTN_RESET,
.active_low = 0,
}
};
static void __init el_mini_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&mini_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(mini_leds_gpio),
mini_leds_gpio);
ath79_register_gpio_keys_polled(-1, MINI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(mini_gpio_keys),
mini_gpio_keys);
gpio_request_one(MINI_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_EL_MINI, "EL-MINI", "EasyLink EL-MINI",
el_mini_setup);

124
target/linux/ar71xx/files/arch/mips/ath79/mach-ens202ext.c Normal file
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/*
* EnGenius ENS202EXT board support
*
* Copyright (C) 2017 Marty Plummer <netz.kernel@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define ENS202_GPIO_LED_WLAN4 0
#define ENS202_GPIO_LED_POWER 14
#define ENS202_GPIO_LED_WLAN2 16
#define ENS202_GPIO_LED_WLAN3 17
#define ENS202_GPIO_LED_WLAN1 18
#define ENS202_GPIO_BTN_RESET 1
#define ENS202_KEYS_POLL_INTERVAL 20 /* msecs */
#define ENS202_KEYS_DEBOUNCE_INTERVAL (3 * ENS202_KEYS_POLL_INTERVAL)
static struct gpio_led ens202_leds_gpio[] __initdata = {
{
.name = "engenius:amber:wlan1",
.gpio = ENS202_GPIO_LED_WLAN1,
.active_low = 1,
}, {
.name = "engenius:red:wlan2",
.gpio = ENS202_GPIO_LED_WLAN2,
.active_low = 1,
}, {
.name = "engenius:amber:wlan3",
.gpio = ENS202_GPIO_LED_WLAN3,
.active_low = 1,
}, {
.name = "engenius:green:wlan4",
.gpio = ENS202_GPIO_LED_WLAN4,
.active_low = 1,
}, {
.name = "engenius:amber:power",
.gpio = ENS202_GPIO_LED_POWER,
.active_low = 1,
}
};
static struct gpio_keys_button ens202_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ENS202_KEYS_DEBOUNCE_INTERVAL,
.gpio = ENS202_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init ens202_setup(void)
{
const char *nvram = (char *) KSEG1ADDR(0x1f040000);
u8 mac_buff[6];
u8 *mac = NULL;
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
if (ath79_nvram_parse_mac_addr(nvram, 0x10000,
"ethaddr=", mac_buff) == 0) {
ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
mac = mac_buff;
}
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_output_select(ENS202_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(ENS202_GPIO_LED_WLAN1, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(ENS202_GPIO_LED_WLAN2, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(ENS202_GPIO_LED_WLAN3, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(ENS202_GPIO_LED_WLAN4, AR934X_GPIO_OUT_GPIO);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ens202_leds_gpio),
ens202_leds_gpio);
ath79_register_gpio_keys_polled(-1, ENS202_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ens202_gpio_keys),
ens202_gpio_keys);
ath79_register_m25p80(NULL);
ath79_register_wmac(art + 0x1000, NULL);
ath79_register_mdio(1, 0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_ENS202EXT, "ENS202EXT", "EnGenius ENS202EXT",
ens202_setup);

177
target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c Normal file
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/*
* EnGenius EPG5000 board support
*
* Copyright (c) 2014 Jon Suphammer <jon@suphammer.net>
* Copyright (c) 2015 Christian Beier <cb@shoutrlabs.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define EPG5000_GPIO_LED_WLAN_5G 23
#define EPG5000_GPIO_LED_WLAN_2G 13
#define EPG5000_GPIO_LED_POWER_AMBER 2
#define EPG5000_GPIO_LED_WPS_AMBER 22
#define EPG5000_GPIO_LED_WPS_BLUE 19
#define EPG5000_GPIO_BTN_WPS 16
#define EPG5000_GPIO_BTN_RESET 17
#define EPG5000_KEYS_POLL_INTERVAL 20 /* msecs */
#define EPG5000_KEYS_DEBOUNCE_INTERVAL (3 * EPG5000_KEYS_POLL_INTERVAL)
#define EPG5000_CALDATA_ADDR 0x1fff0000
#define EPG5000_WMAC_CALDATA_OFFSET 0x1000
#define EPG5000_PCIE_CALDATA_OFFSET 0x5000
#define EPG5000_NVRAM_ADDR 0x1f030000
#define EPG5000_NVRAM_SIZE 0x10000
static struct gpio_led epg5000_leds_gpio[] __initdata = {
{
.name = "epg5000:amber:power",
.gpio = EPG5000_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "epg5000:blue:wps",
.gpio = EPG5000_GPIO_LED_WPS_BLUE,
.active_low = 1,
},
{
.name = "epg5000:amber:wps",
.gpio = EPG5000_GPIO_LED_WPS_AMBER,
.active_low = 1,
},
{
.name = "epg5000:blue:wlan-2g",
.gpio = EPG5000_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "epg5000:blue:wlan-5g",
.gpio = EPG5000_GPIO_LED_WLAN_5G,
.active_low = 1,
}
};
static struct gpio_keys_button epg5000_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = EPG5000_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = EPG5000_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data epg5000_ar8327_data = {
.pad0_cfg = &epg5000_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info epg5000_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &epg5000_ar8327_data,
},
};
static int epg5000_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE,
name, mac);
if (err) {
pr_err("no MAC address found for %s\n", name);
return false;
}
return true;
}
static void __init epg5000_setup(void)
{
u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR);
u8 mac1[ETH_ALEN];
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio),
epg5000_leds_gpio);
ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(epg5000_gpio_keys),
epg5000_gpio_keys);
ath79_register_usb();
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(epg5000_mdio0_info,
ARRAY_SIZE(epg5000_mdio0_info));
/* GMAC0 is connected to an QCA8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
if (epg5000_get_mac("ethaddr=", mac1))
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
ath79_eth0_pll_data.pll_1000 = 0xa6000000;
ath79_register_eth(0);
ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1);
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000",
"EnGenius EPG5000",
epg5000_setup);

176
target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c Normal file
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/*
* EnGenius ESR1750 board support
*
* Copyright (c) 2014 Jon Suphammer <jon@suphammer.net>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define ESR1750_GPIO_LED_WLAN_5G 23
#define ESR1750_GPIO_LED_WLAN_2G 13
#define ESR1750_GPIO_LED_POWER_AMBER 2
#define ESR1750_GPIO_LED_WPS_AMBER 22
#define ESR1750_GPIO_LED_WPS_BLUE 19
#define ESR1750_GPIO_BTN_WPS 16
#define ESR1750_GPIO_BTN_RESET 17
#define ESR1750_KEYS_POLL_INTERVAL 20 /* msecs */
#define ESR1750_KEYS_DEBOUNCE_INTERVAL (3 * ESR1750_KEYS_POLL_INTERVAL)
#define ESR1750_CALDATA_ADDR 0x1fff0000
#define ESR1750_WMAC_CALDATA_OFFSET 0x1000
#define ESR1750_PCIE_CALDATA_OFFSET 0x5000
#define ESR1750_NVRAM_ADDR 0x1f030000
#define ESR1750_NVRAM_SIZE 0x10000
static struct gpio_led esr1750_leds_gpio[] __initdata = {
{
.name = "esr1750:amber:power",
.gpio = ESR1750_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "esr1750:blue:wps",
.gpio = ESR1750_GPIO_LED_WPS_BLUE,
.active_low = 1,
},
{
.name = "esr1750:amber:wps",
.gpio = ESR1750_GPIO_LED_WPS_AMBER,
.active_low = 1,
},
{
.name = "esr1750:blue:wlan-2g",
.gpio = ESR1750_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "esr1750:blue:wlan-5g",
.gpio = ESR1750_GPIO_LED_WLAN_5G,
.active_low = 1,
}
};
static struct gpio_keys_button esr1750_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL,
.gpio = ESR1750_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL,
.gpio = ESR1750_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data esr1750_ar8327_data = {
.pad0_cfg = &esr1750_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info esr1750_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &esr1750_ar8327_data,
},
};
static int esr1750_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(ESR1750_NVRAM_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, ESR1750_NVRAM_SIZE,
name, mac);
if (err) {
pr_err("no MAC address found for %s\n", name);
return false;
}
return true;
}
static void __init esr1750_setup(void)
{
u8 *caldata = (u8 *) KSEG1ADDR(ESR1750_CALDATA_ADDR);
u8 mac1[ETH_ALEN];
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(esr1750_leds_gpio),
esr1750_leds_gpio);
ath79_register_gpio_keys_polled(-1, ESR1750_KEYS_POLL_INTERVAL,
ARRAY_SIZE(esr1750_gpio_keys),
esr1750_gpio_keys);
ath79_register_usb();
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(esr1750_mdio0_info,
ARRAY_SIZE(esr1750_mdio0_info));
/* GMAC0 is connected to an QCA8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
if (esr1750_get_mac("ethaddr=", mac1))
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
ath79_eth0_pll_data.pll_1000 = 0xa6000000;
ath79_register_eth(0);
ath79_register_wmac(caldata + ESR1750_WMAC_CALDATA_OFFSET, mac1);
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_ESR1750, "ESR1750",
"EnGenius ESR1750",
esr1750_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c Normal file
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/*
* EnGenius ESR900 board support
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#define pr_fmt(fmt) "esr900: " fmt
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define ESR900_GPIO_LED_POWER 2
#define ESR900_GPIO_LED_WLAN_2G 13
#define ESR900_GPIO_LED_WPS_BLUE 19
#define ESR900_GPIO_LED_WPS_AMBER 22
#define ESR900_GPIO_LED_WLAN_5G 23
#define ESR900_GPIO_BTN_WPS 16
#define ESR900_GPIO_BTN_RESET 17
#define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */
#define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL)
#define ESR900_CALDATA_ADDR 0x1fff0000
#define ESR900_WMAC_CALDATA_OFFSET 0x1000
#define ESR900_PCIE_CALDATA_OFFSET 0x5000
#define ESR900_CONFIG_ADDR 0x1f030000
#define ESR900_CONFIG_SIZE 0x10000
#define ESR900_LAN_PHYMASK BIT(0)
#define ESR900_WAN_PHYMASK BIT(5)
#define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK))
static struct gpio_led esr900_leds_gpio[] __initdata = {
{
.name = "engenius:amber:power",
.gpio = ESR900_GPIO_LED_POWER,
.active_low = 1,
},
{
.name = "engenius:blue:wlan-2g",
.gpio = ESR900_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "engenius:blue:wps",
.gpio = ESR900_GPIO_LED_WPS_BLUE,
.active_low = 1,
},
{
.name = "engenius:amber:wps",
.gpio = ESR900_GPIO_LED_WPS_AMBER,
.active_low = 1,
},
{
.name = "engenius:blue:wlan-5g",
.gpio = ESR900_GPIO_LED_WLAN_5G,
.active_low = 1,
}
};
static struct gpio_keys_button esr900_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
.gpio = ESR900_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
.gpio = ESR900_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = {
/* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = {
/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
.mode = AR8327_PAD_MAC_SGMII,
.rxclk_delay_en = true,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
};
static struct ar8327_platform_data esr900_ar8327_data = {
.pad0_cfg = &esr900_ar8327_pad0_cfg,
.pad6_cfg = &esr900_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info esr900_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &esr900_ar8327_data,
},
};
static void __init esr900_setup(void)
{
const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR);
u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR);
u8 lan_mac[ETH_ALEN];
u8 wlan0_mac[ETH_ALEN];
u8 wlan1_mac[ETH_ALEN];
if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE,
"ethaddr=", lan_mac) == 0) {
ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac);
ath79_init_mac(wlan0_mac, lan_mac, 0);
ath79_init_mac(wlan1_mac, lan_mac, 1);
} else {
pr_err("could not find ethaddr in u-boot environment\n");
}
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio),
esr900_leds_gpio);
ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL,
ARRAY_SIZE(esr900_gpio_keys),
esr900_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(esr900_mdio0_info,
ARRAY_SIZE(esr900_mdio0_info));
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0xa6000000;
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac);
}
MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup);

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/*
* EW Balin board support
* (based on Atheros DB120 reference board support)
*
* Copyright (c) 2011 Qualcomm Atheros
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2017 Embedded Wireless GmbH www.80211.de
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define BALIN_GPIO_LED_STATUS 14
#define BALIN_GPIO_BTN_WPS 18
#define BALIN_KEYS_POLL_INTERVAL 20 /* msecs */
#define BALIN_KEYS_DEBOUNCE_INTERVAL (3 * BALIN_KEYS_POLL_INTERVAL)
#define BALIN_CALDATA_OFFSET 0x1000
#define BALIN_WMAC_MAC_OFFSET (BALIN_CALDATA_OFFSET + 0x02)
static struct gpio_led balin_leds_gpio[] __initdata = {
{
.name = "balin:green:status",
.gpio = BALIN_GPIO_LED_STATUS,
.active_low = 1,
},
};
static struct gpio_keys_button balin_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = BALIN_KEYS_DEBOUNCE_INTERVAL,
.gpio = BALIN_GPIO_BTN_WPS,
.active_low = 0,
},
};
static void __init balin_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
static u8 mac[6];
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(balin_leds_gpio),
balin_leds_gpio);
ath79_register_gpio_keys_polled(-1, BALIN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(balin_gpio_keys),
balin_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + BALIN_CALDATA_OFFSET, NULL);
ath79_register_pci();
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
/* GMAC1 is connected to the internal switch */
memcpy(mac, art + BALIN_WMAC_MAC_OFFSET, sizeof(mac));
mac[3] |= 0x40;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_EW_BALIN, "EW-BALIN", "EmbWir-Balin",
balin_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c Normal file
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/*
* EW Dorin board support
* (based on Atheros Ref. Design AP121)
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012-2017 Embedded Wireless GmbH www.80211.de
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DORIN_KEYS_POLL_INTERVAL 20 /* msecs */
#define DORIN_KEYS_DEBOUNCE_INTERVAL (3 * DORIN_KEYS_POLL_INTERVAL)
#define DORIN_CALDATA_OFFSET 0x1000
#define DORIN_WMAC_MAC_OFFSET 0x1002
#define DORIN_GPIO_LED_STATUS 21
#define DORIN_GPIO_BTN_JUMPSTART 11
#define DORIN_GPIO_BTN_RESET 6
static struct gpio_led dorin_leds_gpio[] __initdata = {
{
.name = "dorin:green:status",
.gpio = DORIN_GPIO_LED_STATUS,
.active_low = 1,
},
};
static struct gpio_keys_button dorin_gpio_keys[] __initdata = {
{
.desc = "jumpstart button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL,
.gpio = DORIN_GPIO_BTN_JUMPSTART,
.active_low = 0,
},
{
.desc = "reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL,
.gpio = DORIN_GPIO_BTN_RESET,
.active_low = 0,
}
};
static void __init ew_dorin_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
static u8 mac[6];
ath79_register_m25p80(NULL);
ath79_register_usb();
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DORIN_CALDATA_OFFSET,
art + DORIN_WMAC_MAC_OFFSET);
memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x40;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio),
dorin_leds_gpio);
ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dorin_gpio_keys),
dorin_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_EW_DORIN, "EW-DORIN", "EmbWir-Dorin",
ew_dorin_setup);
static void __init ew_dorin_router_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
static u8 mac[6];
ath79_register_m25p80(NULL);
ath79_register_usb();
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DORIN_CALDATA_OFFSET,
art + DORIN_WMAC_MAC_OFFSET);
memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x40;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
mac[3] &= 0x3F;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_setup_ar933x_phy4_switch(true, true);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio),
dorin_leds_gpio);
ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dorin_gpio_keys),
dorin_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_EW_DORIN_ROUTER, "EW-DORIN-ROUTER",
"EmbWir-Dorin-Router", ew_dorin_router_setup);

189
target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c Normal file
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/*
* Belkin AC1750DB (F9K1115V2) board support
*
* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define F9K1115V2_GPIO_LED_USB2 4
#define F9K1115V2_GPIO_LED_WPS_AMBER 14
#define F9K1115V2_GPIO_LED_STATUS_AMBER 15
#define F9K1115V2_GPIO_LED_WPS_BLUE 19
#define F9K1115V2_GPIO_LED_STATUS_BLUE 20
#define F9K1115V2_GPIO_BTN_WPS 16
#define F9K1115V2_GPIO_BTN_RESET 17
#define F9K1115V2_GPIO_USB2_POWER 21
#define F9K1115V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define F9K1115V2_KEYS_DEBOUNCE_INTERVAL (3 * F9K1115V2_KEYS_POLL_INTERVAL)
#define F9K1115V2_WAN_MAC_OFFSET 0
#define F9K1115V2_LAN_MAC_OFFSET 6
#define F9K1115V2_WMAC_CALDATA_OFFSET 0x1000
#define F9K1115V2_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led f9k1115v2_leds_gpio[] __initdata = {
{
.name = "belkin:amber:status",
.gpio = F9K1115V2_GPIO_LED_STATUS_AMBER,
.active_low = 1,
},
{
.name = "belkin:blue:status",
.gpio = F9K1115V2_GPIO_LED_STATUS_BLUE,
.active_low = 1,
},
{
.name = "belkin:blue:wps",
.gpio = F9K1115V2_GPIO_LED_WPS_BLUE,
.active_low = 1,
},
{
.name = "belkin:amber:wps",
.gpio = F9K1115V2_GPIO_LED_WPS_AMBER,
.active_low = 1,
},
{
.name = "belkin:green:usb2",
.gpio = F9K1115V2_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_keys_button f9k1115v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = F9K1115V2_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = F9K1115V2_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = {
/* Use the RGMII interface for the GMAC0 of the AR8337 switch */
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = {
/* Use the SGMII interface for the GMAC6 of the AR8337 switch */
.mode = AR8327_PAD_MAC_SGMII,
.rxclk_delay_en = true,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
};
static struct ar8327_platform_data f9k1115v2_ar8327_data = {
.pad0_cfg = &f9k1115v2_ar8327_pad0_cfg,
.pad6_cfg = &f9k1115v2_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info f9k1115v2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &f9k1115v2_ar8327_data,
},
};
static void __init f9k1115v2_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(f9k1115v2_leds_gpio),
f9k1115v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, F9K1115V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(f9k1115v2_gpio_keys),
f9k1115v2_gpio_keys);
ath79_register_wmac(art + F9K1115V2_WMAC_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(f9k1115v2_mdio0_info,
ARRAY_SIZE(f9k1115v2_mdio0_info));
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + F9K1115V2_WAN_MAC_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + F9K1115V2_LAN_MAC_OFFSET, 0);
ath79_eth0_pll_data.pll_1000 = 0xa6000000;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
ath79_register_pci();
ath79_register_usb();
gpio_request_one(F9K1115V2_GPIO_USB2_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB2 power");
}
MIPS_MACHINE(ATH79_MACH_F9K1115V2, "F9K1115V2", "Belkin AC1750DB",
f9k1115v2_setup);

132
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/*
* AVM FRITZ!WLAN Repeater 300E board support
*
* Copyright (C) 2017 Mathias Kresin <dev@kresin.me>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#define FRITZ300E_KEYS_POLL_INTERVAL 20 /* msecs */
#define FRITZ300E_KEYS_DEBOUNCE_INTERVAL (3 * FRITZ300E_KEYS_POLL_INTERVAL)
static struct mtd_partition fritz300e_flash_partitions[] = {
{
.name = "urloader",
.offset = 0,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x0020000,
.size = 0x0ee0000,
}, {
.name = "tffs (1)",
.offset = 0x0f00000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "tffs (2)",
.offset = 0x0f80000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}
};
static struct flash_platform_data fritz300e_flash_data = {
.parts = fritz300e_flash_partitions,
.nr_parts = ARRAY_SIZE(fritz300e_flash_partitions),
};
static struct gpio_led fritz300e_leds_gpio[] __initdata = {
{
.name = "fritz300e:green:power",
.gpio = 13,
.active_low = 1,
}, {
.name = "fritz300e:green:lan",
.gpio = 15,
.active_low = 1,
}, {
.name = "fritz300e:green:wlan",
.gpio = 16,
.active_low = 1,
}
};
static struct gpio_led fritz300e_wmac_leds_gpio[] = {
{
.name = "fritz300e:green:rssi0",
.gpio = 10,
.active_low = 1,
}, {
.name = "fritz300e:green:rssi1",
.gpio = 4,
.active_low = 1,
}, {
.name = "fritz300e:green:rssi2",
.gpio = 6,
.active_low = 1,
}, {
.name = "fritz300e:green:rssi3",
.gpio = 7,
.active_low = 1,
}, {
.name = "fritz300e:green:rssi4",
.gpio = 5,
.active_low = 1,
}
};
static struct gpio_keys_button fritz300e_gpio_keys[] __initdata = {
{
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = FRITZ300E_KEYS_DEBOUNCE_INTERVAL,
.gpio = 12,
.active_low = 1,
},
};
static void __init fritz300e_setup(void)
{
/* get the Lantiq PEF7071V phy out of reset */
gpio_request_one(11, GPIOF_OUT_INIT_HIGH, "phy reset");
ath79_register_m25p80(&fritz300e_flash_data);
ath79_register_mdio(0, ~(BIT(0)));
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(fritz300e_leds_gpio),
fritz300e_leds_gpio);
ath79_register_gpio_keys_polled(-1, FRITZ300E_KEYS_POLL_INTERVAL,
ARRAY_SIZE(fritz300e_gpio_keys),
fritz300e_gpio_keys);
ap9x_pci_setup_wmac_leds(0, fritz300e_wmac_leds_gpio,
ARRAY_SIZE(fritz300e_wmac_leds_gpio));
ap91_pci_init_simple();
}
MIPS_MACHINE(ATH79_MACH_FRITZ300E, "FRITZ300E",
"AVM FRITZ!WLAN Repeater 300E", fritz300e_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-fritz4020.c Normal file
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/*
* AVM FRITZ!Box 4020 board support
*
* Copyright (C) 2018 David Bauer <mail@david-bauer.net>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/ath9k_platform.h>
#include <linux/etherdevice.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_data/mdio-gpio.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define FRITZ4020_GPIO_SHIFT_SER 19 /* DS, Data Serial Input */
#define FRITZ4020_GPIO_SHIFT_SRCLK 20 /* SHCP, Shift Reg Clock Input */
#define FRITZ4020_SSR_BIT_0 0
#define FRITZ4020_SSR_BIT_1 1
#define FRITZ4020_SSR_BIT_2 2
#define FRITZ4020_SSR_BIT_3 3
#define FRITZ4020_SSR_BIT_4 4
#define FRITZ4020_SSR_BIT_5 5
#define FRITZ4020_SSR_BIT_6 6
#define FRITZ4020_SSR_BIT_7 7
#define FRITZ4020_74HC_GPIO_BASE 32
#define FRITZ4020_74HC_GPIO_LED_LAN (FRITZ4020_74HC_GPIO_BASE + 0)
#define FRITZ4020_74HC_GPIO_LED_INFO_RED (FRITZ4020_74HC_GPIO_BASE + 1)
#define FRITZ4020_74HC_GPIO_LED_POWER (FRITZ4020_74HC_GPIO_BASE + 2)
#define FRITZ4020_74HC_GPIO_LED_WLAN (FRITZ4020_74HC_GPIO_BASE + 3)
#define FRITZ4020_74HC_GPIO_LED_WAN (FRITZ4020_74HC_GPIO_BASE + 4)
#define FRITZ4020_74HC_GPIO_USB_RST (FRITZ4020_74HC_GPIO_BASE + 5)
#define FRITZ4020_74HC_GPIO_LED_INFO (FRITZ4020_74HC_GPIO_BASE + 6)
#define FRITZ4020_GPIO_BTN_WPS 2
#define FRITZ4020_GPIO_BTN_WLAN 21
#define FRITZ4020_KEYS_POLL_INTERVAL 20 /* msecs */
#define FRITZ4020_KEYS_DEBOUNCE_INTERVAL (3 * FRITZ4020_KEYS_POLL_INTERVAL)
#define FRTIZ4020_OFFSET_URLADER_WIFI_MAC_REVERSE 0x1979
static struct spi_gpio_platform_data fritz4020_spi_data = {
.sck = FRITZ4020_GPIO_SHIFT_SRCLK,
.miso = SPI_GPIO_NO_MISO,
.mosi = FRITZ4020_GPIO_SHIFT_SER,
.num_chipselect = 1,
};
static u8 fritz4020_ssr_initdata[] = {
BIT(FRITZ4020_SSR_BIT_7) |
BIT(FRITZ4020_SSR_BIT_6) |
BIT(FRITZ4020_SSR_BIT_5) |
BIT(FRITZ4020_SSR_BIT_4) |
BIT(FRITZ4020_SSR_BIT_3) |
BIT(FRITZ4020_SSR_BIT_2) |
BIT(FRITZ4020_SSR_BIT_1)
};
static struct gen_74x164_chip_platform_data fritz4020_ssr_data = {
.base = FRITZ4020_74HC_GPIO_BASE,
.num_registers = ARRAY_SIZE(fritz4020_ssr_initdata),
.init_data = fritz4020_ssr_initdata,
};
static struct platform_device fritz4020_spi_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &fritz4020_spi_data,
},
};
static struct spi_board_info fritz4020_spi_info[] = {
{
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 10000000,
.modalias = "74x164",
.platform_data = &fritz4020_ssr_data,
.controller_data = (void *) 0x0,
},
};
static struct mtd_partition fritz4020_flash_partitions[] = {
{
.name = "urlader",
.offset = 0,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x0020000,
.size = 0x0EE0000,
}, {
.name = "tffs (1)",
.offset = 0x0f00000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "tffs (2)",
.offset = 0x0f80000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}
};
static struct flash_platform_data fritz4020_flash_data = {
.parts = fritz4020_flash_partitions,
.nr_parts = ARRAY_SIZE(fritz4020_flash_partitions),
};
static struct gpio_led fritz4020_leds_gpio[] __initdata = {
{
.name = "fritz4020:green:lan",
.gpio = FRITZ4020_74HC_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "fritz4020:green:info",
.gpio = FRITZ4020_74HC_GPIO_LED_INFO,
.active_low = 1,
}, {
.name = "fritz4020:red:info",
.gpio = FRITZ4020_74HC_GPIO_LED_INFO_RED,
.active_low = 1,
}, {
.name = "fritz4020:green:power",
.gpio = FRITZ4020_74HC_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "fritz4020:green:wlan",
.gpio = FRITZ4020_74HC_GPIO_LED_WLAN,
.active_low = 1,
}, {
.name = "fritz4020:green:wan",
.gpio = FRITZ4020_74HC_GPIO_LED_WAN,
.active_low = 1,
},
};
static struct gpio_keys_button fritz4020_gpio_keys[] __initdata = {
{
.desc = "RFKILL button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = FRITZ4020_KEYS_DEBOUNCE_INTERVAL,
.gpio = FRITZ4020_GPIO_BTN_WLAN,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = FRITZ4020_KEYS_DEBOUNCE_INTERVAL,
.gpio = FRITZ4020_GPIO_BTN_WPS,
.active_low = 1,
},
};
static void __init fritz4020_setup(void) {
u8 *urlader = (u8 *) KSEG1ADDR(0x1f000000);
u8 wifi_mac[ETH_ALEN];
ath79_register_m25p80(&fritz4020_flash_data);
/* Initialize ethernet */
ath79_extract_mac_reverse(urlader + FRTIZ4020_OFFSET_URLADER_WIFI_MAC_REVERSE, wifi_mac);
ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP |
QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, -1);
ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, -2);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(0);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
/* Initialize 2.4GHz WiFi */
ath79_register_wmac_simple();
/* Activate USB Power */
gpio_request_one(FRITZ4020_74HC_GPIO_USB_RST,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
/* Initialize USB port */
ath79_register_usb();
/* Register LED shift-register */
spi_register_board_info(fritz4020_spi_info,
ARRAY_SIZE(fritz4020_spi_info));
platform_device_register(&fritz4020_spi_device);
/* Register GPIO buttons */
ath79_register_gpio_keys_polled(-1, FRITZ4020_KEYS_POLL_INTERVAL,
ARRAY_SIZE(fritz4020_gpio_keys),
fritz4020_gpio_keys);
/* Register LEDs */
ath79_register_leds_gpio(-1, ARRAY_SIZE(fritz4020_leds_gpio),
fritz4020_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_FRITZ4020, "FRITZ4020",
"AVM FRITZ!Box 4020", fritz4020_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-fritz450e.c Normal file
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/*
* AVM FRITZ!WLAN Repeater 450E board support
*
* Copyright (C) 2018 David Bauer <mail@david-bauer.net>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/ath9k_platform.h>
#include <linux/etherdevice.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_data/mdio-gpio.h>
#include <linux/platform_data/phy-at803x.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define FRITZ450E_GPIO_LED_POWER 14
#define FRITZ450E_GPIO_LED_LAN 13
#define FRITZ450E_GPIO_LED_WLAN 15
#define FRITZ450E_GPIO_LED_RSSI2 16
#define FRITZ450E_GPIO_LED_RSSI3 17
#define FRITZ450E_GPIO_LED_RSSI4 18
#define FRITZ450E_GPIO_BTN_WPS 4
#define FRITZ450E_KEYS_POLL_INTERVAL 20 /* msecs */
#define FRITZ450E_KEYS_DEBOUNCE_INTERVAL (3 * FRITZ450E_KEYS_POLL_INTERVAL)
#define FRITZ450E_PHY_ADDRESS 0
#define FRITZ450E_GPIO_PHY_RESET 11
#define FRITZ450E_GPIO_MDIO_CLK 12
#define FRITZ450E_GPIO_MDIO_DATA 19
#define FRITZ450E_OFFSET_URLADER_WIFI_MAC_REVERSE 0x1979
static struct mtd_partition fritz450E_flash_partitions[] = {
{
.name = "urlader",
.offset = 0,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x0020000,
.size = 0x0EE0000,
}, {
.name = "tffs (1)",
.offset = 0x0f00000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "tffs (2)",
.offset = 0x0f80000,
.size = 0x0080000,
.mask_flags = MTD_WRITEABLE,
}
};
static struct flash_platform_data fritz450E_flash_data = {
.parts = fritz450E_flash_partitions,
.nr_parts = ARRAY_SIZE(fritz450E_flash_partitions),
};
static struct gpio_led fritz450E_leds_gpio[] __initdata = {
{
.name = "fritz450e:green:lan",
.gpio = FRITZ450E_GPIO_LED_LAN,
.active_low = 1,
}, {
.name = "fritz450e:green:rssi2",
.gpio = FRITZ450E_GPIO_LED_RSSI2,
.active_low = 1,
}, {
.name = "fritz450e:green:rssi3",
.gpio = FRITZ450E_GPIO_LED_RSSI3,
.active_low = 1,
}, {
.name = "fritz450e:green:rssi4",
.gpio = FRITZ450E_GPIO_LED_RSSI4,
.active_low = 1,
}, {
.name = "fritz450e:green:wlan",
.gpio = FRITZ450E_GPIO_LED_WLAN,
.active_low = 1,
}, {
.name = "fritz450e:green:power",
.gpio = FRITZ450E_GPIO_LED_POWER,
.active_low = 0,
},
};
static struct gpio_keys_button fritz450E_gpio_keys[] __initdata = {
{
.desc = "WPS Button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = FRITZ450E_KEYS_DEBOUNCE_INTERVAL,
.gpio = FRITZ450E_GPIO_BTN_WPS,
.active_low = 1,
}
};
static struct at803x_platform_data fritz450E_at803x_data = {
.disable_smarteee = 1,
.has_reset_gpio = 1,
.override_sgmii_aneg = 1,
.reset_gpio = FRITZ450E_GPIO_PHY_RESET,
};
static struct mdio_board_info fritz450E_mdio_info[] = {
{
.bus_id = "ag71xx-mdio.1",
.phy_addr = FRITZ450E_PHY_ADDRESS,
.platform_data = &fritz450E_at803x_data,
},
};
static void __init fritz450E_setup(void) {
u8 *urlader = (u8 *) KSEG1ADDR(0x1f000000);
u8 wifi_mac[ETH_ALEN];
ath79_register_m25p80(&fritz450E_flash_data);
gpio_request_one(FRITZ450E_GPIO_MDIO_CLK, GPIOF_OUT_INIT_HIGH, "MDC Pull-UP");
gpio_request_one(FRITZ450E_GPIO_MDIO_DATA, GPIOF_OUT_INIT_HIGH, "MDIO Pull-UP");
gpio_request_one(FRITZ450E_GPIO_PHY_RESET, GPIOF_OUT_INIT_HIGH, "PHY reset");
/* Register PHY device */
mdiobus_register_board_info(fritz450E_mdio_info,
ARRAY_SIZE(fritz450E_mdio_info));
/* Initialize Ethernet */
ath79_extract_mac_reverse(urlader + FRITZ450E_OFFSET_URLADER_WIFI_MAC_REVERSE, wifi_mac);
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, -2);
ath79_register_mdio(1, ~BIT(FRITZ450E_PHY_ADDRESS));
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.phy_mask = BIT(FRITZ450E_PHY_ADDRESS);
ath79_eth0_data.enable_sgmii_fixup = 1;
ath79_eth0_pll_data.pll_1000 = 0x03000000;
ath79_eth0_pll_data.pll_100 = 0x00000101;
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_register_eth(0);
/* Initialize 2.4GHz WiFi */
ath79_register_wmac_simple();
/* Register GPIO buttons */
ath79_register_gpio_keys_polled(-1, FRITZ450E_KEYS_POLL_INTERVAL,
ARRAY_SIZE(fritz450E_gpio_keys),
fritz450E_gpio_keys);
/* Register LEDs */
ath79_register_leds_gpio(-1, ARRAY_SIZE(fritz450E_leds_gpio),
fritz450E_leds_gpio);
}
MIPS_MACHINE(ATH79_MACH_FRITZ450E, "FRITZ450E",
"AVM FRITZ!WLAN Repeater 450E", fritz450E_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar150.c Normal file
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/*
* GL_ar150 board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_AR150_GPIO_LED_WLAN 0
#define GL_AR150_GPIO_LED_LAN 13
#define GL_AR150_GPIO_LED_WAN 15
#define GL_AR150_GPIO_BIN_USB 6
#define GL_AR150_GPIO_BTN_MANUAL 7
#define GL_AR150_GPIO_BTN_AUTO 8
#define GL_AR150_GPIO_BTN_RESET 11
#define GL_AR150_KEYS_POLL_INTERVAL 20 /* msecs */
#define GL_AR150_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR150_KEYS_POLL_INTERVAL)
#define GL_AR150_MAC0_OFFSET 0x0000
#define GL_AR150_MAC1_OFFSET 0x0000
#define GL_AR150_CALDATA_OFFSET 0x1000
#define GL_AR150_WMAC_MAC_OFFSET 0x0000
static struct gpio_led gl_ar150_leds_gpio[] __initdata = {
{
.name = "gl-ar150:orange:wlan",
.gpio = GL_AR150_GPIO_LED_WLAN,
.active_low = 0,
},
{
.name = "gl-ar150:green:lan",
.gpio = GL_AR150_GPIO_LED_LAN,
.active_low = 0,
},
{
.name = "gl-ar150:green:wan",
.gpio = GL_AR150_GPIO_LED_WAN,
.active_low = 0,
.default_state = 1,
},
};
static struct gpio_keys_button gl_ar150_gpio_keys[] __initdata = {
{
.desc = "BTN_7",
.type = EV_KEY,
.code = BTN_7,
.debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR150_GPIO_BTN_MANUAL,
.active_low = 0,
},
{
.desc = "BTN_8",
.type = EV_KEY,
.code = BTN_8,
.debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR150_GPIO_BTN_AUTO,
.active_low = 0,
},
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR150_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init gl_ar150_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar150_leds_gpio),
gl_ar150_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_AR150_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_ar150_gpio_keys),
gl_ar150_gpio_keys);
/* enable usb */
gpio_request_one(GL_AR150_GPIO_BIN_USB,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR150_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR150_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + GL_AR150_CALDATA_OFFSET, art + GL_AR150_WMAC_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_GL_AR150, "GL-AR150", "GL.iNet GL-AR150", gl_ar150_setup);

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/*
* Domino board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_AR300_GPIO_LED_WLAN 13
#define GL_AR300_GPIO_LED_WAN 14
#define GL_AR300_GPIO_BTN_RESET 16
#define GL_AR300_KEYS_POLL_INTERVAL 20 /* msecs */
#define GL_AR300_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR300_KEYS_POLL_INTERVAL)
#define GL_AR300_MAC0_OFFSET 0x0000
#define GL_AR300_MAC1_OFFSET 0x0000
#define GL_AR300_CALDATA_OFFSET 0x1000
#define GL_AR300_WMAC_MAC_OFFSET 0x0000
static struct gpio_led gl_ar300_leds_gpio[] __initdata = {
{
.name = "gl-ar300:wlan",
.gpio = GL_AR300_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "gl-ar300:wan",
.gpio = GL_AR300_GPIO_LED_WAN,
.active_low = 1,
},
};
static struct gpio_keys_button gl_ar300_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_AR300_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR300_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init gl_ar300_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300_leds_gpio),
gl_ar300_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_AR300_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_ar300_gpio_keys),
gl_ar300_gpio_keys);
/* enable usb */
ath79_register_usb();
ath79_register_mdio(1, 0x0);
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR300_MAC0_OFFSET, 0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR300_MAC1_OFFSET, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + GL_AR300_CALDATA_OFFSET, art + GL_AR300_WMAC_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_GL_AR300, "GL-AR300", "GL.iNet GL-AR300", gl_ar300_setup);

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/*
* GLI AR300M(D) board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/pci.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define GL_AR300M_GPIO_LED_WLAN 14
#define GL_AR300M_GPIO_LED_LAN 13
#define GL_AR300M_GPIO_LED_SYSTEM 12
#define GL_AR300M_GPIO_BTN_RESET 3
#define GL_AR300M_GPIO_BTN_LEFT 0
#define GL_AR300M_GPIO_BTN_RIGHT 1
#define GL_AR300M_KEYS_POLL_INTERVAL 20 /* msecs */
#define GL_AR300M_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR300M_KEYS_POLL_INTERVAL)
#define GL_AR300M_MAC0_OFFSET 0
#define GL_AR300M_MAC1_OFFSET 6
#define GL_AR300M_WMAC_CALDATA_OFFSET 0x1000
#define GL_AR300M_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led gl_ar300m_leds_gpio[] __initdata = {
{
.name = "gl-ar300m:red:wlan",
.gpio = GL_AR300M_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "gl-ar300m:green:lan",
.gpio = GL_AR300M_GPIO_LED_LAN,
.active_low = 1,
},
{
.name = "gl-ar300m:green:system",
.gpio = GL_AR300M_GPIO_LED_SYSTEM,
.active_low = 1,
.default_state = 1,
},
};
static struct gpio_keys_button gl_ar300m_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_AR300M_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR300M_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "button right",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = GL_AR300M_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR300M_GPIO_BTN_LEFT,
.active_low = 0,
},
{
.desc = "button left",
.type = EV_KEY,
.code = BTN_1,
.debounce_interval = GL_AR300M_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR300M_GPIO_BTN_RIGHT,
.active_low = 0,
},
};
static struct spi_board_info gl_ar300m_spi_info[] = {
{
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 25000000,
.modalias = "m25p80",
.platform_data = NULL,
},
{
.bus_num = 0,
.chip_select = 1,
.max_speed_hz = 25000000,
.modalias = "ath79-spinand",
.platform_data = NULL,
}
};
static struct ath79_spi_platform_data gl_ar300m_spi_data = {
.bus_num = 0,
.num_chipselect = 2,
};
static void __init gl_ar300m_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_register_spi(&gl_ar300m_spi_data, gl_ar300m_spi_info, 2);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300m_leds_gpio),
gl_ar300m_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_AR300M_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_ar300m_gpio_keys),
gl_ar300m_gpio_keys);
ath79_register_mdio(0, 0x0);
/* WAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_AR300M_MAC0_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN */
ath79_init_mac(ath79_eth1_data.mac_addr, art + GL_AR300M_MAC1_OFFSET, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
ath79_init_mac(tmpmac, art + GL_AR300M_WMAC_CALDATA_OFFSET + 2, 0);
ath79_register_wmac(art + GL_AR300M_WMAC_CALDATA_OFFSET, tmpmac);
/* enable usb */
ath79_register_usb();
/* enable pci */
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_GL_AR300M, "GL-AR300M", "GL.iNet GL-AR300M", gl_ar300m_setup);

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/*
* GL.iNet GL-AR750 board support
*
* Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_AR750_GPIO_LED_POWER 12
#define GL_AR750_GPIO_LED_WLAN2G 14
#define GL_AR750_GPIO_LED_WLAN5G 13
#define GL_AR750_GPIO_BTN_RESET 3
#define GL_AR750_GPIO_BTN_SW1 0
#define GL_AR750_GPIO_I2C_SCL 16
#define GL_AR750_GPIO_I2C_SDA 17
#define GL_AR750_GPIO_USB_POWER 2
#define GL_AR750_KEYS_POLL_INTERVAL 20
#define GL_AR750_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR750_KEYS_POLL_INTERVAL)
#define GL_AR750_MAC0_OFFSET 0
#define GL_AR750_WMAC2G_CALDATA_OFFSET 0x1000
#define GL_AR750_WMAC5G_CALDATA_OFFSET 0x5000
static struct gpio_led gl_ar750_leds_gpio[] __initdata = {
{
.name = "gl-ar750:white:power",
.gpio = GL_AR750_GPIO_LED_POWER,
.default_state = LEDS_GPIO_DEFSTATE_KEEP,
.active_low = 1,
}, {
.name = "gl-ar750:white:wlan2g",
.gpio = GL_AR750_GPIO_LED_WLAN2G,
.active_low = 1,
}, {
.name = "gl-ar750:white:wlan5g",
.gpio = GL_AR750_GPIO_LED_WLAN5G,
.active_low = 1,
},
};
static struct gpio_keys_button gl_ar750_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_AR750_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR750_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "sw1",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = GL_AR750_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_AR750_GPIO_BTN_SW1,
.active_low = 1,
},
};
static struct i2c_gpio_platform_data gl_ar750_i2c_gpio_data = {
.sda_pin = GL_AR750_GPIO_I2C_SDA,
.scl_pin = GL_AR750_GPIO_I2C_SCL,
};
static struct platform_device gl_ar750_i2c_gpio = {
.name = "i2c-gpio",
.id = 0,
.dev = {
.platform_data = &gl_ar750_i2c_gpio_data,
},
};
static void __init gl_ar750_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f050000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = 0xfc;
/* WAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.speed = SPEED_100;
ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_AR750_MAC0_OFFSET, 0);
ath79_register_eth(0);
/* LAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_init_mac(ath79_eth1_data.mac_addr, art + GL_AR750_MAC0_OFFSET, 1);
ath79_register_eth(1);
/* Disable JTAG (enables GPIO0-3) */
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar750_leds_gpio),
gl_ar750_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_AR750_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_ar750_gpio_keys),
gl_ar750_gpio_keys);
gpio_request_one(GL_AR750_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
platform_device_register(&gl_ar750_i2c_gpio);
ath79_register_usb();
ath79_register_wmac(art + GL_AR750_WMAC2G_CALDATA_OFFSET, NULL);
ap91_pci_init(art + GL_AR750_WMAC5G_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_GL_AR750, "GL-AR750", "GL.iNet GL-AR750",
gl_ar750_setup);

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/*
* Domino board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DOMINO_GPIO_LED_WLAN 0
#define DOMINO_GPIO_LED_WAN 17
#define DOMINO_GPIO_LED_USB 1
#define DOMINO_GPIO_LED_LAN1 13
#define DOMINO_GPIO_LED_LAN2 14
#define DOMINO_GPIO_LED_LAN3 15
#define DOMINO_GPIO_LED_LAN4 16
#define DOMINO_GPIO_LED_SYS 27
#define DOMINO_GPIO_LED_WPS 26
#define DOMINO_GPIO_USB_POWER 6
#define DOMINO_GPIO_BTN_RESET 11
#define DOMINO_GPIO_BTN_WPS 20
#define DOMINO_KEYS_POLL_INTERVAL 20 /* msecs */
#define DOMINO_KEYS_DEBOUNCE_INTERVAL (3 * DOMINO_KEYS_POLL_INTERVAL)
#define DOMINO_MAC0_OFFSET 0x0000
#define DOMINO_MAC1_OFFSET 0x0000
#define DOMINO_CALDATA_OFFSET 0x1000
#define DOMINO_WMAC_MAC_OFFSET 0x0000
static struct gpio_led domino_leds_gpio[] __initdata = {
{
.name = "gl-domino:blue:wlan",
.gpio = DOMINO_GPIO_LED_WLAN,
.active_low = 0,
},
{
.name = "gl-domino:red:wan",
.gpio = DOMINO_GPIO_LED_WAN,
.active_low = 1,
},
{
.name = "gl-domino:white:usb",
.gpio = DOMINO_GPIO_LED_USB,
.active_low = 0,
},
{
.name = "gl-domino:green:lan1",
.gpio = DOMINO_GPIO_LED_LAN1,
.active_low = 0,
},
{
.name = "gl-domino:yellow:wps",
.gpio = DOMINO_GPIO_LED_WPS,
.active_low = 1,
},
{
.name = "gl-domino:orange:sys",
.gpio = DOMINO_GPIO_LED_SYS,
.active_low = 1,
},
};
static struct gpio_keys_button domino_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL,
.gpio = DOMINO_GPIO_BTN_RESET,
.active_low = 0,
},
{
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL,
.gpio = DOMINO_GPIO_BTN_WPS,
.active_low = 0,
}
};
static void __init domino_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(domino_leds_gpio),
domino_leds_gpio);
ath79_register_gpio_keys_polled(-1, DOMINO_KEYS_POLL_INTERVAL,
ARRAY_SIZE(domino_gpio_keys),
domino_gpio_keys);
gpio_request_one(DOMINO_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+DOMINO_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+DOMINO_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + DOMINO_CALDATA_OFFSET, art + DOMINO_WMAC_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_GL_DOMINO, "DOMINO", "Domino Pi", domino_setup);

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/*
* GL-CONNECT iNet board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_INET_GPIO_LED_WLAN 0
#define GL_INET_GPIO_LED_LAN 13
#define GL_INET_GPIO_BTN_RESET 11
#define GL_INET_KEYS_POLL_INTERVAL 20 /* msecs */
#define GL_INET_KEYS_DEBOUNCE_INTERVAL (3 * GL_INET_KEYS_POLL_INTERVAL)
static const char * gl_inet_part_probes[] = {
"tp-link", /* dont change, this will use tplink parser */
NULL ,
};
static struct flash_platform_data gl_inet_flash_data = {
.part_probes = gl_inet_part_probes,
};
static struct gpio_led gl_inet_leds_gpio[] __initdata = {
{
.name = "gl-inet:red:wlan",
.gpio = GL_INET_GPIO_LED_WLAN,
.active_low = 0,
},
{
.name = "gl-inet:green:lan",
.gpio = GL_INET_GPIO_LED_LAN,
.active_low = 0,
.default_state = 1,
},
};
static struct gpio_keys_button gl_inet_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_INET_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_INET_GPIO_BTN_RESET,
.active_low = 0,
}
};
static void __init gl_inet_setup(void)
{
/* get the mac address which is stored in the 1st 64k uboot MTD */
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
/* get the art address, which is the last 64K. By using
0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. MTD will use tp-link parser to parser MTD */
ath79_register_m25p80(&gl_inet_flash_data);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio),
gl_inet_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_inet_gpio_keys),
gl_inet_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_GL_INET, "GL-INET", "GL-CONNECT INET v1",
gl_inet_setup);

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target/linux/ar71xx/files/arch/mips/ath79/mach-gl-mifi.c Normal file
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/*
* Mifi board support
*
* Copyright (C) 2011 dongyuqi <729650915@qq.com>
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2013 alzhao <alzhao@gmail.com>
* Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_MIFI_GPIO_LED_WAN 27
#define GL_MIFI_GPIO_LED_LAN 16
#define GL_MIFI_GPIO_LED_WLAN 1
#define GL_MIFI_GPIO_LED_NET 0
#define GL_MIFI_GPIO_LED_3GCONTROL 7
#define GL_MIFI_GPIO_BTN_RESET 11
#define GL_MIFI_KEYS_POLL_INTERVAL 20 /* msecs */
#define GL_MIFI_KEYS_DEBOUNCE_INTERVAL (3 * GL_MIFI_KEYS_POLL_INTERVAL)
#define GL_MIFI_MAC0_OFFSET 0x0000
#define GL_MIFI_MAC1_OFFSET 0x0000
#define GL_MIFI_CALDATA_OFFSET 0x1000
#define GL_MIFI_WMAC_MAC_OFFSET 0x0000
static struct gpio_led gl_mifi_leds_gpio[] __initdata = {
{
.name = "gl-mifi:green:wan",
.gpio = GL_MIFI_GPIO_LED_WAN,
.active_low = 0,
},
{
.name = "gl-mifi:green:lan",
.gpio = GL_MIFI_GPIO_LED_LAN,
.active_low = 0,
},
{
.name = "gl-mifi:green:wlan",
.gpio = GL_MIFI_GPIO_LED_WLAN,
.active_low = 0,
},
{
.name = "gl-mifi:green:net",
.gpio = GL_MIFI_GPIO_LED_NET,
.active_low = 0,
},
{
.name = "gl-mifi:green:3gcontrol",
.gpio = GL_MIFI_GPIO_LED_3GCONTROL,
.active_low = 0,
}
};
static struct gpio_keys_button gl_mifi_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_MIFI_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_MIFI_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init gl_mifi_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_mifi_leds_gpio),
gl_mifi_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_MIFI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_mifi_gpio_keys),
gl_mifi_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_MIFI_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_MIFI_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + GL_MIFI_CALDATA_OFFSET, art + GL_MIFI_WMAC_MAC_OFFSET);
}
MIPS_MACHINE(ATH79_MACH_GL_MIFI, "GL-MIFI", "GL.iNet GL-MIFI", gl_mifi_setup);

87
target/linux/ar71xx/files/arch/mips/ath79/mach-gl-usb150.c Normal file
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/*
* GL.iNet GL-USB150 board support
*
* Copyright (C) 2017 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define GL_USB150_GPIO_LED_POWER 13
#define GL_USB150_GPIO_LED_WLAN 0
#define GL_USB150_GPIO_LAN_RESET 7
#define GL_USB150_GPIO_BTN_RESET 11
#define GL_USB150_KEYS_POLL_INTERVAL 20
#define GL_USB150_KEYS_DEBOUNCE_INTERVAL \
(3 * GL_USB150_KEYS_POLL_INTERVAL)
#define GL_USB150_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led gl_usb150_leds_gpio[] __initdata = {
{
.name = "gl-usb150:green:power",
.gpio = GL_USB150_GPIO_LED_POWER,
.active_low = 0,
}, {
.name = "gl-usb150:green:wlan",
.gpio = GL_USB150_GPIO_LED_WLAN,
.active_low = 0,
},
};
static struct gpio_keys_button gl_usb150_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GL_USB150_KEYS_DEBOUNCE_INTERVAL,
.gpio = GL_USB150_GPIO_BTN_RESET,
.active_low = 0,
},
};
static void __init gl_usb150_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_setup_ar933x_phy4_switch(false, false);
/* LAN (PHY4 connected with Realtek RTL8152B) */
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_usb150_leds_gpio),
gl_usb150_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_USB150_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_usb150_gpio_keys),
gl_usb150_gpio_keys);
gpio_request_one(GL_USB150_GPIO_LAN_RESET,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"LAN reset");
ath79_register_wmac(art + GL_USB150_WMAC_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(ATH79_MACH_GL_USB150, "GL-USB150", "GL.iNet GL-USB150",
gl_usb150_setup);

143
target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v1.c Normal file
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/*
* GainStrong Oolite/MiniBox V1.0 boards support
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "dev-usb.h"
#define GS_MINIBOX_V1_GPIO_BTN_RESET 11
#define GS_MINIBOX_V1_GPIO_LED_SYSTEM 1
#define GS_OOLITE_V1_GPIO_BTN6 6
#define GS_OOLITE_V1_GPIO_BTN7 7
#define GS_OOLITE_V1_GPIO_BTN_RESET 11
#define GS_OOLITE_V1_GPIO_LED_SYSTEM 27
#define GS_KEYS_POLL_INTERVAL 20 /* msecs */
#define GS_KEYS_DEBOUNCE_INTERVAL (3 * GS_KEYS_POLL_INTERVAL)
static const char *gs_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data gs_flash_data = {
.part_probes = gs_part_probes,
};
static struct gpio_led gs_minibox_v1_leds_gpio[] __initdata = {
{
.name = "minibox-v1:green:system",
.gpio = GS_MINIBOX_V1_GPIO_LED_SYSTEM,
.active_low = 1,
},
};
static struct gpio_led gs_oolite_v1_leds_gpio[] __initdata = {
{
.name = "oolite-v1:red:system",
.gpio = GS_OOLITE_V1_GPIO_LED_SYSTEM,
.active_low = 1,
},
};
static struct gpio_keys_button gs_minibox_v1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL,
.gpio = GS_MINIBOX_V1_GPIO_BTN_RESET,
.active_low = 0,
},
};
static struct gpio_keys_button gs_oolite_v1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL,
.gpio = GS_OOLITE_V1_GPIO_BTN_RESET,
.active_low = 0,
}, {
.desc = "BTN_6",
.type = EV_KEY,
.code = BTN_6,
.debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL,
.gpio = GS_OOLITE_V1_GPIO_BTN6,
.active_low = 0,
}, {
.desc = "BTN_7",
.type = EV_KEY,
.code = BTN_7,
.debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL,
.gpio = GS_OOLITE_V1_GPIO_BTN7,
.active_low = 0,
},
};
static void __init gs_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
ath79_register_usb();
ath79_register_m25p80(&gs_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(1);
ath79_register_eth(0);
ath79_register_wmac(art, mac);
}
static void __init gs_minibox_v1_setup(void)
{
gs_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_minibox_v1_leds_gpio),
gs_minibox_v1_leds_gpio);
ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gs_minibox_v1_gpio_keys),
gs_minibox_v1_gpio_keys);
}
static void __init gs_oolite_v1_setup(void)
{
gs_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_v1_leds_gpio),
gs_oolite_v1_leds_gpio);
ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gs_oolite_v1_gpio_keys),
gs_oolite_v1_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_GS_MINIBOX_V1, "MINIBOX-V1", "GainStrong MiniBox V1.0",
gs_minibox_v1_setup);
MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V1, "OOLITE-V1", "GainStrong Oolite V1.0",
gs_oolite_v1_setup);

111
target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v5-2.c Normal file
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/*
* GainStrong Oolite V5.2 module and development board support
*
* Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define GS_OOLITE_V5_2_DEV_GPIO_BTN_RESET 17
#define GS_OOLITE_V5_2_DEV_GPIO_LED_SYSTEM 13
#define GS_KEYS_POLL_INTERVAL 20 /* msec */
#define GS_KEYS_DEBOUNCE_INTERVAL (3 * GS_KEYS_POLL_INTERVAL)
#define GS_OOLITE_V5_2_WMAC_CALDATA_OFFSET 0x1000
static const char *gs_oolite_v5_2_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data gs_oolite_v5_2_flash_data = {
.part_probes = gs_oolite_v5_2_part_probes,
};
static struct gpio_led gs_oolite_v5_2_dev_gpio_leds[] __initdata = {
{
.name = "oolite-v5.2-dev:blue:system",
.gpio = GS_OOLITE_V5_2_DEV_GPIO_LED_SYSTEM,
.active_low = 0,
},
};
static struct gpio_keys_button gs_oolite_v5_2_dev_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL,
.gpio = GS_OOLITE_V5_2_DEV_GPIO_BTN_RESET,
.active_low = 1,
},
};
static void __init gs_oolite_v5_2_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(&gs_oolite_v5_2_flash_data);
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_mdio(0, 0x0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
/* LAN */
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_init_mac(ath79_eth1_data.mac_addr, art + 6, 0);
ath79_register_eth(1);
/* WAN */
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.speed = SPEED_100;
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
ath79_register_eth(0);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art + GS_OOLITE_V5_2_WMAC_CALDATA_OFFSET, NULL);
}
static void __init gs_oolite_v5_2_dev_setup(void)
{
gs_oolite_v5_2_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_v5_2_dev_gpio_leds),
gs_oolite_v5_2_dev_gpio_leds);
ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gs_oolite_v5_2_dev_gpio_keys),
gs_oolite_v5_2_dev_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V5_2, "OOLITE-V5-2",
"GainStrong Oolite V5.2", gs_oolite_v5_2_setup);
MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V5_2_DEV, "OOLITE-V5-2-DEV",
"GainStrong Oolite V5.2-Dev", gs_oolite_v5_2_dev_setup);

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