Initial commit

target/linux/lantiq/files-4.14/arch/mips/boot/dts/DM200.dts

@@ -0,0 +1,216 @@
+/dts-v1/;
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mips/lantiq_rcu_gphy.h>
+
+/ {
+	compatible = "netgear,dm200", "lantiq,xway", "lantiq,vr9";
+	model = "Netgear DM200";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_amber;
+		led-running = &power_green;
+
+		led-dsl = &dsl_green;
+	};
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		annexa {
+			gpio-export,name = "annexa";
+			gpio-export,output = <0>;
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+		annexb {
+			gpio-export,name = "annexb";
+			gpio-export,output = <0>;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_amber: power_amber {
+			label = "dm200:amber:power";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+		power_green: power_green {
+			label = "dm200:green:power";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		lan_amber {
+			label = "dm200:amber:lan";
+			gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		};
+		lan_green {
+			label = "dm200:green:lan";
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		dsl_amber {
+			label = "dm200:amber:dsl";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+		};
+		dsl_green: dsl_green {
+			label = "dm200:green:dsl";
+			gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&eth0 {
+	lantiq,phys = <&gphy1>;
+
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "mii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	mdio@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+		reg = <0>;
+
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};
+
+&gphy1 {
+	lantiq,gphy-mode = <GPHY_MODE_FE>;
+};
+
+&gpio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&state_default>;
+
+	state_default: pinmux {
+		mdio {
+			lantiq,groups = "mdio";
+			lantiq,function = "mdio";
+		};
+	};
+
+	pins_spi_default: pins_spi_default {
+		spi_in {
+			lantiq,groups = "spi_di";
+			lantiq,function = "spi";
+		};
+		spi_out {
+			lantiq,groups = "spi_do", "spi_clk", "spi_cs4";
+			lantiq,function = "spi";
+			lantiq,output = <1>;
+		};
+	};
+};
+
+&pcie0 {
+	status = "disabled";
+};
+
+&spi {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_spi_default>;
+
+	m25p80@4 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <4 0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "uboot";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0x10000>;
+				label = "gphyfirmware";
+				read-only;
+			};
+
+			partition@30000 {
+				reg = <0x30000 0x7b0000>;
+				label = "firmware";
+			};
+
+			partition@7e0000 {
+				reg = <0x7e0000 0x10000>;
+				label = "sysconfig";
+				read-only;
+			};
+
+			partition@7f0000 {
+				reg = <0x7f0000 0x2000>;
+				label = "ubootconfig";
+				read-only;
+			};
+
+			partition@7f2000 {
+				reg = <0x7f2000 0x1000>;
+				label = "ART";
+				read-only;
+			};
+
+			partition@7f3000 {
+				reg = <0x7f3000 0x1000>;
+				label = "pot";
+				read-only;
+			};
+
+			partition@7f4000 {
+				reg = <0x7f4000 0xc000>;
+				label = "ret";
+				read-only;
+			};
+		};
+	};
+};