Initial commit

This commit is contained in:
domenico
2025-06-24 15:51:28 +02:00
commit 22031d9dab
6862 changed files with 1462554 additions and 0 deletions

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#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=powerpc
BOARD:=mpc85xx
BOARDNAME:=Freescale MPC85xx
CPU_TYPE:=8540
FEATURES:=squashfs
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
SUBTARGETS:=generic p1020
KERNEL_PATCHVER:=4.9
KERNELNAME:=zImage
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-input-core kmod-input-gpio-keys kmod-button-hotplug \
kmod-leds-gpio swconfig kmod-ath9k wpad-mini
$(eval $(call BuildTarget))

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#!/bin/sh
# Copyright (C) 2014-2015 OpenWrt.org
. /lib/functions/uci-defaults.sh
. /lib/functions.sh
. /lib/functions/system.sh
board_config_update
board=$(board_name)
case "$board" in
aerohive,hiveap-330)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
tplink,tl-wdr4900-v1)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
ucidef_set_interface_macaddr "wan" "$(mtd_get_mac_binary config 332)"
;;
*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
esac
board_config_flush
exit 0

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#!/bin/sh
# Copyright (C) 2013 OpenWrt.org
. /lib/functions.sh
. /lib/functions/leds.sh
get_status_led() {
case $(board_name) in
aerohive,hiveap-330)
status_led="hiveap-330:green:tricolor0"
;;
tplink,tl-wdr4900-v1)
status_led="tp-link:blue:system"
;;
esac
}
set_state() {
get_status_led
case "$1" in
preinit)
status_led_blink_preinit
;;
failsafe)
status_led_blink_failsafe
;;
preinit_regular)
status_led_blink_preinit_regular
;;
done)
status_led_on
;;
esac
}

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#!/bin/sh
FW_FILE="/lib/firmware/$FIRMWARE"
ath9k_eeprom_die() {
echo "ath9k eeprom: " "$*" >&2
exit 1
}
ath9k_eeprom_extract() {
local part=$1
local offset=$2
local count=$3
local mtd
mtd=$(find_mtd_chardev $part)
[ -n "$mtd" ] || \
ath9k_eeprom_die "no mtd device found for partition $part"
dd if=$mtd bs=$offset skip=1 count=1 2>/dev/null | dd of=$FW_FILE bs=$count count=1 2>/dev/null || \
ath9k_eeprom_die "failed to extract from $mtd"
}
tpl_set_wireless_mac()
{
local offset=$1
local mac
mac=$(mtd_get_mac_binary u-boot 326656)
mac=$(macaddr_add $mac $offset)
macaddr_2bin $mac | dd bs=1 count=6 seek=2 conv=notrunc of=$FW_FILE 2>/dev/null
}
[ -e $FW_FILE ] && exit 0
. /lib/functions.sh
. /lib/functions/system.sh
board=$(board_name)
case "$FIRMWARE" in
"pci_wmac0.eeprom")
case $board in
tplink,tl-wdr4900-v1)
ath9k_eeprom_extract "caldata" 4096 2048
tpl_set_wireless_mac 0
;;
*)
ath9k_eeprom_die "board $board is not supported yet"
;;
esac
;;
"pci_wmac1.eeprom")
case $board in
tplink,tl-wdr4900-v1)
ath9k_eeprom_extract "caldata" 20480 2048
tpl_set_wireless_mac -1
;;
*)
ath9k_eeprom_die "board $board is not supported yet"
;;
esac
;;
esac

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#!/bin/sh
# This must run before 10-wifi-detect
[ "${ACTION}" = "add" ] || return
. /lib/functions.sh
check_radio()
{
local cfg="$1" to="$2"
config_get path "$cfg" path
[ "$path" = "$to" ] && PATH_EXISTS=true
}
do_migrate_radio()
{
local cfg="$1" from="$2" to="$3"
config_get path "$cfg" path
[ "$path" = "$from" ] || return
uci set "wireless.${cfg}.path=${to}"
WIRELESS_CHANGED=true
logger -t wifi-migrate "Updated path of wireless.${cfg} from '${from}' to '${to}'"
}
migrate_radio()
{
local from="$1" to="$2"
config_load wireless
# Check if there is already a section with the target path: In this case, the system
# was already upgraded to a version without this migration script before; better bail out,
# as we can't be sure we don't break more than we fix.
PATH_EXISTS=false
config_foreach check_radio wifi-device "$to"
$PATH_EXISTS && return
config_foreach do_migrate_radio wifi-device "$from" "$to"
}
WIRELESS_CHANGED=false
case "$(board_name)" in
tplink,tl-wdr4900-v1)
migrate_radio 'ffe09000.pcie/pci0000:00/0000:00:00.0/0000:01:00.0' 'ffe09000.pcie/pci9000:00/9000:00:00.0/9000:01:00.0'
migrate_radio 'ffe0a000.pcie/pci0001:02/0001:02:00.0/0001:03:00.0' 'ffe0a000.pcie/pcia000:02/a000:02:00.0/a000:03:00.0'
;;
esac
$WIRELESS_CHANGED && uci commit wireless
exit 0

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#!/bin/sh
#
# Copyright (C) 2013 OpenWrt.org
#
mpc85xx_set_preinit_iface() {
ifname=eth0
}
boot_hook_add preinit_main mpc85xx_set_preinit_iface

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#
# Copyright (C) 2011 OpenWrt.org
#
PART_NAME=firmware
REQUIRE_IMAGE_METADATA=1
platform_check_image() {
return 0
}
# use default for platform_do_upgrade()

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# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
# CONFIG_ARCH_RANDOM is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_WDT=y
CONFIG_BOUNCE=y
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_CORENET_GENERIC is not set
# CONFIG_CPM2 is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
# CONFIG_CRYPTO_AES_PPC_SPE is not set
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_IMX is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEFAULT_UIMAGE is not set
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_E200 is not set
CONFIG_E500=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPAPR_BOOT is not set
CONFIG_ETHERNET_PACKET_MANGLE=y
# CONFIG_FHCI_DEBUG is not set
CONFIG_FIXED_PHY=y
CONFIG_FSL_BOOKE=y
# CONFIG_FSL_DPAA is not set
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_FSL_FMAN is not set
CONFIG_FSL_GTM=y
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
# CONFIG_FSL_ULI1575 is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
# CONFIG_GENERIC_CSUM is not set
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_GENERIC_TIME_VSYSCALL_OLD=y
CONFIG_GEN_RTC=y
# CONFIG_GE_FPGA is not set
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_SYSFS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HAS_RAPIDIO is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_RCU_GUP=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
# CONFIG_HIVEAP_330 is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IOMMU_HELPER=y
# CONFIG_IPIC is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_GZIP=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LIBFDT=y
CONFIG_LOWMEM_CAM_NUM=3
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIGRATION=y
# CONFIG_MMIO_NVRAM is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
# CONFIG_MPC85xx_DS is not set
# CONFIG_MPC85xx_MDS is not set
# CONFIG_MPC85xx_RDB is not set
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
CONFIG_MPIC_TIMER=y
# CONFIG_MPIC_U3_HT_IRQS is not set
# CONFIG_MPIC_WEIRD is not set
CONFIG_MPILIB=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
# CONFIG_MVME2500 is not set
# CONFIG_NEED_DMA_MAP_STATE is not set
# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NLS=y
# CONFIG_NONSTATIC_KERNEL is not set
CONFIG_NO_BOOTMEM=y
CONFIG_NR_IRQS=512
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1010_RDB is not set
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BOOK3E_MMU=y
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_COPRO_BASE is not set
# CONFIG_PPC_DCR_MMIO is not set
# CONFIG_PPC_DCR_NATIVE is not set
CONFIG_PPC_DOORBELL=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
# CONFIG_PPC_EPAPR_HV_PIC is not set
CONFIG_PPC_FSL_BOOK3E=y
# CONFIG_PPC_I8259 is not set
# CONFIG_PPC_ICP_HV is not set
# CONFIG_PPC_ICP_NATIVE is not set
# CONFIG_PPC_ICS_RTAS is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_MM_SLICES is not set
# CONFIG_PPC_MPC106 is not set
# CONFIG_PPC_P7_NAP is not set
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_QEMU_E500 is not set
# CONFIG_PPC_RTAS is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
# CONFIG_PPC_XICS is not set
# CONFIG_PQ2ADS is not set
# CONFIG_PTP_1588_CLOCK_GIANFAR is not set
CONFIG_QE_GPIO=y
CONFIG_QE_USB=y
CONFIG_QUICC_ENGINE=y
CONFIG_RAS=y
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GENERIC=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SBC8548 is not set
# CONFIG_SCHED_INFO is not set
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
CONFIG_SIMPLE_GPIO=y
# CONFIG_SOCRATES is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_FSL_LIB=y
CONFIG_SPI_MASTER=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWCONFIG=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
# CONFIG_TWR_P102x is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_EHCI_HCD_PPC_OF=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_FHCI_HCD=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_XES_MPC85xx is not set
# CONFIG_XPS_USB_HCD_XILINX is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

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/*
* U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
*
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
*
* Based on:
* cuboot-85xx.c
* Author: Scott Wood <scottwood@freescale.com>
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* simpleboot.c
* Authors: Scott Wood <scottwood@freescale.com>
* Grant Likely <grant.likely@secretlab.ca>
* Copyright (c) 2007 Freescale Semiconductor, Inc.
* Copyright (c) 2008 Secret Lab Technologies Ltd.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "types.h"
#include "io.h"
#include "stdio.h"
#include <libfdt.h>
BSS_STACK(4*1024);
static unsigned long bus_freq;
static unsigned long int_freq;
static u64 mem_size;
static unsigned char enetaddr[6];
static void process_boot_dtb(void *boot_dtb)
{
const u32 *na, *ns, *reg, *val32;
const char *path;
u64 memsize64;
int node, size, i;
/* Make sure FDT blob is sane */
if (fdt_check_header(boot_dtb) != 0)
fatal("Invalid device tree blob\n");
/* Find the #address-cells and #size-cells properties */
node = fdt_path_offset(boot_dtb, "/");
if (node < 0)
fatal("Cannot find root node\n");
na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
if (!na || (size != 4))
fatal("Cannot find #address-cells property");
ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
if (!ns || (size != 4))
fatal("Cannot find #size-cells property");
/* Find the memory range */
node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
"memory", sizeof("memory"));
if (node < 0)
fatal("Cannot find memory node\n");
reg = fdt_getprop(boot_dtb, node, "reg", &size);
if (size < (*na+*ns) * sizeof(u32))
fatal("cannot get memory range\n");
/* Only interested in memory based at 0 */
for (i = 0; i < *na; i++)
if (*reg++ != 0)
fatal("Memory range is not based at address 0\n");
/* get the memsize and trucate it to under 4G on 32 bit machines */
memsize64 = 0;
for (i = 0; i < *ns; i++)
memsize64 = (memsize64 << 32) | *reg++;
if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
memsize64 = 0xffffffff;
mem_size = memsize64;
/* get clock frequencies */
node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
"cpu", sizeof("cpu"));
if (!node)
fatal("Cannot find cpu node\n");
val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
if (!val32 || (size != 4))
fatal("Cannot get clock frequency");
int_freq = *val32;
val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
if (!val32 || (size != 4))
fatal("Cannot get bus frequency");
bus_freq = *val32;
path = fdt_get_alias(boot_dtb, "ethernet0");
if (path) {
const void *p;
node = fdt_path_offset(boot_dtb, path);
if (node < 0)
fatal("Cannot find ethernet0 node");
p = fdt_getprop(boot_dtb, node, "mac-address", &size);
if (!p || (size < 6)) {
printf("no mac-address property, finding local\n\r");
p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
}
if (!p || (size < 6))
fatal("cannot get MAC addres");
memcpy(enetaddr, p, sizeof(enetaddr));
}
}
static void platform_fixups(void)
{
void *soc, *mpic;
dt_fixup_memory(0, mem_size);
dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
/* Unfortunately, the specific model number is encoded in the
* soc node name in existing dts files -- once that is fixed,
* this can do a simple path lookup.
*/
soc = find_node_by_devtype(NULL, "soc");
if (soc) {
void *serial = NULL;
setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
while ((serial = find_node_by_devtype(serial, "serial"))) {
if (get_parent(serial) != soc)
continue;
setprop(serial, "clock-frequency", &bus_freq,
sizeof(bus_freq));
}
}
mpic = find_node_by_compatible(NULL, "fsl,mpic");
if (mpic)
setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq));
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
mem_size = 64 * 1024 * 1024;
simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
fdt_init(_dtb_start);
serial_console_init();
printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
process_boot_dtb((void *) r3);
platform_ops.fixups = platform_fixups;
}

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/*
* Aerohive HiveAP-330 Device Tree Source
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Aerohive HiveAP-330";
compatible = "aerohive,hiveap-330";
chosen {
bootargs-override = "console=ttyS0,9600";
};
memory {
device_type = "memory";
};
board_lbc: lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
reg = <0x0 0x40000>;
label = "dtb";
};
partition@40000 {
reg = <0x40000 0x40000>;
label = "initrd";
};
partition@80000 {
reg = <0x80000 0x27c0000>;
label = "rootfs";
};
partition@2840000 {
reg = <0x2840000 0x800000>;
label = "kernel";
};
partition@3040000 {
reg = <0x3040000 0xec0000>;
label = "stock-jffs2";
read-only;
};
hwinfo: partition@3f00000 {
reg = <0x3f00000 0x20000>;
label = "hw-info";
read-only;
};
partition@3f20000 {
reg = <0x3f20000 0x20000>;
label = "boot-info";
read-only;
};
partition@3f40000 {
reg = <0x3f40000 0x20000>;
label = "boot-info-backup";
read-only;
};
partition@3f60000 {
reg = <0x3f60000 0x20000>;
label = "u-boot-env";
};
partition@3f80000 {
reg = <0x3f80000 0x80000>;
label = "u-boot";
read-only;
};
firmware@0 {
reg = <0x0 0x3040000>;
label = "firmware";
};
};
};
board_soc: soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3100 {
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
lp5521@32 {
compatible = "national,lp5521";
reg = <0x32>;
clock-mode = /bits/ 8 <2>;
chan0 {
chan-name = "hiveap-330:red:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan1 {
chan-name = "hiveap-330:green:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan2 {
chan-name = "hiveap-330:blue:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
};
/* Most likely SoC boot config */
eeprom@51 {
compatible = "eeprom";
reg = <0x51>;
};
};
mdio@24000 {
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x1>;
};
phy1: ethernet-phy@1 {
interrupts = <2 1 0 0>;
reg = <0x2>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
status = "okay";
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "okay";
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
mtd-mac-address-increment = <1>;
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
reg = <0x0 0xffe09000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 8 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
};
/include/ "fsl/p1020si-post.dtsi"

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@@ -0,0 +1,262 @@
/*
* TP-Link TL-WDR4900 v1 Device Tree Source
*
* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "TP-Link TL-WDR4900 v1";
compatible = "tplink,tl-wdr4900-v1";
chosen {
bootargs = "console=ttyS0,115200";
/*
linux,stdout-path = "/soc@ffe00000/serial@4500";
*/
};
aliases {
spi0 = &spi0;
};
memory {
device_type = "memory";
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
spi0: spi@7000 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
u-boot@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
dtb@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
kernel@60000 {
reg = <0x00060000 0x002a0000>;
label = "kernel";
};
rootfs@300000 {
reg = <0x00300000 0x00ce0000>;
label = "rootfs";
};
config: config@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
caldata@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
firmware@60000 {
reg = <0x00060000 0x00f80000>;
label = "firmware";
};
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x00000000 /* PAD5_MODE */
0x0000c 0x01000000 /* PAD6_MODE */
0x00010 0x40000000 /* POWER_ON_STRIP */
0x00050 0xcf35cf35 /* LED_CTRL0 */
0x00054 0xcf35cf35 /* LED_CTRL1 */
0x00058 0xcf35cf35 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x0007c 0x0000007e /* PORT0_STATUS */
0x00094 0x00000200 /* PORT6_STATUS */
>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&config 0x144>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
serial1: serial@4600 {
status = "disabled";
};
can0: can@1c000 {
status = "disabled";
};
can1: can@1d000 {
status = "disabled";
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
fsl,cksel = <1>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
fsl,tmr-fiper2 = <0x00018696>;
fsl,max-adj = <249999999>;
};
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
ifc: ifc@ffe1e000 {
status = "disabled";
};
leds {
compatible = "gpio-leds";
system {
gpios = <&gpio0 2 1>; /* active low */
label = "tp-link:blue:system";
};
usb1 {
gpios = <&gpio0 3 1>; /* active low */
label = "tp-link:green:usb1";
};
usb2 {
gpios = <&gpio0 4 1>; /* active low */
label = "tp-link:green:usb2";
};
usbpower {
gpios = <&gpio0 10 1>; /* active low */
label = "tp-link:usb:power";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 5 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
rfkill {
label = "RFKILL switch";
gpios = <&gpio0 11 1>; /* active low */
linux,code = <0xf7>; /* RFKill */
};
};
};
/include/ "fsl/p1010si-post.dtsi"
/*
* The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
* related to the P1010.
*
* NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
* datasheet states that the P1014 does not include the accelerated crypto
* module (CAAM/SEC4) which is present in the P1010.
*
* NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
* SEC4 module, but states that SoCs with System Version Register values
* 0x80F10110 or 0x80F10120 do not have the security feature.
*
* All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
* as: core rev 1.0, "P1014 (without security)".
*
* The SVR value is reported by uboot on the serial console.
*/
/ {
soc: soc@ffe00000 {
/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
};
};

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/*
* Aerohive HiveAP-330 Board Setup
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*
* Based on:
* mpc85xx_rdb.c:
* MPC85xx RDB Board Setup
* Copyright 2013 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init hiveap_330_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init hiveap_330_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("hiveap_330_setup_arch()", 0);
mpc85xx_smp_init();
fsl_pci_assign_primary();
printk(KERN_INFO "HiveAP-330 board from Aerohive\n");
}
machine_arch_initcall(hiveap_330, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init hiveap_330_probe(void)
{
if (of_machine_is_compatible("aerohive,hiveap-330"))
return 1;
return 0;
}
define_machine(hiveap_330) {
.name = "P1020 RDB",
.probe = hiveap_330_probe,
.setup_arch = hiveap_330_setup_arch,
.init_IRQ = hiveap_330_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

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/*
* TL-WDR4900 v1 board setup
*
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
*
* Based on:
* p1010rdb.c:
* P1010RDB Board Setup
* Copyright 2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <linux/ath9k_platform.h>
#include <linux/leds.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "mpc85xx.h"
void __init tl_wdr4900_v1_pic_init(void)
{
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
#ifdef CONFIG_PCI
static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
{
.name = "tp-link:blue:wps",
.gpio = 1,
.active_low = 1,
},
};
static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
.led_pin = 0,
.eeprom_name = "pci_wmac0.eeprom",
.leds = tl_wdr4900_v1_wmac_leds_gpio,
.num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
};
static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
.led_pin = 0,
.eeprom_name = "pci_wmac1.eeprom",
};
static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
{
if (!machine_is(tl_wdr4900_v1))
return;
if (dev->bus->number == 1 &&
PCI_SLOT(dev->devfn) == 0) {
dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
return;
}
if (dev->bus->number == 3 &&
PCI_SLOT(dev->devfn) == 0 &&
dev->device == 0xabcd) {
dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
/*
* The PCI header of the AR9381 chip is not programmed
* correctly by the bootloader and the device uses wrong
* data due to that. Replace the broken values with the
* correct ones.
*/
dev->device = 0x30;
dev->class = 0x028000;
pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
}
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
tl_wdr4900_v1_pci_wmac_fixup);
#endif /* CONFIG_PCI */
/*
* Setup the architecture
*/
static void __init tl_wdr4900_v1_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
fsl_pci_assign_primary();
printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
}
machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init tl_wdr4900_v1_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "tplink,tl-wdr4900-v1"))
return 1;
return 0;
}
define_machine(tl_wdr4900_v1) {
.name = "Freescale P1014",
.probe = tl_wdr4900_v1_probe,
.setup_arch = tl_wdr4900_v1_setup_arch,
.init_IRQ = tl_wdr4900_v1_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

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CONFIG_TL_WDR4900_V1=y

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@@ -0,0 +1,15 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most MPC85xx boards.
endef
$(eval $(call Profile,Default))

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@@ -0,0 +1,7 @@
BOARDNAME:=Generic
KERNELNAME:=cuImage.tl-wdr4900-v1
define Target/Description
Build firmware images for generic MPC85xx based boards.
endef

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@@ -0,0 +1,69 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT
define Device/Default
PROFILES := Default
DEVICE_DTS := $(1)
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_ENTRY := 0x00000000
KERNEL_LOADADDR := 0x00000000
KERNEL := kernel-bin
endef
define Build/tplink-v1-image
$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) \
-N "$(VERSION_DIST)" -V $(REVISION) \
-k $(IMAGE_KERNEL) \
-r $(IMAGE_ROOTFS) \
-j \
$(1) \
-o $@
endef
ifeq ($(SUBTARGET),generic)
define Device/tl-wdr4900-v1
DEVICE_TITLE := TP-Link TL-WDR4900
DEVICE_PACKAGES := kmod-ath9k wpad-mini
TPLINK_HWID := 0x49000001
TPLINK_HWREV := 1
TPLINK_FLASHLAYOUT := 16Mppc
KERNEL_NAME := cuImage.tl-wdr4900-v1
SUPPORTED_DEVICES:=tl-wdr4900-v1 tplink,tl-wdr4900-v1
IMAGES := fdt.bin factory.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
IMAGE/factory.bin := tplink-v1-image
IMAGE/sysupgrade.bin := tplink-v1-image -s | append-metadata
endef
TARGET_DEVICES += tl-wdr4900-v1
endif
ifeq ($(SUBTARGET),p1020)
define Device/hiveap-330
DEVICE_TITLE := Aerohive HiveAP-330
DEVICE_PACKAGES := kmod-ath9k wpad-mini kmod-tpm-i2c-atmel
BLOCKSIZE := 128k
KERNEL_NAME := zImage
KERNEL_SIZE := 8m
SUPPORTED_DEVICES := aerohive,hiveap-330
IMAGES := fdt.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
IMAGE/sysupgrade.bin := append-dtb | pad-to 256k | check-size 256k | \
append-uImage-fakehdr ramdisk | pad-to 256k | check-size 512k | \
append-rootfs | pad-rootfs $$(BLOCKSIZE) | pad-to 41216k | check-size 41216k | \
append-kernel | append-metadata
endef
TARGET_DEVICES += hiveap-330
endif
$(eval $(call BuildImage))

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@@ -0,0 +1,32 @@
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_AT803X_PHY=y
CONFIG_CMDLINE_OVERRIDE=y
CONFIG_CPU_RMAP=y
CONFIG_EEPROM_LEGACY=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_TBSYNC=y
# CONFIG_GPIO_MAX77620 is not set
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HIVEAP_330=y
CONFIG_I2C_CHARDEV=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_LP55XX_COMMON=y
CONFIG_LOCK_SPIN_ON_OWNER=y
# CONFIG_MAX77620_WATCHDOG is not set
CONFIG_MFD_CORE=y
CONFIG_MFD_MAX77620=y
CONFIG_MTD_CFI=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NR_CPUS=2
CONFIG_PADATA=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_REGMAP_IRQ=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
# CONFIG_RTC_DRV_MAX77686 is not set
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SMP=y
CONFIG_TREE_RCU=y
CONFIG_XPS=y

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@@ -0,0 +1,15 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most P1020 boards.
endef
$(eval $(call Profile,Default))

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@@ -0,0 +1,6 @@
BOARDNAME:=P1020
FEATURES += ramdisk
define Target/Description
Build firmware images for Freescale P1020 based boards.
endef

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@@ -0,0 +1,10 @@
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -33,6 +33,7 @@ static const struct of_device_id mpc85xx
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ { .compatible = "gpio-keys", },
/* For all PCI controllers */
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },

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@@ -0,0 +1,78 @@
From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 20 Feb 2013 08:40:33 +0100
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
board
This patch adds support for the TP-Link TL-WDR4900 v1
concurrent dual-band wireless router. The devices uses
the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/powerpc/boot/Makefile | 3 +
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/platforms/85xx/Kconfig | 11 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -138,6 +138,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
src-wlib := $(sort $(src-wlib-y))
src-plat := $(sort $(src-plat-y))
@@ -321,6 +322,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.sbc8548
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -277,6 +277,10 @@ cuboot*)
*-mpc85*|*-tqm85*|*-sbc85*)
platformo=$object/cuboot-85xx.o
;;
+ *-tl-wdr4900-v1)
+ platformo=$object/cuboot-tl-wdr4900-v1.o
+ link_address='0x1000000'
+ ;;
*-amigaone)
link_address='0x800000'
;;
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -169,6 +169,17 @@ config STX_GP3
select CPM2
select DEFAULT_UIMAGE
+config TL_WDR4900_V1
+ bool "TP-Link TL-WDR4900 v1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
+
+ This board is a Concurrent Dual-Band wireless router with a
+ Freescale P1014 SoC.
+
config TQM8540
bool "TQ Components TQM8540"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_SBC8548) += sbc8548.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o

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@@ -0,0 +1,30 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -48,6 +48,17 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config HIVEAP_330
+ bool "Aerohive HiveAP-330"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive HiveAP-330 board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -9,6 +9,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o

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@@ -0,0 +1,37 @@
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -714,6 +714,14 @@ config CMDLINE_FORCE
This is useful if you cannot or don't want to change the
command-line options your boot loader passes to the kernel.
+config CMDLINE_OVERRIDE
+ bool "Use alternative cmdline from device tree"
+ help
+ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can
+ be used, this is not a good option for kernels that are shared across
+ devices. This setting enables using "chosen/cmdline-override" as the
+ cmdline if it exists in the device tree.
+
config EXTRA_TARGETS
string "Additional default image types"
help
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -1082,6 +1082,17 @@ int __init early_init_dt_scan_chosen(uns
if (p != NULL && l > 0)
strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
+ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
+ * device tree option of chosen/bootargs-override. This is
+ * helpful on boards where u-boot sets bootargs, and is unable
+ * to be modified.
+ */
+#ifdef CONFIG_CMDLINE_OVERRIDE
+ p = of_get_flat_dt_prop(node, "bootargs-override", &l);
+ if (p != NULL && l > 0)
+ strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
+#endif
+
/*
* CONFIG_CMDLINE is meant to be a default in case nothing else
* managed to set the command line, unless CONFIG_CMDLINE_FORCE