Initial commit
This commit is contained in:
domenico
@@ -0,0 +1,168 @@
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/*
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* U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
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*
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* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* Based on:
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* cuboot-85xx.c
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* Author: Scott Wood <scottwood@freescale.com>
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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*
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* simpleboot.c
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* Authors: Scott Wood <scottwood@freescale.com>
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* Grant Likely <grant.likely@secretlab.ca>
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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* Copyright (c) 2008 Secret Lab Technologies Ltd.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include "ops.h"
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#include "types.h"
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#include "io.h"
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#include "stdio.h"
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#include <libfdt.h>
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BSS_STACK(4*1024);
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static unsigned long bus_freq;
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static unsigned long int_freq;
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static u64 mem_size;
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static unsigned char enetaddr[6];
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static void process_boot_dtb(void *boot_dtb)
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{
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const u32 *na, *ns, *reg, *val32;
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const char *path;
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u64 memsize64;
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int node, size, i;
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/* Make sure FDT blob is sane */
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if (fdt_check_header(boot_dtb) != 0)
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fatal("Invalid device tree blob\n");
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/* Find the #address-cells and #size-cells properties */
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node = fdt_path_offset(boot_dtb, "/");
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if (node < 0)
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fatal("Cannot find root node\n");
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na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
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if (!na || (size != 4))
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fatal("Cannot find #address-cells property");
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ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
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if (!ns || (size != 4))
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fatal("Cannot find #size-cells property");
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/* Find the memory range */
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node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
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"memory", sizeof("memory"));
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if (node < 0)
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fatal("Cannot find memory node\n");
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reg = fdt_getprop(boot_dtb, node, "reg", &size);
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if (size < (*na+*ns) * sizeof(u32))
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fatal("cannot get memory range\n");
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/* Only interested in memory based at 0 */
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for (i = 0; i < *na; i++)
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if (*reg++ != 0)
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fatal("Memory range is not based at address 0\n");
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/* get the memsize and trucate it to under 4G on 32 bit machines */
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memsize64 = 0;
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for (i = 0; i < *ns; i++)
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memsize64 = (memsize64 << 32) | *reg++;
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if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
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memsize64 = 0xffffffff;
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mem_size = memsize64;
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/* get clock frequencies */
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node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
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"cpu", sizeof("cpu"));
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if (!node)
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fatal("Cannot find cpu node\n");
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val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
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if (!val32 || (size != 4))
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fatal("Cannot get clock frequency");
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int_freq = *val32;
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val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
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if (!val32 || (size != 4))
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fatal("Cannot get bus frequency");
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bus_freq = *val32;
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path = fdt_get_alias(boot_dtb, "ethernet0");
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if (path) {
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const void *p;
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node = fdt_path_offset(boot_dtb, path);
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if (node < 0)
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fatal("Cannot find ethernet0 node");
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p = fdt_getprop(boot_dtb, node, "mac-address", &size);
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if (!p || (size < 6)) {
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printf("no mac-address property, finding local\n\r");
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p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
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}
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if (!p || (size < 6))
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fatal("cannot get MAC addres");
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memcpy(enetaddr, p, sizeof(enetaddr));
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}
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}
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static void platform_fixups(void)
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{
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void *soc, *mpic;
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dt_fixup_memory(0, mem_size);
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dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
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dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
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/* Unfortunately, the specific model number is encoded in the
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* soc node name in existing dts files -- once that is fixed,
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* this can do a simple path lookup.
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*/
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soc = find_node_by_devtype(NULL, "soc");
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if (soc) {
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void *serial = NULL;
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setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
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while ((serial = find_node_by_devtype(serial, "serial"))) {
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if (get_parent(serial) != soc)
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continue;
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setprop(serial, "clock-frequency", &bus_freq,
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sizeof(bus_freq));
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}
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}
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mpic = find_node_by_compatible(NULL, "fsl,mpic");
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if (mpic)
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setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq));
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}
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void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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mem_size = 64 * 1024 * 1024;
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simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
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fdt_init(_dtb_start);
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serial_console_init();
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printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
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process_boot_dtb((void *) r3);
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platform_ops.fixups = platform_fixups;
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}
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228
target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts
Normal file
228
target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts
Normal file
@@ -0,0 +1,228 @@
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/*
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* Aerohive HiveAP-330 Device Tree Source
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*
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* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "fsl/p1020si-pre.dtsi"
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/ {
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model = "Aerohive HiveAP-330";
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compatible = "aerohive,hiveap-330";
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chosen {
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bootargs-override = "console=ttyS0,9600";
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};
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memory {
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device_type = "memory";
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};
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board_lbc: lbc: localbus@ffe05000 {
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reg = <0 0xffe05000 0 0x1000>;
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ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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bank-width = <2>;
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device-width = <1>;
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partition@0 {
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reg = <0x0 0x40000>;
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label = "dtb";
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};
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partition@40000 {
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reg = <0x40000 0x40000>;
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label = "initrd";
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};
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partition@80000 {
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reg = <0x80000 0x27c0000>;
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label = "rootfs";
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};
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partition@2840000 {
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reg = <0x2840000 0x800000>;
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label = "kernel";
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};
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partition@3040000 {
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reg = <0x3040000 0xec0000>;
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label = "stock-jffs2";
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read-only;
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};
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hwinfo: partition@3f00000 {
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reg = <0x3f00000 0x20000>;
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label = "hw-info";
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read-only;
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};
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partition@3f20000 {
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reg = <0x3f20000 0x20000>;
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label = "boot-info";
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read-only;
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};
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partition@3f40000 {
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reg = <0x3f40000 0x20000>;
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label = "boot-info-backup";
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read-only;
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};
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partition@3f60000 {
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reg = <0x3f60000 0x20000>;
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label = "u-boot-env";
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};
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partition@3f80000 {
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reg = <0x3f80000 0x80000>;
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label = "u-boot";
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read-only;
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};
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firmware@0 {
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reg = <0x0 0x3040000>;
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label = "firmware";
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};
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};
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};
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board_soc: soc: soc@ffe00000 {
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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i2c@3100 {
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tpm@29 {
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compatible = "atmel,at97sc3204t";
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reg = <0x29>;
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};
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lp5521@32 {
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compatible = "national,lp5521";
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reg = <0x32>;
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clock-mode = /bits/ 8 <2>;
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chan0 {
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chan-name = "hiveap-330:red:tricolor0";
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan1 {
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chan-name = "hiveap-330:green:tricolor0";
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan2 {
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chan-name = "hiveap-330:blue:tricolor0";
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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};
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/* Most likely SoC boot config */
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eeprom@51 {
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compatible = "eeprom";
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reg = <0x51>;
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};
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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interrupts = <3 1 0 0>;
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reg = <0x1>;
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};
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phy1: ethernet-phy@1 {
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interrupts = <2 1 0 0>;
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reg = <0x2>;
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};
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};
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mdio@25000 {
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status = "disabled";
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};
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mdio@26000 {
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status = "disabled";
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};
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enet0: ethernet@b0000 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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mtd-mac-address = <&hwinfo 0>;
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};
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enet1: ethernet@b1000 {
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status = "disabled";
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};
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enet2: ethernet@b2000 {
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status = "okay";
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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mtd-mac-address = <&hwinfo 0>;
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mtd-mac-address-increment = <1>;
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};
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gpio0: gpio-controller@fc00 {
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};
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usb@22000 {
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phy_type = "ulpi";
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dr_mode = "host";
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};
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usb@23000 {
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status = "disabled";
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};
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};
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pci0: pcie@ffe09000 {
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reg = <0x0 0xffe09000 0x0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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|
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pci1: pcie@ffe0a000 {
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reg = <0x0 0xffe0a000 0x0 0x1000>;
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ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xc0000000
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0x2000000 0x0 0xc0000000
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0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
buttons {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
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label = "Reset button";
|
||||
gpios = <&gpio0 8 1>; /* active low */
|
||||
linux,code = <0x198>; /* KEY_RESTART */
|
||||
};
|
||||
};
|
||||
};
|
||||
/include/ "fsl/p1020si-post.dtsi"
|
||||
@@ -0,0 +1,262 @@
|
||||
/*
|
||||
* TP-Link TL-WDR4900 v1 Device Tree Source
|
||||
*
|
||||
* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1010si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TP-Link TL-WDR4900 v1";
|
||||
compatible = "tplink,tl-wdr4900-v1";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
/*
|
||||
linux,stdout-path = "/soc@ffe00000/serial@4500";
|
||||
*/
|
||||
};
|
||||
|
||||
aliases {
|
||||
spi0 = &spi0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
|
||||
spi0: spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <25000000>;
|
||||
|
||||
u-boot@0 {
|
||||
reg = <0x0 0x0050000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
dtb@50000 {
|
||||
reg = <0x00050000 0x00010000>;
|
||||
label = "dtb";
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@60000 {
|
||||
reg = <0x00060000 0x002a0000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
rootfs@300000 {
|
||||
reg = <0x00300000 0x00ce0000>;
|
||||
label = "rootfs";
|
||||
};
|
||||
|
||||
config: config@fe0000 {
|
||||
reg = <0x00fe0000 0x00010000>;
|
||||
label = "config";
|
||||
read-only;
|
||||
};
|
||||
|
||||
caldata@ff0000 {
|
||||
reg = <0x00ff0000 0x00010000>;
|
||||
label = "caldata";
|
||||
read-only;
|
||||
};
|
||||
|
||||
firmware@60000 {
|
||||
reg = <0x00060000 0x00f80000>;
|
||||
label = "firmware";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio-controller@fc00 {
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "utmi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
qca,ar8327-initvals = <
|
||||
0x00004 0x07600000 /* PAD0_MODE */
|
||||
0x00008 0x00000000 /* PAD5_MODE */
|
||||
0x0000c 0x01000000 /* PAD6_MODE */
|
||||
0x00010 0x40000000 /* POWER_ON_STRIP */
|
||||
0x00050 0xcf35cf35 /* LED_CTRL0 */
|
||||
0x00054 0xcf35cf35 /* LED_CTRL1 */
|
||||
0x00058 0xcf35cf35 /* LED_CTRL2 */
|
||||
0x0005c 0x03ffff00 /* LED_CTRL3 */
|
||||
0x0007c 0x0000007e /* PORT0_STATUS */
|
||||
0x00094 0x00000200 /* PORT6_STATUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@26000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
mtd-mac-address = <&config 0x144>;
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhc@2e000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can0: can@1c000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@1d000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ptp_clock@b0e00 {
|
||||
compatible = "fsl,etsec-ptp";
|
||||
reg = <0xb0e00 0xb0>;
|
||||
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
|
||||
fsl,cksel = <1>;
|
||||
fsl,tclk-period = <5>;
|
||||
fsl,tmr-prsc = <2>;
|
||||
fsl,tmr-add = <0xcccccccd>;
|
||||
fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
|
||||
fsl,tmr-fiper2 = <0x00018696>;
|
||||
fsl,max-adj = <249999999>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
ifc: ifc@ffe1e000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
system {
|
||||
gpios = <&gpio0 2 1>; /* active low */
|
||||
label = "tp-link:blue:system";
|
||||
};
|
||||
|
||||
usb1 {
|
||||
gpios = <&gpio0 3 1>; /* active low */
|
||||
label = "tp-link:green:usb1";
|
||||
};
|
||||
|
||||
usb2 {
|
||||
gpios = <&gpio0 4 1>; /* active low */
|
||||
label = "tp-link:green:usb2";
|
||||
};
|
||||
|
||||
usbpower {
|
||||
gpios = <&gpio0 10 1>; /* active low */
|
||||
label = "tp-link:usb:power";
|
||||
};
|
||||
};
|
||||
|
||||
buttons {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "Reset button";
|
||||
gpios = <&gpio0 5 1>; /* active low */
|
||||
linux,code = <0x198>; /* KEY_RESTART */
|
||||
};
|
||||
|
||||
rfkill {
|
||||
label = "RFKILL switch";
|
||||
gpios = <&gpio0 11 1>; /* active low */
|
||||
linux,code = <0xf7>; /* RFKill */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/p1010si-post.dtsi"
|
||||
|
||||
/*
|
||||
* The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
|
||||
* related to the P1010.
|
||||
*
|
||||
* NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
|
||||
* datasheet states that the P1014 does not include the accelerated crypto
|
||||
* module (CAAM/SEC4) which is present in the P1010.
|
||||
*
|
||||
* NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
|
||||
* SEC4 module, but states that SoCs with System Version Register values
|
||||
* 0x80F10110 or 0x80F10120 do not have the security feature.
|
||||
*
|
||||
* All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
|
||||
* as: core rev 1.0, "P1014 (without security)".
|
||||
*
|
||||
* The SVR value is reported by uboot on the serial console.
|
||||
*/
|
||||
|
||||
/ {
|
||||
soc: soc@ffe00000 {
|
||||
/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,89 @@
|
||||
/*
|
||||
* Aerohive HiveAP-330 Board Setup
|
||||
*
|
||||
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
|
||||
*
|
||||
* Based on:
|
||||
* mpc85xx_rdb.c:
|
||||
* MPC85xx RDB Board Setup
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/mpic.h>
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
void __init hiveap_330_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
|
||||
mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_BIG_ENDIAN |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init hiveap_330_setup_arch(void)
|
||||
{
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("hiveap_330_setup_arch()", 0);
|
||||
|
||||
mpc85xx_smp_init();
|
||||
|
||||
fsl_pci_assign_primary();
|
||||
|
||||
printk(KERN_INFO "HiveAP-330 board from Aerohive\n");
|
||||
}
|
||||
|
||||
machine_arch_initcall(hiveap_330, mpc85xx_common_publish_devices);
|
||||
|
||||
/*
|
||||
* Called very early, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init hiveap_330_probe(void)
|
||||
{
|
||||
if (of_machine_is_compatible("aerohive,hiveap-330"))
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
define_machine(hiveap_330) {
|
||||
.name = "P1020 RDB",
|
||||
.probe = hiveap_330_probe,
|
||||
.setup_arch = hiveap_330_setup_arch,
|
||||
.init_IRQ = hiveap_330_pic_init,
|
||||
#ifdef CONFIG_PCI
|
||||
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
||||
#endif
|
||||
.get_irq = mpic_get_irq,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
@@ -0,0 +1,144 @@
|
||||
/*
|
||||
* TL-WDR4900 v1 board setup
|
||||
*
|
||||
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* Based on:
|
||||
* p1010rdb.c:
|
||||
* P1010RDB Board Setup
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/ath9k_platform.h>
|
||||
#include <linux/leds.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/mpic.h>
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
void __init tl_wdr4900_v1_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
|
||||
{
|
||||
.name = "tp-link:blue:wps",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
|
||||
.led_pin = 0,
|
||||
.eeprom_name = "pci_wmac0.eeprom",
|
||||
.leds = tl_wdr4900_v1_wmac_leds_gpio,
|
||||
.num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
|
||||
};
|
||||
|
||||
static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
|
||||
.led_pin = 0,
|
||||
.eeprom_name = "pci_wmac1.eeprom",
|
||||
};
|
||||
|
||||
static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
|
||||
{
|
||||
if (!machine_is(tl_wdr4900_v1))
|
||||
return;
|
||||
|
||||
if (dev->bus->number == 1 &&
|
||||
PCI_SLOT(dev->devfn) == 0) {
|
||||
dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
|
||||
return;
|
||||
}
|
||||
|
||||
if (dev->bus->number == 3 &&
|
||||
PCI_SLOT(dev->devfn) == 0 &&
|
||||
dev->device == 0xabcd) {
|
||||
dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
|
||||
|
||||
/*
|
||||
* The PCI header of the AR9381 chip is not programmed
|
||||
* correctly by the bootloader and the device uses wrong
|
||||
* data due to that. Replace the broken values with the
|
||||
* correct ones.
|
||||
*/
|
||||
dev->device = 0x30;
|
||||
dev->class = 0x028000;
|
||||
|
||||
pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
|
||||
}
|
||||
}
|
||||
|
||||
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
|
||||
tl_wdr4900_v1_pci_wmac_fixup);
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init tl_wdr4900_v1_setup_arch(void)
|
||||
{
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
|
||||
|
||||
fsl_pci_assign_primary();
|
||||
|
||||
printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
|
||||
}
|
||||
|
||||
machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
|
||||
machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
|
||||
|
||||
/*
|
||||
* Called very early, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init tl_wdr4900_v1_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
if (of_flat_dt_is_compatible(root, "tplink,tl-wdr4900-v1"))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
define_machine(tl_wdr4900_v1) {
|
||||
.name = "Freescale P1014",
|
||||
.probe = tl_wdr4900_v1_probe,
|
||||
.setup_arch = tl_wdr4900_v1_setup_arch,
|
||||
.init_IRQ = tl_wdr4900_v1_pic_init,
|
||||
#ifdef CONFIG_PCI
|
||||
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
#endif
|
||||
.get_irq = mpic_get_irq,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
Reference in New Issue
Block a user