60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001
|
|
From: Corentin Labbe <clabbe.montjoie@gmail.com>
|
|
Date: Tue, 31 Oct 2017 09:19:11 +0100
|
|
Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by
|
|
sun8i-h3-emac
|
|
|
|
Since dwmac-sun8i could use either an integrated PHY or an external PHY
|
|
(which could be at same MDIO address), we need to represent this selection
|
|
by a MDIO switch.
|
|
|
|
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
|
|
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
|
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
|
---
|
|
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++----
|
|
1 file changed, 27 insertions(+), 4 deletions(-)
|
|
|
|
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
|
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
|
@@ -408,11 +408,34 @@
|
|
mdio: mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
- int_mii_phy: ethernet-phy@1 {
|
|
- compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ compatible = "snps,dwmac-mdio";
|
|
+ };
|
|
+
|
|
+ mdio-mux {
|
|
+ compatible = "allwinner,sun8i-h3-mdio-mux";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mdio-parent-bus = <&mdio>;
|
|
+ /* Only one MDIO is usable at the time */
|
|
+ internal_mdio: mdio@1 {
|
|
+ compatible = "allwinner,sun8i-h3-mdio-internal";
|
|
reg = <1>;
|
|
- clocks = <&ccu CLK_BUS_EPHY>;
|
|
- resets = <&ccu RST_BUS_EPHY>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ int_mii_phy: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ clocks = <&ccu CLK_BUS_EPHY>;
|
|
+ resets = <&ccu RST_BUS_EPHY>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ external_mdio: mdio@2 {
|
|
+ reg = <2>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
};
|
|
};
|
|
};
|