55 lines
1.7 KiB
Diff
55 lines
1.7 KiB
Diff
From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
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From: Corentin Labbe <clabbe.montjoie@gmail.com>
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Date: Tue, 31 Oct 2017 09:19:10 +0100
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Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
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The original dwmac-sun8i DT bindings have some issue on how to handle
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integrated PHY and was reverted in last RC of 4.13.
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But now we have a solution so we need to get back that was reverted.
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This patch restore sunxi-h3-h5.dtsi
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This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
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Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
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Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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@@ -391,6 +391,32 @@
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clocks = <&osc24M>;
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};
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+ emac: ethernet@1c30000 {
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+ compatible = "allwinner,sun8i-h3-emac";
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+ syscon = <&syscon>;
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+ reg = <0x01c30000 0x10000>;
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+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "macirq";
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+ resets = <&ccu RST_BUS_EMAC>;
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+ reset-names = "stmmaceth";
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+ clocks = <&ccu CLK_BUS_EMAC>;
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+ clock-names = "stmmaceth";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+
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+ mdio: mdio {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ int_mii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ clocks = <&ccu CLK_BUS_EPHY>;
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+ resets = <&ccu RST_BUS_EPHY>;
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+ };
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+ };
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+ };
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+
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spi0: spi@01c68000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c68000 0x1000>;
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