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domenico
2025-06-24 16:03:39 +02:00
commit f3256cdaf2
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27
target/linux/mpc85xx/Makefile Normal file
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#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=powerpc
BOARD:=mpc85xx
BOARDNAME:=Freescale MPC85xx
CPU_TYPE:=8540
FEATURES:=squashfs ramdisk
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
SUBTARGETS:=generic p1020 p2020
KERNEL_PATCHVER:=4.14
KERNELNAME:=zImage
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-input-core kmod-input-gpio-keys kmod-button-hotplug \
kmod-leds-gpio swconfig kmod-ath9k wpad-basic kmod-usb2
$(eval $(call BuildTarget))

33
target/linux/mpc85xx/base-files/etc/board.d/02_network Executable file
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#!/bin/sh
# Copyright (C) 2014-2015 OpenWrt.org
. /lib/functions/uci-defaults.sh
. /lib/functions.sh
. /lib/functions/system.sh
board_config_update
board=$(board_name)
case "$board" in
aerohive,hiveap-330)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
ocedo,panda)
ucidef_set_interface_wan "eth1"
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3:lan" "4:lan" "5:lan" "6:lan" "7:lan" "8u@eth0"
;;
tplink,tl-wdr4900-v1)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
ucidef_set_interface_macaddr "wan" "$(macaddr_add $(mtd_get_mac_binary u-boot 0x4fc00) 1)"
;;
*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
esac
board_config_flush
exit 0

66
target/linux/mpc85xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom Normal file
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#!/bin/sh
FW_FILE="/lib/firmware/$FIRMWARE"
ath9k_eeprom_die() {
echo "ath9k eeprom: " "$*" >&2
exit 1
}
ath9k_eeprom_extract() {
local part=$1
local offset=$2
local count=$3
local mtd
mtd=$(find_mtd_chardev $part)
[ -n "$mtd" ] || \
ath9k_eeprom_die "no mtd device found for partition $part"
dd if=$mtd bs=$offset skip=1 count=1 2>/dev/null | dd of=$FW_FILE bs=$count count=1 2>/dev/null || \
ath9k_eeprom_die "failed to extract from $mtd"
}
tpl_set_wireless_mac()
{
local offset=$1
local mac
mac=$(mtd_get_mac_binary u-boot 326656)
mac=$(macaddr_add $mac $offset)
macaddr_2bin $mac | dd bs=1 count=6 seek=2 conv=notrunc of=$FW_FILE 2>/dev/null
}
[ -e $FW_FILE ] && exit 0
. /lib/functions.sh
. /lib/functions/system.sh
board=$(board_name)
case "$FIRMWARE" in
"pci_wmac0.eeprom")
case $board in
tplink,tl-wdr4900-v1)
ath9k_eeprom_extract "caldata" 4096 2048
tpl_set_wireless_mac 0
;;
*)
ath9k_eeprom_die "board $board is not supported yet"
;;
esac
;;
"pci_wmac1.eeprom")
case $board in
tplink,tl-wdr4900-v1)
ath9k_eeprom_extract "caldata" 20480 2048
tpl_set_wireless_mac -1
;;
*)
ath9k_eeprom_die "board $board is not supported yet"
;;
esac
;;
esac

63
target/linux/mpc85xx/base-files/etc/hotplug.d/ieee80211/05-wifi-migrate Normal file
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#!/bin/sh
# This must run before 10-wifi-detect
[ "${ACTION}" = "add" ] || return
. /lib/functions.sh
check_radio()
{
local cfg="$1" to="$2"
config_get path "$cfg" path
[ "$path" = "$to" ] && PATH_EXISTS=true
}
do_migrate_radio()
{
local cfg="$1" from="$2" to="$3"
config_get path "$cfg" path
[ "$path" = "$from" ] || return
uci set "wireless.${cfg}.path=${to}"
WIRELESS_CHANGED=true
logger -t wifi-migrate "Updated path of wireless.${cfg} from '${from}' to '${to}'"
}
migrate_radio()
{
local from="$1" to="$2"
config_load wireless
# Check if there is already a section with the target path: In this case, the system
# was already upgraded to a version without this migration script before; better bail out,
# as we can't be sure we don't break more than we fix.
PATH_EXISTS=false
config_foreach check_radio wifi-device "$to"
$PATH_EXISTS && return
config_foreach do_migrate_radio wifi-device "$from" "$to"
}
WIRELESS_CHANGED=false
case "$(board_name)" in
tplink,tl-wdr4900-v1)
migrate_radio 'ffe09000.pcie/pci0000:00/0000:00:00.0/0000:01:00.0' 'ffe09000.pcie/pci9000:00/9000:00:00.0/9000:01:00.0'
migrate_radio 'ffe0a000.pcie/pci0001:02/0001:02:00.0/0001:03:00.0' 'ffe0a000.pcie/pcia000:02/a000:02:00.0/a000:03:00.0'
;;
esac
$WIRELESS_CHANGED && uci commit wireless
exit 0

28
target/linux/mpc85xx/base-files/etc/hotplug.d/ieee80211/10-fix-wifi-mac Normal file
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#!/bin/ash
[ "$ACTION" == "add" ] || exit 0
PHYNBR=${DEVPATH##*/phy}
[ -n $PHYNBR ] || exit 0
. /lib/functions.sh
. /lib/functions/system.sh
board=$(board_name)
case "$board" in
enterasys,ws-ap3710i)
echo $(mtd_get_mac_ascii cfg2 RADIOADDR${PHYNBR}) > /sys${DEVPATH}/macaddress
;;
ocedo,panda)
WMAC=wmac$(($PHYNBR + 1))
MAC=$(mtd_get_mac_ascii uboot-env0 ${WMAC})
echo ${MAC} > /sys${DEVPATH}/macaddress
;;
sophos,red-15w-rev1)
echo $(mtd_get_mac_ascii u-boot-env ethaddr) > /sys${DEVPATH}/macaddress
;;
*)
;;
esac

10
target/linux/mpc85xx/base-files/lib/preinit/05_set_preinit_iface_mpc85xx Normal file
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#!/bin/sh
#
# Copyright (C) 2013 OpenWrt.org
#
mpc85xx_set_preinit_iface() {
ifname=eth0
}
boot_hook_add preinit_main mpc85xx_set_preinit_iface

24
target/linux/mpc85xx/base-files/lib/upgrade/platform.sh Executable file
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#
# Copyright (C) 2011 OpenWrt.org
#
PART_NAME=firmware
REQUIRE_IMAGE_METADATA=1
platform_check_image() {
return 0
}
platform_do_upgrade() {
local board=$(board_name)
case "$board" in
ocedo,panda|\
sophos,red-15w-rev1)
nand_do_upgrade "$1"
;;
*)
default_do_upgrade "$1"
;;
esac
}

364
target/linux/mpc85xx/config-4.14 Normal file
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# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=11
CONFIG_ARCH_MMAP_RND_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
# CONFIG_ARCH_RANDOM is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_WDT=y
CONFIG_BOUNCE=y
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_CORENET_GENERIC is not set
# CONFIG_CPM2 is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
# CONFIG_CRYPTO_AES_PPC_SPE is not set
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEFAULT_UIMAGE is not set
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_E200 is not set
CONFIG_E500=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPAPR_BOOT is not set
CONFIG_ETHERNET_PACKET_MANGLE=y
# CONFIG_FHCI_DEBUG is not set
CONFIG_FIXED_PHY=y
# CONFIG_FORCE_SMP is not set
CONFIG_FSL_BOOKE=y
# CONFIG_FSL_DPAA is not set
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_FSL_FMAN is not set
CONFIG_FSL_GTM=y
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
# CONFIG_FSL_ULI1575 is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
# CONFIG_GENERIC_CSUM is not set
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GEN_RTC=y
# CONFIG_GE_FPGA is not set
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_SYSFS=y
# CONFIG_GRO_CELLS is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HAS_RAPIDIO is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_GUP=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
# CONFIG_HIVEAP_330 is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IOMMU_HELPER=y
# CONFIG_IPIC is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_GZIP=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LIBFDT=y
CONFIG_LOWMEM_CAM_NUM=3
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MIGRATION=y
# CONFIG_MMIO_NVRAM is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
# CONFIG_MPC85xx_DS is not set
# CONFIG_MPC85xx_MDS is not set
# CONFIG_MPC85xx_RDB is not set
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
CONFIG_MPIC_TIMER=y
# CONFIG_MPIC_U3_HT_IRQS is not set
# CONFIG_MPIC_WEIRD is not set
CONFIG_MPILIB=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
# CONFIG_MVME2500 is not set
# CONFIG_NEED_DMA_MAP_STATE is not set
# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NLS=y
# CONFIG_NONSTATIC_KERNEL is not set
CONFIG_NO_BOOTMEM=y
CONFIG_NR_IRQS=512
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1010_RDB is not set
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
# CONFIG_PANDA is not set
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BOOK3E_MMU=y
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_COPRO_BASE is not set
# CONFIG_PPC_DCR_MMIO is not set
# CONFIG_PPC_DCR_NATIVE is not set
CONFIG_PPC_DOORBELL=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
# CONFIG_PPC_EPAPR_HV_PIC is not set
CONFIG_PPC_FSL_BOOK3E=y
# CONFIG_PPC_I8259 is not set
# CONFIG_PPC_ICP_HV is not set
# CONFIG_PPC_ICP_NATIVE is not set
# CONFIG_PPC_ICS_RTAS is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_MM_SLICES is not set
# CONFIG_PPC_MPC106 is not set
# CONFIG_PPC_P7_NAP is not set
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_PTDUMP is not set
# CONFIG_PPC_QEMU_E500 is not set
# CONFIG_PPC_RTAS is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
# CONFIG_PPC_XICS is not set
# CONFIG_PPC_XIVE is not set
# CONFIG_PPC_XIVE_SPAPR is not set
# CONFIG_PQ2ADS is not set
CONFIG_QE_GPIO=y
CONFIG_QE_USB=y
CONFIG_QUICC_ENGINE=y
CONFIG_RAS=y
# CONFIG_RCU_NEED_SEGCBLIST is not set
# CONFIG_RCU_STALL_COMMON is not set
# CONFIG_RED_15W_REV1 is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GENERIC=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SBC8548 is not set
# CONFIG_SCHED_INFO is not set
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
CONFIG_SIMPLE_GPIO=y
# CONFIG_SOCRATES is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWCONFIG=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_THREAD_SHIFT=13
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
# CONFIG_TWR_P102x is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_USB_SUPPORT=y
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WS_AP3710I is not set
# CONFIG_XES_MPC85xx is not set
# CONFIG_XPS_USB_HCD_XILINX is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

235
target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts Normal file
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/*
* Aerohive HiveAP-330 Device Tree Source
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Aerohive HiveAP-330";
compatible = "aerohive,hiveap-330";
aliases {
led-boot = &tricolor_green;
led-failsafe = &tricolor_red;
led-running = &tricolor_green;
led-upgrade = &tricolor_red;
};
chosen {
bootargs-override = "console=ttyS0,9600";
};
memory {
device_type = "memory";
};
board_lbc: lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
reg = <0x0 0x40000>;
label = "dtb";
};
partition@40000 {
reg = <0x40000 0x40000>;
label = "initrd";
};
partition@80000 {
reg = <0x80000 0x27c0000>;
label = "rootfs";
};
partition@2840000 {
reg = <0x2840000 0x800000>;
label = "kernel";
};
partition@3040000 {
reg = <0x3040000 0xec0000>;
label = "stock-jffs2";
read-only;
};
hwinfo: partition@3f00000 {
reg = <0x3f00000 0x20000>;
label = "hw-info";
read-only;
};
partition@3f20000 {
reg = <0x3f20000 0x20000>;
label = "boot-info";
read-only;
};
partition@3f40000 {
reg = <0x3f40000 0x20000>;
label = "boot-info-backup";
read-only;
};
partition@3f60000 {
reg = <0x3f60000 0x20000>;
label = "u-boot-env";
};
partition@3f80000 {
reg = <0x3f80000 0x80000>;
label = "u-boot";
read-only;
};
firmware@0 {
reg = <0x0 0x3040000>;
label = "firmware";
};
};
};
board_soc: soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3100 {
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
lp5521@32 {
compatible = "national,lp5521";
reg = <0x32>;
clock-mode = /bits/ 8 <2>;
tricolor_red: chan0 {
chan-name = "hiveap-330:red:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
tricolor_green:chan1 {
chan-name = "hiveap-330:green:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan2 {
chan-name = "hiveap-330:blue:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
};
/* Most likely SoC boot config */
eeprom@51 {
compatible = "eeprom";
reg = <0x51>;
};
};
mdio@24000 {
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x1>;
};
phy1: ethernet-phy@1 {
interrupts = <2 1 0 0>;
reg = <0x2>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
status = "okay";
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "okay";
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
mtd-mac-address-increment = <1>;
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
reg = <0x0 0xffe09000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 8 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
};
/include/ "fsl/p1020si-post.dtsi"

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "OCEDO Panda";
compatible = "ocedo,panda";
aliases {
led-boot = &system_blue;
led-failsafe = &system_blue;
led-running = &system_blue;
led-upgrade = &system_blue;
};
chosen {
/* Needed for initramfs */
bootargs-override = "console=ttyS0,115200 ubi.mtd=3,2048";
};
memory {
device_type = "memory";
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0x1 0x0 0x0 0xff800000 0x00040000
0x2 0x0 0x0 0xffa00000 0x00020000
0x3 0x0 0x0 0xffb00000 0x00020000>;
nand@1,0 {
compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0xa0000>;
label = "uboot";
read-only;
};
partition@a0000 {
reg = <0xa0000 0x20000>;
label = "uboot-env0";
};
partition@c0000 {
reg = <0xc0000 0x40000>;
label = "uboot-env1";
};
partition@100000 {
reg = <0x100000 0xff00000>;
label = "ubi";
};
};
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
gpio0: gpio-controller@fc00 {
};
mdio@24000 {
phy0: ethernet-phy@8 {
reg = <0x8>;
};
phy1: ethernet-phy@9 {
reg = <0x9>;
};
switch0: ethernet-phy@0 {
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "lan5";
};
port@5 {
reg = <5>;
label = "lan6";
};
port@6 {
reg = <6>;
label = "lan7";
};
port@7 {
reg = <7>;
label = "lan8";
};
port@8 {
reg = <8>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
mdio@25000 {
tbi_phy0: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
tbi_phy1: tbi-phy@11 {
reg = <0x11>;
};
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
phy-handle = <&switch0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-connection-type = "sgmii";
phy-handle = <&phy0>;
tbi-handle = <&tbi_phy0>;
};
enet2: ethernet@b2000 {
phy-connection-type = "sgmii";
phy-handle = <&phy1>;
tbi-handle = <&tbi_phy1>;
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
leds {
compatible = "gpio-leds";
power {
gpios = <&gpio0 0 0>;
label = "panda:green:power";
default-state = "on";
};
wlan0 {
gpios = <&gpio0 3 0>;
label = "panda:yellow:wlan0";
linux,default-trigger = "phy0tpt";
};
wlan1 {
gpios = <&gpio0 2 0>;
label = "panda:red:wlan1";
linux,default-trigger = "phy1tpt";
};
tbd_orange {
gpios = <&gpio0 1 0>;
label = "panda:orange:tbd";
};
system_blue: system {
gpios = <&gpio0 4 0>;
label = "panda:blue:system";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 6 1>;
linux,code = <0x198>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "Sophos RED 15w Rev.1";
compatible = "sophos,red-15w-rev1";
aliases {
led-boot = &system_green;
led-failsafe = &system_red;
led-running = &system_green;
led-upgrade = &system_red;
};
memory {
device_type = "memory";
};
leds {
compatible = "gpio-leds";
system_green: system_green {
gpios = <&gpio0 7 0>;
label = "red-15w-rev1:green:system";
};
system_red: system_red {
gpios = <&gpio0 3 0>;
label = "red-15w-rev1:red:system";
};
router {
gpios = <&gpio0 5 1>;
label = "red-15w-rev1:green:router";
};
internet {
gpios = <&gpio0 4 1>;
label = "red-15w-rev1:green:internet";
};
tunnel {
gpios = <&gpio0 8 1>;
label = "red-15w-rev1:green:tunnel";
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
eeprom@50 {
compatible = "st,24c256";
reg = <0x50>;
};
};
i2c@3100 {
eeprom@52 {
compatible = "atmel,24c01";
reg = < 0x52 >;
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
};
};
mdio@25000 {
tbi_phy: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
tbi-handle = <&tbi_phy>;
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
};
ifc: ifc@ffe1e000 {
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
ranges = <0x0 0x0 0x0 0xee000000 0x02000000
0x1 0x0 0x0 0xff800000 0x00010000
0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@1,0 {
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Original partition layout:
* 0x000000000000-0x000000100000 : "NAND U-Boot Image"
* 0x000000100000-0x000000200000 : "NAND U-Boot Environment"
* 0x000000200000-0x000000300000 : "Provisioning"
* - OS-Image 1
* 0x000000300000-0x000000400000 : "fdt1"
* 0x000000400000-0x000000c00000 : "uimage1"
* 0x000000c00000-0x000001c00000 : "rootfs1"
* - OS-Image 2
* 0x000001c00000-0x000001d00000 : "fdt2"
* 0x000001d00000-0x000002500000 : "uimage2"
* 0x000002500000-0x000003500000 : "rootfs2"
* - Empty
* 0x000003500000-0x000008000000 : "data"
*/
partition@0 {
reg = <0x0 0x100000>;
label = "u-boot";
read-only;
};
partition@100000 {
reg = <0x100000 0x100000>;
label = "u-boot-env";
};
partition@200000 {
reg = <0x200000 0x100000>;
label = "provisioning";
read-only;
};
partition@300000 {
reg = <0x300000 0x800000>;
label = "kernel";
};
partition@b00000 {
reg = <0xb00000 0x7500000>;
label = "ubi";
};
oem-partition@300000 {
reg = <0x300000 0x1900000>;
label = "sophos-os1";
};
oem-partition@1c00000 {
reg = <0x1c00000 0x1900000>;
label = "sophos-os2";
};
oem-partition@3500000 {
reg = <0x3500000 0x4b00000>;
label = "sophos-data";
};
};
};
};
pci0: pcie@ffe09000 {
status = "disabled";
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "fsl/p1010si-post.dtsi"

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/*
* TP-Link TL-WDR4900 v1 Device Tree Source
*
* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "TP-Link TL-WDR4900 v1";
compatible = "tplink,tl-wdr4900-v1";
chosen {
bootargs = "console=ttyS0,115200";
/*
stdout-path = "/soc@ffe00000/serial@4500";
*/
};
aliases {
spi0 = &spi0;
led-boot = &system_green;
led-failsafe = &system_green;
led-running = &system_green;
led-upgrade = &system_green;
};
memory {
device_type = "memory";
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
spi0: spi@7000 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
partition@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
partition@60000 {
compatible = "tplink,firmware";
reg = <0x00060000 0x00f80000>;
label = "firmware";
};
partition@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
partition@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
};
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x00000000 /* PAD5_MODE */
0x0000c 0x01000000 /* PAD6_MODE */
0x00010 0x40000000 /* POWER_ON_STRIP */
0x00050 0xcf35cf35 /* LED_CTRL0 */
0x00054 0xcf35cf35 /* LED_CTRL1 */
0x00058 0xcf35cf35 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x0007c 0x0000007e /* PORT0_STATUS */
0x00094 0x00000200 /* PORT6_STATUS */
>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&uboot 0x4fc00>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
serial1: serial@4600 {
status = "disabled";
};
can0: can@1c000 {
status = "disabled";
};
can1: can@1d000 {
status = "disabled";
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
fsl,cksel = <1>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
fsl,tmr-fiper2 = <0x00018696>;
fsl,max-adj = <249999999>;
};
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
ifc: ifc@ffe1e000 {
status = "disabled";
};
leds {
compatible = "gpio-leds";
system_green: system {
gpios = <&gpio0 2 1>; /* active low */
label = "tp-link:blue:system";
};
usb1 {
gpios = <&gpio0 3 1>; /* active low */
label = "tp-link:green:usb1";
};
usb2 {
gpios = <&gpio0 4 1>; /* active low */
label = "tp-link:green:usb2";
};
usbpower {
gpios = <&gpio0 10 1>; /* active low */
label = "tp-link:usb:power";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 5 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
rfkill {
label = "RFKILL switch";
gpios = <&gpio0 11 1>; /* active low */
linux,code = <0xf7>; /* RFKill */
};
};
};
/include/ "fsl/p1010si-post.dtsi"
/ {
cpus {
PowerPC,P1010@0 {
bus-frequency = <399999996>;
timebase-frequency = <49999999>;
clock-frequency = <799999992>;
};
};
memory {
reg = <0x0 0x0 0x0 0x8000000>;
};
soc@ffe00000 {
bus-frequency = <399999996>;
serial@4600 {
clock-frequency = <399999996>;
};
serial@4500 {
clock-frequency = <399999996>;
};
pic@40000 {
clock-frequency = <399999996>;
};
};
};
/*
* The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
* related to the P1010.
*
* NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
* datasheet states that the P1014 does not include the accelerated crypto
* module (CAAM/SEC4) which is present in the P1010.
*
* NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
* SEC4 module, but states that SoCs with System Version Register values
* 0x80F10110 or 0x80F10120 do not have the security feature.
*
* All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
* as: core rev 1.0, "P1014 (without security)".
*
* The SVR value is reported by uboot on the serial console.
*/
/ {
soc: soc@ffe00000 {
/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Enterasys WS-AP3710i";
compatible = "enterasys,ws-ap3710i";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
label-mac-device = &enet0;
};
memory {
device_type = "memory";
};
leds {
compatible = "gpio-leds";
wifi1 {
gpios = <&gpio0 3 0>;
label = "ws-ap3710i:green:radio1";
linux,default-trigger = "phy0tpt";
};
wifi2 {
gpios = <&gpio0 4 0>;
label = "ws-ap3710i:green:radio2";
linux,default-trigger = "phy1tpt";
};
led_power_green: power_green {
gpios = <&gpio0 8 0>;
label = "ws-ap3710i:green:power";
};
led_power_red: power_red {
gpios = <&gpio0 9 0>;
label = "ws-ap3710i:red:power";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 1 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x2000000>;
bank-width = <2>;
device-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "denx,fit";
reg = <0x0 0x1d80000>;
label = "firmware";
};
partition@1d80000 {
reg = <0x1d80000 0x80000>;
label = "u-boot";
read-only;
};
partition@1e00000 {
reg = <0x1e00000 0x100000>;
label = "nvram";
read-only;
};
partition@1f00000 {
reg = <0x1f00000 0x20000>;
label = "cfg2";
read-only;
};
partition@1f20000 {
reg = <0x1f20000 0x20000>;
label = "cfg1";
read-only;
};
};
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
gpio0: gpio-controller@fc00 {
};
mdio@24000 {
phy4: ethernet-phy@4 {
reg = <0x4>;
reset-gpios = <&gpio0 2 1>;
};
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
phy-handle = <&phy4>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
usb@22000 {
status = "disabled";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"

89
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/hiveap-330.c Normal file
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/*
* Aerohive HiveAP-330 Board Setup
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*
* Based on:
* mpc85xx_rdb.c:
* MPC85xx RDB Board Setup
* Copyright 2013 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init hiveap_330_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init hiveap_330_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("hiveap_330_setup_arch()", 0);
mpc85xx_smp_init();
fsl_pci_assign_primary();
printk(KERN_INFO "HiveAP-330 board from Aerohive\n");
}
machine_arch_initcall(hiveap_330, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init hiveap_330_probe(void)
{
if (of_machine_is_compatible("aerohive,hiveap-330"))
return 1;
return 0;
}
define_machine(hiveap_330) {
.name = "P1020 RDB",
.probe = hiveap_330_probe,
.setup_arch = hiveap_330_setup_arch,
.init_IRQ = hiveap_330_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

91
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/panda.c Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* OCEDO Panda Board Setup
*
* Copyright (C) 2019 David Bauer <mail@david-bauer.net>
*
* Based on:
* mpc85xx_rdb.c:
* MPC85xx RDB Board Setup
* Copyright 2013 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init panda_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init panda_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("panda_setup_arch()", 0);
mpc85xx_smp_init();
fsl_pci_assign_primary();
pr_info("Panda board from OCEDO\n");
}
machine_arch_initcall(panda, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init panda_probe(void)
{
if (of_machine_is_compatible("ocedo,panda"))
return 1;
return 0;
}
define_machine(panda) {
.name = "P1020 RDB",
.probe = panda_probe,
.setup_arch = panda_setup_arch,
.init_IRQ = panda_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

87
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/red15w_rev1.c Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Sophos RED 15w Rev.1 Board Setup
*
* Copyright (C) 2019 David Bauer <mail@david-bauer.net>
*
* Based on:
* p1010rdb.c:
* P1010 RDB Board Setup
* Copyright 2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "mpc85xx.h"
void __init red_15w_rev1_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init red_15w_rev1_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("red_15w_rev1_setup_arch()", 0);
fsl_pci_assign_primary();
pr_info("RED 15w Rev.1 from Sophos\n");
}
machine_arch_initcall(red_15w_rev1, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init red_15w_rev1_probe(void)
{
if (of_machine_is_compatible("sophos,red-15w-rev1"))
return 1;
return 0;
}
define_machine(red_15w_rev1) {
.name = "P1010 RDB",
.probe = red_15w_rev1_probe,
.setup_arch = red_15w_rev1_setup_arch,
.init_IRQ = red_15w_rev1_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

144
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c Normal file
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/*
* TL-WDR4900 v1 board setup
*
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
*
* Based on:
* p1010rdb.c:
* P1010RDB Board Setup
* Copyright 2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <linux/ath9k_platform.h>
#include <linux/leds.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "mpc85xx.h"
void __init tl_wdr4900_v1_pic_init(void)
{
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
#ifdef CONFIG_PCI
static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
{
.name = "tp-link:blue:wps",
.gpio = 1,
.active_low = 1,
},
};
static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
.led_pin = 0,
.eeprom_name = "pci_wmac0.eeprom",
.leds = tl_wdr4900_v1_wmac_leds_gpio,
.num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
};
static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
.led_pin = 0,
.eeprom_name = "pci_wmac1.eeprom",
};
static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
{
if (!machine_is(tl_wdr4900_v1))
return;
if (dev->bus->number == 1 &&
PCI_SLOT(dev->devfn) == 0) {
dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
return;
}
if (dev->bus->number == 3 &&
PCI_SLOT(dev->devfn) == 0 &&
dev->device == 0xabcd) {
dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
/*
* The PCI header of the AR9381 chip is not programmed
* correctly by the bootloader and the device uses wrong
* data due to that. Replace the broken values with the
* correct ones.
*/
dev->device = 0x30;
dev->class = 0x028000;
pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
}
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
tl_wdr4900_v1_pci_wmac_fixup);
#endif /* CONFIG_PCI */
/*
* Setup the architecture
*/
static void __init tl_wdr4900_v1_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
fsl_pci_assign_primary();
printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
}
machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init tl_wdr4900_v1_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "tplink,tl-wdr4900-v1"))
return 1;
return 0;
}
define_machine(tl_wdr4900_v1) {
.name = "Freescale P1014",
.probe = tl_wdr4900_v1_probe,
.setup_arch = tl_wdr4900_v1_setup_arch,
.init_IRQ = tl_wdr4900_v1_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

91
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/ws-ap3710i.c Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Enterasys WS-AP3710i Board Setup
*
* Copyright (C) 2019 David Bauer <mail@david-bauer.net>
*
* Based on:
* mpc85xx_rdb.c:
* MPC85xx RDB Board Setup
* Copyright 2013 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init ws_ap3710i_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init ws_ap3710i_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("ws_ap3710i_setup_arch()", 0);
mpc85xx_smp_init();
fsl_pci_assign_primary();
pr_info("WS-AP3710i board from Enterasys\n");
}
machine_arch_initcall(ws_ap3710i, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init ws_ap3710i_probe(void)
{
if (of_machine_is_compatible("enterasys,ws-ap3710i"))
return 1;
return 0;
}
define_machine(ws_ap3710i) {
.name = "P1020 RDB",
.probe = ws_ap3710i_probe,
.setup_arch = ws_ap3710i_setup_arch,
.init_IRQ = ws_ap3710i_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

19
target/linux/mpc85xx/generic/config-default Normal file
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# CONFIG_FSL_CORENET_CF is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_REALTEK_PHY=y
CONFIG_RED_15W_REV1=y
CONFIG_TL_WDR4900_V1=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y

15
target/linux/mpc85xx/generic/profiles/00-default.mk Normal file
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#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most MPC85xx boards.
endef
$(eval $(call Profile,Default))

8
target/linux/mpc85xx/generic/target.mk Normal file
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BOARDNAME:=Generic
FEATURES+=nand
KERNELNAME:=simpleImage.tl-wdr4900-v1
define Target/Description
Build firmware images for generic MPC85xx based boards.
endef

146
target/linux/mpc85xx/image/Makefile Normal file
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#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT
define rootfs_align
$(patsubst %-256k,0x40000,$(patsubst %-128k,0x20000,$(patsubst %-64k,0x10000,$(patsubst squashfs%,0x4,$(patsubst root.%,%,$(1))))))
endef
define Build/copy-file
cat "$(1)" > "$@"
endef
# combine kernel and rootfs into one image
# mktplinkfw <type> <optional extra arguments to mktplinkfw binary>
# <type> is "sysupgrade" or "factory"
#
# -a align the rootfs start on an <align> bytes boundary
# -j add jffs2 end-of-filesystem markers
# -s strip padding from end of the image
# -X reserve <size> bytes in the firmware image (hexval prefixed with 0x)
define Build/mktplinkfw
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) \
-k $(IMAGE_KERNEL) \
-r $@ \
-o $@.new \
-j -X 0x40000 \
-a $(call rootfs_align,$(FILESYSTEM)) \
$(wordlist 2,$(words $(1)),$(1)) \
$(if $(findstring sysupgrade,$(word 1,$(1))),-s) && mv $@.new $@ || rm -f $@
endef
define Device/Default
PROFILES := Default
DEVICE_DTS := $(1)
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_ENTRY := 0x00000000
KERNEL_LOADADDR := 0x00000000
KERNEL := kernel-bin
endef
ifeq ($(SUBTARGET),generic)
define Device/tl-wdr4900-v1
DEVICE_TITLE := TP-Link TL-WDR4900
TPLINK_HWID := 0x49000001
TPLINK_HWREV := 1
TPLINK_FLASHLAYOUT := 16Mppc
KERNEL_SIZE := 2684k
KERNEL_NAME := simpleImage.tl-wdr4900-v1
KERNEL_INITRAMFS :=
KERNEL := kernel-bin | uImage none
KERNEL_ENTRY := 0x1000000
KERNEL_LOADADDR := 0x1000000
SUPPORTED_DEVICES:=tl-wdr4900-v1 tplink,tl-wdr4900-v1
ARTIFACTS := fdt.bin
ARTIFACT/fdt.bin := append-dtb
IMAGES := fdt.bin factory.bin sysupgrade.bin
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade | append-metadata
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
TARGET_DEVICES += tl-wdr4900-v1
define Device/red-15w-rev1
DEVICE_TITLE := Sophos RED 15w Rev.1
# Original firmware uses a dedicated DTB-partition.
# The bootloader however supports FIT-images.
KERNEL = kernel-bin | gzip | fit gzip $(KDIR)/image-$$(DEVICE_DTS).dtb
SUPPORTED_DEVICES := sophos,red-15w-rev1
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += red-15w-rev1
endif
ifeq ($(SUBTARGET),p1020)
define Device/hiveap-330
DEVICE_TITLE := Aerohive HiveAP-330
DEVICE_PACKAGES := kmod-tpm-i2c-atmel
BLOCKSIZE := 128k
KERNEL := kernel-bin | gzip | uImage gzip
KERNEL_SIZE := 8m
KERNEL_INITRAMFS := copy-file $(KDIR)/vmlinux-initramfs | uImage none
SUPPORTED_DEVICES := aerohive,hiveap-330
IMAGES := fdt.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
IMAGE/sysupgrade.bin := append-dtb | pad-to 256k | check-size 256k | \
append-uImage-fakehdr ramdisk | pad-to 256k | check-size 512k | \
append-rootfs | pad-rootfs $$(BLOCKSIZE) | pad-to 41216k | check-size 41216k | \
append-kernel | append-metadata
endef
TARGET_DEVICES += hiveap-330
define Device/ws-ap3710i
DEVICE_TITLE := Enterasys WS-AP3710i
BLOCKSIZE := 128k
KERNEL = kernel-bin | lzma | fit lzma $(KDIR)/image-$$(DEVICE_DTS).dtb
SUPPORTED_DEVICES := enterasys,ws-ap3710i
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
endef
TARGET_DEVICES += ws-ap3710i
define Device/panda
DEVICE_TITLE := OCEDO Panda
DEVICE_PACKAGES := kmod-rtc-ds1307 uboot-envtools
KERNEL = kernel-bin | gzip | fit gzip $(KDIR)/image-$$(DEVICE_DTS).dtb
PAGESIZE := 2048
SUBPAGESIZE := 512
BLOCKSIZE := 128k
SUPPORTED_DEVICES := ocedo,panda
IMAGES := fdt.bin sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
IMAGE/fdt.bin := append-dtb
endef
TARGET_DEVICES += panda
endif
ifeq ($(SUBTARGET),p2020)
define Device/p2020rdb
DEVICE_TITLE := Freescale P2020RDB
DEVICE_DTS_DIR := $(DTS_DIR)/fsl
DEVICE_PACKAGES := kmod-hwmon-core kmod-hwmon-lm90 kmod-rtc-ds1307 \
kmod-gpio-pca953x kmod-eeprom-at24
BLOCKSIZE := 128k
KERNEL := kernel-bin | gzip | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
SUPPORTED_DEVICES := fsl,P2020RDB
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
pad-rootfs $$(BLOCKSIZE) | append-metadata
endef
TARGET_DEVICES += p2020rdb
endif
$(eval $(call BuildImage))

57
target/linux/mpc85xx/p1020/config-default Normal file
View File

@@ -0,0 +1,57 @@
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_AT803X_PHY=y
CONFIG_BROADCOM_PHY=y
CONFIG_CMDLINE_OVERRIDE=y
CONFIG_CPU_RMAP=y
CONFIG_EEPROM_LEGACY=y
# CONFIG_FSL_CORENET_CF is not set
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_TBSYNC=y
# CONFIG_GPIO_MAX77620 is not set
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HIVEAP_330=y
CONFIG_PANDA=y
CONFIG_I2C_CHARDEV=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_LP55XX_COMMON=y
CONFIG_LOCK_SPIN_ON_OWNER=y
# CONFIG_MAX77620_WATCHDOG is not set
CONFIG_MFD_CORE=y
CONFIG_MFD_MAX77620=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NR_CPUS=2
CONFIG_PADATA=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_REGMAP_IRQ=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
# CONFIG_RTC_DRV_MAX77686 is not set
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SMP=y
CONFIG_SWCONFIG_B53=y
# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
CONFIG_SWCONFIG_B53_PHY_DRIVER=y
# CONFIG_SWCONFIG_B53_PHY_FIXUP is not set
# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
CONFIG_TREE_RCU=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_WS_AP3710I=y
CONFIG_XPS=y

15
target/linux/mpc85xx/p1020/profiles/00-default.mk Normal file
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@@ -0,0 +1,15 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most P1020 boards.
endef
$(eval $(call Profile,Default))

6
target/linux/mpc85xx/p1020/target.mk Normal file
View File

@@ -0,0 +1,6 @@
BOARDNAME:=P1020
FEATURES+=nand
define Target/Description
Build firmware images for Freescale P1020 based boards.
endef

31
target/linux/mpc85xx/p2020/config-default Normal file
View File

@@ -0,0 +1,31 @@
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_CPU_RMAP=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_TBSYNC=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MPC85xx_RDB=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_BCH=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_BCH=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NR_CPUS=2
CONFIG_PADATA=y
CONFIG_PCI_MSI=y
CONFIG_PPC_MSI_BITMAP=y
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SMP=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_XPS=y

15
target/linux/mpc85xx/p2020/profiles/00-default.mk Normal file
View File

@@ -0,0 +1,15 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most P2020 boards.
endef
$(eval $(call Profile,Default))

5
target/linux/mpc85xx/p2020/target.mk Normal file
View File

@@ -0,0 +1,5 @@
BOARDNAME:=P2020
define Target/Description
Build firmware images for Freescale P2020 based boards.
endef

10
target/linux/mpc85xx/patches-4.14/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch Normal file
View File

@@ -0,0 +1,10 @@
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -33,6 +33,7 @@ static const struct of_device_id mpc85xx
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ { .compatible = "gpio-keys", },
/* For all PCI controllers */
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },

82
target/linux/mpc85xx/patches-4.14/100-powerpc-85xx-tl-wdr4900-v1-support.patch Normal file
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@@ -0,0 +1,82 @@
From 53bc6ae5da3b2902581c30ac2568f51ce35e7624 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 20 Feb 2013 08:40:33 +0100
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
board
This patch adds support for the TP-Link TL-WDR4900 v1
concurrent dual-band wireless router. The devices uses
the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/Makefile | 3 ++-
arch/powerpc/boot/wrapper | 5 +++++
arch/powerpc/platforms/85xx/Kconfig | 11 +++++++++++
arch/powerpc/platforms/85xx/Makefile | 1 +
4 files changed, 19 insertions(+), 1 deletion(-)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -156,6 +156,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-wlib := $(sort $(src-wlib-y))
src-plat := $(sort $(src-plat-y))
@@ -335,7 +336,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.sbc8548
image-$(CONFIG_KSI8560) += cuImage.ksi8560
-
+image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -302,6 +302,11 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-tl-wdr4900-v1)
+ platformo="$object/fixed-head.o $object/simpleboot.o"
+ link_address='0x1000000'
+ binary=y
+ ;;
simpleboot-virtex405-*)
platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
binary=y
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -170,6 +170,17 @@ config STX_GP3
select CPM2
select DEFAULT_UIMAGE
+config TL_WDR4900_V1
+ bool "TP-Link TL-WDR4900 v1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
+
+ This board is a Concurrent Dual-Band wireless router with a
+ Freescale P1014 SoC.
+
config TQM8540
bool "TQ Components TQM8540"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CORENET_GENERIC) += coren
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_SBC8548) += sbc8548.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o

30
target/linux/mpc85xx/patches-4.14/101-powerpc-85xx-hiveap-330-support.patch Normal file
View File

@@ -0,0 +1,30 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -49,6 +49,17 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config HIVEAP_330
+ bool "Aerohive HiveAP-330"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive HiveAP-330 board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -10,6 +10,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o

37
target/linux/mpc85xx/patches-4.14/102-powerpc-add-cmdline-override.patch Normal file
View File

@@ -0,0 +1,37 @@
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -838,6 +838,14 @@ config CMDLINE_FORCE
This is useful if you cannot or don't want to change the
command-line options your boot loader passes to the kernel.
+config CMDLINE_OVERRIDE
+ bool "Use alternative cmdline from device tree"
+ help
+ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can
+ be used, this is not a good option for kernels that are shared across
+ devices. This setting enables using "chosen/cmdline-override" as the
+ cmdline if it exists in the device tree.
+
config EXTRA_TARGETS
string "Additional default image types"
help
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -1131,6 +1131,17 @@ int __init early_init_dt_scan_chosen(uns
if (p != NULL && l > 0)
strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
+ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
+ * device tree option of chosen/bootargs-override. This is
+ * helpful on boards where u-boot sets bootargs, and is unable
+ * to be modified.
+ */
+#ifdef CONFIG_CMDLINE_OVERRIDE
+ p = of_get_flat_dt_prop(node, "bootargs-override", &l);
+ if (p != NULL && l > 0)
+ strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
+#endif
+
/*
* CONFIG_CMDLINE is meant to be a default in case nothing else
* managed to set the command line, unless CONFIG_CMDLINE_FORCE

10
target/linux/mpc85xx/patches-4.14/103-powerpc-fix-build-cross32ar.patch Normal file
View File

@@ -0,0 +1,10 @@
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -23,6 +23,7 @@ CROSS32AR := $(CROSS32_COMPILE)ar
ifeq ($(HAS_BIARCH),y)
ifeq ($(CROSS32_COMPILE),)
CROSS32CC := $(CC) -m32
+CROSS32AR := $(AR)
KBUILD_ARFLAGS += --target=elf32-powerpc
endif
endif

170
target/linux/mpc85xx/patches-4.14/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch Normal file
View File

@@ -0,0 +1,170 @@
From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sun, 30 Dec 2018 23:24:41 +0100
Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
This patch apply chages for OpenWRT in P2020RDB
dts file.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
1 file changed, 63 insertions(+), 35 deletions(-)
--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
@@ -2,6 +2,7 @@
* P2020 RDB Device Tree Source
*
* Copyright 2009-2012 Freescale Semiconductor Inc.
+ * Copyright 2018 Pawel Dembicki <paweldembicki@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,10 +10,15 @@
* option) any later version.
*/
+/dts-v1/;
+
/include/ "p2020si-pre.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
/ {
- model = "fsl,P2020RDB";
+ model = "Freescale P2020RDB";
compatible = "fsl,P2020RDB";
aliases {
@@ -38,48 +44,38 @@
0x2 0x0 0x0 0xffb00000 0x00020000>;
nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x1000000>;
bank-width = <2>;
device-width = <1>;
- partition@0 {
- /* This location must not be altered */
- /* 256KB for Vitesse 7385 Switch firmware */
- reg = <0x0 0x00040000>;
- label = "NOR (RO) Vitesse-7385 Firmware";
- read-only;
- };
-
- partition@40000 {
- /* 256KB for DTB Image */
- reg = <0x00040000 0x00040000>;
- label = "NOR (RO) DTB Image";
- read-only;
- };
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
- partition@80000 {
- /* 3.5 MB for Linux Kernel Image */
- reg = <0x00080000 0x00380000>;
- label = "NOR (RO) Linux Kernel Image";
- read-only;
- };
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR (RO) Vitesse-7385 Firmware";
+ read-only;
+ };
- partition@400000 {
- /* 11MB for JFFS2 based Root file System */
- reg = <0x00400000 0x00b00000>;
- label = "NOR (RW) JFFS2 Root File System";
- };
+ partition@40000 {
+ compatible = "denx,fit";
+ reg = <0x00040000 0x00ec0000>;
+ label = "firmware";
+ };
- partition@f00000 {
- /* This location must not be altered */
- /* 512KB for u-boot Bootloader Image */
- /* 512KB for u-boot Environment Variables */
- reg = <0x00f00000 0x00100000>;
- label = "NOR (RO) U-Boot Image";
- read-only;
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "u-boot";
+ read-only;
+ };
};
};
@@ -144,13 +140,43 @@
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
+ gpio0: gpio-controller@fc00 {
+ };
+
i2c@3000 {
+ temperature-sensor@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
+ i2c@3100 {
+ pmic@11 {
+ compatible = "zl2006";
+ reg = <0x11>;
+ };
+
+ gpio@18 {
+ compatible = "nxp,pca9557";
+ reg = <0x18>;
+ };
+
+ eeprom@52 {
+ compatible = "atmel,24c01";
+ reg = <0x52>;
+ };
+ };
+
spi@7000 {
flash@0 {
#address-cells = <1>;
@@ -204,10 +230,12 @@
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x0>;
+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
interrupts = <3 1 0 0>;
reg = <0x1>;
+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
tbi-phy@2 {
device_type = "tbi-phy";

29
target/linux/mpc85xx/patches-4.14/105-powerpc-85xx-red-15w-rev1.patch Normal file
View File

@@ -0,0 +1,29 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -173,6 +173,16 @@ config XES_MPC85xx
Manufacturer: Extreme Engineering Solutions, Inc.
URL: <http://www.xes-inc.com/>
+config RED_15W_REV1
+ bool "Sophos RED 15w Rev.1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the SOPHOS RED 15w Rev.1 board.
+
+ This board is a wireless VPN router with a Freescale P1010 SoC.
+
config STX_GP3
bool "Silicon Turnkey Express GP3"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
+obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o

30
target/linux/mpc85xx/patches-4.14/106-powerpc-85xx-panda-support.patch Normal file
View File

@@ -0,0 +1,30 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -60,6 +60,17 @@ config HIVEAP_330
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config PANDA
+ bool "OCEDO PANDA"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the OCEDO PANDA board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o
obj-$(CONFIG_P1022_DS) += p1022_ds.o
obj-$(CONFIG_P1022_RDK) += p1022_rdk.o
obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
+obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o

30
target/linux/mpc85xx/patches-4.14/107-powerpc-85xx-ws-ap3710i-support.patch Normal file
View File

@@ -0,0 +1,30 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -71,6 +71,17 @@ config PANDA
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config WS_AP3710I
+ bool "Enterasys WS-AP3710i"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Enterasys WS-AP3710i board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_P1022_RDK) += p1022_rdk.o
obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
+obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o