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domenico
2025-06-24 16:03:39 +02:00
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/*
* Aerohive HiveAP-330 Device Tree Source
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Aerohive HiveAP-330";
compatible = "aerohive,hiveap-330";
aliases {
led-boot = &tricolor_green;
led-failsafe = &tricolor_red;
led-running = &tricolor_green;
led-upgrade = &tricolor_red;
};
chosen {
bootargs-override = "console=ttyS0,9600";
};
memory {
device_type = "memory";
};
board_lbc: lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
reg = <0x0 0x40000>;
label = "dtb";
};
partition@40000 {
reg = <0x40000 0x40000>;
label = "initrd";
};
partition@80000 {
reg = <0x80000 0x27c0000>;
label = "rootfs";
};
partition@2840000 {
reg = <0x2840000 0x800000>;
label = "kernel";
};
partition@3040000 {
reg = <0x3040000 0xec0000>;
label = "stock-jffs2";
read-only;
};
hwinfo: partition@3f00000 {
reg = <0x3f00000 0x20000>;
label = "hw-info";
read-only;
};
partition@3f20000 {
reg = <0x3f20000 0x20000>;
label = "boot-info";
read-only;
};
partition@3f40000 {
reg = <0x3f40000 0x20000>;
label = "boot-info-backup";
read-only;
};
partition@3f60000 {
reg = <0x3f60000 0x20000>;
label = "u-boot-env";
};
partition@3f80000 {
reg = <0x3f80000 0x80000>;
label = "u-boot";
read-only;
};
firmware@0 {
reg = <0x0 0x3040000>;
label = "firmware";
};
};
};
board_soc: soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3100 {
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
lp5521@32 {
compatible = "national,lp5521";
reg = <0x32>;
clock-mode = /bits/ 8 <2>;
tricolor_red: chan0 {
chan-name = "hiveap-330:red:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
tricolor_green:chan1 {
chan-name = "hiveap-330:green:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan2 {
chan-name = "hiveap-330:blue:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
};
/* Most likely SoC boot config */
eeprom@51 {
compatible = "eeprom";
reg = <0x51>;
};
};
mdio@24000 {
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x1>;
};
phy1: ethernet-phy@1 {
interrupts = <2 1 0 0>;
reg = <0x2>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
status = "okay";
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "okay";
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&hwinfo 0>;
mtd-mac-address-increment = <1>;
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
reg = <0x0 0xffe09000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 8 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
};
/include/ "fsl/p1020si-post.dtsi"

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "OCEDO Panda";
compatible = "ocedo,panda";
aliases {
led-boot = &system_blue;
led-failsafe = &system_blue;
led-running = &system_blue;
led-upgrade = &system_blue;
};
chosen {
/* Needed for initramfs */
bootargs-override = "console=ttyS0,115200 ubi.mtd=3,2048";
};
memory {
device_type = "memory";
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0x1 0x0 0x0 0xff800000 0x00040000
0x2 0x0 0x0 0xffa00000 0x00020000
0x3 0x0 0x0 0xffb00000 0x00020000>;
nand@1,0 {
compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0xa0000>;
label = "uboot";
read-only;
};
partition@a0000 {
reg = <0xa0000 0x20000>;
label = "uboot-env0";
};
partition@c0000 {
reg = <0xc0000 0x40000>;
label = "uboot-env1";
};
partition@100000 {
reg = <0x100000 0xff00000>;
label = "ubi";
};
};
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
gpio0: gpio-controller@fc00 {
};
mdio@24000 {
phy0: ethernet-phy@8 {
reg = <0x8>;
};
phy1: ethernet-phy@9 {
reg = <0x9>;
};
switch0: ethernet-phy@0 {
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "lan5";
};
port@5 {
reg = <5>;
label = "lan6";
};
port@6 {
reg = <6>;
label = "lan7";
};
port@7 {
reg = <7>;
label = "lan8";
};
port@8 {
reg = <8>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
mdio@25000 {
tbi_phy0: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
tbi_phy1: tbi-phy@11 {
reg = <0x11>;
};
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
phy-handle = <&switch0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-connection-type = "sgmii";
phy-handle = <&phy0>;
tbi-handle = <&tbi_phy0>;
};
enet2: ethernet@b2000 {
phy-connection-type = "sgmii";
phy-handle = <&phy1>;
tbi-handle = <&tbi_phy1>;
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
leds {
compatible = "gpio-leds";
power {
gpios = <&gpio0 0 0>;
label = "panda:green:power";
default-state = "on";
};
wlan0 {
gpios = <&gpio0 3 0>;
label = "panda:yellow:wlan0";
linux,default-trigger = "phy0tpt";
};
wlan1 {
gpios = <&gpio0 2 0>;
label = "panda:red:wlan1";
linux,default-trigger = "phy1tpt";
};
tbd_orange {
gpios = <&gpio0 1 0>;
label = "panda:orange:tbd";
};
system_blue: system {
gpios = <&gpio0 4 0>;
label = "panda:blue:system";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 6 1>;
linux,code = <0x198>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "Sophos RED 15w Rev.1";
compatible = "sophos,red-15w-rev1";
aliases {
led-boot = &system_green;
led-failsafe = &system_red;
led-running = &system_green;
led-upgrade = &system_red;
};
memory {
device_type = "memory";
};
leds {
compatible = "gpio-leds";
system_green: system_green {
gpios = <&gpio0 7 0>;
label = "red-15w-rev1:green:system";
};
system_red: system_red {
gpios = <&gpio0 3 0>;
label = "red-15w-rev1:red:system";
};
router {
gpios = <&gpio0 5 1>;
label = "red-15w-rev1:green:router";
};
internet {
gpios = <&gpio0 4 1>;
label = "red-15w-rev1:green:internet";
};
tunnel {
gpios = <&gpio0 8 1>;
label = "red-15w-rev1:green:tunnel";
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
eeprom@50 {
compatible = "st,24c256";
reg = <0x50>;
};
};
i2c@3100 {
eeprom@52 {
compatible = "atmel,24c01";
reg = < 0x52 >;
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
};
};
mdio@25000 {
tbi_phy: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
tbi-handle = <&tbi_phy>;
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
};
ifc: ifc@ffe1e000 {
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
ranges = <0x0 0x0 0x0 0xee000000 0x02000000
0x1 0x0 0x0 0xff800000 0x00010000
0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@1,0 {
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Original partition layout:
* 0x000000000000-0x000000100000 : "NAND U-Boot Image"
* 0x000000100000-0x000000200000 : "NAND U-Boot Environment"
* 0x000000200000-0x000000300000 : "Provisioning"
* - OS-Image 1
* 0x000000300000-0x000000400000 : "fdt1"
* 0x000000400000-0x000000c00000 : "uimage1"
* 0x000000c00000-0x000001c00000 : "rootfs1"
* - OS-Image 2
* 0x000001c00000-0x000001d00000 : "fdt2"
* 0x000001d00000-0x000002500000 : "uimage2"
* 0x000002500000-0x000003500000 : "rootfs2"
* - Empty
* 0x000003500000-0x000008000000 : "data"
*/
partition@0 {
reg = <0x0 0x100000>;
label = "u-boot";
read-only;
};
partition@100000 {
reg = <0x100000 0x100000>;
label = "u-boot-env";
};
partition@200000 {
reg = <0x200000 0x100000>;
label = "provisioning";
read-only;
};
partition@300000 {
reg = <0x300000 0x800000>;
label = "kernel";
};
partition@b00000 {
reg = <0xb00000 0x7500000>;
label = "ubi";
};
oem-partition@300000 {
reg = <0x300000 0x1900000>;
label = "sophos-os1";
};
oem-partition@1c00000 {
reg = <0x1c00000 0x1900000>;
label = "sophos-os2";
};
oem-partition@3500000 {
reg = <0x3500000 0x4b00000>;
label = "sophos-data";
};
};
};
};
pci0: pcie@ffe09000 {
status = "disabled";
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "fsl/p1010si-post.dtsi"

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/*
* TP-Link TL-WDR4900 v1 Device Tree Source
*
* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "TP-Link TL-WDR4900 v1";
compatible = "tplink,tl-wdr4900-v1";
chosen {
bootargs = "console=ttyS0,115200";
/*
stdout-path = "/soc@ffe00000/serial@4500";
*/
};
aliases {
spi0 = &spi0;
led-boot = &system_green;
led-failsafe = &system_green;
led-running = &system_green;
led-upgrade = &system_green;
};
memory {
device_type = "memory";
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
spi0: spi@7000 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
partition@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
partition@60000 {
compatible = "tplink,firmware";
reg = <0x00060000 0x00f80000>;
label = "firmware";
};
partition@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
partition@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
};
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x00000000 /* PAD5_MODE */
0x0000c 0x01000000 /* PAD6_MODE */
0x00010 0x40000000 /* POWER_ON_STRIP */
0x00050 0xcf35cf35 /* LED_CTRL0 */
0x00054 0xcf35cf35 /* LED_CTRL1 */
0x00058 0xcf35cf35 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x0007c 0x0000007e /* PORT0_STATUS */
0x00094 0x00000200 /* PORT6_STATUS */
>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mtd-mac-address = <&uboot 0x4fc00>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
serial1: serial@4600 {
status = "disabled";
};
can0: can@1c000 {
status = "disabled";
};
can1: can@1d000 {
status = "disabled";
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
fsl,cksel = <1>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
fsl,tmr-fiper2 = <0x00018696>;
fsl,max-adj = <249999999>;
};
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
ifc: ifc@ffe1e000 {
status = "disabled";
};
leds {
compatible = "gpio-leds";
system_green: system {
gpios = <&gpio0 2 1>; /* active low */
label = "tp-link:blue:system";
};
usb1 {
gpios = <&gpio0 3 1>; /* active low */
label = "tp-link:green:usb1";
};
usb2 {
gpios = <&gpio0 4 1>; /* active low */
label = "tp-link:green:usb2";
};
usbpower {
gpios = <&gpio0 10 1>; /* active low */
label = "tp-link:usb:power";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 5 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
rfkill {
label = "RFKILL switch";
gpios = <&gpio0 11 1>; /* active low */
linux,code = <0xf7>; /* RFKill */
};
};
};
/include/ "fsl/p1010si-post.dtsi"
/ {
cpus {
PowerPC,P1010@0 {
bus-frequency = <399999996>;
timebase-frequency = <49999999>;
clock-frequency = <799999992>;
};
};
memory {
reg = <0x0 0x0 0x0 0x8000000>;
};
soc@ffe00000 {
bus-frequency = <399999996>;
serial@4600 {
clock-frequency = <399999996>;
};
serial@4500 {
clock-frequency = <399999996>;
};
pic@40000 {
clock-frequency = <399999996>;
};
};
};
/*
* The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
* related to the P1010.
*
* NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
* datasheet states that the P1014 does not include the accelerated crypto
* module (CAAM/SEC4) which is present in the P1010.
*
* NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
* SEC4 module, but states that SoCs with System Version Register values
* 0x80F10110 or 0x80F10120 do not have the security feature.
*
* All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
* as: core rev 1.0, "P1014 (without security)".
*
* The SVR value is reported by uboot on the serial console.
*/
/ {
soc: soc@ffe00000 {
/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Enterasys WS-AP3710i";
compatible = "enterasys,ws-ap3710i";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
label-mac-device = &enet0;
};
memory {
device_type = "memory";
};
leds {
compatible = "gpio-leds";
wifi1 {
gpios = <&gpio0 3 0>;
label = "ws-ap3710i:green:radio1";
linux,default-trigger = "phy0tpt";
};
wifi2 {
gpios = <&gpio0 4 0>;
label = "ws-ap3710i:green:radio2";
linux,default-trigger = "phy1tpt";
};
led_power_green: power_green {
gpios = <&gpio0 8 0>;
label = "ws-ap3710i:green:power";
};
led_power_red: power_red {
gpios = <&gpio0 9 0>;
label = "ws-ap3710i:red:power";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 1 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x2000000>;
bank-width = <2>;
device-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "denx,fit";
reg = <0x0 0x1d80000>;
label = "firmware";
};
partition@1d80000 {
reg = <0x1d80000 0x80000>;
label = "u-boot";
read-only;
};
partition@1e00000 {
reg = <0x1e00000 0x100000>;
label = "nvram";
read-only;
};
partition@1f00000 {
reg = <0x1f00000 0x20000>;
label = "cfg2";
read-only;
};
partition@1f20000 {
reg = <0x1f20000 0x20000>;
label = "cfg1";
read-only;
};
};
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
gpio0: gpio-controller@fc00 {
};
mdio@24000 {
phy4: ethernet-phy@4 {
reg = <0x4>;
reset-gpios = <&gpio0 2 1>;
};
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
phy-handle = <&phy4>;
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
usb@22000 {
status = "disabled";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"