36 lines
1.2 KiB
Diff
36 lines
1.2 KiB
Diff
From 65153846b18c486ce3c90477c467d53915114e3f Mon Sep 17 00:00:00 2001
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From: Andy Yan <andy.yan@rock-chips.com>
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Date: Mon, 28 Aug 2017 10:00:46 +0800
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Subject: [PATCH 2/2] mtd: spi-nor: add support for GD25Q256
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Add support for GD25Q256, a 32MiB SPI Nor flash
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from GigaDevice.
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Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
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Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -872,6 +872,8 @@ static int spi_nor_is_locked(struct mtd_
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return ret;
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}
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+static int macronix_quad_enable(struct spi_nor *nor);
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+
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/* Used when the "_ext_id" is two bytes at most */
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#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
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.id = { \
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@@ -999,6 +1001,12 @@ static const struct flash_info spi_nor_i
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SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
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},
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+ {
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+ "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512,
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+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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+ SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
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+ .quad_enable = macronix_quad_enable,
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+ },
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/* Intel/Numonyx -- xxxs33b */
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{ "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) },
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