Initial commit

target/linux/Makefile

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2006-2007 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/target.mk
+
+export TARGET_BUILD=1
+
+prereq clean download prepare compile install oldconfig menuconfig nconfig xconfig update refresh: FORCE
+	@+$(NO_TRACE_MAKE) -C $(BOARD) $@

target/linux/apm821xx/Makefile

@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+include $(TOPDIR)/rules.mk
+
+ARCH:=powerpc
+BOARD:=apm821xx
+BOARDNAME:=AppliedMicro APM821xx
+CPU_TYPE:=464fp
+FEATURES:=fpu dt gpio ramdisk squashfs usb
+SUBTARGETS:=nand sata
+
+KERNEL_PATCHVER:=5.4
+
+define Target/Description
+	Build images for AppliedMicro APM821xx based boards.
+endef
+
+include $(INCLUDE_DIR)/target.mk
+
+KERNELNAME:=uImage
+
+DEFAULT_PACKAGES += \
+	kmod-leds-gpio kmod-i2c-core kmod-gpio-button-hotplug
+
+$(eval $(call BuildTarget))

target/linux/apm821xx/base-files/etc/board.d/01_leds

@@ -0,0 +1,51 @@
+#!/bin/sh
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+meraki,mr24)
+	ucidef_set_led_netdev "wan" "WAN" "mr24:green:wan" "eth0"
+	ucidef_set_led_wlan "wlan1" "WLAN1" "mr24:green:wifi1" "phy0assoc"
+	ucidef_set_led_wlan "wlan2" "WLAN2" "mr24:green:wifi2" "phy0assoc"
+	ucidef_set_led_wlan "wlan3" "WLAN3" "mr24:green:wifi3" "phy0assoc"
+	ucidef_set_led_wlan "wlan4" "WLAN4" "mr24:green:wifi4" "phy0tpt"
+	;;
+
+meraki,mx60)
+	ucidef_set_led_switch "wan" "WAN" "mx60:green:wan" "switch0" "0x20"
+	ucidef_set_led_switch "lan1" "LAN1" "mx60:green:lan1" "switch0" "0x10"
+	ucidef_set_led_switch "lan2" "LAN2" "mx60:green:lan2" "switch0" "0x08"
+	ucidef_set_led_switch "lan3" "LAN3" "mx60:green:lan3" "switch0" "0x04"
+	ucidef_set_led_switch "lan4" "LAN4" "mx60:green:lan4" "switch0" "0x02"
+	;;
+
+netgear,wndap620)
+	ucidef_set_led_switch "lan_act" "LAN (Activity)" "wndap6x0:green:activity" "switch0" "0x04" "0x0f" "rx tx"
+	ucidef_set_led_switch "lan_100" "LAN 100Mbps" "wndap620:amber:link100" "switch0" "0x04" "0x04" "link"
+	ucidef_set_led_switch "lan_1000" "LAN 1000Mbps" "wndap620:green:link1000" "switch0" "0x04" "0x08" "link"
+	;;
+
+netgear,wndap660)
+	ucidef_set_led_netdev "lan_act" "LAN (Activity)" "wndap6x0:green:activity" "eth0"
+	ucidef_set_led_switch "lan1_100" "LAN 100Mbps" "wndap660:amber:lan1-link100" "switch0" "0x04" "0x04" "link"
+	ucidef_set_led_switch "lan1_1000" "LAN 1000Mbps" "wndap660:green:lan1-link1000" "switch0" "0x04" "0x08" "link"
+	ucidef_set_led_switch "lan2_100" "LAN 100Mbps" "wndap660:amber:lan2-link100" "switch0" "0x02" "0x04" "link"
+	ucidef_set_led_switch "lan2_1000" "LAN 1000Mbps" "wndap660:green:lan2-link1000" "switch0" "0x02" "0x08" "link"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "wndap6x0:green:wlan2g" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "wndap6x0:green:wlan5g" "phy1tpt"
+	;;
+
+netgear,wndr4700)
+	ucidef_set_led_switch "wan_green" "WAN (green)" "wndr4700:green:wan" "switch0" "0x20"
+	ucidef_set_led_netdev "wan_yellow" "WAN (yellow)" "wndr4700:yellow:wan" "eth0.2" "tx rx"
+	;;
+
+esac
+
+board_config_flush
+
+exit 0

target/linux/apm821xx/base-files/etc/board.d/02_network

@@ -0,0 +1,35 @@
+#!/bin/sh
+
+. /lib/functions/system.sh
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+meraki,mr24|\
+wd,mybooklive|\
+wd,mybooklive-duo)
+	ucidef_set_interface_lan "eth0"
+	;;
+netgear,wndap620)
+	ucidef_add_switch "switch0" "2:lan" "5@eth0"
+	;;
+netgear,wndap660)
+	ucidef_add_switch "switch0" "1:lan:2" "2:lan:1" "5@eth0"
+	;;
+meraki,mx60|\
+netgear,wndr4700)
+	ucidef_add_switch "switch0" \
+		"0@eth0" "4:lan" "3:lan" "2:lan" "1:lan" "5:wan"
+	;;
+
+*)
+	ucidef_set_interfaces_lan_wan "eth0" "eth1"
+	;;
+esac
+
+board_config_flush
+
+exit 0

target/linux/apm821xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom

@@ -0,0 +1,45 @@
+#!/bin/sh
+
+[ -e /lib/firmware/$FIRMWARE ] && exit 0
+
+. /lib/functions/caldata.sh
+
+board=$(board_name)
+
+case "$FIRMWARE" in
+"ath9k-eeprom-pci-0000:43:00.0.bin")
+        case $board in
+        netgear,wndr4700)
+		. /lib/upgrade/nand.sh
+
+		if [ -n "$(nand_find_volume ubi0 caldata)" ]; then
+			caldata_extract_ubi "caldata" 0x1000 0x1000
+		else
+			caldata_extract "wifi_data" 0x1000 0x1000
+			ath9k_patch_mac $(mtd_get_mac_binary wifi_data 0x0)
+		fi
+		;;
+	*)
+		caldata_die "board $board is not supported yet"
+		;;
+	esac
+	;;
+
+"ath9k-eeprom-pci-0000:44:00.0.bin")
+        case $board in
+        netgear,wndr4700)
+		. /lib/upgrade/nand.sh
+
+		if [ -n "$(nand_find_volume ubi0 caldata)" ]; then
+			caldata_extract_ubi "caldata" 0x5000 0x1000
+		else
+			caldata_extract "wifi_data" 0x5000 0x1000
+			ath9k_patch_mac $(mtd_get_mac_binary wifi_data 0xc)
+		fi
+		;;
+	*)
+		caldata_die "board $board is not supported yet"
+		;;
+	esac
+	;;
+esac

target/linux/apm821xx/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac

@@ -0,0 +1,19 @@
+#!/bin/ash
+
+[ "$ACTION" = "add" ] || exit 0
+
+PHYNBR=${DEVPATH##*/phy}
+
+[ -n "$PHYNBR" ] || exit 0
+
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+board=$(board_name)
+
+case "$board" in
+netgear,wndap620|\
+netgear,wndap660)
+	macaddr_add $(mtd_get_mac_ascii u-boot-env baseMAC) $(($PHYNBR + 1)) > /sys${DEVPATH}/macaddress
+	;;
+esac

target/linux/apm821xx/base-files/etc/inittab

@@ -0,0 +1,4 @@
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K shutdown
+::askconsole:/usr/libexec/login.sh
+ttyS0::askfirst:/usr/libexec/login.sh

target/linux/apm821xx/base-files/lib/preinit/05_set_iface_mac_apm821xx

@@ -0,0 +1,13 @@
+preinit_set_mac_address() {
+	. /lib/functions.sh
+
+	case $(board_name) in
+		meraki,mr24|\
+		meraki,mx60)
+			mac_lan=$(mtd_get_mac_binary_ubi board-config 0x66)
+			[ -n "$mac_lan" ] && ip link set eth0 address "$mac_lan"
+			;;
+	esac
+}
+
+boot_hook_add preinit_main preinit_set_mac_address

target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx

@@ -0,0 +1,5 @@
+apm821xx_set_preinit_iface() {
+	ifname=eth0
+}
+
+boot_hook_add preinit_main apm821xx_set_preinit_iface

target/linux/apm821xx/base-files/lib/preinit/79_move_config

@@ -0,0 +1,18 @@
+BOOTPART=/dev/sda1
+
+move_config() {
+	. /lib/functions.sh
+	. /lib/upgrade/common.sh
+
+	case "$(board_name)" in
+	wd,mybooklive)
+		if [ -b $BOOTPART ]; then
+			mkdir -p /boot
+			mount -t ext4 -o rw,noatime $BOOTPART /boot
+			[ -f "/boot/$BACKUP_FILE" ] && mv -f "/boot/$BACKUP_FILE" /
+		fi
+		;;
+	esac
+}
+
+boot_hook_add preinit_mount_root move_config

target/linux/apm821xx/base-files/lib/upgrade/platform.sh

@@ -0,0 +1,47 @@
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+platform_check_image() {
+	local board=$(board_name)
+
+	case "$board" in
+	wd,mybooklive)
+		mbl_do_platform_check "$1"
+		return $?;
+		;;
+	*)
+		return 0
+		;;
+	esac
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	wd,mybooklive)
+		mbl_do_upgrade "$1"
+		;;
+	meraki,mr24|\
+	meraki,mx60|\
+	netgear,wndap620|\
+	netgear,wndap660|\
+	netgear,wndr4700)
+		nand_do_upgrade "$1"
+		;;
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
+
+platform_copy_config() {
+	local board=$(board_name)
+
+	case "$board" in
+	wd,mybooklive|\
+	wd,mybooklive-duo)
+		mbl_copy_config
+		;;
+	esac
+}

target/linux/apm821xx/base-files/lib/upgrade/wdbook.sh

@@ -0,0 +1,94 @@
+. /lib/functions.sh
+
+# copied from x86's platform.sh
+
+mbl_do_platform_check() {
+	local diskdev partdev diff
+
+	[ "$#" -gt 1 ] && return 1
+
+	export_bootdevice && export_partdevice diskdev 0 || {
+		echo "Unable to determine upgrade device"
+		return 1
+	}
+
+	get_partitions "/dev/$diskdev" bootdisk
+
+	#extract the boot sector from the image
+	get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b 2>/dev/null
+
+	get_partitions /tmp/image.bs image
+
+	#compare tables
+	diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
+
+	rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image
+
+	if [ -n "$diff" ]; then
+		echo "Partition layout has changed. Full image will be written."
+		ask_bool 0 "Abort" && exit 1
+		return 0
+	fi
+
+	return 0;
+}
+
+mbl_do_upgrade() {
+	local diskdev partdev diff
+
+	export_bootdevice && export_partdevice diskdev 0 || {
+		echo "Unable to determine upgrade device"
+		return 1
+	}
+
+	sync
+
+	if [ "$UPGRADE_OPT_SAVE_PARTITIONS" = "1" ]; then
+		get_partitions "/dev/$diskdev" bootdisk
+
+		#extract the boot sector from the image
+		get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b
+
+		get_partitions /tmp/image.bs image
+
+		#compare tables
+		diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
+	else
+		diff=1
+	fi
+
+	if [ -n "$diff" ]; then
+		get_image "$@" | dd of="/dev/$diskdev" bs=4096 conv=fsync
+
+		# Separate removal and addtion is necessary; otherwise, partition 1
+		# will be missing if it overlaps with the old partition 2
+		partx -d - "/dev/$diskdev"
+		partx -a - "/dev/$diskdev"
+
+		return 0
+	fi
+
+	#iterate over each partition from the image and write it to the boot disk
+	while read part start size; do
+		if export_partdevice partdev $part; then
+			echo "Writing image to /dev/$partdev..."
+			get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
+		else
+			echo "Unable to find partition $part device, skipped."
+	fi
+	done < /tmp/partmap.image
+
+	#copy partition uuid
+	echo "Writing new UUID to /dev/$diskdev..."
+	get_image "$@" | dd of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync
+}
+
+mbl_copy_config() {
+	local partdev
+
+	if export_partdevice partdev 1; then
+		mount -t ext4 -o rw,noatime "/dev/$partdev" /mnt
+		cp -af "$UPGRADE_BACKUP" "/mnt/$BACKUP_FILE"
+		umount /mnt
+	fi
+}

target/linux/apm821xx/config-5.4

@@ -0,0 +1,343 @@
+# CONFIG_40x is not set
+CONFIG_44x=y
+CONFIG_460EX=y
+CONFIG_4xx=y
+CONFIG_4xx_SOC=y
+# CONFIG_ADVANCED_OPTIONS is not set
+CONFIG_APM821xx=y
+CONFIG_APOLLO3G=y
+# CONFIG_ARCHES is not set
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_PMEM_API=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_MMAP_RND_BITS=11
+CONFIG_ARCH_MMAP_RND_BITS_MAX=17
+CONFIG_ARCH_MMAP_RND_BITS_MIN=11
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
+CONFIG_AUDIT_ARCH=y
+# CONFIG_BAMBOO is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_PM=y
+CONFIG_BLUESTONE=y
+CONFIG_BOOKE=y
+CONFIG_BOOKE_WDT=y
+# CONFIG_CANYONLANDS is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="rootfstype=squashfs noinitrd"
+CONFIG_CMDLINE_BOOL=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CRC16=y
+# CONFIG_CRC32_SARWATE is not set
+CONFIG_CRC32_SLICEBY8=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_CFB=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_DEV_PPC4XX=y
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_ESSIV=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MD5_PPC=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_SHA1_PPC=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_DATA_SHIFT=12
+CONFIG_DEBUG_MISC=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+# CONFIG_E200 is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EBONY is not set
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+# CONFIG_EIGER is not set
+CONFIG_ETEXT_SHIFT=12
+CONFIG_EXTRA_TARGETS="uImage"
+CONFIG_FIXED_PHY=y
+CONFIG_FORCE_PCI=y
+CONFIG_FREEZER=y
+# CONFIG_FSL_LBC is not set
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GCC_PLUGINS=y
+# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set
+# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
+# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_CPU=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+# CONFIG_GEN_RTC is not set
+# CONFIG_GLACIER is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_NVRAM_OPS=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FAST_GUP=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_KPROBES_ON_FTRACE=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MMU_GATHER_PAGE_SIZE=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_PPC4XX=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IBM_IIC=y
+CONFIG_IBM_EMAC=y
+CONFIG_IBM_EMAC_EMAC4=y
+CONFIG_IBM_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_EMAC_RGMII=y
+CONFIG_IBM_EMAC_RXB=128
+CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_EMAC_TAH=y
+CONFIG_IBM_EMAC_TXB=128
+# CONFIG_ICON is not set
+CONFIG_ILLEGAL_POINTER_VALUE=0
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_ISA_DMA_API=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_KATMAI is not set
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_LEDS_TRIGGER_MTD=y
+CONFIG_LEDS_TRIGGER_PATTERN=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_MATH_EMULATION is not set
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MIGRATION=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_NO_HZ=y
+CONFIG_NO_HZ_COMMON=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NR_IRQS=512
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND=y
+# CONFIG_OVERLAY_FS_XINO_AUTO is not set
+CONFIG_PACKING=y
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIE_PME=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_MSI=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYS_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_PLUGIN_HOSTCC="g++"
+CONFIG_PM=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_GC=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_PPC44x_SIMPLE=y
+CONFIG_PPC4xx_CPM=y
+CONFIG_PPC4xx_GPIO=y
+CONFIG_PPC4xx_MSI=y
+CONFIG_PPC4xx_PCI_EXPRESS=y
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_47x is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y
+CONFIG_PPC_ADV_DEBUG_DVCS=2
+CONFIG_PPC_ADV_DEBUG_IACS=4
+CONFIG_PPC_ADV_DEBUG_REGS=y
+# CONFIG_PPC_BOOK3S_601 is not set
+# CONFIG_PPC_BOOK3S_6xx is not set
+CONFIG_PPC_DCR=y
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set
+CONFIG_PPC_MMU_NOHASH=y
+CONFIG_PPC_MMU_NOHASH_32=y
+CONFIG_PPC_MSI_BITMAP=y
+CONFIG_PPC_PAGE_SHIFT=12
+# CONFIG_PPC_PTDUMP is not set
+CONFIG_PPC_UDBG_16550=y
+CONFIG_PPC_WERROR=y
+CONFIG_PTE_64BIT=y
+# CONFIG_RAINIER is not set
+CONFIG_RAS=y
+CONFIG_RSEQ=y
+# CONFIG_SAM440EP is not set
+# CONFIG_SCOM_DEBUGFS is not set
+# CONFIG_SEQUOIA is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SIMPLE_GPIO=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SRCU=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+# CONFIG_TAISHAN is not set
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_THREAD_INFO_IN_TASK=y
+CONFIG_THREAD_SHIFT=13
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TINY_SRCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_VDSO32=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
+# CONFIG_WARP is not set
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_XZ_DEC_POWERPC=y
+# CONFIG_YOSEMITE is not set
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y

target/linux/apm821xx/dts/apm82181.dtsi

@@ -0,0 +1,483 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Device Tree for Bluestone (APM821xx) board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri <tmarri@apm.com>
+ */
+
+#include <dt-bindings/dma/dw-dmac.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	dcr-parent = <&{/cpus/cpu@0}>;
+	compatible = "apm,bluestone";
+
+	aliases {
+		ethernet0 = &EMAC0; /* needed for BSP u-boot */
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			model = "PowerPC,apm82181";
+			reg = <0x00000000>;
+			clock-frequency = <0>; /* Filled in by U-Boot */
+			timebase-frequency = <0>; /* Filled in by U-Boot */
+			i-cache-line-size = <32>;
+			d-cache-line-size = <32>;
+			i-cache-size = <32768>;
+			d-cache-size = <32768>;
+			dcr-controller;
+			dcr-access-method = "native";
+			next-level-cache = <&L2C0>;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
+	};
+
+	UIC0: interrupt-controller0 {
+		compatible = "apm,uic-apm82181", "ibm,uic";
+		interrupt-controller;
+		cell-index = <0>;
+		dcr-reg = <0x0c0 0x009>;
+		#address-cells = <0>;
+		#size-cells = <0>;
+		#interrupt-cells = <2>;
+	};
+
+	UIC1: interrupt-controller1 {
+		compatible = "apm,uic-apm82181", "ibm,uic";
+		interrupt-controller;
+		cell-index = <1>;
+		dcr-reg = <0x0d0 0x009>;
+		#address-cells = <0>;
+		#size-cells = <0>;
+		#interrupt-cells = <2>;
+		interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
+			     <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+		interrupt-parent = <&UIC0>;
+	};
+
+	UIC2: interrupt-controller2 {
+		compatible = "apm,uic-apm82181", "ibm,uic";
+		interrupt-controller;
+		cell-index = <2>;
+		dcr-reg = <0x0e0 0x009>;
+		#address-cells = <0>;
+		#size-cells = <0>;
+		#interrupt-cells = <2>;
+		interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
+			     <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+		interrupt-parent = <&UIC0>;
+	};
+
+	UIC3: interrupt-controller3 {
+		compatible = "apm,uic-apm82181","ibm,uic";
+		interrupt-controller;
+		cell-index = <3>;
+		dcr-reg = <0x0f0 0x009>;
+		#address-cells = <0>;
+		#size-cells = <0>;
+		#interrupt-cells = <2>;
+		interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
+			     <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+		interrupt-parent = <&UIC0>;
+	};
+
+	OCM1: ocm@400040000 {
+		compatible = "apm,ocm-apm82181", "ibm,ocm";
+		status = "okay";
+		cell-index = <1>;
+		/* configured in U-Boot */
+		reg = <4 0x00040000 0x8000>; /* 32K */
+	};
+
+	SDR0: sdr {
+		compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
+		dcr-reg = <0x00e 0x002>;
+	};
+
+	CPR0: cpr {
+		compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
+		dcr-reg = <0x00c 0x002>;
+	};
+
+	L2C0: l2c {
+		compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
+		dcr-reg = <0x020 0x008
+			   0x030 0x008>;
+		cache-line-size = <32>;
+		cache-size = <262144>;
+		interrupt-parent = <&UIC1>;
+		interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
+	};
+
+	CPM0: cpm {
+		compatible = "ibm,cpm-apm821xx", "ibm,cpm";
+		cell-index = <0>;
+		dcr-reg = <0x160 0x003>;
+		pm-cpu = <0x02000000>;
+		pm-doze = <0x302570F0>;
+		pm-nap = <0x302570F0>;
+		pm-deepsleep = <0x302570F0>;
+		pm-iic-device = <&IIC0>;
+		pm-emac-device = <&EMAC0>;
+		unused-units = <0x00000100>;
+		idle-doze = <0x02000000>;
+		standby = <0xfeff791d>;
+	};
+
+	plb {
+		compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges; /* Filled in by U-Boot */
+		clock-frequency = <0>; /* Filled in by U-Boot */
+
+		SDRAM0: sdram {
+			compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
+			dcr-reg = <0x010 0x002>;
+		};
+
+		RTC: rtc {
+			compatible = "ibm,rtc";
+			dcr-reg = <0x240 0x009>;
+			interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-parent = <&UIC2>;
+			status = "disabled";
+		};
+
+		TRNG: trng@110000 {
+			compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
+			reg = <4 0x00110000 0x100>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		PKA: pka@114000 {
+			compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
+			reg = <4 0x00114000 0x4000>;
+			interrupt-parent = <&UIC0>;
+			interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
+			status = "disabled";
+		};
+
+		CRYPTO: crypto@180000 {
+			compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
+			reg = <4 0x00180000 0x80400>;
+			interrupt-parent = <&UIC0>;
+			interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled"; /* hardware option */
+		};
+
+		MAL0: mcmal {
+			compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
+			descriptor-memory = "ocm";
+			dcr-reg = <0x180 0x062>;
+			num-tx-chans = <1>;
+			num-rx-chans = <1>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			interrupt-parent = <&UIC2>;
+			interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
+				     <0x07 IRQ_TYPE_LEVEL_HIGH>,
+				     <0x03 IRQ_TYPE_LEVEL_HIGH>,
+				     <0x04 IRQ_TYPE_LEVEL_HIGH>,
+				     <0x05 IRQ_TYPE_LEVEL_HIGH>,
+				     <0x08 IRQ_TYPE_EDGE_FALLING>,
+				     <0x09 IRQ_TYPE_EDGE_FALLING>,
+				     <0x0c IRQ_TYPE_EDGE_FALLING>,
+				     <0x0d IRQ_TYPE_EDGE_FALLING>;
+			interrupt-names = "txeob", "rxeob", "serr",
+					  "txde", "rxde",
+					  "tx0coal", "tx1coal",
+					  "rx0coal", "rx1coal";
+		};
+
+		POB0: opb {
+			compatible = "ibm,opb-460ex", "ibm,opb";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
+			clock-frequency = <0>; /* Filled in by U-Boot */
+
+			EBC0: ebc {
+				compatible = "ibm,ebc-460ex", "ibm,ebc";
+				dcr-reg = <0x012 0x002>;
+				#address-cells = <2>;
+				#size-cells = <1>;
+				clock-frequency = <0>; /* Filled in by U-Boot */
+				/* ranges property is supplied by U-Boot */
+				ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
+				interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-parent = <&UIC1>;
+
+				nor_flash@0,0 {
+					compatible = "cfi-flash";
+					bank-width = <1>;
+					reg = <0x00000000 0x00000000 0x00100000>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					status = "disabled";
+				};
+
+				ndfc@1,0 {
+					compatible = "ibm,ndfc";
+					reg = <00000003 00000000 00002000>;
+					ccr = <0x00001000>;
+					bank-settings = <0x80002222>;
+					status = "disabled";
+
+					nand {
+						#address-cells = <1>;
+						#size-cells = <1>;
+					};
+				};
+			};
+
+			UART0: serial@ef600300 {
+				/*
+				 * AMCC's BSP u-boot scans for the "ns16550"
+				 * compatible, without it, u-boot wouldn't
+				 * set the required "clock-frequency".
+				 *
+				 * The hardware documentation states:
+				 * "Register compatibility with 16750 register set"
+				 */
+				compatible = "ns16750", "ns16550";
+				reg = <0xef600300 0x00000008>;
+				virtual-reg = <0xef600300>;
+				clock-frequency = <0>; /* Filled in by U-Boot */
+				interrupt-parent = <&UIC1>;
+				interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			UART1: serial@ef600400 {
+				/* same "ns16750" as with UART0 */
+				compatible = "ns16750", "ns16550";
+				reg = <0xef600400 0x00000008>;
+				virtual-reg = <0xef600400>;
+				clock-frequency = <0>; /* Filled in by U-Boot */
+				interrupt-parent = <&UIC0>;
+				interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			IIC0: i2c@ef600700 {
+				compatible = "ibm,iic-460ex", "ibm,iic";
+				reg = <0xef600700 0x00000014>;
+				interrupt-parent = <&UIC0>;
+				interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			IIC1: i2c@ef600800 {
+				compatible = "ibm,iic-460ex", "ibm,iic";
+				reg = <0xef600800 0x00000014>;
+				interrupt-parent = <&UIC0>;
+				interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			GPIO0: gpio@ef600b00 {
+				compatible = "ibm,ppc4xx-gpio";
+				reg = <0xef600b00 0x00000048>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				status = "disabled";
+			};
+
+			EMAC0: ethernet@ef600c00 {
+				device_type = "network";
+				compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
+				interrupt-parent = <&EMAC0>;
+				interrupts = <0 1>;
+				#interrupt-cells = <1>;
+				#address-cells = <0>;
+				#size-cells = <0>;
+				interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
+						<1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "status", "wake";
+
+				reg = <0xef600c00 0x000000c4>;
+				local-mac-address = [000000000000]; /* Filled in by U-Boot */
+				mal-device = <&MAL0>;
+				mal-tx-channel = <0>;
+				mal-rx-channel = <0>;
+				cell-index = <0>;
+				max-frame-size = <9000>;
+				rx-fifo-size = <16384>;
+				tx-fifo-size = <2048>;
+				phy-mode = "rgmii";
+				phy-map = <0x00000000>;
+				rgmii-device = <&RGMII0>;
+				rgmii-channel = <0>;
+				tah-device = <&TAH0>;
+				tah-channel = <0>;
+				has-inverted-stacr-oc;
+				has-new-stacr-staopc;
+				status = "disabled";
+			};
+
+			TAH0: emac-tah@ef601350 {
+				compatible = "ibm,tah-460ex", "ibm,tah";
+				reg = <0xef601350 0x00000030>;
+			};
+
+			RGMII0: emac-rgmii@ef601500 {
+				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
+				reg = <0xef601500 0x00000008>;
+				has-mdio;
+			};
+		};
+
+		USBOTG0: usbotg@bff80000 {
+			compatible = "amcc,dwc-otg";
+			reg = <4 0xbff80000 0x10000>;
+			interrupt-parent = <&USBOTG0>;
+			interrupts = <0 1 2>;
+			#interrupt-cells = <1>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
+					<1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
+					<2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "usb-otg", "high-power", "dma";
+			dr_mode = "host";
+			status = "disabled";
+		};
+
+		AHBDMA0: dma@bffd0800 {
+			compatible = "snps,dma-spear1340";
+			reg = <4 0xbffd0800 0x400>;
+			interrupt-parent = <&UIC0>;
+			interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <3>;
+
+			dma-channels = <2>;
+			dma-masters = <3>;
+			block_size = <4095>;
+			data-width = <4>, <4>, <4>;
+			multi-block = <1>, <1>;
+
+			chan_allocation_order = <1>;
+			chan_priority = <1>;
+
+			snps,dma-protection-control =
+				<(DW_DMAC_HPROT1_PRIVILEGED_MODE |
+				  DW_DMAC_HPROT2_BUFFERABLE)>;
+			is_memcpy;
+		};
+
+		SATA0: sata@bffd1000 {
+			compatible = "amcc,sata-460ex";
+			reg = <4 0xbffd1000 0x800>;
+			interrupt-parent = <&UIC0>;
+			interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
+			dmas = <&AHBDMA0 0 0 1>;
+			dma-names = "sata-dma";
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		SATA1: sata@bffd1800 {
+			compatible = "amcc,sata-460ex";
+			reg = <4 0xbffd1800 0x800>;
+			interrupt-parent = <&UIC0>;
+			interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
+			dmas = <&AHBDMA0 1 0 2>;
+			dma-names = "sata-dma";
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		MSI: ppc4xx-msi@c10000000 {
+			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+			reg = <0xc 0x10000000 0x100
+			       0xc 0x10000000 0x100>;
+			sdr-base = <0x36C>;
+			msi-data = <0x00004440>;
+			msi-mask = <0x0000ffe0>;
+			interrupts =<0 1 2 3 4 5 6 7>;
+			interrupt-parent = <&MSI>;
+			#interrupt-cells = <1>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			msi-available-ranges = <0x0 0x100>;
+			interrupt-map =
+				<0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
+				<1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
+				<2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
+				<3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
+				<4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
+				<5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
+				<6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
+				<7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
+			status = "disabled";
+		};
+
+		PCIE0: pciex@d00000000 {
+			device_type = "pci"; /* see ppc4xx_pci_find_bridge */
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
+			primary;
+			port = <0x0>; /* port number */
+			reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
+			      <0x0000000c 0x08010000 0x00001000>; /* Registers */
+			dcr-reg = <0x100 0x020>;
+			sdr-base = <0x300>;
+
+			/*
+			 * Outbound ranges, one memory and one IO,
+			 * later cannot be changed
+			 */
+			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
+				 <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
+				 <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
+
+			/* Inbound 2GB range starting at 0 */
+			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
+
+			/* This drives busses 0x40 to 0x7f */
+			bus-range = <0x40 0x7f>;
+
+			/*
+			 * Legacy interrupts (note the weird polarity, the bridge seems
+			 * to invert PCIe legacy interrupts).
+			 * We are de-swizzling here because the numbers are actually for
+			 * port of the root complex virtual P2P bridge. But I want
+			 * to avoid putting a node for it in the tree, so the numbers
+			 * below are basically de-swizzled numbers.
+			 * The real slot is on idsel 0, so the swizzling is 1:1
+			 */
+			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+			interrupt-map =
+				<0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
+				<0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
+				<0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
+				<0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */
+			status = "disabled";
+		};
+	};
+};

target/linux/apm821xx/dts/meraki-mr24.dts

@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Meraki MR24 (Ikarem)
+ *
+ * Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com>
+ *
+ * Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS
+ */
+
+/dts-v1/;
+
+#include "apm82181.dtsi"
+
+/ {
+	model = "Meraki MR24 Access Point";
+	compatible = "meraki,mr24", "meraki,ikarem", "apm,bluestone";
+
+	aliases {
+		serial0 = &UART1;
+		led-boot = &status;
+		led-failsafe = &failsafe;
+		led-running = &status;
+		led-upgrade = &status;
+	};
+
+	chosen {
+		stdout-path = "/plb/opb/serial@ef600400";
+	};
+};
+
+
+&CRYPTO {
+	status = "okay";
+};
+
+&PKA {
+	status = "okay";
+};
+
+&TRNG {
+	status = "okay";
+};
+
+&EBC0 {
+	/* Ikarem has 32MB of NAND */
+	ndfc@1,0 {
+		status = "okay";
+		/* 32 MiB NAND Flash */
+		nand {
+			partition@0 {
+				label = "u-boot";
+				reg = <0x00000000 0x00150000>;
+				read-only;
+			};
+
+			partition@150000 {
+				/*
+				 * The u-boot environment size is one NAND
+				 * block (16KiB). u-boot allocates four NAND
+				 * blocks (64KiB) in order to have spares
+				 * around for bad block management
+				 */
+				label = "u-boot-env";
+				reg = <0x00150000 0x00010000>;
+				read-only;
+			};
+
+			partition@160000 {
+				/*
+				 * redundant u-boot environment.
+				 * has to be kept it in sync with the
+				 * data in "u-boot-env".
+				 */
+				label = "u-boot-env-redundant";
+				reg = <0x00160000 0x00010000>;
+				read-only;
+			};
+
+			partition@170000 {
+				label = "oops";
+				reg = <0x00170000 0x00010000>;
+			};
+
+			partition@180000 {
+				label = "ubi";
+				reg = <0x00180000 0x01e80000>;
+			};
+		};
+	};
+};
+
+&UART1 {
+	status = "okay";
+};
+
+&GPIO0 {
+	status = "okay";
+};
+
+&IIC0 {
+	status = "okay";
+	/* Boot ROM is at 0x52-0x53, do not touch */
+	/* Unknown chip at 0x6e, not sure what it is */
+};
+
+&EMAC0 {
+	status = "okay";
+
+	phy-mode = "rgmii-id";
+	phy-map = <0x2>;
+	phy-address = <0x1>;
+	phy-handle = <&phy>;
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <1>;
+		};
+	};
+};
+
+&POB0 {
+	leds {
+		compatible = "gpio-leds";
+
+		status: power-green {
+			label = "mr24:green:power";
+			gpios = <&GPIO0 18 GPIO_ACTIVE_LOW>;
+		};
+
+		failsafe: power-orange {
+			label = "mr24:orange:power";
+			gpios = <&GPIO0 19 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "mr24:green:wan";
+			gpios = <&GPIO0 17 GPIO_ACTIVE_LOW>;
+		};
+
+		ssi-0 {
+			label = "mr24:green:wifi1";
+			gpios = <&GPIO0 23 GPIO_ACTIVE_LOW>;
+		};
+
+		ssi-1 {
+			label = "mr24:green:wifi2";
+			gpios = <&GPIO0 22 GPIO_ACTIVE_LOW>;
+		};
+
+		ssi-2 {
+			label = "mr24:green:wifi3";
+			gpios = <&GPIO0 21 GPIO_ACTIVE_LOW>;
+		};
+
+		ssi-3 {
+			label = "mr24:green:wifi4";
+			gpios = <&GPIO0 20 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			/* Label as per Meraki's "MR24 Installation Guide" */
+			label = "Factory Reset Button";
+			linux,code = <KEY_RESTART>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x15 IRQ_TYPE_EDGE_FALLING>;
+			gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&PCIE0 {
+	status = "okay";
+	/*
+	 * relevant lspci topology:
+	 *
+	 *	-+-[0000:40]---00.0-[41-7f]----00.0-[42-45]--+-02.0-[43]----00.0
+	 *	                                             +-03.0-[44]----00.0
+	 *
+	 */
+
+	bridge@64,0 {
+		reg = <0x00400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		bridge@65,0 {
+			/* IDT PES3T3 PCI Express Switch */
+			compatible = "pci111d,8039";
+			reg = <0x00410000 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges;
+
+			bridge@66,2 {
+				compatible = "pci111d,8039";
+				reg = <0x00421000 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				wifi0: wifi@67,0 {
+					/* Atheros AR9380 2.4GHz */
+					compatible = "pci168c,0030";
+					reg = <0x00430000 0 0 0 0>;
+					interrupts = <3>; /* INTC 4.1.1 */
+				};
+			};
+
+			bridge@66,3 {
+				compatible = "pci111d,8039";
+				reg = <0x00421800 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				wifi1: wifi@68,0 {
+					/* Atheros AR9380 5GHz */
+					compatible = "pci168c,0030";
+					reg = <0x00440000 0 0 0 0>;
+					interrupts = <4>; /* INTD 4.1.1 */
+				};
+			};
+		};
+	};
+};
+
+&MSI {
+	status = "okay";
+};

target/linux/apm821xx/dts/meraki-mx60.dts

@@ -0,0 +1,199 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Meraki MX60/MX60W (Buckminster)
+ *
+ * Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com>
+ *
+ * Based on Cisco Meraki DTS extracted from release wired-12-217818
+ */
+
+/dts-v1/;
+
+#include "apm82181.dtsi"
+
+/ {
+	model = "Meraki MX60/MX60W Security Appliance";
+	compatible = "meraki,mx60", "meraki,buckminster", "apm,bluestone";
+
+	aliases {
+		serial0 = &UART1;
+		led-boot = &status;
+		led-failsafe = &failsafe;
+		led-running = &status;
+		led-upgrade = &status;
+	};
+
+	chosen {
+		stdout-path = "/plb/opb/serial@ef600400";
+	};
+};
+
+&CRYPTO {
+	status = "okay";
+};
+
+&PKA {
+	status = "okay";
+};
+
+&TRNG {
+	status = "okay";
+};
+
+&USBOTG0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&EBC0 {
+	/* Buckminster has 1GiB of NAND */
+	ndfc@1,0 {
+		status = "okay";
+		nand {
+			partition@0 {
+				label = "u-boot";
+				reg = <0x00000000 0x00100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "u-boot-env";
+				reg = <0x00100000 0x00100000>;
+				read-only;
+			};
+
+			partition@200000 {
+				label = "oops";
+				reg = <0x00200000 0x00040000>;
+			};
+
+			partition@240000 {
+				label = "ubi";
+				reg = <0x00240000 0x3fdc0000>;
+			};
+		};
+	};
+};
+
+&UART1 {
+	status = "okay";
+};
+
+&GPIO0 {
+	status = "okay";
+};
+
+&IIC0 {
+	status = "okay";
+};
+
+&EMAC0 {
+	status = "okay";
+	phy-handle = <&phy0>;
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-id004d.d034";
+			reg = <0>;
+			qca,mib-poll-interval = <500>;
+
+			qca,ar8327-initvals = <
+				0x0010 0x40000000
+				0x0624 0x007f7f7f
+				0x0004 0x07a00000	/* PAD0_MODE */
+				0x000c 0x01000000	/* PAD6_MODE */
+				0x007c 0x0000007e	/* PORT0_STATUS */
+			>;
+		};
+	};
+};
+
+&POB0 {
+	leds {
+		compatible = "gpio-leds";
+
+		status: power-green {
+			label = "mx60:green:power";
+			gpios = <&GPIO0 18 GPIO_ACTIVE_LOW>;
+		};
+
+		failsafe: power-orange {
+			label = "mx60:orange:power";
+			gpios = <&GPIO0 19 GPIO_ACTIVE_LOW>;
+		};
+
+		wan-green {
+			label = "mx60:green:wan";
+			gpios = <&GPIO0 17 GPIO_ACTIVE_LOW>;
+		};
+
+		wan-orange {
+			label = "mx60:orange:wan";
+			gpios = <&GPIO0 15 GPIO_ACTIVE_LOW>;
+		};
+
+		lan1 {
+			label = "mx60:green:lan1";
+			gpios = <&GPIO0 20 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2 {
+			label = "mx60:green:lan2";
+			gpios = <&GPIO0 21 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3 {
+			label = "mx60:green:lan3";
+			gpios = <&GPIO0 22 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4 {
+			label = "mx60:green:lan4";
+			gpios = <&GPIO0 23 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x15 IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&PCIE0 {
+	/* Leave this enabled as u-boot on the MX60 will disable it for us */
+	status = "okay";
+
+	/*
+	 * relevant lspci topology:
+	 *
+	 *	-+-[0000:40]---00.0-[41-7f]----00.0
+	 */
+
+	bridge@64,0 {
+		reg = <0x00400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		wifi0: wifi@65,0 {
+			/* Atheros AR9380 2.4/5GHz */
+			compatible = "pci168c,0030";
+			reg = <0x00410000 0 0 0 0>;
+			interrupts = <1>; /* INTA */
+		};
+	};
+};
+
+&MSI {
+	status = "okay";
+};

target/linux/apm821xx/dts/netgear-wndap620.dts

@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/dts-v1/;
+
+#include "netgear-wndap6x0.dtsi"
+
+/ {
+	model = "Netgear WNDAP620";
+	compatible = "netgear,wndap620", "apm,bluestone";
+};
+
+&LEDS {
+	link1000 {
+		label = "wndap620:green:link1000";
+		gpios = <&GPIO0 9 GPIO_ACTIVE_HIGH>;
+	};
+
+	link100 {
+		label = "wndap620:amber:link100";
+		gpios = <&GPIO0 10 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&PCIE0 {
+	/*
+	 * relevant lspci topology:
+	 *
+	 *	-+-[0000:40]---00.0-[41-7f]----00.0
+	 */
+
+	bridge@64,0 {
+		reg = <0x00400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		wifi0: wifi@65,0 {
+			/* Atheros AR9380 5GHz */
+			compatible = "pci168c,0030";
+			reg = <0x00410000 0 0 0 0>;
+			interrupts = <1>; /* INTA */
+		};
+	};
+};

target/linux/apm821xx/dts/netgear-wndap660.dts

@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/dts-v1/;
+
+#include "netgear-wndap6x0.dtsi"
+
+/ {
+	model = "Netgear WNDAP660";
+	compatible = "netgear,wndap660", "apm,bluestone";
+};
+
+&LEDS {
+	lan1-link1000 {
+		label = "wndap660:green:lan1-link1000";
+		gpios = <&GPIO0 22 GPIO_ACTIVE_HIGH>;
+	};
+
+	lan1-link100 {
+		label = "wndap660:amber:lan1-link100";
+		gpios = <&GPIO0 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	lan2-link1000 {
+		label = "wndap660:green:lan2-link1000";
+		gpios = <&GPIO0 9 GPIO_ACTIVE_HIGH>;
+	};
+
+	lan2-link100 {
+		label = "wndap660:amber:lan2-link100";
+		gpios = <&GPIO0 10 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&PCIE0 {
+	/*
+	 * relevant lspci topology:
+	 *
+	 *	-+-[0000:40]---00.0-[41-7f]----00.0-[42-45]--+-02.0-[43]----00.0
+	 *	                                             +-03.0-[44]----00.0
+	 *
+	 */
+
+	bridge@64,0 {
+		reg = <0x00400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		bridge@65,0 {
+			/* IDT PES3T3 PCI Express Switch */
+			compatible = "pci111d,8039";
+			reg = <0x00410000 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges;
+
+			bridge@66,2 {
+				compatible = "pci111d,8039";
+				reg = <0x00421000 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				wifi0: wifi@67,0 {
+					/* Atheros AR9380 2.4/5GHz */
+					compatible = "pci168c,0030";
+					reg = <0x00430000 0 0 0 0>;
+					interrupts = <3>; /* INTC */
+				};
+			};
+
+			bridge@66,3 {
+				compatible = "pci111d,8039";
+				reg = <0x00421800 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+		                wifi1: wifi@68,0 {
+					/* Atheros AR9380 2.4/5GHz */
+					compatible = "pci168c,0030";
+					reg = <0x00440000 0 0 0 0>;
+					interrupts = <4>; /* INTD */
+				};
+			};
+		};
+	};
+};

target/linux/apm821xx/dts/netgear-wndap6x0.dtsi

@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Netgear WNDAP620 and WNDAP660
+ */
+
+#include "apm82181.dtsi"
+
+/ {
+	aliases {
+		serial0 = &UART0;
+		led-boot = &status;
+		led-failsafe = &failsafe;
+		led-running = &status;
+		led-upgrade = &status;
+	};
+
+	chosen {
+		stdout-path = "/plb/opb/serial@ef600300";
+	};
+};
+
+&CRYPTO {
+	status = "okay";
+};
+
+&PKA {
+	status = "okay";
+};
+
+&TRNG {
+	status = "okay";
+};
+
+&EBC0 {
+	ndfc@1,0 {
+		status = "okay";
+		/* 32 MiB SLC NAND Flash */
+		nand {
+			partition@0 {
+				label = "u-boot";
+				reg = <0x00000000 0x00100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "u-boot-env";
+				reg = <0x00100000 0x00010000>;
+				read-only;
+			};
+
+			partition@110000,0 {
+				label = "firmware";
+				reg = <0x00110000 0x01ac0000>;
+			};
+
+			partition@110000,1 {
+				/*
+				 * The u-boot bootloader will look at this
+				 * offset (0x110000) for an uImage binary.
+				 */
+				label = "kernel";
+				reg = <0x00110000 0x003f0000>;
+			};
+
+			partition@500000 {
+				label = "ubi";
+				reg = <0x00500000 0x016d0000>;
+			};
+
+			partition@1bd0000 {
+				/*
+				 * original vendor device-tree - do not use or
+				 * overwrite. The original u-boot also supports
+				 * the gzipped legacy monolithic/Multi-File Image
+				 * format, which is a better choice.
+				 */
+				label = "device-tree";
+				reg = <0x01bd0000 0x0010000>;
+				read-only;
+			};
+
+			partition@1be0000 {
+				label = "var";
+				reg = <0x01be0000 0x0400000>;
+				read-only;
+			};
+
+			partition@1fe0000 {
+				label = "manudata";
+				reg   = <0x01fe0000 0x20000 >;
+				read-only;
+			};
+		};
+	};
+};
+
+&UART0 {
+	status = "okay";
+};
+
+&GPIO0 {
+	status = "okay";
+};
+
+&EMAC0 {
+	status = "okay";
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+		pause;
+		asym-pause;
+	};
+
+	mdio0: mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
+
+&POB0 {
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset Button";
+			gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x15 IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+	};
+
+	LEDS: leds {
+		compatible = "gpio-leds";
+
+		status: power {
+			label = "wndap6x0:green:power";
+			gpios = <&GPIO0 18 GPIO_ACTIVE_HIGH>;
+		};
+
+		failsafe: test {
+			label = "wndap6x0:amber:test";
+			gpios = <&GPIO0 17 GPIO_ACTIVE_HIGH>;
+			panic-indicator;
+		};
+
+		activity {
+			label = "wndap6x0:green:activity";
+			gpios = <&GPIO0 21 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "wndap6x0:green:wlan2g";
+			gpios = <&GPIO0 19 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan5g {
+			label = "wndap6x0:green:wlan5g";
+			gpios = <&GPIO0 20 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+
+		internal-antenna {
+			gpio-export,name = "wndap6x0:internal-antenna";
+			gpio-export,output = <1>;
+			gpios = <&GPIO0 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		external-antenna {
+			gpio-export,name = "wndap6x0:external-antenna";
+			gpio-export,output = <0>;
+			gpios = <&GPIO0 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		mains-powered {
+			/*
+			 * Input pin describing what powers the AP
+			 * 0/Low = PoE
+			 * 1/High = 12v mains powered
+			 */
+			gpio-export,name = "wndap620:mains-powered";
+			gpios = <&GPIO0 3 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	rtl8367b {
+		compatible = "realtek,rtl8367b";
+		cpu_port = <5>;
+		realtek,extif0 = <1 2 1 1 1 1 1 1 2>;
+		mii-bus = <&mdio0>;
+	};
+};
+
+&PCIE0 {
+	status = "okay";
+};
+
+&MSI {
+	status = "okay";
+};
+
+&IIC0 {
+	status = "okay";
+
+	at24@52 {
+		compatible = "atmel,24c04";
+		reg = <0x52>;
+		pagesize = <16>;
+		read-only;
+	};
+};
+

target/linux/apm821xx/dts/netgear-wndr4700.dts

@@ -0,0 +1,519 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for Netgear WNDR4700/WNDR4720 Series
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ */
+
+/dts-v1/;
+
+#include "apm82181.dtsi"
+#include <dt-bindings/thermal/thermal.h>
+
+/ {
+	model = "Netgear WNDR4700/WNDR4720 Series";
+	compatible = "netgear,wndr4700", "apm,bluestone";
+
+	aliases {
+		serial0 = &UART0;
+		led-boot = &status;
+		led-failsafe = &failsafe;
+		led-running = &status;
+		led-upgrade = &status;
+	};
+
+	chosen {
+		stdout-path = "/plb/opb/serial@ef600300:115200n8";
+	};
+
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <10000>; /* milliseconds */
+			polling-delay = <20000>; /* milliseconds */
+
+			thermal-sensors = <&temp0 1>;
+
+			/*
+			 * REVISIT:
+			 *
+			 * Add the <&drive_temp>; sensor there and wire up
+			 * the coefficients = <1 1>; property.
+			 *
+			 * Note: The kernel does not yet support more than
+			 * one sensor (see of_thermal.c's function:
+			 * thermal_of_build_thermal_zon()). Once this is
+			 * implemented.
+			 */
+
+			trips {
+				/*
+				 * Once the thermal governers are a bit smarter
+				 * and do hysteresis properly, we can disable
+				 * the fan when the HDD and CPU has < 39 C.
+				 */
+				cpu_alert0: board-alert0 {
+					temperature = <25000>;
+					hysteresis = <2000>;
+					type = "active";
+				};
+
+				cpu_alert1: cpu-alert1 {
+					temperature = <27000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_alert2: cpu-alert2 {
+					temperature = <65000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_alert3: cpu-alert3 {
+					temperature = <70000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_alert4: cpu-alert4 {
+					temperature = <75000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_alert5: cpu-alert5 {
+					temperature = <80000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_alert6: cpu-alert6 {
+					temperature = <85000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "active";
+				};
+
+				cpu_crit: cpu-crit {
+					temperature = <90000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device = <&fan0 THERMAL_NO_LIMIT 0>;
+				};
+
+				map1 {
+					trip = <&cpu_alert1>;
+					cooling-device = <&fan0 1 76>;
+				};
+
+				map2 {
+					trip = <&cpu_alert2>;
+					cooling-device = <&fan0 77 101>;
+				};
+
+				map3 {
+					trip = <&cpu_alert3>;
+					cooling-device = <&fan0 102 147>;
+				};
+
+				map4 {
+					trip = <&cpu_alert4>;
+					cooling-device = <&fan0 148 207>;
+				};
+
+				map5 {
+					trip = <&cpu_alert5>;
+					cooling-device = <&fan0 208 231>;
+				};
+
+				map6 {
+					trip = <&cpu_alert6>;
+					cooling-device =<&fan0 232 THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
+};
+
+&CRYPTO {
+	status = "okay";
+};
+
+&PKA {
+	status = "okay";
+};
+
+&TRNG {
+	status = "okay";
+};
+
+&SATA1 {
+	status = "okay";
+
+	/*
+	 * This drive may have a temperature sensor with a
+	 * thermal zone we can use for thermal control of the
+	 * chassis temperature using the fan.
+	 */
+
+	drive_temp: sata-port@0 {
+		reg = <0>;
+		#thermal-sensor-cells = <0>;
+	};
+};
+
+&USBOTG0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&EBC0 {
+	ndfc@1,0 {
+		status = "okay";
+		/* 128 MiB Nand Flash */
+		nand {
+			partition0,0@0 {
+				label = "NAND 128MiB 3,3V 8-bit";
+				reg = <0x00000000 0x08000000>;
+				read-only;
+			};
+
+			partition0,1@0 {
+				label = "uboot";
+				reg = <0x00000000 0x00180000>;
+				read-only;
+			};
+
+			partition0,2@180000 {
+				label = "device-tree";
+				reg = <0x00180000 0x00020000>;
+			};
+
+			partition0,3@180000 {
+				label = "kernel";
+				reg = <0x00180000 0x00380000>;
+				/*
+				 * device-tree is @ 0x00180000 - 0x001fffff
+				 * kernel starts from 0x200000.
+				 * this is coded into netgear's u-boot.
+				 *
+				 * this partition will also contain a
+				 * fake/empty rootfs at the end to fool
+				 * Netgear's uboot rootfs integrety checks.
+				 */
+			};
+
+			partition0,4@500000 {
+				label = "ubi";
+				reg = <0x00500000 0x014e0000>;
+			};
+
+			partition0,5@19e0000 {
+				label = "config";
+				reg = <0x019e0000 0x00080000>;
+				read-only;
+			};
+
+			partition0,6@1a60000 {
+				label = "pot";
+				reg = <0x01a60000 0x00080000>;
+				read-only;
+			};
+
+			partition0,7@1ae0000 {
+				label = "traffic_meter";
+				reg = <0x01ae0000 0x00300000>;
+				read-only;
+			};
+
+			partition0,8@1de0000 {
+				label = "language";
+				reg = <0x01de0000 0x001c0000>;
+				read-only;
+			};
+
+			partition0,9@1fa0000 {
+				label = "ecos";
+				reg = <0x01fa0000 0x06020000>;
+				read-only;
+			};
+
+			partition0,10@7fc0000 {
+				label = "wifi_data";
+				reg = <0x07fc0000 0x00040000>;
+				read-only;
+			};
+
+			partition0,11@180000 {
+				label = "firmware";
+				reg = <0x00180000 0x01860000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&UART0 {
+	status = "okay";
+};
+
+&GPIO0 {
+	status = "okay";
+};
+
+&IIC0 {
+	status = "okay";
+
+	fan0: fan@1b {
+		compatible = "microchip,tc654";
+		reg = <0x1b>;
+		cooling-min-level = <0>;
+		cooling-max-level = <255>;
+		#cooling-cells = <2>; /* min followed by max */
+
+		gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>; /* fan status */
+		alarm-gpios = <&GPIO0 5 GPIO_ACTIVE_LOW>; /* fault */
+		interrupt-parent = <&UIC3>;
+		interrupts = <0x16 IRQ_TYPE_EDGE_FALLING>; /* fault */
+	};
+
+	temp0: temp@4d {
+		compatible = "gmt,g781";
+		reg = <0x4d>;
+		#thermal-sensor-cells = <1>;
+
+		/*
+		 * The LM90 has two sensors:
+		 *   temp0 -> internal to LM90
+		 *   temp1 -> external NTC near CPU
+		 */
+	};
+};
+
+
+&EMAC0 {
+	status = "okay";
+	phy-handle = <&phy0>;
+	fifo-entry-size = <10>;
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		phy0: ethernet-phy@0 {
+			device_type = "ethernet-phy";
+			reg = <0>;
+			qca,mib-poll-interval = <500>;
+
+			qca,ar8327-initvals = <
+				0x0010 0x40000000
+				0x0624 0x007f7f7f
+				0x0004 0x07a00000	/* PAD0_MODE */
+				0x000c 0x01000000	/* PAD6_MODE */
+				0x007c 0x0000007e	/* PORT0_STATUS */
+			>;
+		};
+	};
+};
+
+&POB0 {
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset button";
+			gpios = <&GPIO0 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x14 IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+
+		backup_hd {
+			label = "Backup HD button";
+			gpios = <&GPIO0 19 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x1e IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+
+		rfkill {
+			label = "RFKILL button";
+			gpios = <&GPIO0 20 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+			interrupt-parent = <&UIC1>;
+			interrupts = <0x1f IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+
+		wps {
+			label = "WPS button";
+			gpios = <&GPIO0 23 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+			interrupt-parent = <&UIC2>;
+			interrupts = <0x19 IRQ_TYPE_EDGE_FALLING>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		status: power-green {
+			label = "wndr4700:green:power";
+			gpios = <&GPIO0 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		failsafe: power-orange {
+			label = "wndr4700:orange:power";
+			gpios = <&GPIO0 9 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "panic";
+		};
+
+		usb-blue {
+			label = "wndr4700:blue:usb";
+			gpios = <&GPIO0 10 GPIO_ACTIVE_HIGH>;
+			trigger-sources = <&usb2_port 1>, <&usb2_port 2>,
+					  <&usb3_port 1>, <&usb3_port 2>;
+			linux,default-trigger = "usbport";
+		};
+
+		logo-white {
+			label = "wndr4700:white:logo";
+			gpios = <&GPIO0 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan-yellow {
+			label = "wndr4700:yellow:wan";
+			gpios = <&GPIO0 3 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan-green {
+			label = "wndr4700:green:wan";
+			gpios = <&GPIO0 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		hd-green {
+			label = "wndr4700:green:hd";
+			gpios = <&GPIO0 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "disk-activity";
+		};
+
+		hd-red {
+			label = "wndr4700:red:hd";
+			gpios = <&GPIO0 17 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan-blue {
+			label = "wndr4700:blue:wlan";
+			gpios = <&GPIO0 18 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&PCIE0 {
+	status = "okay";
+
+	/*
+	 * relevant lspci topology:
+	 *
+	 *	-+-[0000:40]---00.0-[41-7f]----00.0-[42-45]--+-02.0-[43]----00.0
+	 *	                                             +-03.0-[44]----00.0
+	 *	                                             \-04.0-[45]----00.0
+	 *
+	 */
+
+	bridge@64,0 {
+		reg = <0x00400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		bridge@65,0 {
+			/* IDT PES4T4 PCI Express Switch */
+			compatible = "pci111d,803a";
+			reg = <0x00410000 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges;
+
+			bridge@66,2 {
+				compatible = "pci111d,803a";
+				reg = <0x00421000 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				wifi0: wifi@67,0 {
+					/* Atheros AR9380 5GHz */
+					compatible = "pci168c,0030";
+					reg = <0x00430000 0 0 0 0>;
+					interrupts = <3>; /* INTC */
+					qca,no-eeprom;
+					/* wifi CAL & MAC is stored in nvram */
+
+					/*
+					 * Because this was such a pain.
+					 * Here's the full device path:
+					 * pci0000:40/0000:40:00.0/0000:41:00.0/0000:42:02.0/0000:43:00.0
+					 */
+				};
+			};
+
+			bridge@66,3 {
+				compatible = "pci111d,803a";
+				reg = <0x00421800 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				wifi1: wifi@68,0 {
+					/* Atheros AR9381 2.4GHz */
+					compatible = "pci168c,0033";
+					reg = <0x00440000 0 0 0 0>;
+					interrupts = <4>; /* INTD */
+					qca,no-eeprom;
+					/* wifi CAL & MAC is stored in nvram */
+				};
+			};
+
+			bridge@66,4 {
+				compatible = "pci111d,803a";
+				reg = <0x00422000 0 0 0 0>;
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				usb1: usb@69,0 {
+					/* Renesas uPD720202 */
+					compatible = "pci1912,0015";
+					reg = <0x00450000 0 0 0 0>;
+					interrupts = <1>; /* INTA */
+
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					usb2_port: port@1 {
+						reg = <1>;
+						#trigger-source-cells = <1>;
+					};
+
+					usb3_port: port@2 {
+						reg = <2>;
+						#trigger-source-cells = <1>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&MSI {
+	status = "okay";
+};

target/linux/apm821xx/dts/wd-mybooklive.dts

@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ * (c) Copyright 2010 Western Digital Technologies, Inc. All Rights Reserved.
+ */
+
+/dts-v1/;
+
+#include "apm82181.dtsi"
+
+/ {
+	compatible = "wd,mybooklive", "amcc,apollo3g";
+	model = "MyBook Live";
+
+	aliases {
+		serial0 = &UART0;
+		led-boot = &status;
+		led-failsafe = &status;
+		led-running = &status;
+		led-upgrade = &status;
+	};
+};
+
+&POB0 {
+	ebc {
+		nor_flash@0,0 {
+			status = "okay";
+			compatible = "amd,s29gl512n", "jedec-probe", "cfi-flash", "mtd-rom";
+			bank-width = <1>;
+			reg = <0x00000000 0x00000000 0x00080000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				/* Part of bootrom - Don't use it without a jump */
+				label = "free";
+				reg = <0x00000000 0x0001e000>;
+			};
+
+			partition@1e000 {
+				label = "env";
+				reg = <0x0001e000 0x00002000>;
+			};
+
+			partition@20000 {
+				label = "uboot";
+				reg = <0x00020000 0x00050000>;
+			};
+		};
+	};
+
+	GPIO1: gpio@e0000000 {
+		compatible = "wd,mbl-gpio", "ti,74273";
+		reg-names = "dat";
+		reg = <0xe0000000 0x1>;
+		#gpio-cells = <2>;
+		gpio-controller;
+
+		enable-button {
+			/* Defined in u-boot as: NOT_NOR
+			 * "enables features other than NOR
+			 * specifically, the buffer at CS2"
+			 * (button).
+			 *
+			 * Note: This option is disabled as
+			 * it prevents the system from being
+			 * rebooted successfully.
+			 */
+
+			gpio-hog;
+			line-name = "Enable Reset Button, disable NOR";
+			gpios = <1 GPIO_ACTIVE_HIGH>;
+			output-low;
+		};
+	};
+
+	GPIO2: gpio@e0100000 {
+		compatible = "wd,mbl-gpio", "ti,74244";
+		reg-names = "dat";
+		reg = <0xe0100000 0x1>;
+		#gpio-cells = <2>;
+		gpio-controller;
+		no-output;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		failsafe: power-red {
+			label = "mbl:red:power";
+			gpios = <&GPIO1 4 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "panic";
+		};
+
+		status: power-green {
+			label = "mbl:green:power";
+			gpios = <&GPIO1 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		power-blue {
+			label = "mbl:blue:power";
+			gpios = <&GPIO1 6 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "disk-activity";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <60>;	/* 3 * 20 = 60ms */
+		autorepeat;
+
+		reset-button {
+			label = "Reset button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&GPIO2 2 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	usbpwr: usb-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "Power USB Core";
+		gpios = <&GPIO1 2 GPIO_ACTIVE_LOW>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	sata1pwr: sata1-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "Power Drive Port 1";
+		gpios = <&GPIO1 3 GPIO_ACTIVE_LOW>;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-always-on; /* needed to read OS from HDD */
+	};
+
+	sata0pwr: sata0-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "Power Drive Port 0";
+		gpios = <&GPIO1 7 GPIO_ACTIVE_LOW>;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-always-on; /* needed to read OS from HDD */
+	};
+};
+
+&EMAC0 {
+	status = "okay";
+
+	phy-map = <0x2>;
+	phy-address = <0x1>;
+	phy-handle = <&phy>;
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reset-gpios = <&GPIO1 0 GPIO_ACTIVE_LOW>;
+
+		phy: phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <1>;
+		};
+	};
+};
+
+&CRYPTO {
+	status = "okay";
+};
+
+&PKA {
+	status = "okay";
+};
+
+&TRNG {
+	status = "okay";
+};
+
+&SATA0 {
+	status = "okay";
+
+	drive0: sata-port@0 {
+		reg = <0>;
+		#thermal-sensor-cells = <0>;
+	};
+};
+
+&SATA1 {
+	status = "okay";
+
+	drive1: sata-port@0 {
+		reg = <0>;
+		#thermal-sensor-cells = <0>;
+	};
+};
+
+&UART0 {
+	status = "okay";
+};
+
+&USBOTG0 {
+	status = "okay";
+	dr_mode = "host";
+	vbus-supply = <&usbpwr>;
+};

target/linux/apm821xx/image/Makefile

@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+DEVICE_VARS += DTB_SIZE
+
+define Build/boot-img
+	$(RM) -rf $@.bootdir
+	mkdir -p $@.bootdir/boot
+
+	$(CP) $@.scr $@.bootdir/boot/boot.scr
+	$(CP) $(IMAGE_KERNEL).dtb $@.bootdir/boot/$(DEVICE_DTB)
+	$(CP) $(IMAGE_KERNEL) $@.bootdir/boot/uImage
+
+	genext2fs --block-size $(BLOCKSIZE:%k=%Ki) \
+		--size-in-blocks $$((1024 * $(CONFIG_TARGET_KERNEL_PARTSIZE))) \
+		--root $@.bootdir $@.boot
+
+	# convert it to revision 1 - needed for u-boot ext2load
+	$(STAGING_DIR_HOST)/bin/tune2fs -O filetype $@.boot
+	$(STAGING_DIR_HOST)/bin/e2fsck -pDf $@.boot > /dev/null
+endef
+
+define Build/boot-script
+	$(STAGING_DIR_HOST)/bin/mkimage -A powerpc -T script -C none -n "$(PROFILE) Boot Script" \
+		-d mbl_boot.scr \
+		$@.scr
+endef
+
+define Build/copy-file
+	cat "$(1)" > "$@"
+endef
+
+define Build/dtb
+	$(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb,,--space $(DTB_SIZE))
+endef
+
+define Build/export-dtb
+	cp $(IMAGE_KERNEL).dtb $@
+endef
+
+define Build/MuImage-initramfs
+	rm -rf $@.fakerd $@.new
+
+	dd if=/dev/zero of=$@.fakerd bs=32 count=1 conv=sync
+
+	# Netgear used an old uboot that doesn't have FIT support.
+	# So we are stuck with either a full ext2/4 fs in a initrd.
+	# ... or we try to make the "multi" image approach to work
+	# for us.
+	#
+	# Sadly, the "multi" image has to consists of three
+	# "fixed" parts in the following "fixed" order:
+	# 1. The kernel which is in $@
+	# 2. The (fake) initrd which is in $@.fakerd
+	# 3. The device tree binary which is in $@.dtb
+	#
+	# Now, given that we use the function for the kernel which
+	# already has a initramfs image inside, we still have to
+	# add a "fake" initrd (which a mkimage header) in the second
+	# part of the legacy multi image. Since we need to put the
+	# device tree stuff into part 3.
+
+	-$(STAGING_DIR_HOST)/bin/mkimage -A $(LINUX_KARCH) -O linux -T multi \
+		-C $(1) -a $(KERNEL_LOADADDR) -e $(KERNEL_ENTRY) \
+		-n '$(BOARD_NAME) initramfs' -d $@:$@.fakerd:$@.dtb $@.new
+	mv $@.new $@
+	rm -rf $@.fakerd
+endef
+
+define Build/prepend-dtb
+	cat "$@.dtb.uimage" "$@" > "$@.new"
+	mv "$@.new" "$@"
+endef
+
+define Image/cpiogz
+	( cd $(TARGET_DIR); find . | cpio -o -H newc | gzip -9n >$(KDIR_TMP)/$(IMG_PREFIX)-rootfs.cpio.gz )
+endef
+
+define Device/Default
+  PROFILES := Default
+  KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts)
+  DEVICE_DTS :=
+  KERNEL_ENTRY := 0x00000000
+  KERNEL_LOADADDR := 0x00000000
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS = $(subst _,-,$(1))
+endef
+
+include $(SUBTARGET).mk
+
+$(eval $(call BuildImage))

target/linux/apm821xx/image/mbl_boot.scr

@@ -0,0 +1,6 @@
+setenv boot_args 'setenv bootargs root=/dev/sda2 rw rootfstype=squashfs,ext4'
+setenv load_part1 'ext2load sata 0:1 ${kernel_addr_r} /boot/uImage; ext2load sata 0:1 ${fdt_addr_r} /boot/apollo3g.dtb'
+setenv load_part2 'ext2load sata 1:1 ${kernel_addr_r} /boot/uImage; ext2load sata 1:1 ${fdt_addr_r} /boot/apollo3g.dtb'
+setenv load_sata 'sata init; if run load_part1; then echo Loaded part 1; elif run load_part2; then echo Loaded part 2; fi'
+setenv boot_sata 'run load_sata; run boot_args addtty; bootm ${kernel_addr_r} - ${fdt_addr_r}'
+run boot_sata

target/linux/apm821xx/image/mbl_gen_hdd_img.sh

@@ -0,0 +1,27 @@
+#!/bin/sh
+
+set -x
+[ $# -eq 5 ] || {
+    echo "SYNTAX: $0 <file> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
+    exit 1
+}
+
+OUTPUT="$1"
+BOOTFS="$2"
+ROOTFS="$3"
+BOOTFSSIZE="$4"
+ROOTFSSIZE="$5"
+
+head=4
+sect=63
+
+set $(ptgen -o $OUTPUT -h $head -s $sect -l 4096 -t 83 -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M)
+
+BOOTOFFSET="$(($1 / 512))"
+BOOTSIZE="$(($2 / 512))"
+ROOTFSOFFSET="$(($3 / 512))"
+ROOTFSSIZE="$(($4 / 512))"
+
+dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc
+dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc
+

target/linux/apm821xx/image/nand.mk

@@ -0,0 +1,121 @@
+define Build/create-uImage-dtb
+	# flat_dt target expect FIT image - which WNDR4700's uboot doesn't support
+	-$(STAGING_DIR_HOST)/bin/mkimage -A $(LINUX_KARCH) \
+		-O linux -T kernel -C none \
+		-n '$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION)' \
+		-d "$@.dtb" "$@.dtb.uimage"
+endef
+
+define Build/MerakiAdd-dtb
+	$(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb)
+	( \
+		dd if=$@.dtb bs=$(DTB_SIZE) conv=sync; \
+		cat $@ ; \
+	) > $@.new
+	@mv $@.new $@
+endef
+
+define Build/MerakiNAND
+	-$(STAGING_DIR_HOST)/bin/mkmerakifw \
+		-B $(BOARD_NAME) -s \
+		-i $@ \
+		-o $@.new
+	@cp $@.new $@
+endef
+
+
+define Device/meraki_mr24
+  DEVICE_VENDOR := Cisco Meraki
+  DEVICE_MODEL := MR24
+  DEVICE_PACKAGES := kmod-spi-gpio -swconfig
+  BOARD_NAME := mr24
+  IMAGES := sysupgrade.bin
+  DTB_SIZE := 64512
+  IMAGE_SIZE := 8191k
+  KERNEL := kernel-bin | lzma | uImage lzma | MerakiAdd-dtb | MerakiNAND
+  KERNEL_INITRAMFS := kernel-bin | lzma | dtb | MuImage-initramfs lzma
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  UBINIZE_OPTS := -E 5
+  SUPPORTED_DEVICES += mr24
+endef
+TARGET_DEVICES += meraki_mr24
+
+define Device/meraki_mx60
+  DEVICE_VENDOR := Cisco Meraki
+  DEVICE_MODEL := MX60/MX60W
+  DEVICE_PACKAGES := kmod-spi-gpio kmod-usb-ledtrig-usbport kmod-usb-dwc2 \
+		     kmod-usb-storage block-mount
+  BOARD_NAME := mx60
+  BLOCKSIZE := 63k
+  IMAGES := sysupgrade.bin
+  DTB_SIZE := 64512
+  IMAGE_SIZE := 1021m
+  KERNEL_SIZE := 4031k
+  KERNEL := kernel-bin | gzip | uImage gzip | MerakiAdd-dtb | MerakiNAND
+  KERNEL_INITRAMFS := kernel-bin | gzip | dtb | MuImage-initramfs gzip
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  UBINIZE_OPTS := -E 5
+  SUPPORTED_DEVICES += mx60
+endef
+TARGET_DEVICES += meraki_mx60
+
+define Device/netgear_wndap6x0
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_PACKAGES := kmod-eeprom-at24
+  SUBPAGESIZE := 256
+  PAGESIZE := 512
+  BLOCKSIZE := 16k
+  DTB_SIZE := 32768
+  IMAGE_SIZE := 27392k
+  IMAGES := sysupgrade.bin factory.img
+  KERNEL_SIZE := 4032k
+  KERNEL := dtb | kernel-bin | gzip | MuImage-initramfs gzip
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.img := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
+  UBINIZE_OPTS := -E 5
+endef
+
+define Device/netgear_wndap620
+  $(Device/netgear_wndap6x0)
+  DEVICE_MODEL := WNDAP620 (Premium Wireless-N)
+endef
+TARGET_DEVICES += netgear_wndap620
+
+define Device/netgear_wndap660
+  $(Device/netgear_wndap6x0)
+  DEVICE_MODEL := WNDAP660 (Dual Radio Dual Band Wireless-N)
+endef
+TARGET_DEVICES += netgear_wndap660
+
+define Device/netgear_wndr4700
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := Centria N900 WNDR4700/WNDR4720
+  DEVICE_PACKAGES := badblocks block-mount e2fsprogs kmod-hwmon-drivetemp \
+	kmod-dm kmod-fs-ext4 kmod-fs-vfat kmod-usb-ledtrig-usbport \
+	kmod-md-mod kmod-nls-cp437 kmod-nls-iso8859-1 kmod-nls-iso8859-15 \
+	kmod-nls-utf8 kmod-usb3 kmod-usb-dwc2 kmod-usb-storage \
+	partx-utils
+  BOARD_NAME := wndr4700
+  PAGESIZE := 2048
+  SUBPAGESIZE := 512
+  BLOCKSIZE := 128k
+  DTB_SIZE := 131008
+  IMAGE_SIZE := 24960k
+  IMAGES := factory.img sysupgrade.bin
+  ARTIFACTS := device-tree.dtb
+  KERNEL_SIZE := 3584k
+  # append a fake/empty rootfs to fool netgear's uboot
+  # CHECK_DNI_FIRMWARE_ROOTFS_INTEGRITY in do_chk_dniimg()
+  KERNEL := kernel-bin | lzma -d16 | uImage lzma | pad-offset $$(BLOCKSIZE) 64 | \
+	    append-uImage-fakehdr filesystem | dtb | create-uImage-dtb | prepend-dtb
+  KERNEL_INITRAMFS := kernel-bin | gzip | dtb | MuImage-initramfs gzip
+  IMAGE/factory.img := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | \
+		       netgear-dni | check-size
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  ARTIFACT/device-tree.dtb := export-dtb | uImage none
+  NETGEAR_BOARD_ID := WNDR4700
+  NETGEAR_HW_ID := 29763875+128+256
+  UBINIZE_OPTS := -E 5
+  SUPPORTED_DEVICES += wndr4700
+endef
+TARGET_DEVICES += netgear_wndr4700

target/linux/apm821xx/image/sata.mk

@@ -0,0 +1,24 @@
+define Build/hdd-img
+	./mbl_gen_hdd_img.sh $@ $@.boot $(IMAGE_ROOTFS) $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE)
+endef
+
+
+define Device/wd_mybooklive
+  DEVICE_VENDOR := Western Digital
+  DEVICE_MODEL := My Book Live Series (Single + Duo)
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport kmod-usb-storage kmod-fs-vfat wpad-basic-wolfssl
+  SUPPORTED_DEVICES += mbl wd,mybooklive-duo
+  BLOCKSIZE := 1k
+  DTB_SIZE := 16384
+  KERNEL := kernel-bin | dtb | gzip | uImage gzip
+  KERNEL_INITRAMFS := kernel-bin | gzip | dtb | MuImage-initramfs gzip
+  IMAGES := factory.img.gz sysupgrade.img.gz
+  ARTIFACTS := apollo3g.dtb
+  DEVICE_DTB := apollo3g.dtb
+  FILESYSTEMS := ext4 squashfs
+  IMAGE/factory.img.gz := boot-script | boot-img | hdd-img | gzip
+  IMAGE/sysupgrade.img.gz := boot-script | boot-img | hdd-img | gzip | append-metadata
+  ARTIFACT/apollo3g.dtb := export-dtb
+endef
+
+TARGET_DEVICES += wd_mybooklive

target/linux/apm821xx/nand/config-default

@@ -0,0 +1,49 @@
+CONFIG_AT803X_PHY=y
+CONFIG_AR8216_PHY=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DW_DMAC_CORE=y
+CONFIG_DW_DMAC=y
+# CONFIG_SATA_DWC_OLD_DMA is not set
+# CONFIG_DW_DMAC_PCI is not set
+CONFIG_IKAREM=y
+CONFIG_ATA=y
+CONFIG_ATA_SFF=y
+CONFIG_ATA_BMDMA=y
+# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set
+CONFIG_SATA_PMP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_SATA_DWC=y
+# CONFIG_SATA_DWC_DEBUG is not set
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M48T86=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_OF=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_HWMON=y
+CONFIG_SENSORS_GPIO_FAN=y
+CONFIG_CMDLINE="rootfstype=squashfs noinitrd"
+CONFIG_MTD_NAND_ECC_SW_BCH=y
+CONFIG_MTD_NAND_NDFC=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367B_PHY=y
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_TC654=y
+CONFIG_SWCONFIG=y
+CONFIG_SWCONFIG_LEDS=y
+

target/linux/apm821xx/nand/profiles/00-default.mk

@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2011 OpenWrt.org
+
+define Profile/Default
+  NAME:=Default Profile
+  PRIORITY:=1
+  PACKAGES := badblocks block-mount e2fsprogs \
+	kmod-dm kmod-fs-ext4 kmod-fs-vfat kmod-usb-ledtrig-usbport \
+	kmod-md-mod kmod-nls-cp437 kmod-nls-iso8859-1 kmod-nls-iso8859-15 \
+	kmod-nls-utf8 kmod-usb3 kmod-usb-dwc2 kmod-usb-storage \
+	kmod-spi-gpio partx-utils
+endef
+
+define Profile/Default/Description
+	Default package set
+endef
+
+$(eval $(call Profile,Default))

target/linux/apm821xx/nand/target.mk

@@ -0,0 +1,9 @@
+BOARDNAME:=Devices with NAND flash (Routers)
+FEATURES += nand pcie
+
+DEFAULT_PACKAGES += kmod-ath9k swconfig wpad-basic-wolfssl
+
+define Target/Description
+	Build firmware images for APM821XX boards with NAND flash.
+	For routers like the MR24 or the WNDR4700.
+endef

target/linux/apm821xx/patches-5.4/111-crypto-crypto4xx-reduce-memory-fragmentation.patch

@@ -0,0 +1,99 @@
+From 3913dbe4b3256ead342572f7aba726a60ab5fd43 Mon Sep 17 00:00:00 2001
+Message-Id: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Wed, 1 Jan 2020 22:28:28 +0100
+Subject: [PATCH 1/2] crypto: crypto4xx - reduce memory fragmentation
+To: linux-crypto@vger.kernel.org
+Cc: Herbert Xu <herbert@gondor.apana.org.au>
+
+With recent kernels (>5.2), the driver fails to probe, as the
+allocation of the driver's scatter buffer fails with -ENOMEM.
+
+This happens in crypto4xx_build_sdr(). Where the driver tries
+to get 512KiB (=PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD) of
+continuous memory. This big chunk is by design, since the driver
+uses this circumstance in the crypto4xx_copy_pkt_to_dst() to
+its advantage:
+"all scatter-buffers are all neatly organized in one big
+continuous ringbuffer; So scatterwalk_map_and_copy() can be
+instructed to copy a range of buffers in one go."
+
+The PowerPC arch does not have support for DMA_CMA. Hence,
+this patch reorganizes the order in which the memory
+allocations are done. Since the driver itself is responsible
+for some of the issues.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/crypto/amcc/crypto4xx_core.c | 27 +++++++++++++--------------
+ 1 file changed, 13 insertions(+), 14 deletions(-)
+
+--- a/drivers/crypto/amcc/crypto4xx_core.c
++++ b/drivers/crypto/amcc/crypto4xx_core.c
+@@ -286,7 +286,8 @@ static u32 crypto4xx_build_gdr(struct cr
+ 
+ static inline void crypto4xx_destroy_gdr(struct crypto4xx_device *dev)
+ {
+-	dma_free_coherent(dev->core_dev->device,
++	if (dev->gdr)
++		dma_free_coherent(dev->core_dev->device,
+ 			  sizeof(struct ce_gd) * PPC4XX_NUM_GD,
+ 			  dev->gdr, dev->gdr_pa);
+ }
+@@ -354,13 +355,6 @@ static u32 crypto4xx_build_sdr(struct cr
+ {
+ 	int i;
+ 
+-	/* alloc memory for scatter descriptor ring */
+-	dev->sdr = dma_alloc_coherent(dev->core_dev->device,
+-				      sizeof(struct ce_sd) * PPC4XX_NUM_SD,
+-				      &dev->sdr_pa, GFP_ATOMIC);
+-	if (!dev->sdr)
+-		return -ENOMEM;
+-
+ 	dev->scatter_buffer_va =
+ 		dma_alloc_coherent(dev->core_dev->device,
+ 			PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
+@@ -368,6 +362,13 @@ static u32 crypto4xx_build_sdr(struct cr
+ 	if (!dev->scatter_buffer_va)
+ 		return -ENOMEM;
+ 
++	/* alloc memory for scatter descriptor ring */
++	dev->sdr = dma_alloc_coherent(dev->core_dev->device,
++				      sizeof(struct ce_sd) * PPC4XX_NUM_SD,
++				      &dev->sdr_pa, GFP_ATOMIC);
++	if (!dev->sdr)
++		return -ENOMEM;
++
+ 	for (i = 0; i < PPC4XX_NUM_SD; i++) {
+ 		dev->sdr[i].ptr = dev->scatter_buffer_pa +
+ 				  PPC4XX_SD_BUFFER_SIZE * i;
+@@ -1439,16 +1440,15 @@ static int crypto4xx_probe(struct platfo
+ 	spin_lock_init(&core_dev->lock);
+ 	INIT_LIST_HEAD(&core_dev->dev->alg_list);
+ 	ratelimit_default_init(&core_dev->dev->aead_ratelimit);
++	rc = crypto4xx_build_sdr(core_dev->dev);
++	if (rc)
++		goto err_build_sdr;
+ 	rc = crypto4xx_build_pdr(core_dev->dev);
+ 	if (rc)
+-		goto err_build_pdr;
++		goto err_build_sdr;
+ 
+ 	rc = crypto4xx_build_gdr(core_dev->dev);
+ 	if (rc)
+-		goto err_build_pdr;
+-
+-	rc = crypto4xx_build_sdr(core_dev->dev);
+-	if (rc)
+ 		goto err_build_sdr;
+ 
+ 	/* Init tasklet for bottom half processing */
+@@ -1493,7 +1493,6 @@ err_iomap:
+ err_build_sdr:
+ 	crypto4xx_destroy_sdr(core_dev->dev);
+ 	crypto4xx_destroy_gdr(core_dev->dev);
+-err_build_pdr:
+ 	crypto4xx_destroy_pdr(core_dev->dev);
+ 	kfree(core_dev->dev);
+ err_alloc_dev:

target/linux/apm821xx/patches-5.4/112-crypto-crypto4xx-use-GFP_KERNEL-for-big-allocations.patch

@@ -0,0 +1,72 @@
+From 5bacaaea8a228bc46f402595b1694ef9128f3599 Mon Sep 17 00:00:00 2001
+Message-Id: <5bacaaea8a228bc46f402595b1694ef9128f3599.1577917078.git.chunkeey@gmail.com>
+In-Reply-To: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+References: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Wed, 1 Jan 2020 22:54:54 +0100
+Subject: [PATCH 2/2] crypto: crypto4xx - use GFP_KERNEL for big allocations
+To: linux-crypto@vger.kernel.org
+Cc: Herbert Xu <herbert@gondor.apana.org.au>
+
+The driver should use GFP_KERNEL for the bigger allocation
+during the driver's crypto4xx_probe() and not GFP_ATOMIC in
+my opinion.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/crypto/amcc/crypto4xx_core.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/crypto/amcc/crypto4xx_core.c
++++ b/drivers/crypto/amcc/crypto4xx_core.c
+@@ -169,7 +169,7 @@ static u32 crypto4xx_build_pdr(struct cr
+ 	int i;
+ 	dev->pdr = dma_alloc_coherent(dev->core_dev->device,
+ 				      sizeof(struct ce_pd) * PPC4XX_NUM_PD,
+-				      &dev->pdr_pa, GFP_ATOMIC);
++				      &dev->pdr_pa, GFP_KERNEL);
+ 	if (!dev->pdr)
+ 		return -ENOMEM;
+ 
+@@ -185,13 +185,13 @@ static u32 crypto4xx_build_pdr(struct cr
+ 	dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device,
+ 				   sizeof(union shadow_sa_buf) * PPC4XX_NUM_PD,
+ 				   &dev->shadow_sa_pool_pa,
+-				   GFP_ATOMIC);
++				   GFP_KERNEL);
+ 	if (!dev->shadow_sa_pool)
+ 		return -ENOMEM;
+ 
+ 	dev->shadow_sr_pool = dma_alloc_coherent(dev->core_dev->device,
+ 			 sizeof(struct sa_state_record) * PPC4XX_NUM_PD,
+-			 &dev->shadow_sr_pool_pa, GFP_ATOMIC);
++			 &dev->shadow_sr_pool_pa, GFP_KERNEL);
+ 	if (!dev->shadow_sr_pool)
+ 		return -ENOMEM;
+ 	for (i = 0; i < PPC4XX_NUM_PD; i++) {
+@@ -277,7 +277,7 @@ static u32 crypto4xx_build_gdr(struct cr
+ {
+ 	dev->gdr = dma_alloc_coherent(dev->core_dev->device,
+ 				      sizeof(struct ce_gd) * PPC4XX_NUM_GD,
+-				      &dev->gdr_pa, GFP_ATOMIC);
++				      &dev->gdr_pa, GFP_KERNEL);
+ 	if (!dev->gdr)
+ 		return -ENOMEM;
+ 
+@@ -358,14 +358,14 @@ static u32 crypto4xx_build_sdr(struct cr
+ 	dev->scatter_buffer_va =
+ 		dma_alloc_coherent(dev->core_dev->device,
+ 			PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
+-			&dev->scatter_buffer_pa, GFP_ATOMIC);
++			&dev->scatter_buffer_pa, GFP_KERNEL);
+ 	if (!dev->scatter_buffer_va)
+ 		return -ENOMEM;
+ 
+ 	/* alloc memory for scatter descriptor ring */
+ 	dev->sdr = dma_alloc_coherent(dev->core_dev->device,
+ 				      sizeof(struct ce_sd) * PPC4XX_NUM_SD,
+-				      &dev->sdr_pa, GFP_ATOMIC);
++				      &dev->sdr_pa, GFP_KERNEL);
+ 	if (!dev->sdr)
+ 		return -ENOMEM;
+ 

target/linux/apm821xx/patches-5.4/201-add-amcc-apollo3g-support.patch

@@ -0,0 +1,30 @@
+--- a/arch/powerpc/platforms/44x/Kconfig
++++ b/arch/powerpc/platforms/44x/Kconfig
+@@ -121,6 +121,17 @@ config CANYONLANDS
+ 	help
+ 	  This option enables support for the AMCC PPC460EX evaluation board.
+ 
++config APOLLO3G
++	bool "Apollo3G"
++	depends on 44x
++	default n
++	select PPC44x_SIMPLE
++	select APM821xx
++	select IBM_EMAC_RGMII
++	select 460EX
++	help
++	  This option enables support for the AMCC Apollo 3G board.
++
+ config GLACIER
+ 	bool "Glacier"
+ 	depends on 44x
+--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
++++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
+@@ -47,6 +47,7 @@ machine_device_initcall(ppc44x_simple, p
+  * board.c file for it rather than adding it to this list.
+  */
+ static char *board[] __initdata = {
++	"amcc,apollo3g",
+ 	"amcc,arches",
+ 	"amcc,bamboo",
+ 	"apm,bluestone",

target/linux/apm821xx/patches-5.4/300-fix-atheros-nics-on-apm82181.patch

@@ -0,0 +1,51 @@
+--- a/arch/powerpc/platforms/4xx/pci.c
++++ b/arch/powerpc/platforms/4xx/pci.c
+@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po
+ 	u32 val;
+ 
+ 	/*
+-	 * Do a software reset on PCIe ports.
+-	 * This code is to fix the issue that pci drivers doesn't re-assign
+-	 * bus number for PCIE devices after Uboot
+-	 * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
+-	 * PT quad port, SAS LSI 1064E)
++	 * Only reset the PHY when no link is currently established.
++	 * This is for the Atheros PCIe board which has problems to establish
++	 * the link (again) after this PHY reset. All other currently tested
++	 * PCIe boards don't show this problem.
+ 	 */
+-
+-	mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
+-	mdelay(10);
++	val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
++	if (!(val & 0x00001000)) {
++		/*
++		 * Do a software reset on PCIe ports.
++		 * This code is to fix the issue that pci drivers doesn't re-assign
++		 * bus number for PCIE devices after Uboot
++		 * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
++		 * PT quad port, SAS LSI 1064E)
++		 */
++
++		mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
++		mdelay(10);
++	}
+ 
+ 	if (port->endpoint)
+ 		val = PTYPE_LEGACY_ENDPOINT << 20;
+@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po
+ 	mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
+ 	mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
+ 
+-	mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
+-	mdelay(50);
+-	mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
++	val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
++	if (!(val & 0x00001000)) {
++		mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
++		mdelay(50);
++		mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
++	}
+ 
+ 	mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
+ 		mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |

target/linux/apm821xx/patches-5.4/301-fix-memory-map-wndr4700.patch

@@ -0,0 +1,14 @@
+--- a/arch/powerpc/platforms/4xx/pci.c
++++ b/arch/powerpc/platforms/4xx/pci.c
+@@ -1902,9 +1902,9 @@ static void __init ppc4xx_configure_pcie
+ 		 * if it works
+ 		 */
+ 		out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
+-		out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
++		out_le32(mbase + PECFG_PIM0LAH, 0x00000008);
+ 		out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
+-		out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
++		out_le32(mbase + PECFG_PIM1LAH, 0x0000000c);
+ 		out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
+ 		out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+ 

target/linux/apm821xx/patches-5.4/802-usb-xhci-force-msi-renesas-xhci.patch

@@ -0,0 +1,53 @@
+From a0dc613140bab907a3d5787a7ae7b0638bf674d0 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Thu, 23 Jun 2016 20:28:20 +0200
+Subject: [PATCH] usb: xhci: force MSI for uPD720201 and
+ uPD720202
+
+The APM82181 does not support MSI-X. When probed, it will
+produce a noisy warning.
+
+---
+ drivers/usb/host/pci-quirks.c | 362 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 362 insertions(+)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -286,6 +286,7 @@ static void xhci_pci_quirks(struct devic
+ 	    pdev->device == 0x0015) {
+ 		xhci->quirks |= XHCI_RESET_ON_RESUME;
+ 		xhci->quirks |= XHCI_ZERO_64B_REGS;
++		xhci->quirks |= XHCI_FORCE_MSI;
+ 	}
+ 	if (pdev->vendor == PCI_VENDOR_ID_VIA)
+ 		xhci->quirks |= XHCI_RESET_ON_RESUME;
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -423,10 +423,14 @@ static int xhci_try_enable_msi(struct us
+ 		free_irq(hcd->irq, hcd);
+ 	hcd->irq = 0;
+ 
+-	ret = xhci_setup_msix(xhci);
+-	if (ret)
+-		/* fall back to msi*/
++	if (xhci->quirks & XHCI_FORCE_MSI) {
+ 		ret = xhci_setup_msi(xhci);
++	} else {
++		ret = xhci_setup_msix(xhci);
++		if (ret)
++			/* fall back to msi*/
++			ret = xhci_setup_msi(xhci);
++	}
+ 
+ 	if (!ret) {
+ 		hcd->msi_enabled = 1;
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1883,6 +1883,7 @@ struct xhci_hcd {
+ 	struct xhci_hub		usb2_rhub;
+ 	struct xhci_hub		usb3_rhub;
+ 	/* support xHCI 1.0 spec USB2 hardware LPM */
++#define XHCI_FORCE_MSI		(1 << 24)
+ 	unsigned		hw_lpm_support:1;
+ 	/* Broken Suspend flag for SNPS Suspend resume issue */
+ 	unsigned		broken_suspend:1;

target/linux/apm821xx/patches-5.4/803-hwmon-tc654-add-detection-routine.patch

@@ -0,0 +1,65 @@
+From 694f9bfb8efaef8a33e8992015ff9d0866faf4a2 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 17 Dec 2017 17:27:15 +0100
+Subject: [PATCH 1/2] hwmon: tc654 add detection routine
+
+This patch adds a detection routine for the TC654/TC655
+chips.  Both IDs are listed in the Datasheet.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/hwmon/tc654.c | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+--- a/drivers/hwmon/tc654.c
++++ b/drivers/hwmon/tc654.c
+@@ -55,6 +55,11 @@ enum tc654_regs {
+ /* Register data is read (and cached) at most once per second. */
+ #define TC654_UPDATE_INTERVAL		HZ
+ 
++/* Manufacturer and Version Identification Register Values */
++#define TC654_MFR_ID_MICROCHIP		0x84
++#define TC654_VER_ID			0x00
++#define TC655_VER_ID			0x01
++
+ struct tc654_data {
+ 	struct i2c_client *client;
+ 
+@@ -482,6 +487,29 @@ static const struct i2c_device_id tc654_
+ 	{}
+ };
+ 
++static int
++tc654_detect(struct i2c_client *new_client, struct i2c_board_info *info)
++{
++	struct i2c_adapter *adapter = new_client->adapter;
++	int manufacturer, product;
++
++	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
++		return -ENODEV;
++
++	manufacturer = i2c_smbus_read_byte_data(new_client, TC654_REG_MFR_ID);
++	if (manufacturer != TC654_MFR_ID_MICROCHIP)
++		return -ENODEV;
++
++	product = i2c_smbus_read_byte_data(new_client, TC654_REG_VER_ID);
++	if (!((product == TC654_VER_ID) || (product == TC655_VER_ID)))
++		return -ENODEV;
++
++	strlcpy(info->type, product == TC654_VER_ID ? "tc654" : "tc655",
++		I2C_NAME_SIZE);
++	return 0;
++}
++
++
+ MODULE_DEVICE_TABLE(i2c, tc654_id);
+ 
+ static struct i2c_driver tc654_driver = {
+@@ -490,6 +518,7 @@ static struct i2c_driver tc654_driver =
+ 		   },
+ 	.probe = tc654_probe,
+ 	.id_table = tc654_id,
++	.detect = tc654_detect,
+ };
+ 
+ module_i2c_driver(tc654_driver);

target/linux/apm821xx/patches-5.4/804-hwmon-tc654-add-thermal_cooling-device.patch

@@ -0,0 +1,174 @@
+From 9cb27801b5cbad2e1aaf45aac428cb2fac5e1372 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 17 Dec 2017 17:29:13 +0100
+Subject: [PATCH] hwmon: tc654: add thermal_cooling device
+
+This patch adds a thermaL_cooling device to the tc654 driver.
+This allows the chip to be used for DT-based cooling.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/hwmon/tc654.c | 103 +++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 86 insertions(+), 17 deletions(-)
+
+--- a/drivers/hwmon/tc654.c
++++ b/drivers/hwmon/tc654.c
+@@ -15,6 +15,7 @@
+ #include <linux/module.h>
+ #include <linux/mutex.h>
+ #include <linux/slab.h>
++#include <linux/thermal.h>
+ #include <linux/util_macros.h>
+ 
+ enum tc654_regs {
+@@ -132,6 +133,9 @@ struct tc654_data {
+ 			 * writable register used to control the duty
+ 			 * cycle of the V OUT output.
+ 			 */
++
++	/* optional cooling device */
++	struct thermal_cooling_device *cdev;
+ };
+ 
+ /* helper to grab and cache data, at most one time per second */
+@@ -367,36 +371,30 @@ static ssize_t pwm_mode_store(struct dev
+ static const int tc654_pwm_map[16] = { 77,  88, 102, 112, 124, 136, 148, 160,
+ 				      172, 184, 196, 207, 219, 231, 243, 255};
+ 
++static int get_pwm(struct tc654_data *data)
++{
++	if (data->config & TC654_REG_CONFIG_SDM)
++		return 0;
++	else
++		return tc654_pwm_map[data->duty_cycle];
++}
++
+ static ssize_t pwm_show(struct device *dev, struct device_attribute *da,
+ 			char *buf)
+ {
+ 	struct tc654_data *data = tc654_update_client(dev);
+-	int pwm;
+ 
+ 	if (IS_ERR(data))
+ 		return PTR_ERR(data);
+ 
+-	if (data->config & TC654_REG_CONFIG_SDM)
+-		pwm = 0;
+-	else
+-		pwm = tc654_pwm_map[data->duty_cycle];
+-
+-	return sprintf(buf, "%d\n", pwm);
++	return sprintf(buf, "%d\n", get_pwm(data));
+ }
+ 
+-static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
+-			 const char *buf, size_t count)
++static int _set_pwm(struct tc654_data *data, unsigned long val)
+ {
+-	struct tc654_data *data = dev_get_drvdata(dev);
+ 	struct i2c_client *client = data->client;
+-	unsigned long val;
+ 	int ret;
+ 
+-	if (kstrtoul(buf, 10, &val))
+-		return -EINVAL;
+-	if (val > 255)
+-		return -EINVAL;
+-
+ 	mutex_lock(&data->update_lock);
+ 
+ 	if (val == 0)
+@@ -416,6 +414,22 @@ static ssize_t pwm_store(struct device *
+ 
+ out:
+ 	mutex_unlock(&data->update_lock);
++	return ret;
++}
++
++static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
++		       const char *buf, size_t count)
++{
++	struct tc654_data *data = dev_get_drvdata(dev);
++	unsigned long val;
++	int ret;
++
++	if (kstrtoul(buf, 10, &val))
++		return -EINVAL;
++	if (val > 255)
++		return -EINVAL;
++
++	ret = _set_pwm(data, val);
+ 	return ret < 0 ? ret : count;
+ }
+ 
+@@ -447,6 +461,47 @@ static struct attribute *tc654_attrs[] =
+ 
+ ATTRIBUTE_GROUPS(tc654);
+ 
++/* cooling device */
++
++static int tc654_get_max_state(struct thermal_cooling_device *cdev,
++			       unsigned long *state)
++{
++	*state = 255;
++	return 0;
++}
++
++static int tc654_get_cur_state(struct thermal_cooling_device *cdev,
++                              unsigned long *state)
++{
++	struct tc654_data *data = tc654_update_client(cdev->devdata);
++
++	if (IS_ERR(data))
++		return PTR_ERR(data);
++
++	*state = get_pwm(data);
++	return 0;
++}
++
++static int tc654_set_cur_state(struct thermal_cooling_device *cdev,
++			       unsigned long state)
++{
++	struct tc654_data *data = tc654_update_client(cdev->devdata);
++
++	if (IS_ERR(data))
++		return PTR_ERR(data);
++
++	if (state > 255)
++		return -EINVAL;
++
++	return _set_pwm(data, state);
++}
++
++static const struct thermal_cooling_device_ops tc654_fan_cool_ops = {
++	.get_max_state = tc654_get_max_state,
++	.get_cur_state = tc654_get_cur_state,
++	.set_cur_state = tc654_set_cur_state,
++};
++
+ /*
+  * device probe and removal
+  */
+@@ -478,7 +533,21 @@ static int tc654_probe(struct i2c_client
+ 	hwmon_dev =
+ 	    devm_hwmon_device_register_with_groups(dev, client->name, data,
+ 						   tc654_groups);
+-	return PTR_ERR_OR_ZERO(hwmon_dev);
++	if (IS_ERR(hwmon_dev))
++		return PTR_ERR(hwmon_dev);
++
++#if IS_ENABLED(CONFIG_OF)
++	/* Optional cooling device register for Device tree platforms */
++	data->cdev = thermal_of_cooling_device_register(client->dev.of_node,
++							"tc654", hwmon_dev,
++							&tc654_fan_cool_ops);
++#else /* CONFIG_OF */
++	/* Optional cooling device register for non Device tree platforms */
++	data->cdev = thermal_cooling_device_register("tc654", hwmon_dev,
++						     &tc654_fan_cool_ops);
++#endif /* CONFIG_OF */
++
++	return PTR_ERR_OR_ZERO(data->cdev);
+ }
+ 
+ static const struct i2c_device_id tc654_id[] = {

target/linux/apm821xx/patches-5.4/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch

@@ -0,0 +1,29 @@
+From c9395ad54e2cabb87d408becc37566f3d8248933 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 1 Dec 2019 02:08:23 +0100
+Subject: [PATCH] powerpc: bootwrapper: force gzip as mkimage's compression
+ method
+
+Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
+instruct the mkimage to use the xz compression, which isn't
+supported. This patch forces the gzip compression, which is
+supported and doesn't matter because the generated uImage for
+the apm821xx target gets ignored as the OpenWrt toolchain will
+do separate U-Boot kernel images for each device individually.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ arch/powerpc/boot/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -254,7 +254,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo
+ 
+ # args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd
+ quiet_cmd_wrap	= WRAP    $@
+-      cmd_wrap	=$(CONFIG_SHELL) $(wrapper) -Z $(compressor-y) -c -o $@ -p $2 \
++      cmd_wrap	=$(CONFIG_SHELL) $(wrapper) -Z gzip -c -o $@ -p $2 \
+ 		$(CROSSWRAP) $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) \
+ 		vmlinux
+ 

target/linux/apm821xx/sata/config-default

@@ -0,0 +1,44 @@
+CONFIG_APOLLO3G=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_EXT4_FS=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DW_DMAC_CORE=y
+CONFIG_DW_DMAC=y
+# CONFIG_SATA_DWC_OLD_DMA is not set
+# CONFIG_DW_DMAC_PCI is not set
+CONFIG_ATA=y
+CONFIG_ATA_SFF=y
+CONFIG_ATA_BMDMA=y
+CONFIG_SATA_PMP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_SATA_DWC=y
+# CONFIG_SATA_DWC_DEBUG is not set
+CONFIG_EXT4_FS=y
+CONFIG_F2FS_FS=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_74XX_MMIO=y
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD=y
+CONFIG_MD_AUTODETECT=y
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_MULTIPATH is not set
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+# CONFIG_MD_RAID10 is not set
+# CONFIG_MD_RAID456 is not set
+CONFIG_PPC_EARLY_DEBUG=y
+CONFIG_PPC_EARLY_DEBUG_44x=y
+# CONFIG_PPC_EARLY_DEBUG_MEMCONS is not set
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x4
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y

target/linux/apm821xx/sata/profiles/00-default.mk

@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2011 OpenWrt.org
+
+define Profile/Default
+  NAME:=Default Profile
+  PRIORITY:=1
+  PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport kmod-usb-storage kmod-fs-vfat wpad-basic-wolfssl
+endef
+
+define Profile/Default/Description
+	Default package set
+endef
+
+$(eval $(call Profile,Default))

target/linux/apm821xx/sata/target.mk

@@ -0,0 +1,10 @@
+BOARDNAME := Devices which boot from SATA (NAS)
+DEVICE_TYPE := nas
+FEATURES += boot-part ext4 rootfs-part
+DEFAULT_PACKAGES += badblocks block-mount e2fsprogs kmod-hwmon-drivetemp \
+		    kmod-dm kmod-md-mod partx-utils mkf2fs f2fsck
+
+define Target/Description
+	Build firmware images for APM82181 boards that boot from SATA.
+	For NAS like the MyBook Live Series.
+endef

target/linux/arc770/Makefile

@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2015 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+
+ARCH:=arc
+BOARD:=arc770
+BOARDNAME:=Synopsys DesignWare ARC 770D
+SUBTARGETS:=generic
+
+KERNEL_PATCHVER:=5.4
+
+DEVICE_TYPE:=basic
+
+define Target/Description
+	Synopsys DesignWare boards
+endef
+
+include $(INCLUDE_DIR)/target.mk
+
+$(eval $(call BuildTarget))

target/linux/arc770/base-files/etc/board.d/02_network

@@ -0,0 +1,18 @@
+#!/bin/sh
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+"snps,axs101")
+	ucidef_set_interface_lan "eth0" "dhcp"
+	;;
+esac
+
+board_config_flush
+
+exit 0

target/linux/arc770/config-5.4

@@ -0,0 +1,198 @@
+# CONFIG_16KSTACKS is not set
+CONFIG_ARC=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARC_BUILTIN_DTB_NAME=""
+CONFIG_ARC_CACHE=y
+CONFIG_ARC_CACHE_LINE_SHIFT=5
+CONFIG_ARC_CACHE_PAGES=y
+# CONFIG_ARC_CACHE_VIPT_ALIASING is not set
+# CONFIG_ARC_COMPACT_IRQ_LEVELS is not set
+# CONFIG_ARC_CPU_750D is not set
+CONFIG_ARC_CPU_770=y
+CONFIG_ARC_CURR_IN_REG=y
+CONFIG_ARC_DBG=y
+# CONFIG_ARC_DBG_TLB_PARANOIA is not set
+CONFIG_ARC_DW2_UNWIND=y
+CONFIG_ARC_EMUL_UNALIGNED=y
+# CONFIG_ARC_FPU_SAVE_RESTORE is not set
+CONFIG_ARC_HAS_DCACHE=y
+# CONFIG_ARC_HAS_DCCM is not set
+CONFIG_ARC_HAS_ICACHE=y
+# CONFIG_ARC_HAS_ICCM is not set
+CONFIG_ARC_HAS_LLSC=y
+CONFIG_ARC_HAS_SWAPE=y
+CONFIG_ARC_KVADDR_SIZE=256
+# CONFIG_ARC_METAWARE_HLINK is not set
+# CONFIG_ARC_MMU_V1 is not set
+# CONFIG_ARC_MMU_V2 is not set
+CONFIG_ARC_MMU_V3=y
+# CONFIG_ARC_PAGE_SIZE_16K is not set
+# CONFIG_ARC_PAGE_SIZE_4K is not set
+CONFIG_ARC_PAGE_SIZE_8K=y
+CONFIG_ARC_PLAT_AXS10X=y
+# CONFIG_ARC_PLAT_EZNPS is not set
+# CONFIG_ARC_PLAT_TB10X is not set
+CONFIG_ARC_TIMERS=y
+CONFIG_AXS101=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3 is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_NO_EFFICIENT_FFS=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+CONFIG_DWMAC_ANARION=y
+CONFIG_DWMAC_GENERIC=y
+CONFIG_DW_APB_ICTL=y
+CONFIG_EXT4_FS=y
+# CONFIG_EZNPS_GIC is not set
+CONFIG_FIXED_PHY=y
+CONFIG_FS_IOMAP=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_FIND_FIRST_BIT=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_GENERIC=y
+# CONFIG_GPIO_SNPS_CREG is not set
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_FUTEX_CMPXCHG=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HZ=100
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_WORK=y
+CONFIG_ISA_ARCOMPACT=y
+# CONFIG_ISA_ARCV2 is not set
+CONFIG_JBD2=y
+CONFIG_KALLSYMS=y
+CONFIG_KERNEL_GZIP=y
+CONFIG_LIBFDT=y
+CONFIG_LINUX_LINK_BASE=0x80000000
+CONFIG_LINUX_RAM_BASE=0x80000000
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_DW=y
+# CONFIG_MMC_DW_BLUEFIELD is not set
+# CONFIG_MMC_DW_EXYNOS is not set
+# CONFIG_MMC_DW_HI3798CV200 is not set
+# CONFIG_MMC_DW_K3 is not set
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NET_PTP_CLASSIFY=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_NO_IOPORT_MAP=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_PAGE_POOL=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+CONFIG_PPS=y
+CONFIG_PREEMPT=y
+CONFIG_PREEMPTION=y
+CONFIG_PREEMPT_COUNT=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_RCU=y
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RESET_AXS10X=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_SIMPLE=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_ARC=y
+CONFIG_SERIAL_ARC_CONSOLE=y
+CONFIG_SERIAL_ARC_NR_PORTS=1
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SRCU=y
+CONFIG_STACKTRACE=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+# CONFIG_STMMAC_SELFTESTS is not set
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_ARCH_UNALIGN_ALLOW=y
+CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN=y
+CONFIG_TASKS_RCU=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TREE_SRCU=y
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_USB_SUPPORT=y

target/linux/arc770/generic/profiles/00-default.mk

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2015 OpenWrt.org
+
+define Profile/Default
+	NAME:=Default Profile (all drivers)
+	PACKAGES:= kmod-usb-ohci kmod-usb2 kmod-ath9k-htc wpad-basic-wolfssl
+endef
+
+define Profile/Default/Description
+	Default package set compatible with most boards.
+endef
+$(eval $(call Profile,Default))

target/linux/arc770/generic/target.mk

@@ -0,0 +1,8 @@
+BOARDNAME:=Generic
+FEATURES += ramdisk usb ext4 
+
+define Target/Description
+	Build firmware images for generic ARC 770D based boards.
+endef
+
+

target/linux/arc770/image/Config.in

@@ -0,0 +1,5 @@
+config AXS10X_SD_BOOT_PARTSIZE
+	int "Boot (SD Card) filesystem partition size (in MB)"
+	depends on TARGET_arc770
+	default 20
+

target/linux/arc770/image/Makefile

@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+# On ARC initramfs is put before entry point and so entry point moves
+# in memory from build to built. Thus we need to extract EP from vmlinux
+# every time before generation of uImage.
+kernel_ep = `$(KERNEL_CROSS)readelf -h $(1) | grep "Entry point address" | grep -o 0x.*`
+
+define Build/patch-dtb
+	$(STAGING_DIR_HOST)/bin/patch-dtb $@ $(DTS_DIR)/$(DEVICE_DTS).dtb
+endef
+
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+# Root FS built-in
+define Device/vmlinux
+	KERNEL_SUFFIX := .elf
+	KERNEL := kernel-bin | patch-dtb
+	KERNEL_INITRAMFS_NAME = vmlinux-initramfs.elf
+endef
+
+define Device/nsim
+	$(call Device/vmlinux)
+	DEVICE_PROFILE := nsim
+	DEVICE_DTS := nsim_700
+endef
+TARGET_DEVICES += nsim
+endif
+
+# Root FS on SD-card
+KERNEL_LOADADDR := 0x80000000
+DEVICE_DTS_LIST:= axs101 nsim_700
+FAT32_BLOCK_SIZE=1024
+FAT32_BLOCKS=$(shell echo $$(($(CONFIG_AXS10X_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
+
+define Image/Prepare
+	# Build .dtb for all boards we may run on
+	$(foreach dts,$(DEVICE_DTS_LIST),
+		$(call Image/BuildDTB,$(DTS_DIR)/$(dts).dts,$(DTS_DIR)/$(dts).dtb)
+	)
+endef
+
+define Image/Build/SDCard
+	rm -f $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img
+	mkfs.fat $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img -C $(FAT32_BLOCKS)
+	mkimage -C none -A arc -T script -d uEnv.txt $(BIN_DIR)/uEnv.scr
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uEnv.scr ::boot.scr
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(DTS_DIR)/*.dtb ::
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/$(IMG_PREFIX)-uImage ::uImage
+
+	./gen_axs10x_sdcard_img.sh \
+		$(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img \
+		$(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img \
+		$(KDIR)/root.$(1) \
+		$(CONFIG_AXS10X_SD_BOOT_PARTSIZE) \
+		$(CONFIG_TARGET_ROOTFS_PARTSIZE)
+
+ifneq ($(CONFIG_TARGET_IMAGES_GZIP),)
+	gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img
+endif
+endef
+
+define Image/BuildKernel
+	# Build unified uImage
+	$(call Image/BuildKernel/MkuImage, \
+		none, $(KERNEL_LOADADDR),$(call kernel_ep,$(KDIR)/vmlinux.elf) , \
+		$(KDIR)/vmlinux, \
+		$(BIN_DIR)/$(IMG_PREFIX)-uImage \
+	)
+endef
+
+define Image/Build
+	$(call Image/Build/$(1),$(1))
+	$(call Image/Build/SDCard,$(1))
+	dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-root.$(1) bs=128k conv=sync
+	$(call Image/Gzip,$(BIN_DIR)/$(IMG_PREFIX)-root.$(1))
+endef
+
+$(eval $(call BuildImage))

target/linux/arc770/image/gen_axs10x_sdcard_img.sh

@@ -0,0 +1,29 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+set -x
+[ $# -eq 5 ] || {
+    echo "SYNTAX: $0 <file> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
+    exit 1
+}
+
+OUTPUT="$1"
+BOOTFS="$2"
+ROOTFS="$3"
+BOOTFSSIZE="$4"
+ROOTFSSIZE="$5"
+
+head=4
+sect=63
+
+set $(ptgen -o $OUTPUT -h $head -s $sect -l 1024 -t c -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M)
+
+BOOTOFFSET="$(($1 / 512))"
+BOOTSIZE="$(($2 / 512))"
+ROOTFSOFFSET="$(($3 / 512))"
+ROOTFSSIZE="$(($4 / 512))"
+
+dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc
+dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc

target/linux/arc770/image/uEnv.txt

@@ -0,0 +1,7 @@
+setenv kernel_addr_r 0x82000000
+setenv fdt_addr_r 0x83000000
+setenv loadkernel fatload mmc 0 \${kernel_addr_r} uImage
+setenv loaddtb fatload mmc 0 \${fdt_addr_r} \${dts}
+setenv bootargs earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 root=/dev/mmcblk0p2 rootwait print-fatal-signals=1
+setenv uenvcmd run loadkernel\; run loaddtb\; bootm \${kernel_addr_r} - \${fdt_addr_r}
+run uenvcmd

target/linux/arc770/patches-5.4/700-stmmac-Disable-frame-filtering-completely.patch

@@ -0,0 +1,31 @@
+From 0031b9011cb2b2b1de4dbb4f9620303aec760db4 Mon Sep 17 00:00:00 2001
+From: Alexey Brodkin <abrodkin@synopsys.com>
+Date: Wed, 27 Jul 2016 11:33:14 +0300
+Subject: [PATCH] stmmac: Disable frame filtering completely
+
+For some [still unknown] reason in ARC SDP boards
+DW GMAC doesn't enter promiscuous mode if eth0 gets
+added to the br-lan interface before Ethernet PHY finishes
+autonegotiation (PHY gets reset on DW GMAC start).
+
+As a work-around we completely disable frame filtering
+in GMAC hardware which gives us working bridge that consists
+of eth0 and wlan0 (USB Wi-Fi dongle). I.e. we finally have
+working "Dumb AP" setup made of ARC AXS10x boards.
+
+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
+---
+ drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/common.h
++++ b/drivers/net/ethernet/stmicro/stmmac/common.h
+@@ -42,7 +42,7 @@
+ #define STMMAC_GET_ENTRY(x, size)	((x + 1) & (size - 1))
+ 
+ #undef FRAME_FILTER_DEBUG
+-/* #define FRAME_FILTER_DEBUG */
++#define FRAME_FILTER_DEBUG
+ 
+ /* Extra statistic and debug information exposed by ethtool */
+ struct stmmac_extra_stats {

target/linux/archs38/Makefile

@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+
+ARCH:=arc
+CPU_TYPE:=archs
+BOARD:=archs38
+BOARDNAME:=Synopsys DesignWare ARC HS38
+SUBTARGETS:=generic
+
+KERNEL_PATCHVER:=5.4
+
+DEVICE_TYPE:=basic
+
+define Target/Description
+	Synopsys DesignWare boards
+endef
+
+include $(INCLUDE_DIR)/target.mk
+
+$(eval $(call BuildTarget))

target/linux/archs38/base-files/etc/board.d/02_network

@@ -0,0 +1,19 @@
+#!/bin/sh
+#
+# Copyright (C) 2016 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+snps,axs103|\
+snps,hsdk)
+	ucidef_set_interface_lan "eth0" "dhcp"
+	;;
+esac
+
+board_config_flush
+
+exit 0

target/linux/archs38/config-5.4

@@ -0,0 +1,284 @@
+# CONFIG_16KSTACKS is not set
+CONFIG_ARC=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARC_BUILTIN_DTB_NAME=""
+CONFIG_ARC_CACHE=y
+CONFIG_ARC_CACHE_LINE_SHIFT=6
+CONFIG_ARC_CACHE_PAGES=y
+CONFIG_ARC_CPU_HS=y
+CONFIG_ARC_CURR_IN_REG=y
+CONFIG_ARC_DBG=y
+# CONFIG_ARC_DBG_TLB_PARANOIA is not set
+CONFIG_ARC_DW2_UNWIND=y
+CONFIG_ARC_HAS_ACCL_REGS=y
+CONFIG_ARC_HAS_DCACHE=y
+# CONFIG_ARC_HAS_DCCM is not set
+CONFIG_ARC_HAS_DIV_REM=y
+CONFIG_ARC_HAS_ICACHE=y
+# CONFIG_ARC_HAS_ICCM is not set
+CONFIG_ARC_HAS_LL64=y
+CONFIG_ARC_HAS_LLSC=y
+# CONFIG_ARC_HAS_PAE40 is not set
+CONFIG_ARC_HAS_SWAPE=y
+CONFIG_ARC_IRQ_NO_AUTOSAVE=y
+CONFIG_ARC_KVADDR_SIZE=256
+CONFIG_ARC_MCIP=y
+# CONFIG_ARC_METAWARE_HLINK is not set
+CONFIG_ARC_MMU_V4=y
+# CONFIG_ARC_PAGE_SIZE_16K is not set
+# CONFIG_ARC_PAGE_SIZE_4K is not set
+CONFIG_ARC_PAGE_SIZE_8K=y
+CONFIG_ARC_PLAT_AXS10X=y
+# CONFIG_ARC_PLAT_EZNPS is not set
+# CONFIG_ARC_PLAT_TB10X is not set
+# CONFIG_ARC_SMP_HALT_ON_RESET is not set
+CONFIG_ARC_SOC_HSDK=y
+CONFIG_ARC_TIMERS=y
+CONFIG_ARC_TIMERS_64BIT=y
+CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y
+CONFIG_AXS103=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_SCSI_REQUEST=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLK_HSDK=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_RMAP=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_DEVTMPFS=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+CONFIG_DMA_REMAP=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DTC=y
+CONFIG_DWMAC_ANARION=y
+CONFIG_DWMAC_GENERIC=y
+CONFIG_DW_APB_ICTL=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EZNPS_GIC is not set
+CONFIG_FAT_FS=y
+CONFIG_FB=y
+CONFIG_FB_CMDLINE=y
+CONFIG_FIXED_PHY=y
+CONFIG_FS_IOMAP=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_FIND_FIRST_BIT=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PENDING_IRQ=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_SNPS_CREG=y
+CONFIG_GRACE_PERIOD=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FUTEX_CMPXCHG=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HZ=100
+CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_IIO_ST_PRESS=y
+CONFIG_IIO_ST_PRESS_I2C=y
+CONFIG_IIO_ST_PRESS_SPI=y
+CONFIG_IIO_ST_SENSORS_CORE=y
+CONFIG_IIO_ST_SENSORS_I2C=y
+CONFIG_IIO_ST_SENSORS_SPI=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_TRIGGERED_BUFFER=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_WORK=y
+# CONFIG_ISA_ARCOMPACT is not set
+CONFIG_ISA_ARCV2=y
+CONFIG_JBD2=y
+CONFIG_KALLSYMS=y
+CONFIG_KERNEL_GZIP=y
+CONFIG_LIBFDT=y
+CONFIG_LINUX_LINK_BASE=0x90000000
+CONFIG_LINUX_RAM_BASE=0x80000000
+CONFIG_LOCKD=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MICREL_PHY=y
+CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_DW=y
+# CONFIG_MMC_DW_BLUEFIELD is not set
+# CONFIG_MMC_DW_EXYNOS is not set
+# CONFIG_MMC_DW_HI3798CV200 is not set
+# CONFIG_MMC_DW_K3 is not set
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MODULES_TREE_LOOKUP=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NAMESPACES=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_NS=y
+CONFIG_NET_PTP_CLASSIFY=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NO_IOPORT_MAP=y
+CONFIG_NR_CPUS=4
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_PADATA=y
+CONFIG_PAGE_POOL=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+CONFIG_PPS=y
+CONFIG_PREEMPT=y
+CONFIG_PREEMPTION=y
+CONFIG_PREEMPT_COUNT=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_RCU=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_SPI=y
+CONFIG_RESET_AXS10X=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_HSDK=y
+CONFIG_RESET_SIMPLE=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_SCSI=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_ARC=y
+CONFIG_SERIAL_ARC_CONSOLE=y
+CONFIG_SERIAL_ARC_NR_PORTS=1
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SG_POOL=y
+CONFIG_SMP=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_SPI=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+CONFIG_SRCU=y
+CONFIG_STACKTRACE=y
+# CONFIG_STANDALONE is not set
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+# CONFIG_STMMAC_SELFTESTS is not set
+CONFIG_SUNRPC=y
+CONFIG_SWPHY=y
+CONFIG_TASKS_RCU=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TI_ADC108S102=y
+CONFIG_TREE_SRCU=y
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_USB_SUPPORT=y
+# CONFIG_USER_NS is not set
+CONFIG_VFAT_FS=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_XPS=y

target/linux/archs38/generic/profiles/00-default.mk

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+define Profile/Default
+	NAME:=Default Profile (all drivers)
+	PACKAGES:= kmod-usb2 kmod-ath9k-htc wpad-basic-wolfssl
+endef
+
+define Profile/Default/Description
+	Default package set compatible with most boards.
+endef
+$(eval $(call Profile,Default))

target/linux/archs38/generic/target.mk

@@ -0,0 +1,8 @@
+BOARDNAME:=Generic
+FEATURES += ext4 usb ramdisk
+
+define Target/Description
+	Build firmware images for ARC HS38 based boards.
+endef
+
+

target/linux/archs38/image/Config.in

@@ -0,0 +1,5 @@
+config AXS10X_SD_BOOT_PARTSIZE
+	int "Boot (SD Card) filesystem partition size (in MB)"
+	depends on TARGET_archs38
+	default 20
+

target/linux/archs38/image/Makefile

@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+# On ARC initramfs is put before entry point and so entry point moves
+# in memory from build to built. Thus we need to extract EP from vmlinux
+# every time before generation of uImage.
+kernel_ep = `$(KERNEL_CROSS)readelf -h $(1) | grep "Entry point address" | grep -o 0x.*`
+
+define Build/patch-dtb
+	$(STAGING_DIR_HOST)/bin/patch-dtb $@ $(DTS_DIR)/$(DEVICE_DTS).dtb
+endef
+
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+# Root FS built-in
+define Device/vmlinux
+	KERNEL_SUFFIX := .elf
+	KERNEL := kernel-bin | patch-dtb
+	KERNEL_INITRAMFS_NAME = vmlinux-initramfs.elf
+endef
+
+define Device/nsim_hs
+	$(call Device/vmlinux)
+	DEVICE_PROFILE := nsim_hs
+	DEVICE_DTS := nsim_hs_idu
+endef
+TARGET_DEVICES += nsim_hs
+endif
+
+# Root FS on SD-card
+KERNEL_LOADADDR := 0x90000000
+DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu hsdk
+FAT32_BLOCK_SIZE=1024
+FAT32_BLOCKS=$(shell echo $$(($(CONFIG_AXS10X_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
+
+define Image/Prepare
+	# Build .dtb for all boards we may run on
+	$(foreach dts,$(DEVICE_DTS_LIST),
+		$(call Image/BuildDTB,$(DTS_DIR)/$(dts).dts,$(DTS_DIR)/$(dts).dtb)
+	)
+endef
+
+define Image/Build/SDCard
+	rm -f $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img
+	mkfs.fat $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img -C $(FAT32_BLOCKS)
+	mkimage -C none -A arc -T script -d uEnv.txt $(BIN_DIR)/uEnv.scr
+	mkenvimage -s 0x4000 -o $(BIN_DIR)/uboot.env ./uboot.env.txt
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uEnv.scr ::boot.scr
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(DTS_DIR)/*.dtb ::
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/$(IMG_PREFIX)-uImage ::uImage
+	mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uboot.env ::uboot.env
+
+	./gen_axs10x_sdcard_img.sh \
+		$(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img \
+		$(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img \
+		$(KDIR)/root.$(1) \
+		$(CONFIG_AXS10X_SD_BOOT_PARTSIZE) \
+		$(CONFIG_TARGET_ROOTFS_PARTSIZE)
+
+ifneq ($(CONFIG_TARGET_IMAGES_GZIP),)
+	gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img
+endif
+endef
+
+define Image/BuildKernel
+	# Build unified uImage
+	$(call Image/BuildKernel/MkuImage, \
+		none, $(KERNEL_LOADADDR),$(call kernel_ep,$(KDIR)/vmlinux.elf) , \
+		$(KDIR)/vmlinux, \
+		$(BIN_DIR)/$(IMG_PREFIX)-uImage \
+	)
+endef
+
+define Image/Build
+	$(call Image/Build/$(1),$(1))
+	$(call Image/Build/SDCard,$(1))
+	dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-root.$(1) bs=128k conv=sync
+	$(call Image/Gzip,$(BIN_DIR)/$(IMG_PREFIX)-root.$(1))
+endef
+
+$(eval $(call BuildImage))

target/linux/archs38/image/gen_axs10x_sdcard_img.sh

@@ -0,0 +1,29 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016 OpenWrt.org
+
+set -x
+[ $# -eq 5 ] || {
+    echo "SYNTAX: $0 <file> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
+    exit 1
+}
+
+OUTPUT="$1"
+BOOTFS="$2"
+ROOTFS="$3"
+BOOTFSSIZE="$4"
+ROOTFSSIZE="$5"
+
+head=4
+sect=63
+
+set $(ptgen -o $OUTPUT -h $head -s $sect -l 1024 -t c -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M)
+
+BOOTOFFSET="$(($1 / 512))"
+BOOTSIZE="$(($2 / 512))"
+ROOTFSOFFSET="$(($3 / 512))"
+ROOTFSSIZE="$(($4 / 512))"
+
+dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc
+dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc

target/linux/archs38/image/uEnv.txt

@@ -0,0 +1,7 @@
+setenv kernel_addr_r 0x82000000
+setenv fdt_addr_r 0x83000000
+setenv loadkernel fatload mmc 0 \${kernel_addr_r} uImage
+setenv loaddtb fatload mmc 0 \${fdt_addr_r} \${dts}
+setenv bootargs earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 root=/dev/mmcblk0p2 rootwait print-fatal-signals=1
+setenv uenvcmd run loadkernel\; run loaddtb\; bootm \${kernel_addr_r} - \${fdt_addr_r}
+run uenvcmd

target/linux/archs38/image/uboot.env.txt

@@ -0,0 +1,29 @@
+baudrate=115200
+bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait
+bootcmd=fatload mmc 0:1 0x82000000 uImage && fatload mmc 0:1 0x81000000 hsdk.dtb && bootm 0x82000000 - 0x81000000
+bootdelay=2
+bootfile=uImage
+loadaddr=0x82000000
+stderr=serial0@f0005000
+stdin=serial0@f0005000
+stdout=serial0@f0005000
+core_dccm_0=0x10
+core_dccm_1=0x6
+core_dccm_2=0x10
+core_dccm_3=0x6
+core_iccm_0=0x10
+core_iccm_1=0x6
+core_iccm_2=0x10
+core_iccm_3=0x6
+core_mask=0xF
+dcache_ena=0x1
+icache_ena=0x1
+non_volatile_limit=0xE
+hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; setenv dcache_ena 0x0; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0;
+hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;
+hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;
+hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;
+hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;
+hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;
+hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;
+hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;

target/linux/archs38/patches-5.4/0001-arch-arc-Add-compiler-option-for-gcc8.4.patch

@@ -0,0 +1,21 @@
+From 2e2b3aeda9af9c029bf347c974911fe96cd79c43 Mon Sep 17 00:00:00 2001
+From: Evgeniy Didin <didin@synopsys.com>
+Date: Mon, 23 Mar 2020 15:57:18 +0300
+Subject: [PATCH] arch/arc: Add compiler option for gcc8.4
+
+Signed-off-by: Evgeniy Didin <didin@synopsys.com>
+---
+ arch/arc/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arc/Makefile
++++ b/arch/arc/Makefile
+@@ -11,7 +11,7 @@ endif
+ 
+ cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
+ cflags-$(CONFIG_ISA_ARCOMPACT)	+= -mA7
+-cflags-$(CONFIG_ISA_ARCV2)	+= -mcpu=hs38
++cflags-$(CONFIG_ISA_ARCV2)	+= -mcpu=hs38 -mmpy-option=2
+ 
+ ifdef CONFIG_ARC_CURR_IN_REG
+ # For a global register defintion, make sure it gets passed to every file

target/linux/armvirt/32/config-5.4

@@ -0,0 +1,95 @@
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_32BIT_OFF_T=y
+# CONFIG_ARCH_AXXIA is not set
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_VIRT=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARM=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_HEAVY_MB=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_LPAE=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_PSCI=y
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_CACHE_L2X0=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_SPECTRE=y
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+# CONFIG_DEBUG_USER is not set
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_SMP=y
+CONFIG_HZ_FIXED=0
+CONFIG_HZ_PERIODIC=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_NEON=y
+CONFIG_NR_CPUS=4
+CONFIG_OLD_SIGACTION=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PERF_USE_VMALLOC=y
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+# CONFIG_PL310_ERRATA_753970 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SMP_ON_UP=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNWINDER_ARM=y
+# CONFIG_UNWINDER_FRAME_POINTER is not set
+CONFIG_USE_OF=y
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ZBOOT_ROM_TEXT=0

target/linux/armvirt/32/target.mk

@@ -0,0 +1,10 @@
+ARCH:=arm
+SUBTARGET:=32
+BOARDNAME:=QEMU ARM Virtual Machine (cortex-a15)
+CPU_TYPE:=cortex-a15
+CPU_SUBTYPE:=neon-vfpv4
+KERNELNAME:=zImage
+
+define Target/Description
+  Build images for $(BOARDNAME)
+endef

target/linux/armvirt/64/config-5.4

@@ -0,0 +1,260 @@
+CONFIG_64BIT=y
+# CONFIG_ARCH_AGILEX is not set
+# CONFIG_ARCH_BITMAIN is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
+CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
+CONFIG_ARCH_HAS_PTE_DEVMAP=y
+CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
+CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_ARCH_INLINE_READ_LOCK=y
+CONFIG_ARCH_INLINE_READ_LOCK_BH=y
+CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_READ_UNLOCK=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_INLINE_SPIN_LOCK=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
+CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_INLINE_WRITE_LOCK=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_MMAP_RND_BITS=18
+CONFIG_ARCH_MMAP_RND_BITS_MAX=24
+CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_PROC_KCORE_TEXT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_INT128=y
+CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARM64=y
+# CONFIG_ARM64_16K_PAGES is not set
+CONFIG_ARM64_4K_PAGES=y
+# CONFIG_ARM64_64K_PAGES is not set
+CONFIG_ARM64_CNP=y
+CONFIG_ARM64_CONT_SHIFT=4
+CONFIG_ARM64_CRYPTO=y
+CONFIG_ARM64_ERRATUM_1165522=y
+CONFIG_ARM64_ERRATUM_1286807=y
+CONFIG_ARM64_ERRATUM_819472=y
+CONFIG_ARM64_ERRATUM_824069=y
+CONFIG_ARM64_ERRATUM_826319=y
+CONFIG_ARM64_ERRATUM_827319=y
+CONFIG_ARM64_ERRATUM_832075=y
+CONFIG_ARM64_ERRATUM_843419=y
+CONFIG_ARM64_HW_AFDBM=y
+CONFIG_ARM64_MODULE_PLTS=y
+CONFIG_ARM64_PAGE_SHIFT=12
+CONFIG_ARM64_PAN=y
+CONFIG_ARM64_PA_BITS=48
+CONFIG_ARM64_PA_BITS_48=y
+# CONFIG_ARM64_PMEM is not set
+# CONFIG_ARM64_PSEUDO_NMI is not set
+# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
+CONFIG_ARM64_PTR_AUTH=y
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+CONFIG_ARM64_SSBD=y
+CONFIG_ARM64_SVE=y
+CONFIG_ARM64_TAGGED_ADDR_ABI=y
+CONFIG_ARM64_UAO=y
+CONFIG_ARM64_VA_BITS=39
+CONFIG_ARM64_VA_BITS_39=y
+# CONFIG_ARM64_VA_BITS_48 is not set
+CONFIG_ARM64_VHE=y
+CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
+CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
+CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
+# CONFIG_ARM_PSCI_CPUIDLE is not set
+CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BLK_PM=y
+CONFIG_CAVIUM_TX2_ERRATUM_219=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_CLKSRC_VERSATILE=y
+CONFIG_CLK_SP810=y
+CONFIG_CLK_VEXPRESS_OSC=y
+CONFIG_COMMON_CLK_VERSATILE=y
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_PM=y
+CONFIG_CRYPTO_AES_ARM64=y
+CONFIG_CRYPTO_AES_ARM64_BS=y
+CONFIG_CRYPTO_AES_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
+CONFIG_CRYPTO_CHACHA20=y
+CONFIG_CRYPTO_CHACHA20_NEON=y
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA256_ARM64=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+# CONFIG_CRYPTO_SHA3_ARM64 is not set
+CONFIG_CRYPTO_SHA512_ARM64=y
+# CONFIG_CRYPTO_SHA512_ARM64_CE is not set
+CONFIG_CRYPTO_SIMD=y
+# CONFIG_CRYPTO_SM3_ARM64_CE is not set
+# CONFIG_CRYPTO_SM4_ARM64_CE is not set
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_SHARED_BUFFER=y
+CONFIG_DRM=y
+CONFIG_DRM_BOCHS=y
+CONFIG_DRM_BRIDGE=y
+CONFIG_DRM_KMS_HELPER=y
+CONFIG_DRM_PANEL=y
+CONFIG_DRM_PANEL_BRIDGE=y
+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
+CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
+# CONFIG_DRM_PANEL_SIMPLE is not set
+CONFIG_DRM_QXL=y
+CONFIG_DRM_RCAR_WRITEBACK=y
+CONFIG_DRM_TTM=y
+CONFIG_DRM_VIRTIO_GPU=y
+CONFIG_DRM_VRAM_HELPER=y
+CONFIG_EFI_EARLYCON=y
+CONFIG_FB=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_CMDLINE=y
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FSL_ERRATUM_A008585=y
+CONFIG_FUJITSU_ERRATUM_010001=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
+CONFIG_HAVE_ARCH_HUGE_VMAP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
+CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
+CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
+CONFIG_HAVE_ARCH_STACKLEAK=y
+CONFIG_HAVE_ARCH_VMAP_STACK=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_HAVE_CMPXCHG_LOCAL=y
+CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
+CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
+CONFIG_HAVE_GENERIC_VDSO=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_HAVE_PATA_PLATFORM=y
+CONFIG_HDMI=y
+CONFIG_HOLES_IN_ZONE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_INLINE_READ_LOCK=y
+CONFIG_INLINE_READ_LOCK_BH=y
+CONFIG_INLINE_READ_LOCK_IRQ=y
+CONFIG_INLINE_READ_LOCK_IRQSAVE=y
+CONFIG_INLINE_READ_UNLOCK_BH=y
+CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
+CONFIG_INLINE_SPIN_LOCK=y
+CONFIG_INLINE_SPIN_LOCK_BH=y
+CONFIG_INLINE_SPIN_LOCK_IRQ=y
+CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
+CONFIG_INLINE_SPIN_TRYLOCK=y
+CONFIG_INLINE_SPIN_TRYLOCK_BH=y
+CONFIG_INLINE_SPIN_UNLOCK_BH=y
+CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
+CONFIG_INLINE_WRITE_LOCK=y
+CONFIG_INLINE_WRITE_LOCK_BH=y
+CONFIG_INLINE_WRITE_LOCK_IRQ=y
+CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
+CONFIG_INLINE_WRITE_UNLOCK_BH=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
+CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_PLATFORM is not set
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_MFD_CORE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MFD_VEXPRESS_SYSREG=y
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_TIFM_SD is not set
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_NO_HZ=y
+CONFIG_NO_HZ_COMMON=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NR_CPUS=64
+# CONFIG_NUMA is not set
+# CONFIG_OCTEONTX2_AF is not set
+# CONFIG_PCIE_AL is not set
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_GENERIC_DOMAINS=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_VEXPRESS=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
+# CONFIG_RANDOMIZE_BASE is not set
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
+CONFIG_RTC_I2C_AND_SPI=y
+CONFIG_SMC91X=y
+CONFIG_SPARSEMEM=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SYNC_FILE=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_THREAD_INFO_IN_TASK=y
+CONFIG_UNMAP_KERNEL_AT_EL0=y
+CONFIG_VEXPRESS_CONFIG=y
+CONFIG_VEXPRESS_SYSCFG=y
+CONFIG_VIDEOMODE_HELPERS=y
+CONFIG_VMAP_STACK=y
+CONFIG_ZONE_DMA32=y

target/linux/armvirt/64/target.mk

@@ -0,0 +1,9 @@
+ARCH:=aarch64
+SUBTARGET:=64
+BOARDNAME:=QEMU ARMv8 Virtual Machine (cortex-a53)
+CPU_TYPE:=cortex-a53
+KERNELNAME:=Image
+
+define Target/Description
+  Build multi-platform images for the ARMv8 instruction set architecture
+endef

target/linux/armvirt/Makefile

@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2017 Yousong Zhou <yszhou4tech@gmail.com>
+
+include $(TOPDIR)/rules.mk
+
+BOARD:=armvirt
+BOARDNAME:=QEMU ARM Virtual Machine
+FEATURES:=fpu pci rtc usb
+FEATURES+=cpiogz ext4 ramdisk squashfs targz
+
+KERNEL_PATCHVER:=5.4
+
+include $(INCLUDE_DIR)/target.mk
+
+DEFAULT_PACKAGES += mkf2fs e2fsprogs
+
+$(eval $(call BuildTarget))

target/linux/armvirt/README

@@ -0,0 +1,40 @@
+This is intended to be used with OpenWrt project to provide image for use with
+QEMU ARM virt machine.
+
+Run with qemu-system-arm
+
+	# boot with initramfs embedded in
+	qemu-system-arm -nographic -M virt -m 64 -kernel openwrt-armvirt-32-zImage-initramfs
+
+	# boot with accel=kvm
+	qemu-system-arm -nographic -M virt,accel=kvm -cpu host -m 64 -kernel
+	openwrt-armvirt-32-zImage-initramfs
+
+	# boot with a separate rootfs
+	qemu-system-arm -nographic -M virt -m 64 -kernel openwrt-armvirt-32-zImage \
+	  -drive file=openwrt-armvirt-32-root.ext4,format=raw,if=virtio -append 'root=/dev/vda rootwait'
+
+	# boot with local dir as rootfs
+	qemu-system-arm -nographic -M virt -m 64 -kernel openwrt-armvirt-32-zImage \
+	  -fsdev local,id=rootdev,path=root-armvirt/,security_model=none \
+	  -device virtio-9p-pci,fsdev=rootdev,mount_tag=/dev/root \
+	  -append 'rootflags=trans=virtio,version=9p2000.L,cache=loose rootfstype=9p'
+
+Run with kvmtool
+
+	# start a named machine
+	lkvm run -k openwrt-armvirt-32-zImage -i openwrt-armvirt-32-rootfs.cpio --name armvirt0
+
+	# start with virtio-9p rootfs
+	lkvm run -k openwrt-armvirt-32-zImage -d root-armvirt/
+
+	# stop "armvirt0"
+	lkvm stop --name armvirt0
+
+	# stop all
+	lkvm stop --all
+
+The multi-platform ARMv8 target can be used with QEMU:
+
+	qemu-system-aarch64 -machine virt -cpu cortex-a57 -nographic \
+		-kernel openwrt-armvirt-64-Image-initramfs \

target/linux/armvirt/base-files/etc/board.d/00_model

@@ -0,0 +1,14 @@
+#!/bin/sh
+# Copyright (C) 2015 OpenWrt.org
+# Copyright (C) 2016 Yousong Zhou <yszhou4tech@gmail.com>
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+ucidef_set_board_id "armvirt"
+ucidef_set_model_name "QEMU ARM Virtual Machine"
+
+board_config_flush
+
+exit 0

target/linux/armvirt/base-files/etc/inittab

@@ -0,0 +1,5 @@
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K shutdown
+ttyAMA0::askfirst:/usr/libexec/login.sh
+ttyS0::askfirst:/usr/libexec/login.sh
+hvc0::askfirst:/usr/libexec/login.sh

target/linux/armvirt/config-5.4

@@ -0,0 +1,236 @@
+CONFIG_9P_FS=y
+# CONFIG_9P_FS_POSIX_ACL is not set
+# CONFIG_9P_FS_SECURITY is not set
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_SG_CHAIN=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_V2M=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
+CONFIG_ARM_GIC_V3_ITS_PCI=y
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ARM_SP805_WATCHDOG is not set
+CONFIG_BALLOON_COMPACTION=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_MQ_VIRTIO=y
+CONFIG_BLK_SCSI_REQUEST=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
+CONFIG_CPU_RMAP=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_CRC32=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EXT4_FS=y
+CONFIG_F2FS_FS=y
+CONFIG_FAILOVER=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FRAME_POINTER=y
+CONFIG_FS_IOMAP=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_PL061=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_HAVE_ARM_SMCCC=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EBPF_JIT=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FAST_GUP=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_GUP=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_RCU_TABLE_FREE=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HOTPLUG_CPU=y
+# CONFIG_HUGETLBFS is not set
+CONFIG_HVC_DRIVER=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IOMMU_HELPER=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_JBD2=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MEMORY_BALLOON=y
+CONFIG_MIGRATION=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_9P=y
+# CONFIG_NET_9P_DEBUG is not set
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_NET_FAILOVER=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NLS=y
+CONFIG_NO_BOOTMEM=y
+CONFIG_NVMEM=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_NET=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_PADATA=y
+CONFIG_PARTITION_PERCPU=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_ECAM=y
+CONFIG_PCI_HOST_COMMON=y
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+CONFIG_PGTABLE_LEVELS=3
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+# CONFIG_SCHED_INFO is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_VIRTIO=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SG_POOL=y
+CONFIG_SMP=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SRCU=y
+CONFIG_SWIOTLB=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_VIRTIO_MMIO=y
+# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_PCI_LEGACY=y
+CONFIG_XPS=y

target/linux/armvirt/image/Makefile

@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2016-2017 Yousong Zhou <yszhou4tech@gmail.com>
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+define Image/BuildKernel
+	$(foreach k,$(filter zImage Image,$(KERNELNAME)), \
+		cp $(KDIR)/$(KERNELNAME) $(BIN_DIR)/$(IMG_PREFIX)-$(k) \
+	)
+endef
+
+define Image/Build/Initramfs
+	$(foreach k,$(filter zImage Image,$(KERNELNAME)), \
+		cp $(KDIR)/$(k)-initramfs $(BIN_DIR)/$(IMG_PREFIX)-$(k)-initramfs \
+	)
+endef
+
+define Image/Build/gzip
+	gzip -f9n $(BIN_DIR)/$(IMG_ROOTFS)-$(1).img
+endef
+
+$(eval $(call Image/gzip-ext4-padded-squashfs))
+
+define Image/Build
+	$(call Image/Build/$(1))
+	$(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_ROOTFS)-$(1).img
+	$(call Image/Build/gzip/$(1))
+endef
+
+$(eval $(call BuildImage))

target/linux/at91/Makefile

@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2006-2013 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+
+ARCH:=arm
+BOARD:=at91
+BOARDNAME:=Microchip (Atmel AT91)
+FEATURES:=ext4 squashfs targz usb usbgadget ubifs
+SUBTARGETS:=sama5 sam9x
+
+KERNEL_PATCHVER:=5.4
+
+include $(INCLUDE_DIR)/target.mk
+
+KERNELNAME:=zImage dtbs
+
+DEFAULT_PACKAGES += kmod-usb-ohci kmod-at91-udc kmod-usb-gadget-eth
+
+$(eval $(call BuildTarget))

target/linux/at91/base-files/etc/board.d/02_network

@@ -0,0 +1,24 @@
+#!/bin/sh
+#
+# Copyright (C) 2014-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+
+atmel,sama5d3-xplained)
+	ucidef_set_interfaces_lan_wan "eth0" "eth1"
+	;;
+
+*)
+	ucidef_set_interface_lan "eth0"
+	;;
+
+esac
+
+board_config_flush
+
+exit 0

target/linux/at91/base-files/etc/config/firewall

@@ -0,0 +1,6 @@
+config defaults
+	option syn_flood	1
+	option input		ACCEPT
+	option output		ACCEPT 
+	option forward		REJECT
+

target/linux/at91/base-files/etc/config/network

@@ -0,0 +1,20 @@
+config interface loopback
+	option ifname	lo
+	option proto	static
+	option ipaddr	127.0.0.1
+	option netmask	255.0.0.0
+
+config interface lan
+	option ifname	eth0
+	option type 	none
+	option proto	static
+	option ipaddr	192.168.1.1
+	option netmask	255.255.255.0
+
+config interface debug
+	option ifname 	usb0
+	option type 	none
+	option proto 	static
+	option ipaddr	172.18.0.18
+	option netmask	255.255.255.0
+

target/linux/at91/files/arch/arm/boot/dts/at91-q5xr5.dts

@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * q5xr5.dts - Device Tree file for Exegin Q5xR5 board
+ *
+ * Copyright (C) 2014 Owen Kirby <osk@exegin.com>
+ */
+
+/dts-v1/;
+#include "at91sam9g20.dtsi"
+
+/ {
+	model = "Exegin Q5x (rev5)";
+	compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2";
+	};
+
+	memory {
+		reg = <0x20000000 0x0>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		main_clock: clock@0 {
+			compatible = "atmel,osc", "fixed-clock";
+			clock-frequency = <18432000>;
+		};
+
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <18432000>;
+		};
+	};
+
+	ahb {
+		apb {
+			pinctrl@fffff400 {
+				board {
+					pinctrl_pck0_as_mck: pck0_as_mck {
+						atmel,pins = <2 1 0x2 0x0>; /* PC1 periph B */
+					};
+					pinctrl_spi0_npcs0: spi0_npcs0 {
+						atmel,pins = <0 3 0x1 0x0>; /* PA3 periph A */
+					};
+					pinctrl_spi0_npcs1: spi0_npcs1 {
+						atmel,pins = <2 11 0x2 0x0>; /* PC11 periph B */
+					};
+					pinctrl_spi1_npcs0: spi1_npcs0 {
+						atmel,pins = <1 3 0x1 0x0>; /* PB3 periph A */
+					};
+					pinctrl_spi1_npcs1: spi1_npcs1 {
+						atmel,pins = <2 5 0x2 0x0>; /* PC5 periph B */
+					};
+				};
+
+				spi0 {
+					pinctrl_spi0: spi0-0 {
+						atmel,pins =
+							<0 0 0x1 0x0	/* PA0 periph A SPI0_MISO pin */
+							 0 1 0x1 0x0	/* PA1 periph A SPI0_MOSI pin */
+							 0 2 0x1 0x0>;	/* PA2 periph A SPI0_SPCK pin */
+					};
+				};
+
+				spi1 {
+					pinctrl_spi1: spi1-0 {
+						atmel,pins =
+							<1 0 0x1 0x0	/* PB0 periph A SPI1_MISO pin */
+							 1 1 0x1 0x0	/* PB1 periph A SPI1_MOSI pin */
+							 1 2 0x1 0x0>;	/* PB2 periph A SPI1_SPCK pin */
+					};
+				};
+			};
+
+			dbgu: serial@fffff200 {
+				status = "okay";
+			};
+
+			usart0: serial@fffb0000 {
+				pinctrl-0 =
+					<&pinctrl_usart0
+					 &pinctrl_usart0_rts
+					 &pinctrl_usart0_cts
+					 &pinctrl_usart0_dtr_dsr
+					 &pinctrl_usart0_dcd
+					 &pinctrl_usart0_ri>;
+				status = "okay";
+			};
+
+			macb0: ethernet@fffc4000 {
+				phy-mode = "mii";
+				status = "okay";
+			};
+
+			usb1: gadget@fffa4000 {
+				status = "okay";
+			};
+
+			watchdog@fffffd40 {
+				status = "okay";
+			};
+
+			spi0: spi@fffc8000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xfffc8000 0x200>;
+				interrupts = <12 4 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi0>;
+				status = "okay";
+				cs-gpios = <&pioA 3 0>, <&pioC 11 1>, <0>, <0>;
+
+				m25p80@0 {
+					compatible = "sst,sst25vf040b";
+					spi-max-frequency = <20000000>;
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					at91boot@0 {
+						label = "at91boot";
+						reg = <0x0 0x4000>;
+					};
+					uenv@4000 {
+						label = "uboot-env";
+						reg = <0x4000 0x4000>;
+					};
+					uboot@8000 {
+						label = "uboot";
+						reg = <0x8000 0x3E000>;
+					};
+				};
+				spidev@1 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <1>;
+				};
+			};
+			spi1: spi@fffcc000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xfffcc000 0x200>;
+				interrupts = <13 4 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi1>;
+				cs-gpios = <&pioB 3 0>, <&pioC 5 1>, <0>, <0>;
+				status = "okay";
+
+				spidev@0 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <0>;
+				};
+				spidev@1 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <1>;
+				};
+			};
+		};
+
+		usb0: ohci@500000 {
+			num-ports = <2>;
+			status = "okay";
+		};
+	};
+
+	flash@10000000 {
+		compatible = "cfi-flash";
+		bank-width = <2>;
+		reg = <0x10000000 0x00800000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		kernel@0 {
+			label = "kernel";
+			reg = <0x0 0x200000>;
+		};
+		rootfs@200000 {
+			label = "rootfs";
+			reg = <0x200000 0x600000>;
+		};
+	};
+};

target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts

@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * lmu5000.dst - Device Tree file for CalAmp LMU5000 board
+ *
+ * Copyright (C) 2013 Adam Porter <porter.adam@gmail.com>
+ */
+
+/dts-v1/;
+#include "at91sam9g20.dtsi"
+
+/ {
+	model = "CalAmp LMU5000";
+	compatible = "calamp,lmu5000", "atmel,at91sam9g20", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "mem=64M console=ttyS0,115200 rootfstype=jffs2";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		main_clock: clock@0 {
+			compatible = "atmel,osc", "fixed-clock";
+			clock-frequency = <18432000>;
+		};
+	};
+
+	ahb {
+		apb {
+			pinctrl@fffff400 {
+				board {
+					pinctrl_pck0_as_mck: pck0_as_mck {
+						atmel,pins =
+							<2 1 0x2 0x0>;	/* PC1 periph B */
+					};
+				};
+			};
+
+			dbgu: serial@fffff200 {
+				status = "okay";
+			};
+
+			usart0: serial@fffb0000 {
+				pinctrl-0 =
+					<&pinctrl_usart0
+					 &pinctrl_usart0_rts
+					 &pinctrl_usart0_cts
+					 &pinctrl_usart0_dtr_dsr
+					 &pinctrl_usart0_dcd
+					 &pinctrl_usart0_ri>;
+				status = "okay";
+			};
+
+			usart2: serial@fffb8000 {
+				status = "okay";
+			};
+
+			uart0: serial@fffd4000 {
+				status = "okay";
+			};
+
+			uart1: serial@fffd8000 {
+				status = "okay";
+			};
+
+			macb0: ethernet@fffc4000 {
+				phy-mode = "mii";
+				status = "okay";
+			};
+
+			usb1: gadget@fffa4000 {
+				atmel,vbus-gpio = <&pioC 5 0>;
+				status = "okay";
+			};
+
+			ssc0: ssc@fffbc000 {
+				status = "okay";
+				pinctrl-0 = <&pinctrl_ssc0_tx>;
+			};
+
+			watchdog@fffffd40 {
+				status = "okay";
+			};
+		};
+
+		nand0: nand@40000000 {
+			nand-bus-width = <8>;
+			nand-ecc-mode = "soft";
+			nand-on-flash-bbt;
+			status = "okay";
+
+			kernel@0 {
+				label = "kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			rootfs@400000 {
+				label = "rootfs";
+				reg = <0x400000 0x3C00000>;
+			};
+
+			user1@4000000 {
+				label = "user1";
+				reg = <0x4000000 0x2000000>;
+			};
+
+			user2@6000000 {
+				label = "user2";
+				reg = <0x6000000 0x2000000>;
+			};
+		};
+
+		usb0: ohci@500000 {
+			num-ports = <2>;
+			status = "okay";
+		};
+	};
+};

target/linux/at91/files/arch/arm/boot/dts/wb45n.dts

@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * wb45n.dts - Device Tree file for WB45NBT board
+ *
+ *  Copyright (C) 2015 Laird
+ */
+
+/dts-v1/;
+#include "at91sam9g25.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
+	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		main_clock: clock@0 {
+			compatible = "atmel,osc", "fixed-clock";
+			clock-frequency = <12000000>;
+		};
+
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <12000000>;
+		};
+	};
+
+	ahb {
+		apb {
+
+			rstc@fffffe00 {
+				compatible = "atmel,sama5d3-rstc";
+			};
+
+			pinctrl@fffff400 {
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD0 periph A Read Enable */
+							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD1 periph A Write Enable */
+							 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD2 periph A Address Latch Enable */
+							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD3 periph A Command Latch Enable */
+							 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PD4 gpio Chip Enable pin pull_up */
+							 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;  /* PD5 gpio RDY/BUSY pin pull_up */
+					};
+				};
+
+				usb2 {
+					pinctrl_board_usb2: usb2-board {
+						atmel,pins =
+							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
+					};
+				};
+			};
+
+			dbgu: serial@fffff200 {
+				status = "okay";
+			};
+
+			usart0: serial@f801c000 {
+				status = "okay";
+			};
+
+			usart3: serial@f8028000 {
+				status = "okay";
+			};
+
+			spi0: spi@f0000000 {
+				status = "okay";
+				cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
+			};
+
+			mmc0: mmc@f0008000 {
+				pinctrl-0 = <
+					&pinctrl_mmc0_slot0_clk_cmd_dat0
+					&pinctrl_mmc0_slot0_dat1_3>;
+				status = "okay";
+				/delete-property/dmas;
+				/delete-property/dma-names;
+				slot@0 {
+					reg = <0>;
+					bus-width = <4>;
+				};
+			};
+
+			macb0: ethernet@f802c000 {
+				phy-mode = "rmii";
+				status = "okay";
+			};
+
+			usb2: gadget@f803c000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_board_usb2>;
+				atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
+				status = "okay";
+			};
+
+			i2c1: i2c@f8014000 {
+				status = "okay";
+			};
+
+			watchdog@fffffe40 {
+				status = "okay";
+			};
+
+			shdwc@fffffe10 {
+				atmel,wakeup-mode = "low";
+			};
+
+			rtc@fffffeb0 {
+				status = "okay";
+			};
+		};
+
+		usb0: ohci@00600000 {
+			status = "okay";
+			num-ports = <2>;
+			atmel,vbus-gpio = <
+					   &pioB 12 GPIO_ACTIVE_HIGH
+					   &pioA 31 GPIO_ACTIVE_HIGH
+					  >;
+			atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+		};
+
+		usb1: ehci@00700000 {
+			status = "okay";
+		};
+
+		nand0: nand@40000000 {
+			nand-bus-width = <8>;
+			nand-ecc-mode = "hw";
+			atmel,has-pmecc;	/* Enable PMECC */
+			atmel,pmecc-cap = <4>;
+			atmel,pmecc-sector-size = <512>;
+			nand-on-flash-bbt;
+			status = "okay";
+
+			at91bootstrap@0 {
+				label = "at91bs";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot@20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv@a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv@c0000 {
+				label = "redund-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			kernel-a@e0000 {
+				label = "kernel-a";
+				reg = <0xe0000 0x280000>;
+			};
+
+			kernel-b@360000 {
+				label = "kernel-b";
+				reg = <0x360000 0x280000>;
+			};
+
+			rootfs-a@5e0000 {
+				label = "rootfs-a";
+				reg = <0x5e0000 0x2600000>;
+			};
+
+			rootfs-b@2be0000 {
+				label = "rootfs-b";
+				reg = <0x2be0000 0x2600000>;
+			};
+
+			user@51e0000 {
+				label = "user";
+				reg = <0x51e0000 0x2dc0000>;
+			};
+
+			logs@7fa0000 {
+				label = "logs";
+				reg = <0x7fa0000 0x60000>;
+			};
+		};
+	};
+
+	atheros {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		irqbtn@pb18 {
+			label = "IRQBTN";
+			linux,code = <99>;
+			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+};

target/linux/at91/files/arch/arm/boot/dts/wb50n.dts

@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * wb50n.dts - Device Tree file for wb50n board
+ *
+ *  Copyright (C) 2015 Laird
+ */
+
+/dts-v1/;
+#include "wb50n.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk loglevel=4 mem=64M";
+	};
+
+	ahb {
+
+		apb {
+			mmc0: mmc@f0000000 {
+				status = "okay";
+			};
+
+			macb1: ethernet@f802c000 {
+				status = "okay";
+			};
+
+			dbgu: serial@ffffee00 {
+				status = "okay";
+			};
+
+			/* On BB40 this port is labeled UART1 */
+			usart0: serial@f001c000 {
+				status = "okay";
+			};
+
+			/* On BB40 this port is labeled UART0 */
+			usart1: serial@f0020000 {
+				status = "okay";
+			};
+
+			i2c0: i2c@f0014000 {
+				status = "okay";
+			};
+
+			spi1: spi@f8008000 {
+				status = "okay";
+
+				spidev@0 {
+					compatible = "spidev";
+					reg = <0>;
+					spi-max-frequency = <8000000>;
+				};
+			};
+
+			watchdog@fffffe40 {
+				status = "okay";
+			};
+		};
+
+		usb0: gadget@00500000 {
+			status = "okay";
+		};
+
+		usb1: ohci@00600000 {
+			status = "okay";
+		};
+
+		usb2: ehci@00700000 {
+			status = "okay";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		btn0@pa10 {
+			label = "BTNESC";
+			linux,code = <1>; /* ESC button */
+			gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+
+		irqbtn@pe31 {
+			label = "IRQBTN";
+			linux,code = <99>; /* SysReq button */
+			gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "wb50n:blue:led0";
+			gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
+		};
+
+		led1 {
+			label = "wb50n:green:led1";
+			gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+		};
+
+		led2 {
+			label = "wb50n:red:led2";
+			gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+		};
+	};
+};

target/linux/at91/files/arch/arm/boot/dts/wb50n.dtsi

@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * wb50n.dts - Device Tree file for wb50n board
+ *
+ *  Copyright (C) 2015 Laird
+ */
+
+#include "sama5d31.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk loglevel=4 mem=64M";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	clocks {
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <12000000>;
+		};
+	};
+
+	ahb {
+
+		apb {
+			pmc: pmc@fffffc00 {
+				main: mainck {
+					clock-frequency = <12000000>;
+				};
+
+				periphck {
+					usart1_clk: usart1_clk {
+						#clock-cells = <0>;
+						reg = <13>;
+						atmel,clk-output-range = <0 132000000>;
+					};
+				};
+			};
+
+			pinctrl@fffff200 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins =
+							<AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+						atmel,pins =
+							<AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
+					};
+				};
+			};
+
+			mmc0: mmc@f0000000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+				cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
+				slot@0 {
+					reg = <0>;
+					bus-width = <4>;
+				};
+			};
+
+			mmc1: mmc@f8000000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
+				status = "okay";
+				slot@0 {
+					reg = <0>;
+					bus-width = <4>;
+				};
+			};
+
+			macb1: ethernet@f802c000 {
+				phy-mode = "rmii";
+			};
+
+
+			dbgu: serial@ffffee00 {
+				dmas = <0>, <0>;	/*  Do not use DMA for dbgu */
+			};
+
+			/* On BB40 this port is labeled UART1 */
+			usart0: serial@f001c000 {
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+			};
+
+			/* On BB40 this port is labeled UART0 */
+			usart1: serial@f0020000 {
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+				dtr-gpios = <&pioD 13 GPIO_ACTIVE_LOW>;
+				dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
+				dcd-gpios = <&pioD 7 GPIO_ACTIVE_LOW>;
+				rng-gpios = <&pioD 8 GPIO_ACTIVE_LOW>;
+			};
+
+			/* USART3 is direct-connect to the Bluetooth UART on the radio SIP */
+			usart3: serial@f8024000 {
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
+				status = "okay";
+			};
+
+			spi1: spi@f8008000 {
+				cs-gpios = <&pioC 25 0>, <0>, <0>, <0>;
+			};
+
+			sckc@fffffe50 {
+				slow_osc: slow_osc {
+					atmel,osc-bypass;
+				};
+			};
+		};
+
+		nand0: nand@60000000 {
+			nand-bus-width = <8>;
+			nand-ecc-mode = "hw";
+			atmel,has-pmecc;
+			atmel,pmecc-cap = <8>;
+			atmel,pmecc-sector-size = <512>;
+			nand-on-flash-bbt;
+			status = "okay";
+
+			at91bootstrap@0 {
+				label = "at91bs";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot@20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv@a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv@c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			kernel-a@e0000 {
+				label = "kernel-a";
+				reg = <0xe0000 0x500000>;
+			};
+
+			kernel-b@5e0000 {
+				label = "kernel-b";
+				reg = <0x5e0000 0x500000>;
+			};
+
+			rootfs-a@ae0000 {
+				label = "rootfs-a";
+				reg = <0xae0000 0x3000000>;
+			};
+
+			rootfs-b@3ae0000 {
+				label = "rootfs-b";
+				reg = <0x3ae0000 0x3000000>;
+			};
+
+			user@6ae0000 {
+				label = "user";
+				reg = <0x6ae0000 0x14e0000>;
+			};
+
+		};
+
+		usb0: gadget@00500000 {
+			atmel,vbus-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usba_vbus>;
+		};
+
+		usb1: ohci@00600000 {
+			num-ports = <3>;
+			atmel,vbus-gpio = <&pioA 2 GPIO_ACTIVE_LOW>;
+			atmel,oc-gpio = <&pioA 4 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	atheros {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+ 	};
+};

target/linux/at91/image/Config.in

@@ -0,0 +1,10 @@
+config AT91_DFBOOT
+	bool "Build dataflashboot loader"
+	depends on TARGET_at91
+	default n
+
+config FLEXIBITY_ROOT
+	bool "Build Flexibity RootFS (with embedded kernel)"
+	depends on TARGET_at91_flexibity
+	default n
+

target/linux/at91/image/Makefile

@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2006-2013 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+KERNEL_LOADADDR := 0x20008000
+
+define Build/at91-install-zImage
+	$(CP) $(KDIR)/zImage $@
+endef
+
+include $(SUBTARGET).mk
+
+AT91_SD_BOOT_PARTSIZE:=64
+FAT32_BLOCK_SIZE:=1024
+FAT32_BLOCKS:=$(shell echo \
+  $$(($(AT91_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE))))
+
+define Device/Default
+  $(Device/default-nand)
+  PROFILES := Default
+  FILESYSTEMS := squashfs ubifs ext4
+  DEVICE_DTS = $(lastword $(subst _, ,$(1)))
+  KERNEL_NAME := zImage
+  KERNEL_SIZE := 4096k
+  KERNEL := kernel-bin | append-dtb | lzma | uImage lzma
+  DTB_SIZE := 128k
+endef
+
+define Device/dtb
+  KERNEL := kernel-bin | lzma | uImage lzma
+endef
+
+define Device/evaluation-sdimage
+  IMAGES += sdcard.img.gz
+  IMAGE/sdcard.img.gz := at91-sdcard
+endef
+
+define Device/evaluation
+  KERNEL_INSTALL := 1
+  KERNEL_SUFFIX := -uImage
+  IMAGES := root.ubi
+  IMAGE/root.ubi := append-ubi
+endef
+
+define Device/evaluation-zImage
+  IMAGES += zImage
+  IMAGE/zImage := at91-install-zImage
+endef
+
+define Device/evaluation-dtb
+  $(Device/evaluation)
+  $(Device/dtb)
+  KERNEL_SUFFIX := -fit-zImage.itb
+  KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+endef
+
+define Device/evaluation-fit
+  $(Device/evaluation)
+  KERNEL_SUFFIX := -fit-uImage.itb
+  KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
+endef
+
+define Device/production
+  UBINIZE_OPTS := -E 5
+  IMAGES := factory.bin
+  IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
+endef
+
+define Device/production-dtb
+  $(Device/production)
+  $(Device/dtb)
+  IMAGE/factory.bin := append-dtb | pad-to $$$$(DTB_SIZE) | \
+	append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
+endef
+
+$(eval $(call BuildImage))

target/linux/at91/image/dfboot/Makefile

@@ -0,0 +1,35 @@
+#
+# Copyright (C) 2006 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=dfboot
+PKG_VERSION:=0.1
+PKG_RELEASE:=1
+
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
+
+include $(INCLUDE_DIR)/package.mk
+
+define Build/Prepare
+	mkdir -p $(PKG_BUILD_DIR)
+	$(CP) ./src/* $(PKG_BUILD_DIR)/
+endef
+
+define Build/Compile
+	$(MAKE) -C $(PKG_BUILD_DIR) \
+		$(TARGET_CONFIGURE_OPTS) \
+		CFLAGS="$(TARGET_CFLAGS)" \
+		LDFLAGS="$(LIBGCC_S)"
+endef
+
+define Build/InstallDev
+	dd if=$(PKG_BUILD_DIR)/binary/dfboot.bin of=$(PKG_BUILD_DIR)/binary/dfboot.block bs=32k count=1 conv=sync
+endef
+
+$(eval $(call Build/DefaultTargets))

target/linux/at91/image/dfboot/src/Makefile

@@ -0,0 +1,94 @@
+# Makefile for DataFlashBoot.bin
+# Must use toolchain with H/W FLoating Point
+
+BASENAME=dfboot
+BINNAME=$(BASENAME).bin
+OUTNAME=$(BASENAME).out
+LSSNAME=$(BASENAME).lss
+MAPNAME=$(BASENAME).map
+
+BASENAME2=dfbptest
+BINNAME2=$(BASENAME2).bin
+OUTNAME2=$(BASENAME2).out
+LSSNAME2=$(BASENAME2).lss
+MAPNAME2=$(BASENAME2).map
+
+INCPATH=include
+
+CFLAGS_LOCAL=-Os -Wall -I$(INCPATH)
+BUILD=$(CC) $(CFLAGS) $(CFLAGS_LOCAL)
+
+LDFLAGS+=-T elf32-littlearm.lds -Ttext 0
+LINK=$(LD) $(LDFLAGS)
+
+OBJS=objs/cstartup_ram.o objs/at45.o objs/com.o objs/dataflash.o\
+	objs/div0.o objs/init.o objs/main.o objs/asm_isr.o objs/asm_mci_isr.o\
+	objs/mci_device.o objs/jump.o objs/_udivsi3.o objs/_umodsi3.o
+
+OBJS2=objs/cstartup_ram.o objs/at45.o objs/com.o objs/dataflash.o\
+	objs/div0.o objs/init.o objs/ptmain.o objs/asm_isr.o objs/asm_mci_isr.o\
+	objs/mci_device.o objs/jump.o objs/_udivsi3.o objs/_umodsi3.o
+
+I=config.h com.h dataflash.h embedded_services.h main.h stdio.h include/AT91RM9200.h include/lib_AT91RM9200.h 
+
+all:clean $(BASENAME) $(BASENAME2)
+
+$(BASENAME): $(OBJS)
+	$(LINK) -n -o $(OUTNAME) $(OBJS)
+	$(OBJCOPY) $(OUTNAME) -O binary $(BINNAME)
+	$(OBJDUMP) -h -s $(OUTNAME) > $(LSSNAME)
+	$(NM) -n $(OUTNAME) | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(MAPNAME)
+	cp $(BINNAME) binary
+	
+$(BASENAME2): $(OBJS2)
+	$(LINK) -n -o $(OUTNAME2) $(OBJS2)
+	$(OBJCOPY) $(OUTNAME2) -O binary $(BINNAME2)
+	$(OBJDUMP) -h -s $(OUTNAME2) > $(LSSNAME2)
+	$(NM) -n $(OUTNAME2) | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(MAPNAME2)
+	cp $(BINNAME2) binary
+	
+# C objects here
+objs/at45.o: at45.c	$(I)
+	$(BUILD) -c -o objs/at45.o		at45.c
+objs/com.o: com.c	$(I)
+	$(BUILD) -c -o objs/com.o		com.c
+objs/dataflash.o: dataflash.c	$(I)
+	$(BUILD) -c -o objs/dataflash.o		dataflash.c
+objs/mci_device.o: mci_device.c	$(I)
+	$(BUILD) -c -o objs/mci_device.o		mci_device.c
+objs/div0.o: div0.c	$(I)
+	$(BUILD) -c -o objs/div0.o		div0.c
+objs/init.o: init.c	$(I)
+	$(BUILD) -c -o objs/init.o		init.c
+objs/main.o: main.c	$(I)
+	$(BUILD) -c -o objs/main.o		main.c
+objs/ptmain.o: main.c	$(I)
+	$(BUILD) -c -D PRODTEST -o objs/ptmain.o		main.c
+
+# ASM objects here
+objs/asm_isr.o: asm_isr.S
+	$(BUILD) -c -o objs/asm_isr.o		asm_isr.S
+objs/asm_mci_isr.o: asm_mci_isr.S
+	$(BUILD) -c -o objs/asm_mci_isr.o		asm_mci_isr.S
+objs/cstartup_ram.o: cstartup_ram.S
+	$(BUILD) -c -o objs/cstartup_ram.o	cstartup_ram.S
+objs/jump.o: jump.S
+	$(BUILD) -c -o objs/jump.o		jump.S
+objs/_udivsi3.o: _udivsi3.S
+	$(BUILD) -c -o objs/_udivsi3.o		_udivsi3.S
+objs/_umodsi3.o: _umodsi3.S
+	$(BUILD) -c -o objs/_umodsi3.o 		_umodsi3.S
+
+install:	$(BINNAME) $(BINNAME2)
+	cp $(BINNAME) binary
+	cp $(BINNAME2) binary
+
+clean:
+	rm -f *~
+	rm -f objs/*
+	rm -f *.out
+	rm -f *.bin
+	rm -f *.lss
+	rm -f *.map
+	rm -f .unpacked
+	mkdir -p objs

target/linux/at91/image/dfboot/src/_udivsi3.S

@@ -0,0 +1,77 @@
+/* # 1 "libgcc1.S" */
+@ libgcc1 routines for ARM cpu.
+@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
+dividend	.req	r0
+divisor		.req	r1
+result		.req	r2
+curbit		.req	r3
+/* ip		.req	r12	*/
+/* sp		.req	r13	*/
+/* lr		.req	r14	*/
+/* pc		.req	r15	*/
+	.text
+	.globl	 __udivsi3
+	.type  __udivsi3       ,function
+	.align	0
+ __udivsi3      :
+	cmp	divisor, #0
+	beq	Ldiv0
+	mov	curbit, #1
+	mov	result, #0
+	cmp	dividend, divisor
+	bcc	Lgot_result
+Loop1:
+	@ Unless the divisor is very big, shift it up in multiples of
+	@ four bits, since this is the amount of unwinding in the main
+	@ division loop.  Continue shifting until the divisor is
+	@ larger than the dividend.
+	cmp	divisor, #0x10000000
+	cmpcc	divisor, dividend
+	movcc	divisor, divisor, lsl #4
+	movcc	curbit, curbit, lsl #4
+	bcc	Loop1
+Lbignum:
+	@ For very big divisors, we must shift it a bit at a time, or
+	@ we will be in danger of overflowing.
+	cmp	divisor, #0x80000000
+	cmpcc	divisor, dividend
+	movcc	divisor, divisor, lsl #1
+	movcc	curbit, curbit, lsl #1
+	bcc	Lbignum
+Loop3:
+	@ Test for possible subtractions, and note which bits
+	@ are done in the result.  On the final pass, this may subtract
+	@ too much from the dividend, but the result will be ok, since the
+	@ "bit" will have been shifted out at the bottom.
+	cmp	dividend, divisor
+	subcs	dividend, dividend, divisor
+	orrcs	result, result, curbit
+	cmp	dividend, divisor, lsr #1
+	subcs	dividend, dividend, divisor, lsr #1
+	orrcs	result, result, curbit, lsr #1
+	cmp	dividend, divisor, lsr #2
+	subcs	dividend, dividend, divisor, lsr #2
+	orrcs	result, result, curbit, lsr #2
+	cmp	dividend, divisor, lsr #3
+	subcs	dividend, dividend, divisor, lsr #3
+	orrcs	result, result, curbit, lsr #3
+	cmp	dividend, #0			@ Early termination?
+	movnes	curbit, curbit, lsr #4		@ No, any more bits to do?
+	movne	divisor, divisor, lsr #4
+	bne	Loop3
+Lgot_result:
+	mov	r0, result
+	mov 	pc, lr
+Ldiv0:
+	str	lr, [sp, #-4]!
+	bl	 __div0       (PLT)
+	mov	r0, #0			@ about as wrong as it could be
+	ldmia	sp!, {pc}
+	.size  __udivsi3       , . -  __udivsi3
+/* # 235 "libgcc1.S" */
+/* # 320 "libgcc1.S" */
+/* # 421 "libgcc1.S" */
+/* # 433 "libgcc1.S" */
+/* # 456 "libgcc1.S" */
+/* # 500 "libgcc1.S" */
+/* # 580 "libgcc1.S" */

target/linux/at91/image/dfboot/src/_umodsi3.S

@@ -0,0 +1,88 @@
+/* # 1 "libgcc1.S" */
+@ libgcc1 routines for ARM cpu.
+@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
+/* # 145 "libgcc1.S" */
+dividend	.req	r0
+divisor		.req	r1
+overdone	.req	r2
+curbit		.req	r3
+/* ip		.req	r12	*/
+/* sp		.req	r13	*/
+/* lr		.req	r14	*/
+/* pc		.req	r15	*/
+	.text
+	.globl	 __umodsi3
+	.type  __umodsi3       ,function
+	.align 0
+ __umodsi3      :
+	cmp	divisor, #0
+	beq	Ldiv0
+	mov	curbit, #1
+	cmp	dividend, divisor
+	movcc  	pc, lr
+Loop1:
+	@ Unless the divisor is very big, shift it up in multiples of
+	@ four bits, since this is the amount of unwinding in the main
+	@ division loop.  Continue shifting until the divisor is
+	@ larger than the dividend.
+	cmp	divisor, #0x10000000
+	cmpcc	divisor, dividend
+	movcc	divisor, divisor, lsl #4
+	movcc	curbit, curbit, lsl #4
+	bcc	Loop1
+Lbignum:
+	@ For very big divisors, we must shift it a bit at a time, or
+	@ we will be in danger of overflowing.
+	cmp	divisor, #0x80000000
+	cmpcc	divisor, dividend
+	movcc	divisor, divisor, lsl #1
+	movcc	curbit, curbit, lsl #1
+	bcc	Lbignum
+Loop3:
+	@ Test for possible subtractions.  On the final pass, this may
+	@ subtract too much from the dividend, so keep track of which
+	@ subtractions are done, we can fix them up afterwards...
+	mov	overdone, #0
+	cmp	dividend, divisor
+	subcs	dividend, dividend, divisor
+	cmp	dividend, divisor, lsr #1
+	subcs	dividend, dividend, divisor, lsr #1
+	orrcs	overdone, overdone, curbit, ror #1
+	cmp	dividend, divisor, lsr #2
+	subcs	dividend, dividend, divisor, lsr #2
+	orrcs	overdone, overdone, curbit, ror #2
+	cmp	dividend, divisor, lsr #3
+	subcs	dividend, dividend, divisor, lsr #3
+	orrcs	overdone, overdone, curbit, ror #3
+	mov	ip, curbit
+	cmp	dividend, #0			@ Early termination?
+	movnes	curbit, curbit, lsr #4		@ No, any more bits to do?
+	movne	divisor, divisor, lsr #4
+	bne	Loop3
+	@ Any subtractions that we should not have done will be recorded in
+	@ the top three bits of "overdone".  Exactly which were not needed
+	@ are governed by the position of the bit, stored in ip.
+	@ If we terminated early, because dividend became zero,
+	@ then none of the below will match, since the bit in ip will not be
+	@ in the bottom nibble.
+	ands	overdone, overdone, #0xe0000000
+	moveq  	pc, lr				@ No fixups needed
+	tst	overdone, ip, ror #3
+	addne	dividend, dividend, divisor, lsr #3
+	tst	overdone, ip, ror #2
+	addne	dividend, dividend, divisor, lsr #2
+	tst	overdone, ip, ror #1
+	addne	dividend, dividend, divisor, lsr #1
+	mov 	pc, lr
+Ldiv0:
+	str	lr, [sp, #-4]!
+	bl	 __div0       (PLT)
+	mov	r0, #0			@ about as wrong as it could be
+	ldmia	sp!, {pc}
+	.size  __umodsi3       , . -  __umodsi3
+/* # 320 "libgcc1.S" */
+/* # 421 "libgcc1.S" */
+/* # 433 "libgcc1.S" */
+/* # 456 "libgcc1.S" */
+/* # 500 "libgcc1.S" */
+/* # 580 "libgcc1.S" */

target/linux/at91/image/dfboot/src/asm_isr.S

@@ -0,0 +1,75 @@
+#include "AT91RM9200_inc.h"
+
+#define ARM_MODE_USER           0x10
+#define ARM_MODE_FIQ            0x11
+#define ARM_MODE_IRQ            0x12
+#define ARM_MODE_SVC            0x13
+#define ARM_MODE_ABORT          0x17
+#define ARM_MODE_UNDEF          0x1B
+#define ARM_MODE_SYS            0x1F
+
+#define I_BIT                   0x80
+#define F_BIT                   0x40
+#define T_BIT                   0x20
+
+
+/* -----------------------------------------------------------------------------
+   AT91F_ASM_SPI_Handler
+   ---------------------
+      Handler called by the AIC
+        
+      Save context
+        Call C handler
+    Restore context
+   ----------------------------------------------------------------------------- */
+		
+.global AT91F_ST_ASM_HANDLER
+
+AT91F_ST_ASM_HANDLER:
+/*  Adjust and save LR_irq in IRQ stack */
+ 	sub         r14, r14, #4
+	stmfd       sp!, {r14}
+
+/*  Write in the IVR to support Protect Mode
+  No effect in Normal Mode
+  De-assert the NIRQ and clear the source in Protect Mode */
+	ldr         r14, =AT91C_BASE_AIC
+	str         r14, [r14, #AIC_IVR]
+
+/*  Save SPSR and r0 in IRQ stack */
+	mrs         r14, SPSR
+	stmfd       sp!, {r0, r14}
+
+/*  Enable Interrupt and Switch in SYS Mode */
+	mrs         r0, CPSR
+	bic         r0, r0, #I_BIT
+	orr         r0, r0, #ARM_MODE_SYS
+	msr         CPSR_c, r0
+ 
+/* Save scratch/used registers and LR in User Stack */
+	stmfd       sp!, { r1-r3, r12, r14}
+
+	ldr     r1, =AT91F_ST_HANDLER
+	mov     r14, pc
+	bx      r1
+
+/*  Restore scratch/used registers and LR from User Stack */
+	ldmia       sp!, { r1-r3, r12, r14}
+
+/*  Disable Interrupt and switch back in IRQ mode */
+	mrs         r0, CPSR
+	bic         r0, r0, #ARM_MODE_SYS
+	orr         r0, r0, #I_BIT | ARM_MODE_IRQ
+	msr         CPSR_c, r0
+
+/*  Mark the End of Interrupt on the AIC */
+	ldr         r0, =AT91C_BASE_AIC
+	str         r0, [r0, #AIC_EOICR]
+
+/*  Restore SPSR_irq and r0 from IRQ stack */
+	ldmia       sp!, {r0, r14}
+	msr         SPSR_cxsf, r14
+
+/*  Restore adjusted  LR_irq from IRQ stack directly in the PC */
+	ldmia       sp!, {pc}^
+

target/linux/at91/image/dfboot/src/asm_mci_isr.S

@@ -0,0 +1,75 @@
+#include <AT91RM9200_inc.h>
+
+#define ARM_MODE_USER           0x10
+#define ARM_MODE_FIQ            0x11
+#define ARM_MODE_IRQ            0x12
+#define ARM_MODE_SVC            0x13
+#define ARM_MODE_ABORT          0x17
+#define ARM_MODE_UNDEF          0x1B
+#define ARM_MODE_SYS            0x1F
+
+#define I_BIT                   0x80
+#define F_BIT                   0x40
+#define T_BIT                   0x20
+
+
+/* -----------------------------------------------------------------------------
+   AT91F_ASM_MCI_Handler
+   ---------------------
+      Handler called by the AIC
+        
+      Save context
+        Call C handler
+    Restore context
+   ----------------------------------------------------------------------------- */
+		
+.global AT91F_ASM_MCI_Handler  
+
+AT91F_ASM_MCI_Handler:
+/*  Adjust and save LR_irq in IRQ stack */
+ 	sub         r14, r14, #4
+	stmfd       sp!, {r14}
+
+/*  Write in the IVR to support Protect Mode
+  No effect in Normal Mode
+  De-assert the NIRQ and clear the source in Protect Mode */
+	ldr         r14, =AT91C_BASE_AIC
+	str         r14, [r14, #AIC_IVR]
+
+/*  Save SPSR and r0 in IRQ stack */
+	mrs         r14, SPSR
+	stmfd       sp!, {r0, r14}
+
+/*  Enable Interrupt and Switch in SYS Mode */
+	mrs         r0, CPSR
+	bic         r0, r0, #I_BIT
+	orr         r0, r0, #ARM_MODE_SYS
+	msr         CPSR_c, r0
+ 
+/* Save scratch/used registers and LR in User Stack */
+	stmfd       sp!, { r1-r3, r12, r14}
+
+	ldr     r1, =AT91F_MCI_Handler
+	mov     r14, pc
+	bx      r1
+
+/*  Restore scratch/used registers and LR from User Stack */
+	ldmia       sp!, { r1-r3, r12, r14}
+
+/*  Disable Interrupt and switch back in IRQ mode */
+	mrs         r0, CPSR
+	bic         r0, r0, #ARM_MODE_SYS
+	orr         r0, r0, #I_BIT | ARM_MODE_IRQ
+	msr         CPSR_c, r0
+
+/*  Mark the End of Interrupt on the AIC */
+	ldr         r0, =AT91C_BASE_AIC
+	str         r0, [r0, #AIC_EOICR]
+
+/*  Restore SPSR_irq and r0 from IRQ stack */
+	ldmia       sp!, {r0, r14}
+	msr         SPSR_cxsf, r14
+
+/*  Restore adjusted  LR_irq from IRQ stack directly in the PC */
+	ldmia       sp!, {pc}^
+

target/linux/at91/image/dfboot/src/at45.c

@@ -0,0 +1,595 @@
+/*----------------------------------------------------------------------------
+ *      ATMEL Microcontroller Software Support  -  ROUSSET  -
+ *----------------------------------------------------------------------------
+ * The software is delivered "AS IS" without warranty or condition of any
+ * kind, either express, implied or statutory. This includes without
+ * limitation any warranty or condition with respect to merchantability or
+ * fitness for any particular purpose, or against the infringements of
+ * intellectual property rights of others.
+ *----------------------------------------------------------------------------
+ * File Name           : at45c.h
+ * Object              : 
+ *
+ * 1.0  10/12/03 HIi    : Creation.
+ * 1.01 03/05/04 HIi    : Bug Fix in AT91F_DataFlashWaitReady() Function.
+ *----------------------------------------------------------------------------
+ */
+#include "config.h"
+#include "stdio.h"
+#include "AT91RM9200.h"
+#include "lib_AT91RM9200.h"
+#include "dataflash.h"
+#include "main.h"
+
+
+/*----------------------------------------------------------------------------*/
+/* \fn    AT91F_SpiInit                                                       */
+/* \brief SPI Low level Init                                                  */
+/*----------------------------------------------------------------------------*/
+void AT91F_SpiInit(void) {
+	/* Configure PIOs */
+	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | 
+	                           AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
+	                           AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
+	                           AT91C_PA2_SPCK;
+	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 |
+	                           AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
+	                           AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
+	                           AT91C_PA2_SPCK;
+	/* Enable CLock */
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
+
+	/* Reset the SPI */
+	AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
+
+	/* Configure SPI in Master Mode with No CS selected !!! */
+	AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
+
+	/* Configure CS0 and CS3 */
+	*(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
+	                       (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
+	                       ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
+	*(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
+	                       (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
+	                       ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
+}
+
+
+/*----------------------------------------------------------------------------*/
+/* \fn    AT91F_SpiEnable                                                     */
+/* \brief Enable SPI chip select                                              */
+/*----------------------------------------------------------------------------*/
+static void AT91F_SpiEnable(int cs) {
+	switch(cs) {
+	case 0:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
+		AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
+		AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH << 16) & AT91C_SPI_PCS);
+		break;
+	case 3:	/* Configure SPI CS3 for Serial DataFlash Card */
+		/* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
+		AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7;	/* Set in PIO mode */
+		AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7;	/* Configure in output */
+		/* Clear Output */
+		AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
+		/* Configure PCS */
+		AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
+		AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
+		break;
+	}
+
+	/* SPI_Enable */
+	AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
+}
+
+/*----------------------------------------------------------------------------*/
+/* \fn    AT91F_SpiWrite                                                      */
+/* \brief Set the PDC registers for a transfert                               */
+/*----------------------------------------------------------------------------*/
+static unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
+{
+   	unsigned int timeout;
+	
+   	AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+
+   	/* Initialize the Transmit and Receive Pointer */
+    	AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
+    	AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
+
+    	/* Intialize the Transmit and Receive Counters */
+    	AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
+    	AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
+
+	if ( pDesc->tx_data_size != 0 ) {
+	   	/* Initialize the Next Transmit and Next Receive Pointer */
+	   	AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
+		AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
+
+		/* Intialize the Next Transmit and Next Receive Counters */
+		AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
+	 	AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
+   	}
+
+	/* ARM simple, non interrupt dependent timer */
+	timeout = 0;
+
+	AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
+	while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF));
+
+   	AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+
+	if (timeout >= AT91C_DATAFLASH_TIMEOUT){
+		return AT91C_DATAFLASH_ERROR;
+	}
+
+	return AT91C_DATAFLASH_OK;
+}
+
+
+/*----------------------------------------------------------------------*/
+/* \fn    AT91F_DataFlashSendCommand					*/
+/* \brief Generic function to send a command to the dataflash		*/
+/*----------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
+	AT91PS_DataFlash pDataFlash,
+	unsigned char OpCode,
+	unsigned int CmdSize,
+	unsigned int DataflashAddress)
+{
+	unsigned int adr;
+
+	/* process the address to obtain page address and byte address */
+	adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) 
+	        << pDataFlash->pDevice->page_offset) +
+	        (DataflashAddress % (pDataFlash->pDevice->pages_size));
+
+	/* fill the  command  buffer */
+	pDataFlash->pDataFlashDesc->command[0] = OpCode;
+	if (pDataFlash->pDevice->pages_number >= 16384)
+	{
+		pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
+		pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
+		pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
+		pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
+	}
+	else
+	{	
+		pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
+		pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
+		pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
+		pDataFlash->pDataFlashDesc->command[4] = 0;
+	}
+	pDataFlash->pDataFlashDesc->command[5] = 0;
+	pDataFlash->pDataFlashDesc->command[6] = 0;
+	pDataFlash->pDataFlashDesc->command[7] = 0;
+
+	/* Initialize the SpiData structure for the spi write fuction */
+	pDataFlash->pDataFlashDesc->tx_cmd_pt   =  pDataFlash->pDataFlashDesc->command ;
+	pDataFlash->pDataFlashDesc->tx_cmd_size =  CmdSize ;
+	pDataFlash->pDataFlashDesc->rx_cmd_pt   =  pDataFlash->pDataFlashDesc->command ;
+	pDataFlash->pDataFlashDesc->rx_cmd_size =  CmdSize ;
+
+	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);			
+}
+
+
+/*----------------------------------------------------------------------*/
+/* \fn    AT91F_DataFlashGetStatus					*/
+/* \brief Read the status register of the dataflash			*/
+/*----------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
+{
+	AT91S_DataFlashStatus status;
+
+	/* first send the read status command (D7H) */
+	pDesc->command[0] = DB_STATUS;
+	pDesc->command[1] = 0;
+
+	pDesc->DataFlash_state = GET_STATUS;
+    	pDesc->tx_data_size    = 0 ; /* Transmit the command and receive response */
+    	pDesc->tx_cmd_pt       = pDesc->command ;
+    	pDesc->rx_cmd_pt       = pDesc->command ;
+    	pDesc->rx_cmd_size     = 2 ;
+    	pDesc->tx_cmd_size     = 2 ;
+    	status = AT91F_SpiWrite (pDesc);
+
+	pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
+	return status;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : AT91F_DataFlashWaitReady
+ * Object              : wait for dataflash ready (bit7 of the status register == 1)
+ * Input Parameters    : DataFlash Service and timeout
+ * Return value        : DataFlash status "ready or not"
+ *-----------------------------------------------------------------------------
+ */
+static AT91S_DataFlashStatus AT91F_DataFlashWaitReady(
+	AT91PS_DataflashDesc pDataFlashDesc,
+	unsigned int timeout)
+{
+	pDataFlashDesc->DataFlash_state = IDLE;
+        do {
+                AT91F_DataFlashGetStatus(pDataFlashDesc);
+                timeout--;
+        }
+        while(((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0));
+
+        if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
+                return AT91C_DATAFLASH_ERROR;
+
+        return AT91C_DATAFLASH_OK;
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataFlashContinuousRead                          */
+/* Object              : Continuous stream Read                                 */
+/* Input Parameters    : DataFlash Service                                      */
+/*                     : <src> = dataflash address                              */
+/*                     : <*dataBuffer> = data buffer pointer                    */
+/*                     : <sizeToRead> = data buffer size                        */
+/* Return value        : State of the dataflash                                 */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(
+ 	AT91PS_DataFlash pDataFlash,
+	int src,
+	unsigned char *dataBuffer,
+	int sizeToRead )
+{
+	AT91S_DataFlashStatus status;
+	/* Test the size to read in the device */
+	if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
+		return AT91C_DATAFLASH_MEMORY_OVERFLOW;
+
+	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
+	pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
+	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
+	pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
+	
+	status = AT91F_DataFlashSendCommand(pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
+	/* Send the command to the dataflash */
+	return(status);
+}
+
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_MainMemoryToBufferTransfer                       */
+/* Object              : Read a page in the SRAM Buffer 1 or 2                  */
+/* Input Parameters    : DataFlash Service                                      */
+/*                     : Page concerned                                         */
+/*                     :                                                        */
+/* Return value        : State of the dataflash                                 */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfer(
+	AT91PS_DataFlash pDataFlash,
+	unsigned char BufferCommand,
+	unsigned int page)
+{
+	int cmdsize;
+	/* Test if the buffer command is legal */
+	if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
+		return AT91C_DATAFLASH_BAD_COMMAND;
+
+	/* no data to transmit or receive */
+    	pDataFlash->pDataFlashDesc->tx_data_size = 0;
+	cmdsize = 4;
+	if (pDataFlash->pDevice->pages_number >= 16384)
+		cmdsize = 5;
+	return(AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize,
+	                                  page*pDataFlash->pDevice->pages_size));
+}
+
+
+
+/*----------------------------------------------------------------------------- */
+/* Function Name       : AT91F_DataFlashWriteBuffer                             */
+/* Object              : Write data to the internal sram buffer 1 or 2          */
+/* Input Parameters    : DataFlash Service                                      */
+/*                     : <BufferCommand> = command to write buffer1 or buffer2  */
+/*                     : <*dataBuffer> = data buffer to write                   */
+/*                     : <bufferAddress> = address in the internal buffer       */
+/*                     : <SizeToWrite> = data buffer size                       */
+/* Return value        : State of the dataflash                                 */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(
+	AT91PS_DataFlash pDataFlash,
+	unsigned char BufferCommand,
+	unsigned char *dataBuffer,
+	unsigned int bufferAddress,
+	int SizeToWrite )
+{
+	int cmdsize;
+	/* Test if the buffer command is legal */
+	if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
+		return AT91C_DATAFLASH_BAD_COMMAND;
+
+	/* buffer address must be lower than page size */
+	if (bufferAddress > pDataFlash->pDevice->pages_size)
+		return AT91C_DATAFLASH_BAD_ADDRESS;
+
+    	/* Send first Write Command */
+	pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
+	pDataFlash->pDataFlashDesc->command[1] = 0;
+	if (pDataFlash->pDevice->pages_number >= 16384)
+	{
+	   	pDataFlash->pDataFlashDesc->command[2] = 0;
+	   	pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress &  pDataFlash->pDevice->byte_mask)) >> 8) ;
+	   	pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress  & 0x00FF) ;
+		cmdsize = 5;
+	}
+	else
+	{
+	   	pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress &  pDataFlash->pDevice->byte_mask)) >> 8) ;
+	   	pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress  & 0x00FF) ;
+	   	pDataFlash->pDataFlashDesc->command[4] = 0;
+		cmdsize = 4;
+	}
+		
+	pDataFlash->pDataFlashDesc->tx_cmd_pt 	 = pDataFlash->pDataFlashDesc->command ;
+	pDataFlash->pDataFlashDesc->tx_cmd_size  = cmdsize ;
+	pDataFlash->pDataFlashDesc->rx_cmd_pt 	 = pDataFlash->pDataFlashDesc->command ;
+	pDataFlash->pDataFlashDesc->rx_cmd_size  = cmdsize ;
+
+	pDataFlash->pDataFlashDesc->rx_data_pt 	 = dataBuffer ;
+	pDataFlash->pDataFlashDesc->tx_data_pt 	 = dataBuffer ;
+	pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
+	pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
+
+	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_PageErase                                        */             
+/* Object              : Read a page in the SRAM Buffer 1 or 2                  */
+/* Input Parameters    : DataFlash Service                                      */
+/*                     : Page concerned                                         */
+/*                     :                                                        */
+/* Return value        : State of the dataflash                                 */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_PageErase(
+	AT91PS_DataFlash pDataFlash,
+	unsigned int page)
+{
+	int cmdsize;
+	/* Test if the buffer command is legal */	
+	/* no data to transmit or receive */
+    	pDataFlash->pDataFlashDesc->tx_data_size = 0;
+	
+	cmdsize = 4;
+	if (pDataFlash->pDevice->pages_number >= 16384)
+		cmdsize = 5;
+	return(AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize,
+	                                  page*pDataFlash->pDevice->pages_size));
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_WriteBufferToMain                                */
+/* Object              : Write buffer to the main memory                        */
+/* Input Parameters    : DataFlash Service                                      */
+/*                     : <BufferCommand> = command to send to buf1 or buf2      */
+/*                     : <dest> = main memory address                           */
+/* Return value        : State of the dataflash                                 */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_WriteBufferToMain (
+	AT91PS_DataFlash pDataFlash,
+	unsigned char BufferCommand,
+	unsigned int dest )
+{
+	int cmdsize;
+	/* Test if the buffer command is correct */
+	if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
+	    (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
+	    (BufferCommand != DB_BUF2_PAGE_PGM) &&
+	    (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
+		return AT91C_DATAFLASH_BAD_COMMAND;
+
+	/* no data to transmit or receive */
+	pDataFlash->pDataFlashDesc->tx_data_size = 0;
+
+	cmdsize = 4;
+	if (pDataFlash->pDevice->pages_number >= 16384)
+		cmdsize = 5;
+	/* Send the command to the dataflash */
+	return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_PartialPageWrite                                 */
+/* Object              : Erase partially a page                                 */
+/* Input Parameters    : <page> = page number                                   */
+/*                     : <AdrInpage> = adr to begin the fading                  */
+/*                     : <length> = Number of bytes to erase                    */
+/*------------------------------------------------------------------------------*/
+static AT91S_DataFlashStatus AT91F_PartialPageWrite (
+	AT91PS_DataFlash pDataFlash,
+	unsigned char *src,
+	unsigned int dest,
+	unsigned int size)
+{
+	unsigned int page;
+	unsigned int AdrInPage;
+
+	page = dest / (pDataFlash->pDevice->pages_size);
+	AdrInPage = dest % (pDataFlash->pDevice->pages_size);
+
+	/* Read the contents of the page in the Sram Buffer */
+	AT91F_MainMemoryToBufferTransfer(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
+	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	
+	/*Update the SRAM buffer */
+	AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
+	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	
+	/* Erase page if a 128 Mbits device */
+	if (pDataFlash->pDevice->pages_number >= 16384)
+	{
+		AT91F_PageErase(pDataFlash, page);
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	}
+
+	/* Rewrite the modified Sram Buffer in the main memory */
+	return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM,
+	                               (page*pDataFlash->pDevice->pages_size)));
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataFlashWrite                                   */
+/* Object              :                                                        */
+/* Input Parameters    : <*src> = Source buffer                                 */
+/*                     : <dest> = dataflash adress                              */
+/*                     : <size> = data buffer size                              */
+/*------------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashWrite(
+	AT91PS_DataFlash pDataFlash,
+	unsigned char *src,
+	int dest,
+	int size )
+{
+	unsigned int length;
+	unsigned int page;
+	unsigned int status;
+
+	AT91F_SpiEnable(pDataFlash->pDevice->cs);
+
+	if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
+		return AT91C_DATAFLASH_MEMORY_OVERFLOW;
+
+    	/* If destination does not fit a page start address */
+	if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size)))  != 0 ) {
+		length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
+
+		if (size < length)
+			length = size;
+
+		if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
+			return AT91C_DATAFLASH_ERROR;
+
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+
+		/* Update size, source and destination pointers */
+        	size -= length;
+        	dest += length;
+        	src += length;
+	}
+
+	while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) 
+	{
+		/* program dataflash page */		
+		page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
+
+		status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src,
+		                                    0, pDataFlash->pDevice->pages_size);
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	
+		status = AT91F_PageErase(pDataFlash, page);
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+		if (!status)
+			return AT91C_DATAFLASH_ERROR;
+		
+		status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
+		if(!status)
+			return AT91C_DATAFLASH_ERROR;
+
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	
+		/* Update size, source and destination pointers */
+	   	size -= pDataFlash->pDevice->pages_size ;
+	   	dest += pDataFlash->pDevice->pages_size ;
+	   	src  += pDataFlash->pDevice->pages_size ;
+	}
+
+	/* If still some bytes to read */
+	if ( size > 0 ) {
+		/* program dataflash page */
+		if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
+			return AT91C_DATAFLASH_ERROR;
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+	}
+	return AT91C_DATAFLASH_OK;
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataFlashRead                                    */
+/* Object              : Read a block in dataflash                              */
+/* Input Parameters    :                                                        */
+/* Return value        :                                                        */
+/*------------------------------------------------------------------------------*/
+int AT91F_DataFlashRead(
+	AT91PS_DataFlash pDataFlash,
+	unsigned long addr,
+	unsigned long size,
+	char *buffer)
+{
+	unsigned long SizeToRead;
+
+	AT91F_SpiEnable(pDataFlash->pDevice->cs);
+
+	if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT) != AT91C_DATAFLASH_OK)
+		return -1;
+
+	while (size)
+	{
+		SizeToRead = (size < 0x8000)? size:0x8000;
+
+		if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT)
+		    != AT91C_DATAFLASH_OK)
+			return -1;
+
+		if (AT91F_DataFlashContinuousRead (pDataFlash, addr, (unsigned char *)buffer,
+		                                   SizeToRead) != AT91C_DATAFLASH_OK)
+			return -1;
+
+		size -= SizeToRead;
+		addr += SizeToRead;
+		buffer += SizeToRead;
+	}
+
+   	return AT91C_DATAFLASH_OK;
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataflashProbe                                   */
+/* Object              :                                                        */
+/* Input Parameters    :                                                        */
+/* Return value	       : Dataflash status register                              */
+/*------------------------------------------------------------------------------*/
+int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
+{
+	AT91F_SpiEnable(cs);
+   	AT91F_DataFlashGetStatus(pDesc);
+   	return ((pDesc->command[1] == 0xFF)? 0: (pDesc->command[1] & 0x3C));
+}
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataFlashErase                                   */
+/* Object              :                                                        */
+/* Input Parameters    : <*pDataFlash> = Device info                            */
+/*------------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashErase(AT91PS_DataFlash pDataFlash)
+{
+	unsigned int page;
+	unsigned int status;
+
+	AT91F_SpiEnable(pDataFlash->pDevice->cs);
+ 
+ 	for(page=0; page < pDataFlash->pDevice->pages_number; page++)
+	    {
+		/* Erase dataflash page */
+		if ((page & 0x00FF) == 0)
+			printf("\rERA %d/%d", page, pDataFlash->pDevice->pages_number);
+		status = AT91F_PageErase(pDataFlash, page);
+		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_TIMEOUT);
+		if (!status)
+			return AT91C_DATAFLASH_ERROR;
+   	}
+
+	return AT91C_DATAFLASH_OK;
+}
+

target/linux/at91/image/dfboot/src/com.c

@@ -0,0 +1,368 @@
+/*----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
+ *----------------------------------------------------------------------------
+ * The software is delivered "AS IS" without warranty or condition of any
+ * kind, either express, implied or statutory. This includes without
+ * limitation any warranty or condition with respect to merchantability or
+ * fitness for any particular purpose, or against the infringements of
+ * intellectual property rights of others.
+ *----------------------------------------------------------------------------
+ * File Name           : com.c
+ * Object              : 
+ * Creation            : HIi   03/27/2003
+ *
+ *----------------------------------------------------------------------------
+ */
+#include "AT91RM9200.h"
+#include "lib_AT91RM9200.h"
+#include "config.h"
+#include "com.h"
+#include "stdio.h"
+
+static char erase_seq[] = "\b \b";		/* erase sequence	*/
+
+#define MAX_UARTS 1
+
+//unsigned int usa[2] = {(unsigned int)AT91C_BASE_DBGU, (unsigned int)AT91C_ALTERNATE_USART};
+unsigned int usa[1] = {(unsigned int)AT91C_BASE_DBGU};
+unsigned int us;
+int port_detected;
+
+void at91_init_uarts(void)
+{
+	int i;
+
+	port_detected = 0;
+	AT91F_DBGU_CfgPIO();
+	AT91F_US0_CfgPIO();
+	AT91F_US0_CfgPMC();
+
+	for(i=0; i<MAX_UARTS; i++) {
+		us = usa[i];
+		AT91F_US_ResetRx((AT91PS_USART)us);
+		AT91F_US_ResetTx((AT91PS_USART)us);
+
+		// Configure DBGU
+		AT91F_US_Configure(
+			(AT91PS_USART)us, // DBGU base address
+			AT91C_MASTER_CLOCK,            // 60 MHz
+			AT91C_US_ASYNC_MODE,           // mode Register to be programmed
+			115200,                        // baudrate to be programmed
+			0                              // timeguard to be programmed
+			);
+
+		// Enable Transmitter
+		AT91F_US_EnableTx((AT91PS_USART)us);
+		// Enable Receiver
+		AT91F_US_EnableRx((AT91PS_USART)us);
+	}
+	us = usa[0];
+}
+
+int at91_serial_putc(int ch)
+{
+	if (ch == '\n')
+		at91_serial_putc('\r');
+	while (!AT91F_US_TxReady((AT91PS_USART)us));
+	AT91F_US_PutChar((AT91PS_USART)us, (char)ch);
+	return ch;
+}
+
+/* This getc is modified to be able work on more than one port. On certain
+ * boards (i.e. Figment Designs VersaLink), the debug port is not available
+ * once the unit is in it's enclosure, so, if one needs to get into dfboot
+ * for any reason it is impossible. With this getc, it scans between the debug
+ * port and another port and once it receives a character, it sets that port
+ * as the debug port. */
+int at91_serial_getc()
+{
+	while(1) {
+#if 0
+		if (!port_detected) {
+			if (us == usa[0]) {
+				us = usa[1];
+			}
+			else {
+				us = usa[0];
+			}
+		}
+#endif
+		if(AT91F_US_RxReady((AT91PS_USART)us)) {
+#if 0
+			port_detected = 1;
+#endif
+			return((int)AT91F_US_GetChar((AT91PS_USART)us));
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : AT91F_ReadLine()
+ * Object              : 
+ * Input Parameters    : 
+ * Return value		: 
+ *-----------------------------------------------------------------------------
+ */
+int AT91F_ReadLine (const char *const prompt, char *console_buffer)
+{
+	char *p = console_buffer;
+	int	n = 0;					/* buffer index		*/
+	int	plen = strlen (prompt);	/* prompt length	*/
+	int	col;					/* output column cnt	*/
+	char	c;
+
+	/* print prompt */
+	if (prompt)
+		printf(prompt);
+	col = plen;
+
+	for (;;) {
+		c = getc();
+
+		switch (c) {
+			case '\r':				/* Enter		*/
+			case '\n':
+				*p = '\0';
+				puts ("\n");
+				return (p - console_buffer);
+
+			case 0x03:				/* ^C - break	*/
+				console_buffer[0] = '\0';	/* discard input */
+				return (-1);
+
+			case 0x08:				/* ^H  - backspace	*/
+			case 0x7F:				/* DEL - backspace	*/
+				if (n) {
+					--p;
+					printf(erase_seq);
+					col--;
+					n--;
+					}
+				continue;
+
+			default:
+			/*
+			 * Must be a normal character then
+			 */
+			if (n < (AT91C_CB_SIZE -2)) 
+			{
+				++col;		/* echo input		*/
+				putc(c);
+				*p++ = c;
+				++n;
+			} 
+			else 
+			{			/* Buffer full		*/
+				putc('\a');
+			}
+		}
+	}
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : AT91F_WaitKeyPressed()
+ * Object              : 
+ * Input Parameters    : 
+ * Return value		: 
+ *-----------------------------------------------------------------------------
+ */
+void AT91F_WaitKeyPressed(void)
+{
+	int c;
+    	puts("KEY");
+		c = getc();
+	putc('\n');
+}
+
+int puts(const char *str)
+{
+  while(*str != 0) {
+		at91_serial_putc(*str);
+		str++;
+		}
+	return 1;
+}
+
+int putc(int c)
+{
+  return at91_serial_putc(c);
+}
+
+int putchar(c)
+{
+	return putc(c);
+}
+
+int getc()
+{
+  return at91_serial_getc();
+}
+
+int strlen(const char *str)
+{
+  int len = 0;
+
+  if(str == (char *)0)
+    return 0;
+
+  while(*str++ != 0)
+    len++;
+
+  return len;
+}
+
+#define ZEROPAD 1               /* pad with zero */
+#define SIGN    2               /* unsigned/signed long */
+#define LEFT    4              /* left justified */
+#define LARGE   8              /* use 'ABCDEF' instead of 'abcdef' */
+
+#define do_div(n,base) ({ \
+        int __res; \
+        __res = ((unsigned) n) % (unsigned) base; \
+        n = ((unsigned) n) / (unsigned) base; \
+        __res; \
+})
+
+static int number(int num, int base, int size,
+                  int precision, int type)
+{
+  char c, sign, tmp[66];
+  const char *digits="0123456789ABCDEF";
+  int i;
+
+  if (type & LEFT)
+    type &= ~ZEROPAD;
+  if (base < 2 || base > 16)
+    return 0;
+  c = (type & ZEROPAD) ? '0' : ' ';
+  sign = 0;
+
+  if(type & SIGN && num < 0)
+    {
+      sign = '-';
+      num = -num;
+      size--;
+    }
+  
+  i = 0;
+  if(num == 0)
+    tmp[i++] = digits[0];
+  else while(num != 0)
+    tmp[i++] = digits[do_div(num, base)];
+
+  if(i > precision)
+    precision = i;
+  size -= precision;
+  
+  if(!(type&(ZEROPAD+LEFT)))
+    while(size-->0)
+      putc(' ');
+  
+  if(sign)
+    putc(sign);
+
+  if (!(type & LEFT))
+    while (size-- > 0)
+      putc(c);
+
+  while (i < precision--)
+    putc('0');
+  
+  while (i-- > 0)
+    putc(tmp[i]);
+
+  while (size-- > 0)
+    putc(' ');;
+
+  return 1;
+}
+
+int hvfprintf(const char *fmt, va_list va)
+{
+  char *s;
+
+	do {
+		if(*fmt == '%')	{
+			bool done = false;
+
+			int type = 0;
+			int precision = 0;
+
+			do {
+				fmt++;
+				switch(*fmt) {
+				case '0' :
+					if(!precision)
+						type |= ZEROPAD;
+				case '1' :
+				case '2' :
+				case '3' :
+				case '4' :
+				case '5' :
+				case '6' :
+				case '7' :
+				case '8' :
+				case '9' :
+					precision = precision * 10 + (*fmt - '0');
+					break;
+				case '.' :
+					break;
+				case 's' :
+					s = va_arg(va, char *);
+					if(!s)
+						puts("<NULL>");
+					else
+						puts(s);
+					done = true;
+					break;
+				case 'c' :
+					putc(va_arg(va, int));
+					done = true;
+					break;
+				case 'd' :
+					number(va_arg(va, int), 10, 0, precision, type);
+					done = true;
+					break;
+				case 'x' :
+				case 'X' :
+					number(va_arg(va, int), 16, 0, precision, type);
+					done = true;
+					break;
+				case '%' :
+					putc(*fmt);
+					done = true;
+				default: 
+					putc('%');
+					putc(*fmt);
+					done = true;
+					break;
+				} 
+			} while(!done);
+		} else if(*fmt == '\\') {
+			fmt++;
+			if(*fmt == 'r') {
+				putc('\r');
+			} else if(*fmt == 'n') { 
+				putc('\n');
+			}
+        	} else {
+         		putc(*fmt);
+        	}
+		fmt++;
+	} while(*fmt != 0);
+  
+  return 0;
+}
+
+int printf(const char *fmt, ...)
+{
+  va_list ap;
+  int i;
+
+  va_start(ap, fmt);
+  i = hvfprintf(fmt, ap);
+  va_end(ap);
+
+  return i;
+}

target/linux/at91/image/dfboot/src/com.h

@@ -0,0 +1,28 @@
+/*----------------------------------------------------------------------------
+ *      ATMEL Microcontroller Software Support  -  ROUSSET  -
+ *----------------------------------------------------------------------------
+ * The software is delivered "AS IS" without warranty or condition of any
+ * kind, either express, implied or statutory. This includes without
+ * limitation any warranty or condition with respect to merchantability or
+ * fitness for any particular purpose, or against the infringements of
+ * intellectual property rights of others.
+ *----------------------------------------------------------------------------
+ * File Name           : com.h
+ * Object              : 
+ *
+ * 1.0 27/03/03 HIi    : Creation
+ *----------------------------------------------------------------------------
+ */
+#ifndef com_h
+#define com_h
+
+#define AT91C_CB_SIZE 20 /* size of the console buffer */
+
+/* Escape sequences */
+#define ESC \033
+
+extern int AT91F_ReadLine (const char *const prompt, char *console_buffer);
+extern void AT91F_WaitKeyPressed(void);
+
+#endif
+

target/linux/at91/image/dfboot/src/config.h

@@ -0,0 +1,17 @@
+
+#ifndef _CONFIG_H
+#define _CONFIG_H
+
+//#define	PAGESZ_1056			1
+#undef PAGESZ_1056
+#define	SPI_LOW_SPEED			1
+#define AT91C_DELAY_TO_BOOT 		1500
+
+#define	CRC_RETRIES			0x100
+
+#define AT91C_MASTER_CLOCK              59904000
+#define AT91C_BAUD_RATE                 115200
+
+#define AT91C_ALTERNATE_USART	AT91C_BASE_US0
+
+#endif

target/linux/at91/image/dfboot/src/cstartup_ram.S

@@ -0,0 +1,144 @@
+#include "AT91RM9200_inc.h"
+		
+/*---------------------------
+ARM Core Mode and Status Bits
+---------------------------*/
+.section start
+	.text
+			
+#define ARM_MODE_USER   0x10
+#define ARM_MODE_FIQ    0x11
+#define ARM_MODE_IRQ    0x12
+#define ARM_MODE_SVC    0x13
+#define ARM_MODE_ABORT  0x17
+#define ARM_MODE_UNDEF  0x1B
+#define ARM_MODE_SYS    0x1F
+
+#define I_BIT           0x80
+#define F_BIT           0x40
+#define T_BIT           0x20
+
+/*----------------------------------------------------------------------------
+ Area Definition
+----------------
+ Must be defined as function to put first in the code as it must be mapped
+ at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap.
+_---------------------------------------------------------------------------*/
+
+  .align  4
+	.globl _start
+_start:
+
+/*----------------------------------------------------------------------------
+ Exception vectors ( before Remap )
+------------------------------------
+ These vectors are read at address 0.
+ They absolutely requires to be in relative addresssing mode in order to
+ guarantee a valid jump. For the moment, all are just looping (what may be
+ dangerous in a final system). If an exception occurs before remap, this
+ would result in an infinite loop.
+----------------------------------------------------------------------------*/
+                b           reset			       	/* reset */
+                b           undefvec        	/* Undefined Instruction */
+                b           swivec          	/* Software Interrupt */
+                b           pabtvec         	/* Prefetch Abort */
+                b           dabtvec         	/* Data Abort */
+                b           rsvdvec         	/* reserved */
+                b           aicvec				    /* IRQ : read the AIC */
+                b           fiqvec          	/* FIQ */
+
+undefvec:
+swivec:
+pabtvec:
+dabtvec:
+rsvdvec:
+aicvec:
+fiqvec:
+	b	undefvec
+
+reset:
+
+#define MEMEND 0x00004000
+
+/* ----------------------------
+ Setup the stack for each mode
+---------------------------- */
+
+#define IRQ_STACK_SIZE  0x10
+#define FIQ_STACK_SIZE  0x04
+#define ABT_STACK_SIZE  0x04
+#define UND_STACK_SIZE  0x04
+#define SVC_STACK_SIZE  0x10
+#define USER_STACK_SIZE 0x400
+	
+                ldr     r0,= MEMEND
+
+/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
+                mov     r13, r0                     /* Init stack Undef*/
+                sub     r0, r0, #SVC_STACK_SIZE
+
+/*- Set up Interrupt Mode and set IRQ Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
+                mov     r13, r0                     /* Init stack IRQ*/
+                sub     r0, r0, #IRQ_STACK_SIZE
+
+/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
+                mov     r13, r0                     /* Init stack FIQ*/
+                sub     r0, r0, #FIQ_STACK_SIZE
+
+/*- Set up Abort Mode and set Abort Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
+                mov     r13, r0                     /* Init stack Abort*/
+                sub     r0, r0, #ABT_STACK_SIZE
+
+/*- Set up Undefined Instruction Mode and set Undef Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
+                mov     r13, r0                     /* Init stack Undef*/
+                sub     r0, r0, #UND_STACK_SIZE
+
+/*- Set up user Mode and set System Mode Stack*/
+                msr     CPSR_c, #ARM_MODE_SYS | I_BIT | F_BIT
+                bic     r0, r0, #3                  /* Insure word alignement */
+               	mov     sp, r0                      /* Init stack System */
+
+
+		ldr       r0, = AT91F_LowLevelInit
+		mov       lr, pc
+		bx        r0
+
+/*----------------------------------------
+ Read/modify/write CP15 control register
+----------------------------------------*/
+		mrc     p15, 0, r0, c1, c0,0  /* read cp15 control registre (cp15 r1) in r0 */
+		ldr     r3,= 0xC0000080      /* Reset bit :Little Endian end fast bus mode */
+		ldr     r4,= 0xC0001000      /* Set bit :Asynchronous clock mode, Not Fast Bus, I-Cache enable */
+		bic     r0, r0, r3
+		orr     r0, r0, r4
+		mcr     p15, 0, r0, c1, c0,0 /* write r0 in cp15 control registre (cp15 r1) */
+
+/* Enable interrupts */
+		msr     CPSR_c, #ARM_MODE_SYS | F_BIT
+
+/*------------------------------------------------------------------------------
+- Branch on C code Main function (with interworking)
+----------------------------------------------------
+- Branch must be performed by an interworking call as either an ARM or Thumb
+- _start function must be supported. This makes the code not position-
+- independent. A Branch with link would generate errors
+----------------------------------------------------------------------------*/
+	
+/*- Branch to _start by interworking*/
+		ldr     r4, = main
+	        mov     lr, pc
+	        bx      r4
+	
+/*-----------------------------------------------------------------------------
+- Loop for ever
+---------------
+- End of application. Normally, never occur.
+- Could jump on Software Reset ( B 0x0 ).
+------------------------------------------------------------------------------*/
+End:
+	        b       End

target/linux/at91/image/dfboot/src/dataflash.c

@@ -0,0 +1,208 @@
+/*----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
+ *----------------------------------------------------------------------------
+ * The software is delivered "AS IS" without warranty or condition of any
+ * kind, either express, implied or statutory. This includes without
+ * limitation any warranty or condition with respect to merchantability or
+ * fitness for any particular purpose, or against the infringements of
+ * intellectual property rights of others.
+ *----------------------------------------------------------------------------
+ * File Name           : dataflash.c
+ * Object              : High level functions for the dataflash
+ * Creation            : HIi   10/10/2003
+ *----------------------------------------------------------------------------
+ */
+#include "config.h"
+#include "stdio.h"
+#include "dataflash.h"
+
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+static AT91S_DataFlash DataFlashInst;
+
+int cs[][CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+	{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
+};
+
+int AT91F_DataflashInit(void)
+{
+	int i;
+	int dfcode;
+	int Nb_device = 0;
+		
+	AT91F_SpiInit();
+
+	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+		dataflash_info[i].id = 0;
+		dataflash_info[i].Device.pages_number = 0;
+		dfcode = AT91F_DataflashProbe (cs[i][1], &dataflash_info[i].Desc);
+
+		switch (dfcode) {
+		case AT45DB161:
+			dataflash_info[i].Device.pages_number = 4096;
+			dataflash_info[i].Device.pages_size = 528;
+			dataflash_info[i].Device.page_offset = 10;
+			dataflash_info[i].Device.byte_mask = 0x300;
+			dataflash_info[i].Device.cs = cs[i][1];
+			dataflash_info[i].Desc.DataFlash_state = IDLE;
+			dataflash_info[i].logical_address = cs[i][0];
+			dataflash_info[i].id = dfcode;
+			Nb_device++;
+			break;
+
+		case AT45DB321:
+			dataflash_info[i].Device.pages_number = 8192;
+			dataflash_info[i].Device.pages_size = 528;
+			dataflash_info[i].Device.page_offset = 10;
+			dataflash_info[i].Device.byte_mask = 0x300;
+			dataflash_info[i].Device.cs = cs[i][1];
+			dataflash_info[i].Desc.DataFlash_state = IDLE;
+			dataflash_info[i].logical_address = cs[i][0];
+			dataflash_info[i].id = dfcode;
+			Nb_device++;
+			break;
+
+		case AT45DB642:
+			dataflash_info[i].Device.pages_number = 8192;
+			dataflash_info[i].Device.pages_size = 1056;
+			dataflash_info[i].Device.page_offset = 11;
+			dataflash_info[i].Device.byte_mask = 0x700;
+			dataflash_info[i].Device.cs = cs[i][1];
+			dataflash_info[i].Desc.DataFlash_state = IDLE;
+			dataflash_info[i].logical_address = cs[i][0];
+			dataflash_info[i].id = dfcode;
+			Nb_device++;
+			break;
+		case AT45DB128:
+			dataflash_info[i].Device.pages_number = 16384;
+			dataflash_info[i].Device.pages_size = 1056;
+			dataflash_info[i].Device.page_offset = 11;
+			dataflash_info[i].Device.byte_mask = 0x700;
+			dataflash_info[i].Device.cs = cs[i][1];
+			dataflash_info[i].Desc.DataFlash_state = IDLE;
+			dataflash_info[i].logical_address = cs[i][0];
+			dataflash_info[i].id = dfcode;
+			Nb_device++;
+			break;
+		default:
+			break;
+		}
+	}			
+	return (Nb_device);
+}
+
+
+void AT91F_DataflashPrintInfo(void)
+{
+	int i;
+	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+		if (dataflash_info[i].id != 0) {
+			printf ("DF:AT45DB");
+			switch (dataflash_info[i].id) {
+			case AT45DB161:
+				printf ("161");
+				break;
+
+			case AT45DB321:
+				printf ("321");
+				break;
+
+			case AT45DB642:
+				printf ("642");
+				break;
+			case AT45DB128:				
+				printf ("128");
+				break;
+			}
+
+			printf ("\n# PG: %6d\n"
+				"PG SZ: %6d\n"
+				"SZ=%8d bytes\n"
+				"ADDR: %08X\n",
+				(unsigned int) dataflash_info[i].Device.pages_number,
+				(unsigned int) dataflash_info[i].Device.pages_size,
+				(unsigned int) dataflash_info[i].Device.pages_number *
+				dataflash_info[i].Device.pages_size,
+				(unsigned int) dataflash_info[i].logical_address);
+		}
+	}
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataflashSelect                                  */
+/* Object              : Select the correct device                              */
+/*------------------------------------------------------------------------------*/
+static AT91PS_DataFlash AT91F_DataflashSelect(AT91PS_DataFlash pFlash,
+                                              unsigned int *addr)
+{
+	char addr_valid = 0;
+	int i;
+
+	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++)
+		if ((*addr & 0xFF000000) == dataflash_info[i].logical_address) {
+			addr_valid = 1;
+			break;
+		}
+	if (!addr_valid) {
+		pFlash = (AT91PS_DataFlash) 0;
+		return pFlash;
+	}
+	pFlash->pDataFlashDesc = &(dataflash_info[i].Desc);
+	pFlash->pDevice = &(dataflash_info[i].Device);
+	*addr -= dataflash_info[i].logical_address;
+	return (pFlash);
+}
+
+
+/*------------------------------------------------------------------------------*/
+/* Function Name       : read_dataflash                                         */
+/* Object              : dataflash memory read                                  */
+/*------------------------------------------------------------------------------*/
+int read_dataflash(unsigned long addr, unsigned long size, char *result)
+{
+	unsigned int AddrToRead = addr;
+	AT91PS_DataFlash pFlash = &DataFlashInst;
+
+	pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
+	if (pFlash == 0)
+		return -1;
+
+	return (AT91F_DataFlashRead(pFlash, AddrToRead, size, result));
+}
+
+
+/*-----------------------------------------------------------------------------*/
+/* Function Name       : write_dataflash                                       */
+/* Object              : write a block in dataflash                            */
+/*-----------------------------------------------------------------------------*/
+int write_dataflash(unsigned long addr_dest, unsigned int addr_src,
+                    unsigned int size)
+{
+	unsigned int AddrToWrite = addr_dest;
+	AT91PS_DataFlash pFlash = &DataFlashInst;
+
+	pFlash = AT91F_DataflashSelect(pFlash, &AddrToWrite);
+	if (AddrToWrite == -1)
+		return -1;
+
+	return AT91F_DataFlashWrite(pFlash, (unsigned char *) addr_src, AddrToWrite, size);
+}
+
+/*-----------------------------------------------------------------------------*/
+/* Function Name       : erase_dataflash                                       */
+/* Object              : Erase entire dataflash                                */
+/*-----------------------------------------------------------------------------*/
+int erase_dataflash(unsigned long addr_dest)
+{
+	unsigned int AddrToWrite = addr_dest;
+	AT91PS_DataFlash pFlash = &DataFlashInst;
+
+	pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
+	if (AddrToWrite == -1)
+		return -1;
+
+	return AT91F_DataFlashErase(pFlash);
+}
+

target/linux/at91/image/dfboot/src/dataflash.h

@@ -0,0 +1,181 @@
+//*---------------------------------------------------------------------------
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//*---------------------------------------------------------------------------
+//* The software is delivered "AS IS" without warranty or condition of any
+//* kind, either express, implied or statutory. This includes without
+//* limitation any warranty or condition with respect to merchantability or
+//* fitness for any particular purpose, or against the infringements of
+//* intellectual property rights of others.
+//*---------------------------------------------------------------------------
+//* File Name           : AT91_SpiDataFlash.h
+//* Object              : Data Flash Atmel Description File
+//* Translator          :
+//*
+//* 1.0 03/04/01 HI	: Creation
+//*
+//*---------------------------------------------------------------------------
+
+#ifndef _DataFlash_h
+#define _DataFlash_h
+
+/* Max value = 15Mhz to be compliant with the Continuous array read function */
+#ifdef	SPI_LOW_SPEED
+#define AT91C_SPI_CLK 14976000/4
+#else
+#define AT91C_SPI_CLK 14976000 
+#endif
+
+/* AC characteristics */
+/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
+
+#define DATAFLASH_TCSS (0xf << 16)	/* 250ns 15/60000000 */
+#define DATAFLASH_TCHS (0x1 << 24)	/* 250ns 32*1/60000000 */
+
+
+#define AT91C_SPI_PCS0_SERIAL_DATAFLASH		0xE     /* Chip Select 0 : NPCS0 %1110 */
+#define AT91C_SPI_PCS3_DATAFLASH_CARD		0x7     /* Chip Select 3 : NPCS3 %0111 */
+
+#define CFG_MAX_DATAFLASH_BANKS 	    2
+#define CFG_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000
+#define CFG_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000
+
+typedef struct {
+	unsigned long base;		/* logical base address for a bank */
+	unsigned long size;		/* total bank size */
+	unsigned long page_count;
+	unsigned long page_size;
+	unsigned long id;		/* device id */
+} dataflash_info_t;
+
+typedef unsigned int AT91S_DataFlashStatus;
+
+/*----------------------------------------------------------------------*/
+/* DataFlash Structures							*/
+/*----------------------------------------------------------------------*/
+
+/*---------------------------------------------*/
+/* DataFlash Descriptor Structure Definition   */
+/*---------------------------------------------*/
+typedef struct _AT91S_DataflashDesc {
+	unsigned char *tx_cmd_pt;
+	unsigned int tx_cmd_size;
+	unsigned char *rx_cmd_pt;
+	unsigned int rx_cmd_size;
+	unsigned char *tx_data_pt;
+	unsigned int tx_data_size;
+	unsigned char *rx_data_pt;
+	unsigned int rx_data_size;
+	volatile unsigned char DataFlash_state;
+	unsigned char command[8];
+} AT91S_DataflashDesc, *AT91PS_DataflashDesc;
+
+/*---------------------------------------------*/
+/* DataFlash device definition structure       */
+/*---------------------------------------------*/
+typedef struct _AT91S_Dataflash {
+	int pages_number;			/* dataflash page number */
+	int pages_size;				/* dataflash page size */
+	int page_offset;			/* page offset in command */
+	int byte_mask;				/* byte mask in command */
+	int cs;
+} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;
+
+
+/*---------------------------------------------*/
+/* DataFlash Structure Definition	       */
+/*---------------------------------------------*/
+typedef struct _AT91S_DataFlash {
+	AT91PS_DataflashDesc pDataFlashDesc;	/* dataflash descriptor */
+	AT91PS_DataflashFeatures pDevice;	/* Pointer on a dataflash features array */
+} AT91S_DataFlash, *AT91PS_DataFlash;
+
+
+typedef struct _AT91S_DATAFLASH_INFO {
+
+	AT91S_DataflashDesc 	Desc;
+	AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
+	unsigned long 			logical_address;
+	unsigned int 			id;			/* device id */
+} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
+
+
+/*-------------------------------------------------------------------------------------------------*/
+
+#define AT45DB161		0x2c
+#define AT45DB321		0x34
+#define AT45DB642		0x3c
+#define AT45DB128		0x10
+
+#define AT91C_DATAFLASH_TIMEOUT			20000	/* For AT91F_DataFlashWaitReady */
+
+/* DataFlash return value */
+#define AT91C_DATAFLASH_BUSY			0x00
+#define AT91C_DATAFLASH_OK			0x01
+#define AT91C_DATAFLASH_ERROR			0x02
+#define AT91C_DATAFLASH_MEMORY_OVERFLOW		0x03
+#define AT91C_DATAFLASH_BAD_COMMAND		0x04
+#define AT91C_DATAFLASH_BAD_ADDRESS		0x05
+
+
+/* Driver State */
+#define IDLE		0x0
+#define BUSY		0x1
+#define ERROR		0x2
+
+/* DataFlash Driver State */
+#define GET_STATUS	0x0F
+
+/*-------------------------------------------------------------------------------------------------*/
+/* Command Definition										   */
+/*-------------------------------------------------------------------------------------------------*/
+
+/* READ COMMANDS */
+#define DB_CONTINUOUS_ARRAY_READ	0xE8	/* Continuous array read */
+#define DB_BURST_ARRAY_READ		0xE8	/* Burst array read */
+#define DB_PAGE_READ			0xD2	/* Main memory page read */
+#define DB_BUF1_READ			0xD4	/* Buffer 1 read */
+#define DB_BUF2_READ			0xD6	/* Buffer 2 read */
+#define DB_STATUS			0xD7	/* Status Register */
+
+/* PROGRAM and ERASE COMMANDS */
+#define DB_BUF1_WRITE			0x84	/* Buffer 1 write */
+#define DB_BUF2_WRITE			0x87	/* Buffer 2 write */
+#define DB_BUF1_PAGE_ERASE_PGM		0x83	/* Buffer 1 to main memory page program with built-In erase */
+#define DB_BUF1_PAGE_ERASE_FASTPGM	0x93	/* Buffer 1 to main memory page program with built-In erase, Fast program */
+#define DB_BUF2_PAGE_ERASE_PGM		0x86	/* Buffer 2 to main memory page program with built-In erase */
+#define DB_BUF2_PAGE_ERASE_FASTPGM	0x96	/* Buffer 1 to main memory page program with built-In erase, Fast program */
+#define DB_BUF1_PAGE_PGM		0x88	/* Buffer 1 to main memory page program without built-In erase */
+#define DB_BUF1_PAGE_FASTPGM		0x98	/* Buffer 1 to main memory page program without built-In erase, Fast program */
+#define DB_BUF2_PAGE_PGM		0x89	/* Buffer 2 to main memory page program without built-In erase */
+#define DB_BUF2_PAGE_FASTPGM		0x99	/* Buffer 1 to main memory page program without built-In erase, Fast program */
+#define DB_PAGE_ERASE			0x81	/* Page Erase */
+#define DB_BLOCK_ERASE			0x50	/* Block Erase */
+#define DB_PAGE_PGM_BUF1		0x82	/* Main memory page through buffer 1 */
+#define DB_PAGE_FASTPGM_BUF1		0x92	/* Main memory page through buffer 1, Fast program */
+#define DB_PAGE_PGM_BUF2		0x85	/* Main memory page through buffer 2 */
+#define DB_PAGE_FastPGM_BUF2		0x95	/* Main memory page through buffer 2, Fast program */
+
+/* ADDITIONAL COMMANDS */
+#define DB_PAGE_2_BUF1_TRF		0x53	/* Main memory page to buffer 1 transfert */
+#define DB_PAGE_2_BUF2_TRF		0x55	/* Main memory page to buffer 2 transfert */
+#define DB_PAGE_2_BUF1_CMP		0x60	/* Main memory page to buffer 1 compare */
+#define DB_PAGE_2_BUF2_CMP		0x61	/* Main memory page to buffer 2 compare */
+#define DB_AUTO_PAGE_PGM_BUF1		0x58	/* Auto page rewrite throught buffer 1 */
+#define DB_AUTO_PAGE_PGM_BUF2		0x59	/* Auto page rewrite throught buffer 2 */
+
+/*-------------------------------------------------------------------------------------------------*/
+
+extern AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+extern void AT91F_SpiInit(void);
+extern int AT91F_DataflashProbe(int i, AT91PS_DataflashDesc pDesc);
+extern int AT91F_DataFlashRead(AT91PS_DataFlash, unsigned long , unsigned long, char *);
+extern AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash ,unsigned char *, int, int);
+extern AT91S_DataFlashStatus AT91F_DataFlashErase(AT91PS_DataFlash pDataFlash);
+extern int AT91F_DataflashInit(void);
+extern void AT91F_DataflashPrintInfo(void);
+extern int read_dataflash(unsigned long addr, unsigned long size, char *result);
+extern int write_dataflash(unsigned long addr_dest, unsigned int addr_src, unsigned int size);
+extern int erase_dataflash(unsigned long addr_dest);
+
+#endif

target/linux/at91/image/dfboot/src/div0.c

@@ -0,0 +1,28 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Replacement (=dummy) for GNU/Linux division-by zero handler */
+void __div0 (void)
+{
+	while(-1);
+}

target/linux/at91/image/dfboot/src/elf32-littlearm.lds

@@ -0,0 +1,19 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+        . = 0x00000000;
+
+        . = ALIGN(4);
+        .text : { *(.text) }
+
+        . = ALIGN(4);
+        .rodata : { *(.rodata) }
+
+        . = ALIGN(4);
+        .data : { *(.data) }
+
+        . = ALIGN(4);
+        .bss : { *(.bss) }
+}

target/linux/at91/image/dfboot/src/embedded_services.h

@@ -0,0 +1,500 @@
+//*----------------------------------------------------------------------------
+//*      ATMEL Microcontroller Software Support  -  ROUSSET  -
+//*----------------------------------------------------------------------------
+//* The software is delivered "AS IS" without warranty or condition of any
+//* kind, either express, implied or statutory. This includes without
+//* limitation any warranty or condition with respect to merchantability or
+//* fitness for any particular purpose, or against the infringements of
+//* intellectual property rights of others.
+//*----------------------------------------------------------------------------
+//* File Name           : embedded_sevices.h
+//* Object              : Header File with all the embedded software services definitions
+//*
+//* 1.0 24 Jan 2003 FB  : Creation
+//*----------------------------------------------------------------------------
+#ifndef embedded_sevices_h
+#define embedded_sevices_h
+
+#include "AT91RM9200.h"
+
+#define AT91C_BASE_ROM	(char *)0x00100000
+
+/* Return values */
+#define AT91C_BUFFER_SUCCESS		   0
+#define AT91C_BUFFER_ERROR_SHIFT      16
+#define AT91C_BUFFER_ERROR            (0x0F << AT91C_BUFFER_ERROR_SHIFT)
+
+#define AT91C_BUFFER_OVERFLOW         (0x01 << AT91C_BUFFER_ERROR_SHIFT)
+#define AT91C_BUFFER_UNDERRUN         (0x02 << AT91C_BUFFER_ERROR_SHIFT)
+
+typedef unsigned int AT91S_BufferStatus;
+
+struct _AT91S_Pipe;
+
+// This structure is a virtual object of a buffer
+typedef struct _AT91S_Buffer
+{
+	struct _AT91S_Pipe *pPipe;
+	void *pChild;
+
+	// Functions invoked by the pipe
+	AT91S_BufferStatus (*SetRdBuffer)     (struct _AT91S_Buffer *pSBuffer, char *pBuffer, unsigned int Size);
+	AT91S_BufferStatus (*SetWrBuffer)     (struct _AT91S_Buffer *pSBuffer, char const *pBuffer, unsigned int Size);
+	AT91S_BufferStatus (*RstRdBuffer)     (struct _AT91S_Buffer *pSBuffer);
+	AT91S_BufferStatus (*RstWrBuffer)     (struct _AT91S_Buffer *pSBuffer);
+	char (*MsgWritten)      (struct _AT91S_Buffer *pSBuffer, char const *pBuffer);
+	char (*MsgRead)         (struct _AT91S_Buffer *pSBuffer, char const *pBuffer);
+	// Functions invoked by the peripheral
+	AT91S_BufferStatus (*GetWrBuffer)     (struct _AT91S_Buffer *pSBuffer, char const **pData, unsigned int *pSize);
+	AT91S_BufferStatus (*GetRdBuffer)     (struct _AT91S_Buffer *pSBuffer, char **pData, unsigned int *pSize);
+	AT91S_BufferStatus (*EmptyWrBuffer)   (struct _AT91S_Buffer *pSBuffer, unsigned int size);
+	AT91S_BufferStatus (*FillRdBuffer)    (struct _AT91S_Buffer *pSBuffer, unsigned int size);
+	char (*IsWrEmpty)      (struct _AT91S_Buffer *pSBuffer);
+	char (*IsRdFull)       (struct _AT91S_Buffer *pSBuffer);
+} AT91S_Buffer, *AT91PS_Buffer;
+
+// ===========================================================================================
+// SimpleBuffer definition
+//
+// This structure is pointed by pRealBuffer field in the SBuffer
+// It contains usefull information for a real implementation of
+// a SBuffer object.
+// The application just create an instance of SSBUffer and SBuffer,
+// call OpenSimpleBuffer, and continue using SBuffer instance
+
+typedef struct _AT91S_SBuffer
+{
+	AT91S_Buffer parent;
+	char         *pRdBuffer;
+	char const   *pWrBuffer;
+	unsigned int szRdBuffer;
+	unsigned int szWrBuffer;
+	unsigned int stRdBuffer;
+	unsigned int stWrBuffer;
+} AT91S_SBuffer, *AT91PS_SBuffer;
+
+typedef AT91PS_Buffer (*AT91PF_OpenSBuffer) (AT91PS_SBuffer);
+
+// This function is called by the application
+extern AT91PS_Buffer AT91F_OpenSBuffer(AT91PS_SBuffer pBuffer);
+
+// Functions invoked by the pipe
+extern AT91S_BufferStatus AT91F_SbSetRdBuffer  (AT91PS_Buffer pBuffer, char *pData, unsigned int Size);
+extern AT91S_BufferStatus AT91F_SbSetWrBuffer  (AT91PS_Buffer pBuffer, char const *pData, unsigned int Size);
+extern AT91S_BufferStatus AT91F_SbRstRdBuffer  (AT91PS_Buffer pBuffer);
+extern AT91S_BufferStatus AT91F_SbRstWrBuffer  (AT91PS_Buffer pBuffer);
+extern char AT91F_SbMsgWritten   (AT91PS_Buffer pBuffer, char const *pMsg);
+extern char AT91F_SbMsgRead      (AT91PS_Buffer pBuffer, char const *pMsg);
+// Functions invoked by the peripheral
+extern AT91S_BufferStatus AT91F_SbGetWrBuffer  (AT91PS_Buffer pBuffer, char const **pData, unsigned int *pSize);
+extern AT91S_BufferStatus AT91F_SbGetRdBuffer  (AT91PS_Buffer pBuffer, char **pData, unsigned int *pSize);
+extern AT91S_BufferStatus AT91F_SbEmptyWrBuffer(AT91PS_Buffer pBuffer, unsigned int size);
+extern AT91S_BufferStatus AT91F_SbFillRdBuffer (AT91PS_Buffer pBuffer, unsigned int size);
+extern char AT91F_SbIsWrEmpty   (AT91PS_Buffer pBuffer);
+extern char AT91F_SbIsRdFull    (AT91PS_Buffer pBuffer);
+
+#ifdef DBG_DRV_BUFFER
+extern char const *AT91F_SbGetError(AT91S_BufferStatus errorNumber);
+#endif
+
+
+#define AT91C_OPEN_CTRLTEMPO_SUCCESS	0
+#define AT91C_ERROR_OPEN_CTRLTEMPO		1
+#define AT91C_START_OK					2
+#define AT91C_STOP_OK					3
+#define AT91C_TIMEOUT_REACHED			4
+
+typedef enum _AT91E_SvcTempo {
+	AT91E_SVCTEMPO_DIS,
+	AT91E_SVCTEMPO_EN
+} AT91E_SvcTempo;
+
+typedef unsigned int AT91S_TempoStatus;
+
+// AT91S_SvcTempo
+typedef struct _AT91S_SvcTempo
+{
+
+	// Methods:
+	AT91S_TempoStatus (*Start)  (
+		struct _AT91S_SvcTempo *pSvc,
+		unsigned int timeout,
+		unsigned int reload,
+		void (*callback) (AT91S_TempoStatus, void *),
+		void *pData);
+	AT91S_TempoStatus (*Stop)   (struct _AT91S_SvcTempo *pSvc);
+
+	struct _AT91S_SvcTempo *pPreviousTempo;
+	struct _AT91S_SvcTempo *pNextTempo;
+
+	// Data
+	unsigned int TickTempo;	//* timeout value
+	unsigned int ReloadTempo;//* Reload value for periodic execution
+	void (*TempoCallback)(AT91S_TempoStatus, void *);
+	void *pPrivateData;
+	AT91E_SvcTempo flag;
+} AT91S_SvcTempo, *AT91PS_SvcTempo;
+
+
+// AT91S_CtrlTempo
+typedef struct _AT91S_CtlTempo
+{
+	// Members:
+
+	// Start and stop for Timer	hardware
+	AT91S_TempoStatus (*CtlTempoStart)  (void *pTimer);
+	AT91S_TempoStatus (*CtlTempoStop)   (void *pTimer);
+
+	// Start and stop for Tempo service
+	AT91S_TempoStatus (*SvcTempoStart)  (
+		struct _AT91S_SvcTempo *pSvc,
+		unsigned int timeout,
+		unsigned int reload,
+		void (*callback) (AT91S_TempoStatus, void *),
+		void *pData);
+	AT91S_TempoStatus (*SvcTempoStop)   (struct _AT91S_SvcTempo *pSvc);
+	AT91S_TempoStatus (*CtlTempoSetTime)(struct _AT91S_CtlTempo *pCtrl, unsigned int NewTime);
+	AT91S_TempoStatus (*CtlTempoGetTime)(struct _AT91S_CtlTempo *pCtrl);
+	AT91S_TempoStatus (*CtlTempoIsStart)(struct _AT91S_CtlTempo *pCtrl);
+	AT91S_TempoStatus (*CtlTempoCreate) (
+								struct _AT91S_CtlTempo *pCtrl,
+								struct _AT91S_SvcTempo *pTempo);
+	AT91S_TempoStatus (*CtlTempoRemove) (
+								struct _AT91S_CtlTempo *pCtrl,
+								struct _AT91S_SvcTempo *pTempo);
+	AT91S_TempoStatus (*CtlTempoTick)   (struct _AT91S_CtlTempo *pCtrl);
+
+	// Data:
+
+	void *pPrivateData;     // Pointer to devived class
+	void const *pTimer;			// hardware
+	AT91PS_SvcTempo pFirstTempo;
+	AT91PS_SvcTempo pNewTempo;
+} AT91S_CtlTempo, *AT91PS_CtlTempo;
+typedef AT91S_TempoStatus (*AT91PF_OpenCtlTempo)   ( AT91PS_CtlTempo, void const *);
+
+// This function is called by the application.
+extern AT91S_TempoStatus AT91F_OpenCtlTempo( AT91PS_CtlTempo pCtrlTempo, void const *pTempoTimer );
+
+extern AT91S_TempoStatus AT91F_STStart   (void *);
+extern AT91S_TempoStatus AT91F_STStop    (void *);
+extern AT91S_TempoStatus AT91F_STSetTime (AT91PS_CtlTempo, unsigned int);
+extern AT91S_TempoStatus AT91F_STGetTime (AT91PS_CtlTempo);
+extern AT91S_TempoStatus AT91F_STIsStart (AT91PS_CtlTempo);
+extern AT91S_TempoStatus AT91F_CtlTempoCreate (AT91PS_CtlTempo, AT91PS_SvcTempo);
+extern AT91S_TempoStatus AT91F_CtlTempoRemove (AT91PS_CtlTempo, AT91PS_SvcTempo);
+extern AT91S_TempoStatus AT91F_CtlTempoTick   (AT91PS_CtlTempo);
+extern AT91S_TempoStatus AT91F_SvcTempoStart (
+		AT91PS_SvcTempo pSvc,
+		unsigned int timeout,
+		unsigned int reload,
+		void (*callback) (AT91S_TempoStatus, void *),
+		void *pData);
+extern AT91S_TempoStatus AT91F_SvcTempoStop (AT91PS_SvcTempo);
+
+
+// Following types are defined in another header files
+struct _AT91S_Buffer;
+
+// Constants:
+#define AT91C_COMMSVC_SUCCESS     0
+#define AT91C_COMMSVC_ERROR_SHIFT 8
+#define AT91C_COMMSVC_ERROR       (0x0f << AT91C_COMMSVC_ERROR_SHIFT)
+
+typedef unsigned int AT91S_SvcCommStatus;
+
+// AT91S_Service definition
+// This structure is an abstraction of a communication peripheral
+typedef struct _AT91S_Service
+{
+	// Methods:
+	AT91S_SvcCommStatus (*Reset)  (struct _AT91S_Service *pService);
+	AT91S_SvcCommStatus (*StartTx)(struct _AT91S_Service *pService);
+	AT91S_SvcCommStatus (*StartRx)(struct _AT91S_Service *pService);
+	AT91S_SvcCommStatus (*StopTx) (struct _AT91S_Service *pService);
+	AT91S_SvcCommStatus (*StopRx) (struct _AT91S_Service *pService);
+	char                (*TxReady)(struct _AT91S_Service *pService);
+	char                (*RxReady)(struct _AT91S_Service *pService);
+	// Data:
+	struct _AT91S_Buffer *pBuffer; // Link to a buffer object
+	void *pChild;
+} AT91S_SvcComm, *AT91PS_SvcComm;
+
+// Constants:
+#define AT91C_XMODEM_SOH         0x01         /* Start of Heading for 128 bytes */
+#define AT91C_XMODEM_STX         0x02         /* Start of heading for 1024 bytes */
+#define AT91C_XMODEM_EOT         0x04         /* End of transmission */
+#define AT91C_XMODEM_ACK         0x06         /* Acknowledge */
+#define AT91C_XMODEM_NAK         0x15         /* Negative Acknowledge */
+#define AT91C_XMODEM_CRCCHR      'C'
+
+#define AT91C_XMODEM_PACKET_SIZE 2                 // packet + packetCRC
+#define AT91C_XMODEM_CRC_SIZE    2                 // crcLSB + crcMSB
+#define AT91C_XMODEM_DATA_SIZE_SOH    128          // data 128 corresponding to SOH header
+#define AT91C_XMODEM_DATA_SIZE_STX    1024         // data 1024 corresponding to STX header
+
+//* Following structure is used by SPipe to refer to the USB device peripheral endpoint
+typedef struct _AT91PS_SvcXmodem {
+
+	// Public Methods:
+	AT91S_SvcCommStatus (*Handler) (struct _AT91PS_SvcXmodem *, unsigned int);
+	AT91S_SvcCommStatus (*StartTx) (struct _AT91PS_SvcXmodem *, unsigned int);
+	AT91S_SvcCommStatus (*StopTx)  (struct _AT91PS_SvcXmodem *, unsigned int);
+
+	// Private Methods:
+	AT91S_SvcCommStatus (*ReadHandler)  (struct _AT91PS_SvcXmodem *, unsigned int csr);
+	AT91S_SvcCommStatus (*WriteHandler) (struct _AT91PS_SvcXmodem *, unsigned int csr);
+	unsigned short      (*GetCrc)       (char *ptr, unsigned int count);
+	char                (*CheckHeader)  (unsigned char currentPacket, char *packet);
+	char                (*CheckData)    (struct _AT91PS_SvcXmodem *);
+
+	AT91S_SvcComm  parent;      // Base class
+	AT91PS_USART  pUsart;
+
+	AT91S_SvcTempo tempo; // Link to a AT91S_Tempo object
+
+	char          *pData;
+	unsigned int  dataSize;        // = XMODEM_DATA_STX or XMODEM_DATA_SOH
+	char          packetDesc[AT91C_XMODEM_PACKET_SIZE];
+	unsigned char packetId;         // Current packet
+	char          packetStatus;
+	char          isPacketDesc;
+	char          eot;            // end of transmition
+} AT91S_SvcXmodem, *AT91PS_SvcXmodem;
+
+typedef AT91PS_SvcComm      (*AT91PF_OpenSvcXmodem) ( AT91PS_SvcXmodem, AT91PS_USART, AT91PS_CtlTempo);
+
+// This function is called by the application.
+extern AT91PS_SvcComm AT91F_OpenSvcXmodem( AT91PS_SvcXmodem, AT91PS_USART, AT91PS_CtlTempo);
+
+extern unsigned short AT91F_SvcXmodemGetCrc     (char *ptr, unsigned int count);
+extern char           AT91F_SvcXmodemCheckHeader(unsigned char currentPacket, char *packet);
+extern char           AT91F_SvcXmodemCheckData  (AT91PS_SvcXmodem pSvcXmodem);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemReadHandler(AT91PS_SvcXmodem pSvcXmodem, unsigned int csr);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemWriteHandler(AT91PS_SvcXmodem pSvcXmodem, unsigned int csr);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemStartTx(AT91PS_SvcComm pSvcComm);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemStopTx(AT91PS_SvcComm pSvcComm);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemStartRx(AT91PS_SvcComm pSvcComm);
+extern AT91S_SvcCommStatus AT91F_SvcXmodemStopRx(AT91PS_SvcComm pSvcComm);
+extern char AT91F_SvcXmodemTxReady(AT91PS_SvcComm pService);
+extern char AT91F_SvcXmodemRxReady(AT91PS_SvcComm pSvcComm);
+
+
+// Constants:
+#define AT91C_PIPE_SUCCESS	      0
+#define AT91C_PIPE_ERROR_SHIFT    8
+#define AT91C_PIPE_ERROR          (0x0F << AT91C_PIPE_ERROR_SHIFT)
+
+#define AT91C_PIPE_OPEN_FAILED    (1 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_WRITE_FAILED   (2 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_WRITE_ABORTED  (3 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_READ_FAILED    (4 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_READ_ABORTED   (5 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_ABORT_FAILED   (6 << AT91C_PIPE_ERROR_SHIFT)
+#define AT91C_PIPE_RESET_FAILED   (7 << AT91C_PIPE_ERROR_SHIFT)
+
+/* _AT91S_Pipe stucture */
+typedef unsigned int AT91S_PipeStatus;
+
+typedef struct _AT91S_Pipe
+{
+	// A pipe is linked with a peripheral and a buffer
+	AT91PS_SvcComm pSvcComm;
+	AT91PS_Buffer  pBuffer;
+
+	// Callback functions with their arguments
+	void (*WriteCallback) (AT91S_PipeStatus, void *);
+	void (*ReadCallback)  (AT91S_PipeStatus, void *);
+	void *pPrivateReadData;
+	void *pPrivateWriteData;
+
+	// Pipe methods
+	AT91S_PipeStatus (*Write) (
+		struct _AT91S_Pipe   *pPipe,
+		char const *         pData,
+		unsigned int         size,
+		void                 (*callback) (AT91S_PipeStatus, void *),
+		void                 *privateData);
+	AT91S_PipeStatus (*Read) (
+		struct _AT91S_Pipe  *pPipe,
+		char                *pData,
+		unsigned int        size,
+		void                (*callback) (AT91S_PipeStatus, void *),
+		void                *privateData);
+	AT91S_PipeStatus (*AbortWrite) (
+		struct _AT91S_Pipe  *pPipe);
+	AT91S_PipeStatus (*AbortRead) (
+		struct _AT91S_Pipe *pPipe);
+	AT91S_PipeStatus (*Reset) (
+		struct _AT91S_Pipe *pPipe);
+	char (*IsWritten) (
+		struct _AT91S_Pipe *pPipe,
+		char const *pVoid);
+	char (*IsReceived) (
+		struct _AT91S_Pipe *pPipe,
+		char const *pVoid);
+} AT91S_Pipe, *AT91PS_Pipe;
+
+// types used in AT91S_Pipe
+typedef AT91PS_Pipe (*AT91PF_OpenPipe)   (AT91PS_Pipe, AT91PS_SvcComm, AT91PS_Buffer);
+typedef void (*AT91PF_PipeWriteCallBack) (AT91S_PipeStatus, void *);
+typedef void (*AT91PF_PipeReadCallBack)  (AT91S_PipeStatus, void *);
+typedef AT91S_PipeStatus (*AT91PF_PipeWrite) (AT91PS_Pipe, char const *, unsigned int, void (*) (AT91S_PipeStatus, void *),	void *);
+typedef AT91S_PipeStatus (*AT91PF_PipeRead)  (AT91PS_Pipe, char const *, unsigned int, void (*) (AT91S_PipeStatus, void *),	void *);
+typedef AT91S_PipeStatus (*AT91PF_PipeAbortWrite) (AT91PS_Pipe);
+typedef AT91S_PipeStatus (*AT91PF_PipeAbortRead)  (AT91PS_Pipe);
+typedef AT91S_PipeStatus (*AT91PF_PipeReset)      (AT91PS_Pipe);
+typedef char (*AT91PF_PipeIsWritten)              (AT91PS_Pipe, char const *);
+typedef char (*AT91PF_PipeIsReceived)             (AT91PS_Pipe, char const *);
+
+// This function is called by the application
+extern AT91PS_Pipe AT91F_OpenPipe(
+	AT91PS_Pipe    pPipe,
+	AT91PS_SvcComm pSvcComm,
+	AT91PS_Buffer  pBuffer);
+
+// Following functions are called through AT91S_Pipe pointers
+
+extern AT91S_PipeStatus AT91F_PipeWrite(
+	AT91PS_Pipe pPipe,
+	char const *pVoid,
+	unsigned int size,
+	AT91PF_PipeWriteCallBack callback,
+	void *privateData);
+extern AT91S_PipeStatus AT91F_PipeRead(
+	AT91PS_Pipe pPipe,
+	char *pVoid,
+	unsigned int Size,
+	AT91PF_PipeReadCallBack callback,
+	void *privateData);
+extern AT91S_PipeStatus AT91F_PipeAbortWrite(AT91PS_Pipe pPipe);
+extern AT91S_PipeStatus AT91F_PipeAbortRead(AT91PS_Pipe pPipe);
+extern AT91S_PipeStatus AT91F_PipeReset(AT91PS_Pipe pPipe);
+extern char AT91F_PipeMsgWritten(AT91PS_Pipe pPipe, char const *pVoid);
+extern char AT91F_PipeMsgReceived(AT91PS_Pipe pPipe, char const *pVoid);
+
+#ifdef DBG_DRV_PIPE
+// This function parse the error number and return a string
+// describing the error message
+extern char const *AT91F_PipeGetError(AT91S_PipeStatus msgId);
+#endif
+
+extern const unsigned char bit_rev[256];
+
+extern void CalculateCrc32(const unsigned char *,unsigned int, unsigned int *);
+extern void CalculateCrc16(const unsigned char *, unsigned int , unsigned short *); 
+extern void CalculateCrcHdlc(const unsigned char *, unsigned int, unsigned short *);
+extern void CalculateCrc16ccitt(const unsigned char *, unsigned int , unsigned short *);
+
+typedef const unsigned char* AT91PS_SVC_CRC_BIT_REV ;
+
+typedef void  (*AT91PF_SVC_CRC32)   (const unsigned char *, unsigned int, unsigned int *);
+typedef void  (*AT91PF_SVC_CRC16)   (const unsigned char *, unsigned int, unsigned short *);
+typedef void  (*AT91PF_SVC_CRCHDLC) (const unsigned char *, unsigned int, unsigned short *);
+typedef	void  (*AT91PF_SVC_CRCCCITT)(const unsigned char *, unsigned int , unsigned short *);
+
+
+typedef short (*AT91PF_Sinus) (int angle);
+typedef const short * AT91PS_SINE_TAB;
+
+extern short AT91F_Sinus(int angle);
+extern const short AT91C_SINUS180_TAB[256];
+
+
+typedef void (TypeAICHandler) (void) ;
+
+
+// ROM BOOT Structure Element Definition (liv v2)
+typedef struct _AT91S_MEMCDesc
+{
+    AT91PS_MC		memc_base ;		/* Peripheral base */
+    unsigned char	periph_id ;		/* MC Peripheral Identifier */
+} AT91S_MEMCDesc, *AT91PS_MEMCDesc ;
+
+typedef struct _AT91S_Pio2Desc
+{
+   AT91PS_PIO      pio_base ;       /* Base Address */
+   unsigned char   periph_id ;      /* Peripheral Identifier */
+   unsigned char   pio_number ;     /* Total Pin Number */
+} AT91S_Pio2Desc, *AT91PS_Pio2Desc ;
+
+typedef struct _AT91S_SPIDesc
+{
+    AT91PS_SPI         		spi_base ;
+    const AT91PS_PIO        pio_base ;
+    unsigned char           periph_id ;
+    unsigned char           pin_spck ;
+    unsigned char           pin_miso ;
+    unsigned char           pin_mosi ;
+    unsigned char           pin_npcs[4] ;
+} AT91S_SPIDesc, *AT91PS_SPIDesc ;
+
+typedef struct _AT91S_USART2Desc
+{
+    AT91PS_USART           	usart_base ;   	/* Peripheral base */
+    const AT91PS_PIO   		pio_base ;     	/* IO controller descriptor */
+    unsigned int            pin_rxd ;       /* RXD pin number in the PIO */
+    unsigned int            pin_txd ;       /* TXD pin number in the PIO */
+    unsigned int            pin_sck ;       /* SCK pin number in the PIO */
+    unsigned int            pin_rts ;       /* RTS pin number in the PIO */
+    unsigned int            pin_cts ;       /* CTS pin number in the PIO */
+    unsigned int            pin_dtr ;       /* DTR pin number in the PIO */
+    unsigned int            pin_ri ;        /* RI pin number in the PIO */
+    unsigned int            pin_dsr ;       /* DSR pin number in the PIO */
+    unsigned int            pin_dcd ;       /* DCD pin number in the PIO */
+    unsigned int            periph_id ;     /* USART Peripheral Identifier */
+} AT91S_USART2Desc, *AT91PS_USART2Desc ;
+
+typedef struct _AT91S_TWIDesc
+{
+    AT91PS_TWI 				TWI_base ;
+    const AT91PS_PIO        pio_base ;
+    unsigned int			pin_sck ;
+    unsigned int			pin_sda ;
+    unsigned int 			periph_id;
+}AT91S_TWIDesc, *AT91PS_TWIDesc;
+
+typedef struct _AT91S_STDesc
+{
+    AT91PS_ST  		st_base ;          	/* Peripheral base address */
+    TypeAICHandler  *AsmSTHandler ;     /* Assembly interrupt handler */
+    unsigned char   PeriphId ;          /* Peripheral Identifier */
+} AT91S_STDesc, *AT91PS_STDesc;
+
+typedef struct _AT91S_RomBoot {
+	const unsigned int     version;
+	// Peripheral descriptors
+	const AT91S_MEMCDesc   MEMC_DESC;
+	const AT91S_STDesc     SYSTIMER_DESC;
+	const AT91S_Pio2Desc   PIOA_DESC;
+	const AT91S_Pio2Desc   PIOB_DESC;
+	const AT91S_USART2Desc DBGU_DESC;
+	const AT91S_USART2Desc USART0_DESC;
+	const AT91S_USART2Desc USART1_DESC;
+	const AT91S_USART2Desc USART2_DESC;
+	const AT91S_USART2Desc USART3_DESC;
+	const AT91S_TWIDesc    TWI_DESC;
+	const AT91S_SPIDesc    SPI_DESC;
+
+	// Objects entry
+	const AT91PF_OpenPipe      		OpenPipe;
+	const AT91PF_OpenSBuffer   		OpenSBuffer;
+	const unsigned int				reserved1;
+	const AT91PF_OpenSvcXmodem 		OpenSvcXmodem;
+	const AT91PF_OpenCtlTempo  		OpenCtlTempo;
+	const unsigned int				reserved2;
+	const unsigned int				reserved3;
+	const unsigned int				reserved4;
+	const AT91PF_SVC_CRC16			CRC16;
+	const AT91PF_SVC_CRCCCITT		CRCCCITT;
+	const AT91PF_SVC_CRCHDLC		CRCHDLC;
+	const AT91PF_SVC_CRC32			CRC32;
+	const AT91PS_SVC_CRC_BIT_REV	Bit_Reverse_Array;
+	const AT91PS_SINE_TAB			SineTab; 
+	const AT91PF_Sinus              Sine;
+} AT91S_RomBoot, *AT91PS_RomBoot;
+
+#define AT91C_ROM_BOOT_ADDRESS ((const AT91S_RomBoot *) ( *((unsigned int *) (AT91C_BASE_ROM + 0x20))) )
+
+#endif
+