From 1640daf71d5230997e9b75a550d3800bede298db Mon Sep 17 00:00:00 2001
From: Shengjiu Wang <shengjiu.wang@freescale.com>
Date: Wed, 12 Jul 2017 18:19:25 +0800
Subject: [PATCH] MLK-15960-1: ASoC: fsl_sai: update fifo_depth for different
 platform

The fifo_depth is changed to 64 in imx8qm/imx8qxp, in imx8mq, the
fifo_depth is 128. which is mentioned in their ADD.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
---
 sound/soc/fsl/fsl_sai.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -72,7 +72,7 @@ static struct fsl_sai_soc_data fsl_sai_i
 	.imx = true,
 	.dataline = 0xff,
 	.fifos = 8,
-	.fifo_depth = 32,
+	.fifo_depth = 128,
 	.flags = 0,
 	.reg_offset = 8,
 	.constrain_period_size = false,
@@ -82,7 +82,7 @@ static struct fsl_sai_soc_data fsl_sai_i
 	.imx = true,
 	.dataline = 0x3,
 	.fifos = 1,
-	.fifo_depth = 32,
+	.fifo_depth = 64,
 	.flags = 0,
 	.reg_offset = 0,
 	.constrain_period_size = true,
@@ -759,10 +759,12 @@ static int fsl_sai_dai_probe(struct snd_
 	regmap_write(sai->regmap, FSL_SAI_TCSR(offset), 0);
 	regmap_write(sai->regmap, FSL_SAI_RCSR(offset), 0);
 
-	regmap_update_bits(sai->regmap, FSL_SAI_TCR1(offset), FSL_SAI_CR1_RFW_MASK,
-			   sai->soc->fifo_depth - FSL_SAI_MAXBURST_TX);
-	regmap_update_bits(sai->regmap, FSL_SAI_RCR1(offset), FSL_SAI_CR1_RFW_MASK,
-			   FSL_SAI_MAXBURST_RX - 1);
+	regmap_update_bits(sai->regmap, FSL_SAI_TCR1(offset),
+				sai->soc->fifo_depth - 1,
+				sai->soc->fifo_depth - FSL_SAI_MAXBURST_TX);
+	regmap_update_bits(sai->regmap, FSL_SAI_RCR1(offset),
+				sai->soc->fifo_depth - 1,
+				FSL_SAI_MAXBURST_RX - 1);
 
 	snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params_tx,
 				&sai->dma_params_rx);
