From aa9e99f77f92814a0d83af8e6ed3148458d0f611 Mon Sep 17 00:00:00 2001
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Date: Tue, 26 Jul 2016 15:43:43 +0300
Subject: [PATCH] arm64: KVM: support flushing device memory

In the current implementation, trying to flush
memory not covered by the linear map (e.g. device
memory) causes a crash. Add support for flushing
"non-normal" memory by explicitly ioremap()-ing
it when such a case appears and do the cache flush
through this temporary mapping.
This allows dropping the special checks for qman
cacheable region when doing cache flushes.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[fixed formatting issue]
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
---
 arch/arm64/include/asm/kvm_mmu.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -341,8 +341,16 @@ static inline void __invalidate_icache_g
 static inline void __kvm_flush_dcache_pte(pte_t pte)
 {
 	if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) {
-		struct page *page = pte_page(pte);
-		kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
+		if (pfn_valid(pte_pfn(pte))) {
+			struct page *page = pte_page(pte);
+
+			kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
+		} else {
+			void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE);
+
+			kvm_flush_dcache_to_poc(va, PAGE_SIZE);
+			iounmap(va);
+		}
 	}
 }
 
