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kernel: bump 5.4 to 5.4.33

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Refreshed patches, removed upstreamed patches:

 oxnas: 001-irqchip-versatile-fpga-Handle-chained-IRQs-properly.patch
 oxnas: 002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch

Run tested: qemu-x86-64, apalis
Build tested: x86/64, imx6, sunxi/a53

Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit is contained in:
Petr Štetiar
2020-04-17 14:29:33 +02:00
parent 0495324b9b
commit 23916bca61
10 changed files with 14 additions and 147 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
target/linux/oxnas/patches-5.4/001-irqchip-versatile-fpga-Handle-chained-IRQs-properly.patch
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@@ -1,77 +0,0 @@
From patchwork Thu Mar 19 02:34:48 2020
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
X-Patchwork-Id: 11446405
From: Sungbo Eo <mans0n@gorani.run>
To: Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-oxnas@groups.io
Subject: [PATCH v2] irqchip/versatile-fpga: Handle chained IRQs properly
Date: Thu, 19 Mar 2020 11:34:48 +0900
Message-Id: <20200319023448.1479701-1-mans0n@gorani.run>
In-Reply-To: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
References: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
MIME-Version: 1.0
List-Id: <linux-arm-kernel.lists.infradead.org>
Cc: Sungbo Eo <mans0n@gorani.run>, Neil Armstrong <narmstrong@baylibre.com>
Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
Enclose the chained handler with chained_irq_{enter,exit}(), so that the
muxed interrupts get properly acked.
This patch also fixes a reboot bug on OX820 SoC, where the jiffies timer
interrupt is never acked. The kernel waits a clock tick forever in
calibrate_delay_converge(), which leads to a boot hang.
Fixes: c41b16f8c9d9 ("ARM: integrator/versatile: consolidate FPGA IRQ handling code")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Cc: Neil Armstrong <narmstrong@baylibre.com>
---
v2: moved readl below chained_irq_enter()
added Fixes tag
drivers/irqchip/irq-versatile-fpga.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -6,6 +6,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/irqchip/versatile-fpga.h>
#include <linux/irqdomain.h>
#include <linux/module.h>
@@ -68,12 +69,16 @@ static void fpga_irq_unmask(struct irq_d
static void fpga_irq_handle(struct irq_desc *desc)
{
+ struct irq_chip *chip = irq_desc_get_chip(desc);
struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
- u32 status = readl(f->base + IRQ_STATUS);
+ u32 status;
+ chained_irq_enter(chip, desc);
+
+ status = readl(f->base + IRQ_STATUS);
if (status == 0) {
do_bad_IRQ(desc);
- return;
+ goto out;
}
do {
@@ -82,6 +87,9 @@ static void fpga_irq_handle(struct irq_d
status &= ~(1 << irq);
generic_handle_irq(irq_find_mapping(f->domain, irq));
} while (status);
+
+out:
+ chained_irq_exit(chip, desc);
}
/*

56
target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch
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@@ -1,56 +0,0 @@
From patchwork Sat Mar 21 13:38:42 2020
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
X-Patchwork-Id: 11451163
From: Sungbo Eo <mans0n@gorani.run>
To: linux-oxnas@groups.io, Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] irqchip/versatile-fpga: Apply clear-mask earlier
Date: Sat, 21 Mar 2020 22:38:42 +0900
Message-Id: <20200321133842.2408823-1-mans0n@gorani.run>
MIME-Version: 1.0
Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
Clear its own IRQs before the parent IRQ get enabled, so that the
remaining IRQs do not accidentally interrupt the parent IRQ controller.
This patch also fixes a reboot bug on OX820 SoC, where the remaining
rps-timer IRQ raises a GIC interrupt that is left pending. After that,
the rps-timer IRQ is cleared during driver initialization, and there's
no IRQ left in rps-irq when local_irq_enable() is called, which evokes
an error message "unexpected IRQ trap".
Fixes: bdd272cbb97a ("irqchip: versatile FPGA: support cascaded interrupts from DT")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Daniel Golle <daniel@makrotopia.org>
---
drivers/irqchip/irq-versatile-fpga.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -212,6 +212,9 @@ int __init fpga_irq_of_init(struct devic
if (of_property_read_u32(node, "valid-mask", &valid_mask))
valid_mask = 0;
+ writel(clear_mask, base + IRQ_ENABLE_CLEAR);
+ writel(clear_mask, base + FIQ_ENABLE_CLEAR);
+
/* Some chips are cascaded from a parent IRQ */
parent_irq = irq_of_parse_and_map(node, 0);
if (!parent_irq) {
@@ -221,9 +224,6 @@ int __init fpga_irq_of_init(struct devic
fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
- writel(clear_mask, base + IRQ_ENABLE_CLEAR);
- writel(clear_mask, base + FIQ_ENABLE_CLEAR);
-
/*
* On Versatile AB/PB, some secondary interrupts have a direct
* pass-thru to the primary controller for IRQs 20 and 22-31 which need