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mediatek: add patches for MT7622 WED (wireless ethernet dispatch)

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This series also contains other improvement for hardware flow offload support

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry-picked from commit 0f029b3d2b)
This commit is contained in:
Felix Fietkau
2021-11-30 11:55:24 +01:00
parent 5ff900e0ad
commit 77e123340f
19 changed files with 3609 additions and 116 deletions
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2
target/linux/mediatek/patches-5.10/510-net-mediatek-add-flow-offload-for-mt7623.patch
View File

@@ -14,7 +14,7 @@ Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3302,6 +3302,7 @@ static const struct mtk_soc_data mt7623_
@@ -3373,6 +3373,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,

85
target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
View File

@@ -1,85 +0,0 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 4 Sep 2020 18:36:06 +0200
Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for coherent DMA
It improves performance by eliminating the need for a cache flush on rx and tx
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -364,7 +364,7 @@
};
cci_control2: slave-if@5000 {
- compatible = "arm,cci-400-ctrl-if";
+ compatible = "arm,cci-400-ctrl-if", "syscon";
interface-type = "ace";
reg = <0x5000 0x1000>;
};
@@ -977,6 +977,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys>;
+ mediatek,cci-control = <&cci_control2>;
+ dma-coherent;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -9,6 +9,7 @@
#include <linux/of_device.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
+#include <linux/of_address.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/clk.h>
@@ -2494,6 +2495,13 @@ static int mtk_hw_init(struct mtk_eth *e
if (ret)
goto err_disable_pm;
+ if (of_dma_is_coherent(eth->dev->of_node)) {
+ u32 mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
+ ETHSYS_DMA_AG_MAP_PPE;
+
+ regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, mask, mask);
+ }
+
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
ret = device_reset(eth->dev);
if (ret) {
@@ -3104,6 +3112,16 @@ static int mtk_probe(struct platform_dev
}
}
+ if (of_dma_is_coherent(pdev->dev.of_node)) {
+ struct regmap *cci;
+
+ cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "mediatek,cci-control");
+ /* enable CPU/bus coherency */
+ if (!IS_ERR(cci))
+ regmap_write(cci, 0, 3);
+ }
+
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii),
GFP_KERNEL);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -456,6 +456,12 @@
#define RSTCTRL_FE BIT(6)
#define RSTCTRL_PPE BIT(31)
+/* ethernet dma channel agent map */
+#define ETHSYS_DMA_AG_MAP 0x408
+#define ETHSYS_DMA_AG_MAP_PDMA BIT(0)
+#define ETHSYS_DMA_AG_MAP_QDMA BIT(1)
+#define ETHSYS_DMA_AG_MAP_PPE BIT(2)
+
/* SGMII subsystem config registers */
/* Register to auto-negotiation restart */
#define SGMSYS_PCS_CONTROL_1 0x0

4
target/linux/mediatek/patches-5.10/701-v5.17-net-ethernet-mtk_eth_soc-fix-return-values-and-refac.patch
View File

@@ -22,7 +22,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -92,46 +92,53 @@ static int mtk_mdio_busy_wait(struct mtk
@@ -94,46 +94,53 @@ static int mtk_mdio_busy_wait(struct mtk
}
dev_err(eth->dev, "mdio: MDIO timeout\n");
@@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int mtk_mdio_write(struct mii_bus *bus, int phy_addr,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -341,11 +341,17 @@
@@ -344,11 +344,17 @@
/* PHY Indirect Access Control registers */
#define MTK_PHY_IAC 0x10004
#define PHY_IAC_ACCESS BIT(31)

8
target/linux/mediatek/patches-5.10/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch
View File

@@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -104,13 +104,35 @@ static int _mtk_mdio_write(struct mtk_et
@@ -106,13 +106,35 @@ static int _mtk_mdio_write(struct mtk_et
if (ret < 0)
return ret;
@@ -63,7 +63,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = mtk_mdio_busy_wait(eth);
if (ret < 0)
@@ -127,12 +149,33 @@ static int _mtk_mdio_read(struct mtk_eth
@@ -129,12 +151,33 @@ static int _mtk_mdio_read(struct mtk_eth
if (ret < 0)
return ret;
@@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = mtk_mdio_busy_wait(eth);
if (ret < 0)
@@ -591,6 +634,7 @@ static int mtk_mdio_init(struct mtk_eth
@@ -593,6 +636,7 @@ static int mtk_mdio_init(struct mtk_eth
eth->mii_bus->name = "mdio";
eth->mii_bus->read = mtk_mdio_read;
eth->mii_bus->write = mtk_mdio_write;
@@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -346,9 +346,12 @@
@@ -349,9 +349,12 @@
#define PHY_IAC_ADDR_MASK GENMASK(24, 20)
#define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x))
#define PHY_IAC_CMD_MASK GENMASK(19, 18)

2
target/linux/mediatek/patches-5.10/704-net-ethernet-mtk_eth_soc-announce-2500baseT.patch
View File

@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -575,6 +575,7 @@ static void mtk_validate(struct phylink_
@@ -577,6 +577,7 @@ static void mtk_validate(struct phylink_
if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) {
phylink_set(mask, 1000baseT_Full);
phylink_set(mask, 1000baseX_Full);

12
target/linux/mediatek/patches-5.10/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
View File

@@ -44,18 +44,6 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
@@ -933,6 +939,11 @@
};
};
+ hifsys: syscon@1af00000 {
+ compatible = "mediatek,mt7622-hifsys", "syscon";
+ reg = <0 0x1af00000 0 0x70>;
+ };
+
ethsys: syscon@1b000000 {
compatible = "mediatek,mt7622-ethsys",
"syscon";
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -20,6 +20,7 @@