kernel: bump 4.9 to 4.9.137
Refreshed all patches. Removed upstreamed hunks in: - 703-phy-support-layerscape.patch Compile-tested on: ar71xx, layerscape Runtime-tested on: ar71xx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This commit is contained in:
@@ -1160,7 +1160,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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+#endif
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--- a/kernel/irq/manage.c
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+++ b/kernel/irq/manage.c
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@@ -1387,6 +1387,7 @@ __setup_irq(unsigned int irq, struct irq
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@@ -1391,6 +1391,7 @@ __setup_irq(unsigned int irq, struct irq
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wake_up_process(new->secondary->thread);
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register_irq_proc(irq, desc);
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@@ -1370,7 +1370,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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&queue_tx_maxrate.attr,
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--- a/net/core/rtnetlink.c
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+++ b/net/core/rtnetlink.c
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@@ -3696,7 +3696,7 @@ static int rtnl_get_offload_stats(struct
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@@ -3706,7 +3706,7 @@ static int rtnl_get_offload_stats(struct
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if (!size)
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continue;
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@@ -1379,7 +1379,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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continue;
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attr = nla_reserve_64bit(skb, attr_id, size,
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@@ -3737,7 +3737,7 @@ static int rtnl_get_offload_stats_size(c
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@@ -3747,7 +3747,7 @@ static int rtnl_get_offload_stats_size(c
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for (attr_id = IFLA_OFFLOAD_XSTATS_FIRST;
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attr_id <= IFLA_OFFLOAD_XSTATS_MAX; attr_id++) {
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@@ -715,7 +715,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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/* Everspin */
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{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
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@@ -1015,12 +1029,15 @@ static const struct flash_info spi_nor_i
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@@ -1021,12 +1035,15 @@ static const struct flash_info spi_nor_i
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{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
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{ "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
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{ "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
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@@ -732,7 +732,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
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{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
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{ "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
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@@ -1034,10 +1051,11 @@ static const struct flash_info spi_nor_i
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@@ -1040,10 +1057,11 @@ static const struct flash_info spi_nor_i
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{ "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) },
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@@ -746,7 +746,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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/* PMC */
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{ "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
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@@ -1055,8 +1073,11 @@ static const struct flash_info spi_nor_i
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@@ -1061,8 +1079,11 @@ static const struct flash_info spi_nor_i
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{ "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
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{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
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{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
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@@ -759,7 +759,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
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{ "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
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@@ -1130,7 +1151,15 @@ static const struct flash_info spi_nor_i
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@@ -1136,7 +1157,15 @@ static const struct flash_info spi_nor_i
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{ "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SECT_4K) },
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{ "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) },
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{ "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) },
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@@ -775,7 +775,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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{ "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
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{
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"w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64,
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@@ -1202,6 +1231,53 @@ static const struct flash_info *spi_nor_
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@@ -1208,6 +1237,53 @@ static const struct flash_info *spi_nor_
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id[0], id[1], id[2]);
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return ERR_PTR(-ENODEV);
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}
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@@ -829,7 +829,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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@@ -1421,7 +1497,7 @@ static int macronix_quad_enable(struct s
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@@ -1427,7 +1503,7 @@ static int macronix_quad_enable(struct s
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* Write status Register and configuration register with 2 bytes
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* The first byte will be written to the status register, while the
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* second byte will be written to the configuration register.
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@@ -838,7 +838,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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*/
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static int write_sr_cr(struct spi_nor *nor, u16 val)
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{
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@@ -1469,6 +1545,24 @@ static int spansion_quad_enable(struct s
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@@ -1475,6 +1551,24 @@ static int spansion_quad_enable(struct s
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return 0;
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}
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@@ -863,7 +863,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info)
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{
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int status;
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@@ -1615,9 +1709,25 @@ int spi_nor_scan(struct spi_nor *nor, co
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@@ -1621,9 +1715,25 @@ int spi_nor_scan(struct spi_nor *nor, co
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write_sr(nor, 0);
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spi_nor_wait_till_ready(nor);
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}
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@@ -889,7 +889,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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mtd->priv = nor;
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mtd->type = MTD_NORFLASH;
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mtd->writesize = 1;
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@@ -1651,6 +1761,8 @@ int spi_nor_scan(struct spi_nor *nor, co
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@@ -1657,6 +1767,8 @@ int spi_nor_scan(struct spi_nor *nor, co
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nor->flags |= SNOR_F_USE_FSR;
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if (info->flags & SPI_NOR_HAS_TB)
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nor->flags |= SNOR_F_HAS_SR_TB;
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@@ -898,7 +898,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
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/* prefer "small sector" erase if possible */
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@@ -1690,9 +1802,15 @@ int spi_nor_scan(struct spi_nor *nor, co
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@@ -1696,9 +1808,15 @@ int spi_nor_scan(struct spi_nor *nor, co
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/* Some devices cannot do fast-read, no matter what DT tells us */
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if (info->flags & SPI_NOR_NO_FR)
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nor->flash_read = SPI_NOR_NORMAL;
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@@ -917,7 +917,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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ret = set_quad_mode(nor, info);
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if (ret) {
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dev_err(dev, "quad mode not supported\n");
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@@ -1705,6 +1823,9 @@ int spi_nor_scan(struct spi_nor *nor, co
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@@ -1711,6 +1829,9 @@ int spi_nor_scan(struct spi_nor *nor, co
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/* Default commands */
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switch (nor->flash_read) {
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@@ -2060,7 +2060,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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}
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -3329,6 +3329,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_A
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@@ -3333,6 +3333,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_A
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
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@@ -2074,7 +2074,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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static void quirk_no_pm_reset(struct pci_dev *dev)
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{
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/*
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@@ -4673,3 +4680,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IN
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@@ -4677,3 +4684,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IN
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2031, quirk_no_aersid);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2032, quirk_no_aersid);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
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@@ -1605,17 +1605,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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+MODULE_DESCRIPTION("Freescale Backplane driver");
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+MODULE_AUTHOR("Shaohui Xie <Shaohui.Xie@freescale.com>");
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+MODULE_LICENSE("GPL v2");
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--- a/drivers/net/phy/marvell.c
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+++ b/drivers/net/phy/marvell.c
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@@ -1610,7 +1610,7 @@ static struct phy_driver marvell_drivers
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.flags = PHY_HAS_INTERRUPT,
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.probe = marvell_probe,
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.config_init = &m88e1145_config_init,
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- .config_aneg = &marvell_config_aneg,
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+ .config_aneg = &m88e1101_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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--- a/drivers/net/phy/phy.c
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+++ b/drivers/net/phy/phy.c
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@@ -591,7 +591,7 @@ int phy_mii_ioctl(struct phy_device *phy
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@@ -782,7 +782,7 @@ Singed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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};
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struct tcrypt_result {
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@@ -1333,6 +1333,10 @@ static int do_test(const char *alg, u32
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@@ -1336,6 +1336,10 @@ static int do_test(const char *alg, u32
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ret += tcrypt_test("hmac(sha3-512)");
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break;
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@@ -793,7 +793,7 @@ Singed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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case 150:
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ret += tcrypt_test("ansi_cprng");
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break;
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@@ -1394,6 +1398,9 @@ static int do_test(const char *alg, u32
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@@ -1397,6 +1401,9 @@ static int do_test(const char *alg, u32
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case 190:
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ret += tcrypt_test("authenc(hmac(sha512),cbc(des3_ede))");
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break;
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@@ -803,7 +803,7 @@ Singed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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case 200:
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test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0,
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speed_template_16_24_32);
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@@ -1408,9 +1415,9 @@ static int do_test(const char *alg, u32
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@@ -1411,9 +1418,9 @@ static int do_test(const char *alg, u32
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test_cipher_speed("lrw(aes)", DECRYPT, sec, NULL, 0,
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speed_template_32_40_48);
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test_cipher_speed("xts(aes)", ENCRYPT, sec, NULL, 0,
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@@ -815,7 +815,7 @@ Singed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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test_cipher_speed("cts(cbc(aes))", ENCRYPT, sec, NULL, 0,
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speed_template_16_24_32);
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test_cipher_speed("cts(cbc(aes))", DECRYPT, sec, NULL, 0,
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@@ -1841,9 +1848,9 @@ static int do_test(const char *alg, u32
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@@ -1844,9 +1851,9 @@ static int do_test(const char *alg, u32
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test_acipher_speed("lrw(aes)", DECRYPT, sec, NULL, 0,
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speed_template_32_40_48);
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test_acipher_speed("xts(aes)", ENCRYPT, sec, NULL, 0,
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@@ -28208,8 +28208,8 @@ Singed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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extern bool caam_little_end;
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+extern bool caam_imx;
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#define caam_to_cpu(len) \
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static inline u##len caam##len ## _to_cpu(u##len val) \
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#define caam_to_cpu(len) \
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static inline u##len caam##len ## _to_cpu(u##len val) \
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@@ -154,13 +156,10 @@ static inline u64 rd_reg64(void __iomem
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#else /* CONFIG_64BIT */
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static inline void wr_reg64(void __iomem *reg, u64 data)
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@@ -88,7 +88,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
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if (pkt_len < ETH_ZLEN)
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break;
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@@ -4510,6 +4515,7 @@ static struct usb_device_id rtl8152_tabl
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@@ -4513,6 +4518,7 @@ static struct usb_device_id rtl8152_tabl
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{REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
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{REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
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{REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
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