kernel: add pending patches for bcm63268-timer-clocks
bcm63268-timer-clocks have been sent upstream with a positive review, so let's add them to pending v5.15. Also add devm_clk_hw_register_gate() patch from v5.17 to backports since it's needed for upstream bcm63268-timer-clocks patches. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This commit is contained in:
Álvaro Fernández Rojas
@@ -0,0 +1,105 @@
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From 815f0e738a8d5663a02350e2580706829144a722 Mon Sep 17 00:00:00 2001
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From: Horatiu Vultur <horatiu.vultur@microchip.com>
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Date: Wed, 3 Nov 2021 09:50:59 +0100
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Subject: [PATCH] clk: gate: Add devm_clk_hw_register_gate()
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Add devm_clk_hw_register_gate() - devres-managed version of
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clk_hw_register_gate()
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Suggested-by: Stephen Boyd <sboyd@kernel.org>
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Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
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Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Link: https://lore.kernel.org/r/20211103085102.1656081-2-horatiu.vultur@microchip.com
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---
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drivers/clk/clk-gate.c | 35 +++++++++++++++++++++++++++++++++++
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include/linux/clk-provider.h | 23 +++++++++++++++++++++++
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2 files changed, 58 insertions(+)
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--- a/drivers/clk/clk-gate.c
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+++ b/drivers/clk/clk-gate.c
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@@ -7,6 +7,7 @@
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*/
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#include <linux/clk-provider.h>
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+#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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@@ -222,3 +223,37 @@ void clk_hw_unregister_gate(struct clk_h
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kfree(gate);
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}
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EXPORT_SYMBOL_GPL(clk_hw_unregister_gate);
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+
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+static void devm_clk_hw_release_gate(struct device *dev, void *res)
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+{
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+ clk_hw_unregister_gate(*(struct clk_hw **)res);
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+}
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+
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+struct clk_hw *__devm_clk_hw_register_gate(struct device *dev,
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+ struct device_node *np, const char *name,
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+ const char *parent_name, const struct clk_hw *parent_hw,
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+ const struct clk_parent_data *parent_data,
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+ unsigned long flags,
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+ void __iomem *reg, u8 bit_idx,
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+ u8 clk_gate_flags, spinlock_t *lock)
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+{
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+ struct clk_hw **ptr, *hw;
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+
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+ ptr = devres_alloc(devm_clk_hw_release_gate, sizeof(*ptr), GFP_KERNEL);
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+ if (!ptr)
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+ return ERR_PTR(-ENOMEM);
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+
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+ hw = __clk_hw_register_gate(dev, np, name, parent_name, parent_hw,
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+ parent_data, flags, reg, bit_idx,
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+ clk_gate_flags, lock);
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+
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+ if (!IS_ERR(hw)) {
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+ *ptr = hw;
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+ devres_add(dev, ptr);
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+ } else {
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+ devres_free(ptr);
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+ }
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+
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+ return hw;
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+}
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+EXPORT_SYMBOL_GPL(__devm_clk_hw_register_gate);
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--- a/include/linux/clk-provider.h
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+++ b/include/linux/clk-provider.h
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@@ -490,6 +490,13 @@ struct clk_hw *__clk_hw_register_gate(st
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unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock);
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+struct clk_hw *__devm_clk_hw_register_gate(struct device *dev,
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+ struct device_node *np, const char *name,
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+ const char *parent_name, const struct clk_hw *parent_hw,
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+ const struct clk_parent_data *parent_data,
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+ unsigned long flags,
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+ void __iomem *reg, u8 bit_idx,
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+ u8 clk_gate_flags, spinlock_t *lock);
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struct clk *clk_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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@@ -544,6 +551,22 @@ struct clk *clk_register_gate(struct dev
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__clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), \
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(flags), (reg), (bit_idx), \
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(clk_gate_flags), (lock))
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+/**
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+ * devm_clk_hw_register_gate - register a gate clock with the clock framework
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+ * @dev: device that is registering this clock
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+ * @name: name of this clock
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+ * @parent_name: name of this clock's parent
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+ * @flags: framework-specific flags for this clock
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+ * @reg: register address to control gating of this clock
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+ * @bit_idx: which bit in the register controls gating of this clock
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+ * @clk_gate_flags: gate-specific flags for this clock
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+ * @lock: shared register lock for this clock
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+ */
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+#define devm_clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx,\
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+ clk_gate_flags, lock) \
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+ __devm_clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
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+ NULL, (flags), (reg), (bit_idx), \
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+ (clk_gate_flags), (lock))
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void clk_unregister_gate(struct clk *clk);
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void clk_hw_unregister_gate(struct clk_hw *hw);
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int clk_gate_is_enabled(struct clk_hw *hw);
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@@ -0,0 +1,114 @@
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To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
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Subject: [PATCH v4 1/4] dt-bindings: clk: add BCM63268 timer clock definitions
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Date: Wed, 22 Mar 2023 18:15:12 +0100
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Add missing timer clock definitions for BCM63268.
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Acked-by: Rob Herring <robh@kernel.org>
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---
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v4: no changes
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v3: no changes
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v2: change commit title, as suggested by Stephen Boyd
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include/dt-bindings/clock/bcm63268-clock.h | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/include/dt-bindings/clock/bcm63268-clock.h
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+++ b/include/dt-bindings/clock/bcm63268-clock.h
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@@ -27,4 +27,17 @@
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#define BCM63268_CLK_TBUS 27
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#define BCM63268_CLK_ROBOSW250 31
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+#define BCM63268_TCLK_EPHY1 0
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+#define BCM63268_TCLK_EPHY2 1
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+#define BCM63268_TCLK_EPHY3 2
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+#define BCM63268_TCLK_GPHY1 3
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+#define BCM63268_TCLK_DSL 4
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+#define BCM63268_TCLK_WAKEON_EPHY 6
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+#define BCM63268_TCLK_WAKEON_DSL 7
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+#define BCM63268_TCLK_FAP1 11
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+#define BCM63268_TCLK_FAP2 15
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+#define BCM63268_TCLK_UTO_50 16
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+#define BCM63268_TCLK_UTO_EXTIN 17
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+#define BCM63268_TCLK_USB_REF 18
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+
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#endif /* __DT_BINDINGS_CLOCK_BCM63268_H */
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@@ -0,0 +1,107 @@
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|
||||
From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari@gmail.com>
|
||||
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
|
||||
krzysztof.kozlowski+dt@linaro.org, p.zabel@pengutronix.de,
|
||||
f.fainelli@gmail.com, jonas.gorski@gmail.com,
|
||||
william.zhang@broadcom.com, linux-clk@vger.kernel.org,
|
||||
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|
||||
Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari@gmail.com>,
|
||||
Rob Herring <robh@kernel.org>
|
||||
Subject: [PATCH v4 2/4] dt-bindings: reset: add BCM63268 timer reset
|
||||
definitions
|
||||
Date: Wed, 22 Mar 2023 18:15:13 +0100
|
||||
Message-Id: <20230322171515.120353-3-noltari@gmail.com>
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|
||||
|
||||
Add missing timer reset definitions for BCM63268.
|
||||
|
||||
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
|
||||
Acked-by: Rob Herring <robh@kernel.org>
|
||||
---
|
||||
v4: no changes
|
||||
v3: no changes
|
||||
v2: change commit title, as suggested by Stephen Boyd
|
||||
|
||||
include/dt-bindings/reset/bcm63268-reset.h | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/include/dt-bindings/reset/bcm63268-reset.h
|
||||
+++ b/include/dt-bindings/reset/bcm63268-reset.h
|
||||
@@ -23,4 +23,8 @@
|
||||
#define BCM63268_RST_PCIE_HARD 17
|
||||
#define BCM63268_RST_GPHY 18
|
||||
|
||||
+#define BCM63268_TRST_SW 29
|
||||
+#define BCM63268_TRST_HW 30
|
||||
+#define BCM63268_TRST_POR 31
|
||||
+
|
||||
#endif /* __DT_BINDINGS_RESET_BCM63268_H */
|
||||
@@ -0,0 +1,345 @@
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|
||||
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
|
||||
krzysztof.kozlowski+dt@linaro.org, p.zabel@pengutronix.de,
|
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f.fainelli@gmail.com, jonas.gorski@gmail.com,
|
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|
||||
Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari@gmail.com>
|
||||
Subject: [PATCH v4 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
|
||||
Date: Wed, 22 Mar 2023 18:15:15 +0100
|
||||
Message-Id: <20230322171515.120353-5-noltari@gmail.com>
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|
||||
|
||||
Add driver for BCM63268 timer clock and reset controller.
|
||||
|
||||
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
|
||||
---
|
||||
v4: add changes suggested by Stephen Boyd:
|
||||
- Usage of of_device_get_match_data() isn't needed.
|
||||
- Use devm_clk_hw_register_gate().
|
||||
- Drop clk_hw_unregister_gate().
|
||||
v3: add missing <linux/io.h> include to fix build warning
|
||||
v2: add changes suggested by Stephen Boyd
|
||||
|
||||
drivers/clk/bcm/Kconfig | 9 ++
|
||||
drivers/clk/bcm/Makefile | 1 +
|
||||
drivers/clk/bcm/clk-bcm63268-timer.c | 215 +++++++++++++++++++++++++++
|
||||
3 files changed, 225 insertions(+)
|
||||
create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c
|
||||
|
||||
--- a/drivers/clk/bcm/Kconfig
|
||||
+++ b/drivers/clk/bcm/Kconfig
|
||||
@@ -37,6 +37,15 @@ config CLK_BCM_63XX_GATE
|
||||
Enable common clock framework support for Broadcom BCM63xx DSL SoCs
|
||||
based on the MIPS architecture
|
||||
|
||||
+config CLK_BCM63268_TIMER
|
||||
+ bool "Broadcom BCM63268 timer clock and reset support"
|
||||
+ depends on BMIPS_GENERIC || COMPILE_TEST
|
||||
+ default BMIPS_GENERIC
|
||||
+ select RESET_CONTROLLER
|
||||
+ help
|
||||
+ Enable timer clock and reset support for Broadcom BCM63268 DSL SoCs
|
||||
+ based on the MIPS architecture.
|
||||
+
|
||||
config CLK_BCM_KONA
|
||||
bool "Broadcom Kona CCU clock support"
|
||||
depends on ARCH_BCM_MOBILE || COMPILE_TEST
|
||||
--- a/drivers/clk/bcm/Makefile
|
||||
+++ b/drivers/clk/bcm/Makefile
|
||||
@@ -1,6 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o
|
||||
obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o
|
||||
+obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o
|
||||
obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o
|
||||
obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
|
||||
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/clk/bcm/clk-bcm63268-timer.c
|
||||
@@ -0,0 +1,215 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * BCM63268 Timer Clock and Reset Controller Driver
|
||||
+ *
|
||||
+ * Copyright (C) 2023 Álvaro Fernández Rojas <noltari@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/clk-provider.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/of_device.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/reset-controller.h>
|
||||
+
|
||||
+#include <dt-bindings/clock/bcm63268-clock.h>
|
||||
+
|
||||
+#define BCM63268_TIMER_RESET_SLEEP_MIN_US 10000
|
||||
+#define BCM63268_TIMER_RESET_SLEEP_MAX_US 20000
|
||||
+
|
||||
+struct bcm63268_tclkrst_hw {
|
||||
+ void __iomem *regs;
|
||||
+ spinlock_t lock;
|
||||
+
|
||||
+ struct reset_controller_dev rcdev;
|
||||
+ struct clk_hw_onecell_data data;
|
||||
+};
|
||||
+
|
||||
+struct bcm63268_tclk_table_entry {
|
||||
+ const char * const name;
|
||||
+ u8 bit;
|
||||
+};
|
||||
+
|
||||
+static const struct bcm63268_tclk_table_entry bcm63268_timer_clocks[] = {
|
||||
+ {
|
||||
+ .name = "ephy1",
|
||||
+ .bit = BCM63268_TCLK_EPHY1,
|
||||
+ }, {
|
||||
+ .name = "ephy2",
|
||||
+ .bit = BCM63268_TCLK_EPHY2,
|
||||
+ }, {
|
||||
+ .name = "ephy3",
|
||||
+ .bit = BCM63268_TCLK_EPHY3,
|
||||
+ }, {
|
||||
+ .name = "gphy1",
|
||||
+ .bit = BCM63268_TCLK_GPHY1,
|
||||
+ }, {
|
||||
+ .name = "dsl",
|
||||
+ .bit = BCM63268_TCLK_DSL,
|
||||
+ }, {
|
||||
+ .name = "wakeon_ephy",
|
||||
+ .bit = BCM63268_TCLK_WAKEON_EPHY,
|
||||
+ }, {
|
||||
+ .name = "wakeon_dsl",
|
||||
+ .bit = BCM63268_TCLK_WAKEON_DSL,
|
||||
+ }, {
|
||||
+ .name = "fap1_pll",
|
||||
+ .bit = BCM63268_TCLK_FAP1,
|
||||
+ }, {
|
||||
+ .name = "fap2_pll",
|
||||
+ .bit = BCM63268_TCLK_FAP2,
|
||||
+ }, {
|
||||
+ .name = "uto_50",
|
||||
+ .bit = BCM63268_TCLK_UTO_50,
|
||||
+ }, {
|
||||
+ .name = "uto_extin",
|
||||
+ .bit = BCM63268_TCLK_UTO_EXTIN,
|
||||
+ }, {
|
||||
+ .name = "usb_ref",
|
||||
+ .bit = BCM63268_TCLK_USB_REF,
|
||||
+ }, {
|
||||
+ /* sentinel */
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static inline struct bcm63268_tclkrst_hw *
|
||||
+to_bcm63268_timer_reset(struct reset_controller_dev *rcdev)
|
||||
+{
|
||||
+ return container_of(rcdev, struct bcm63268_tclkrst_hw, rcdev);
|
||||
+}
|
||||
+
|
||||
+static int bcm63268_timer_reset_update(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id, bool assert)
|
||||
+{
|
||||
+ struct bcm63268_tclkrst_hw *reset = to_bcm63268_timer_reset(rcdev);
|
||||
+ unsigned long flags;
|
||||
+ uint32_t val;
|
||||
+
|
||||
+ spin_lock_irqsave(&reset->lock, flags);
|
||||
+ val = __raw_readl(reset->regs);
|
||||
+ if (assert)
|
||||
+ val &= ~BIT(id);
|
||||
+ else
|
||||
+ val |= BIT(id);
|
||||
+ __raw_writel(val, reset->regs);
|
||||
+ spin_unlock_irqrestore(&reset->lock, flags);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int bcm63268_timer_reset_assert(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ return bcm63268_timer_reset_update(rcdev, id, true);
|
||||
+}
|
||||
+
|
||||
+static int bcm63268_timer_reset_deassert(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ return bcm63268_timer_reset_update(rcdev, id, false);
|
||||
+}
|
||||
+
|
||||
+static int bcm63268_timer_reset_reset(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ bcm63268_timer_reset_update(rcdev, id, true);
|
||||
+ usleep_range(BCM63268_TIMER_RESET_SLEEP_MIN_US,
|
||||
+ BCM63268_TIMER_RESET_SLEEP_MAX_US);
|
||||
+
|
||||
+ bcm63268_timer_reset_update(rcdev, id, false);
|
||||
+ /*
|
||||
+ * Ensure component is taken out reset state by sleeping also after
|
||||
+ * deasserting the reset. Otherwise, the component may not be ready
|
||||
+ * for operation.
|
||||
+ */
|
||||
+ usleep_range(BCM63268_TIMER_RESET_SLEEP_MIN_US,
|
||||
+ BCM63268_TIMER_RESET_SLEEP_MAX_US);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int bcm63268_timer_reset_status(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ struct bcm63268_tclkrst_hw *reset = to_bcm63268_timer_reset(rcdev);
|
||||
+
|
||||
+ return !(__raw_readl(reset->regs) & BIT(id));
|
||||
+}
|
||||
+
|
||||
+static struct reset_control_ops bcm63268_timer_reset_ops = {
|
||||
+ .assert = bcm63268_timer_reset_assert,
|
||||
+ .deassert = bcm63268_timer_reset_deassert,
|
||||
+ .reset = bcm63268_timer_reset_reset,
|
||||
+ .status = bcm63268_timer_reset_status,
|
||||
+};
|
||||
+
|
||||
+static int bcm63268_tclk_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ const struct bcm63268_tclk_table_entry *entry;
|
||||
+ struct bcm63268_tclkrst_hw *hw;
|
||||
+ struct clk_hw *clk;
|
||||
+ u8 maxbit = 0;
|
||||
+ int i, ret;
|
||||
+
|
||||
+ for (entry = bcm63268_timer_clocks; entry->name; entry++)
|
||||
+ maxbit = max(maxbit, entry->bit);
|
||||
+ maxbit++;
|
||||
+
|
||||
+ hw = devm_kzalloc(&pdev->dev, struct_size(hw, data.hws, maxbit),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!hw)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ platform_set_drvdata(pdev, hw);
|
||||
+
|
||||
+ spin_lock_init(&hw->lock);
|
||||
+
|
||||
+ hw->data.num = maxbit;
|
||||
+ for (i = 0; i < maxbit; i++)
|
||||
+ hw->data.hws[i] = ERR_PTR(-ENODEV);
|
||||
+
|
||||
+ hw->regs = devm_platform_ioremap_resource(pdev, 0);
|
||||
+ if (IS_ERR(hw->regs))
|
||||
+ return PTR_ERR(hw->regs);
|
||||
+
|
||||
+ for (entry = bcm63268_timer_clocks; entry->name; entry++) {
|
||||
+ clk = devm_clk_hw_register_gate(dev, entry->name, NULL, 0,
|
||||
+ hw->regs, entry->bit,
|
||||
+ CLK_GATE_BIG_ENDIAN,
|
||||
+ &hw->lock);
|
||||
+ if (IS_ERR(clk))
|
||||
+ return PTR_ERR(clk);
|
||||
+
|
||||
+ hw->data.hws[entry->bit] = clk;
|
||||
+ }
|
||||
+
|
||||
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
|
||||
+ &hw->data);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ hw->rcdev.of_node = dev->of_node;
|
||||
+ hw->rcdev.ops = &bcm63268_timer_reset_ops;
|
||||
+
|
||||
+ ret = devm_reset_controller_register(dev, &hw->rcdev);
|
||||
+ if (ret)
|
||||
+ dev_err(dev, "Failed to register reset controller\n");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id bcm63268_tclk_dt_ids[] = {
|
||||
+ { .compatible = "brcm,bcm63268-timer-clocks" },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+
|
||||
+static struct platform_driver bcm63268_tclk = {
|
||||
+ .probe = bcm63268_tclk_probe,
|
||||
+ .driver = {
|
||||
+ .name = "bcm63268-timer-clock",
|
||||
+ .of_match_table = bcm63268_tclk_dt_ids,
|
||||
+ },
|
||||
+};
|
||||
+builtin_platform_driver(bcm63268_tclk);
|
||||
Reference in New Issue
Block a user