mediatek/ramips: unify ethernet driver fixes and add performance optimizations
Increase DMA burst size and tx ring size and optimize tx processing Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
@@ -1,21 +0,0 @@
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1315,7 +1315,7 @@ static int mtk_poll_rx(struct napi_struc
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skb->protocol = eth_type_trans(skb, netdev);
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if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
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- RX_DMA_VID(trxd.rxd3))
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+ (trxd.rxd2 & RX_DMA_VTAG))
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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RX_DMA_VID(trxd.rxd3));
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skb_record_rx_queue(skb, 0);
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -293,6 +293,7 @@
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#define RX_DMA_LSO BIT(30)
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#define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16)
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#define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff)
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+#define RX_DMA_VTAG BIT(15)
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/* QDMA descriptor rxd3 */
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#define RX_DMA_VID(_x) ((_x) & 0xfff)
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@@ -1,38 +0,0 @@
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1121,17 +1121,6 @@ static void mtk_wake_queue(struct mtk_et
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}
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}
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-static void mtk_stop_queue(struct mtk_eth *eth)
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-{
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- int i;
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-
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- for (i = 0; i < MTK_MAC_COUNT; i++) {
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- if (!eth->netdev[i])
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- continue;
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- netif_stop_queue(eth->netdev[i]);
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- }
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-}
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-
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static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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struct mtk_mac *mac = netdev_priv(dev);
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@@ -1152,7 +1141,7 @@ static int mtk_start_xmit(struct sk_buff
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tx_num = mtk_cal_txd_req(skb);
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if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
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- mtk_stop_queue(eth);
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+ netif_stop_queue(dev);
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netif_err(eth, tx_queued, dev,
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"Tx Ring full when queue awake!\n");
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spin_unlock(ð->page_lock);
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@@ -1178,7 +1167,7 @@ static int mtk_start_xmit(struct sk_buff
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goto drop;
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if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
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- mtk_stop_queue(eth);
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+ netif_stop_queue(dev);
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spin_unlock(ð->page_lock);
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@@ -1,6 +1,6 @@
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--- a/drivers/net/ethernet/mediatek/Kconfig
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+++ b/drivers/net/ethernet/mediatek/Kconfig
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@@ -14,4 +14,8 @@ config NET_MEDIATEK_SOC
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@@ -15,4 +15,8 @@ config NET_MEDIATEK_SOC
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This driver supports the gigabit ethernet MACs in the
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MediaTek SoC family.
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@@ -147,7 +147,7 @@
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#include "mtk_eth_soc.h"
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@@ -1307,8 +1309,16 @@ static int mtk_poll_rx(struct napi_struc
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@@ -1319,8 +1321,16 @@ static int mtk_poll_rx(struct napi_struc
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(trxd.rxd2 & RX_DMA_VTAG))
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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RX_DMA_VID(trxd.rxd3));
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@@ -164,9 +164,9 @@
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+ }
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+#endif
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skip_rx:
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ring->data[idx] = new_data;
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rxd->rxd1 = (unsigned int)dma_addr;
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@@ -2225,6 +2235,9 @@ static int mtk_open(struct net_device *d
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@@ -2250,6 +2260,9 @@ static int mtk_open(struct net_device *d
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mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
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mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
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refcount_set(ð->dma_refcnt, 1);
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@@ -176,7 +176,7 @@
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}
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else
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refcount_inc(ð->dma_refcnt);
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@@ -2283,6 +2296,9 @@ static int mtk_stop(struct net_device *d
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@@ -2311,6 +2324,9 @@ static int mtk_stop(struct net_device *d
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mtk_dma_free(eth);
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@@ -186,7 +186,7 @@
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return 0;
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}
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@@ -2742,6 +2758,27 @@ static int mtk_set_rxnfc(struct net_devi
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@@ -2824,6 +2840,27 @@ static int mtk_set_rxnfc(struct net_devi
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return ret;
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}
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@@ -214,7 +214,7 @@
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static const struct ethtool_ops mtk_ethtool_ops = {
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.get_link_ksettings = mtk_get_link_ksettings,
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.set_link_ksettings = mtk_set_link_ksettings,
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@@ -2773,6 +2810,9 @@ static const struct net_device_ops mtk_n
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@@ -2855,6 +2892,9 @@ static const struct net_device_ops mtk_n
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#ifdef CONFIG_NET_POLL_CONTROLLER
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.ndo_poll_controller = mtk_poll_controller,
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#endif
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@@ -224,7 +224,7 @@
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};
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static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
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@@ -3108,6 +3148,7 @@ static const struct mtk_soc_data mt7622_
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@@ -3197,6 +3237,7 @@ static const struct mtk_soc_data mt7622_
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.hw_features = MTK_HW_FEATURES,
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.required_clks = MT7622_CLKS_BITMAP,
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.required_pctl = false,
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@@ -234,7 +234,7 @@
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static const struct mtk_soc_data mt7623_data = {
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -779,6 +779,13 @@ enum mkt_eth_capabilities {
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@@ -787,6 +787,13 @@ enum mkt_eth_capabilities {
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MTK_MUX_U3_GMAC2_TO_QPHY | \
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MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
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@@ -248,7 +248,7 @@
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/* struct mtk_eth_data - This is the structure holding all differences
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* among various plaforms
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* @ana_rgc3: The offset for register ANA_RGC3 related to
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@@ -796,6 +803,7 @@ struct mtk_soc_data {
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@@ -804,6 +811,7 @@ struct mtk_soc_data {
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u32 required_clks;
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bool required_pctl;
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netdev_features_t hw_features;
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@@ -256,7 +256,7 @@
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};
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/* currently no SoC has more than 2 macs */
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@@ -821,6 +829,23 @@ struct mtk_sgmii {
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@@ -829,6 +837,23 @@ struct mtk_sgmii {
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u32 ana_rgc3;
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};
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@@ -280,7 +280,7 @@
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/* struct mtk_eth - This is the main datasructure for holding the state
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* of the driver
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* @dev: The device pointer
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@@ -894,6 +919,16 @@ struct mtk_eth {
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@@ -914,6 +939,16 @@ struct mtk_eth {
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u32 tx_int_status_reg;
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u32 rx_dma_l4_valid;
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int ip_align;
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@@ -297,7 +297,7 @@
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};
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/* struct mtk_mac - the structure that holds the info about the MACs of the
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@@ -926,6 +961,7 @@ void mtk_stats_update_mac(struct mtk_mac
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@@ -946,6 +981,7 @@ void mtk_stats_update_mac(struct mtk_mac
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void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg);
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u32 mtk_r32(struct mtk_eth *eth, unsigned reg);
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@@ -305,7 +305,7 @@
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int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *np,
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u32 ana_rgc3);
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@@ -938,4 +974,13 @@ int mtk_gmac_sgmii_path_setup(struct mtk
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@@ -958,4 +994,13 @@ int mtk_gmac_sgmii_path_setup(struct mtk
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int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
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int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
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@@ -1,6 +1,6 @@
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -2210,6 +2210,31 @@ static int mtk_start_dma(struct mtk_eth
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@@ -2235,6 +2235,31 @@ static int mtk_start_dma(struct mtk_eth
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return 0;
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}
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@@ -32,7 +32,7 @@
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static int mtk_open(struct net_device *dev)
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{
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struct mtk_mac *mac = netdev_priv(dev);
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@@ -2230,6 +2255,8 @@ static int mtk_open(struct net_device *d
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@@ -2255,6 +2280,8 @@ static int mtk_open(struct net_device *d
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if (err)
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return err;
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@@ -41,7 +41,7 @@
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napi_enable(ð->tx_napi);
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napi_enable(ð->rx_napi);
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mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
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@@ -2285,6 +2312,8 @@ static int mtk_stop(struct net_device *d
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@@ -2310,6 +2337,8 @@ static int mtk_stop(struct net_device *d
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if (!refcount_dec_and_test(ð->dma_refcnt))
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return 0;
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@@ -50,8 +50,8 @@
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mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
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mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
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napi_disable(ð->tx_napi);
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@@ -2411,8 +2440,6 @@ static int mtk_hw_init(struct mtk_eth *e
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mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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@@ -2493,8 +2522,6 @@ static int mtk_hw_init(struct mtk_eth *e
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/* disable delay and normal interrupt */
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
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@@ -59,7 +59,7 @@
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/* FE int grouping */
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
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@@ -2421,19 +2448,6 @@ static int mtk_hw_init(struct mtk_eth *e
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@@ -2503,19 +2530,6 @@ static int mtk_hw_init(struct mtk_eth *e
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mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
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mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
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@@ -81,7 +81,7 @@
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err_disable_pm:
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -84,6 +84,8 @@
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@@ -85,6 +85,8 @@
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#define MTK_GDMA_ICS_EN BIT(22)
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#define MTK_GDMA_TCS_EN BIT(21)
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#define MTK_GDMA_UCS_EN BIT(20)
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@@ -1,24 +0,0 @@
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1364,10 +1364,11 @@ static int mtk_poll_tx_qdma(struct mtk_e
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u32 next_cpu = desc->txd2;
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int mac = 0;
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- desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
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if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
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break;
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+ desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
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+
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tx_buf = mtk_desc_to_tx_buf(ring, desc);
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if (tx_buf->flags & MTK_TX_FLAGS_FPORT1)
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mac = 1;
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@@ -2191,7 +2192,7 @@ static int mtk_start_dma(struct mtk_eth
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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mtk_w32(eth,
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- MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
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+ MTK_TX_DMA_EN |
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MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
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MTK_RX_BT_32DWORDS,
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@@ -1,60 +0,0 @@
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:28.403764254 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:39.803438475 +0800
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@@ -2193,7 +2193,7 @@
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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mtk_w32(eth,
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MTK_TX_DMA_EN |
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- MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
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+ MTK_DMA_SIZE_32DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
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MTK_RX_BT_32DWORDS,
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MTK_QDMA_GLO_CFG);
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@@ -2434,11 +2434,10 @@
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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- /* enable interrupt delay for RX */
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- mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
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+ /* enable interrupt delay for RX/TX */
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT);
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT);
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- /* disable delay and normal interrupt */
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- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:22.939920398 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:43.359336855 +0800
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@@ -19,8 +19,8 @@
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#define MTK_QDMA_PAGE_SIZE 2048
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#define MTK_MAX_RX_LENGTH 1536
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#define MTK_TX_DMA_BUF_LEN 0x3fff
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-#define MTK_DMA_SIZE 256
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-#define MTK_NAPI_WEIGHT 64
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+#define MTK_DMA_SIZE 2048
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+#define MTK_NAPI_WEIGHT 256
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#define MTK_MAC_COUNT 2
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#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
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@@ -198,6 +198,7 @@
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#define MTK_NDP_CO_PRO BIT(10)
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#define MTK_TX_WB_DDONE BIT(6)
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#define MTK_DMA_SIZE_16DWORDS (2 << 4)
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+#define MTK_DMA_SIZE_32DWORDS (3 << 4)
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#define MTK_RX_DMA_BUSY BIT(3)
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#define MTK_TX_DMA_BUSY BIT(1)
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#define MTK_RX_DMA_EN BIT(2)
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@@ -228,8 +229,8 @@
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#define MTK_TX_DONE_INT1 BIT(1)
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#define MTK_TX_DONE_INT0 BIT(0)
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#define MTK_RX_DONE_INT MTK_RX_DONE_DLY
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-#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
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- MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
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+#define MTK_TX_DONE_DLY BIT(28)
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+#define MTK_TX_DONE_INT MTK_TX_DONE_DLY
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/* QDMA Interrupt grouping registers */
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#define MTK_QDMA_INT_GRP1 0x1a20
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