mediatek/ramips: unify ethernet driver fixes and add performance optimizations

Increase DMA burst size and tx ring size and optimize tx processing

Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Felix Fietkau
2020-08-27 06:39:48 +02:00
parent 6541028598
commit b5d425af23
16 changed files with 574 additions and 113 deletions

View File

@@ -1,21 +0,0 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1315,7 +1315,7 @@ static int mtk_poll_rx(struct napi_struc
skb->protocol = eth_type_trans(skb, netdev);
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
- RX_DMA_VID(trxd.rxd3))
+ (trxd.rxd2 & RX_DMA_VTAG))
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
RX_DMA_VID(trxd.rxd3));
skb_record_rx_queue(skb, 0);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -293,6 +293,7 @@
#define RX_DMA_LSO BIT(30)
#define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16)
#define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff)
+#define RX_DMA_VTAG BIT(15)
/* QDMA descriptor rxd3 */
#define RX_DMA_VID(_x) ((_x) & 0xfff)

View File

@@ -1,38 +0,0 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1121,17 +1121,6 @@ static void mtk_wake_queue(struct mtk_et
}
}
-static void mtk_stop_queue(struct mtk_eth *eth)
-{
- int i;
-
- for (i = 0; i < MTK_MAC_COUNT; i++) {
- if (!eth->netdev[i])
- continue;
- netif_stop_queue(eth->netdev[i]);
- }
-}
-
static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -1152,7 +1141,7 @@ static int mtk_start_xmit(struct sk_buff
tx_num = mtk_cal_txd_req(skb);
if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
- mtk_stop_queue(eth);
+ netif_stop_queue(dev);
netif_err(eth, tx_queued, dev,
"Tx Ring full when queue awake!\n");
spin_unlock(&eth->page_lock);
@@ -1178,7 +1167,7 @@ static int mtk_start_xmit(struct sk_buff
goto drop;
if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
- mtk_stop_queue(eth);
+ netif_stop_queue(dev);
spin_unlock(&eth->page_lock);

View File

@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/mediatek/Kconfig
+++ b/drivers/net/ethernet/mediatek/Kconfig
@@ -14,4 +14,8 @@ config NET_MEDIATEK_SOC
@@ -15,4 +15,8 @@ config NET_MEDIATEK_SOC
This driver supports the gigabit ethernet MACs in the
MediaTek SoC family.
@@ -147,7 +147,7 @@
#include "mtk_eth_soc.h"
@@ -1307,8 +1309,16 @@ static int mtk_poll_rx(struct napi_struc
@@ -1319,8 +1321,16 @@ static int mtk_poll_rx(struct napi_struc
(trxd.rxd2 & RX_DMA_VTAG))
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
RX_DMA_VID(trxd.rxd3));
@@ -164,9 +164,9 @@
+ }
+#endif
skip_rx:
ring->data[idx] = new_data;
rxd->rxd1 = (unsigned int)dma_addr;
@@ -2225,6 +2235,9 @@ static int mtk_open(struct net_device *d
@@ -2250,6 +2260,9 @@ static int mtk_open(struct net_device *d
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
refcount_set(&eth->dma_refcnt, 1);
@@ -176,7 +176,7 @@
}
else
refcount_inc(&eth->dma_refcnt);
@@ -2283,6 +2296,9 @@ static int mtk_stop(struct net_device *d
@@ -2311,6 +2324,9 @@ static int mtk_stop(struct net_device *d
mtk_dma_free(eth);
@@ -186,7 +186,7 @@
return 0;
}
@@ -2742,6 +2758,27 @@ static int mtk_set_rxnfc(struct net_devi
@@ -2824,6 +2840,27 @@ static int mtk_set_rxnfc(struct net_devi
return ret;
}
@@ -214,7 +214,7 @@
static const struct ethtool_ops mtk_ethtool_ops = {
.get_link_ksettings = mtk_get_link_ksettings,
.set_link_ksettings = mtk_set_link_ksettings,
@@ -2773,6 +2810,9 @@ static const struct net_device_ops mtk_n
@@ -2855,6 +2892,9 @@ static const struct net_device_ops mtk_n
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = mtk_poll_controller,
#endif
@@ -224,7 +224,7 @@
};
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
@@ -3108,6 +3148,7 @@ static const struct mtk_soc_data mt7622_
@@ -3197,6 +3237,7 @@ static const struct mtk_soc_data mt7622_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
@@ -234,7 +234,7 @@
static const struct mtk_soc_data mt7623_data = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -779,6 +779,13 @@ enum mkt_eth_capabilities {
@@ -787,6 +787,13 @@ enum mkt_eth_capabilities {
MTK_MUX_U3_GMAC2_TO_QPHY | \
MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
@@ -248,7 +248,7 @@
/* struct mtk_eth_data - This is the structure holding all differences
* among various plaforms
* @ana_rgc3: The offset for register ANA_RGC3 related to
@@ -796,6 +803,7 @@ struct mtk_soc_data {
@@ -804,6 +811,7 @@ struct mtk_soc_data {
u32 required_clks;
bool required_pctl;
netdev_features_t hw_features;
@@ -256,7 +256,7 @@
};
/* currently no SoC has more than 2 macs */
@@ -821,6 +829,23 @@ struct mtk_sgmii {
@@ -829,6 +837,23 @@ struct mtk_sgmii {
u32 ana_rgc3;
};
@@ -280,7 +280,7 @@
/* struct mtk_eth - This is the main datasructure for holding the state
* of the driver
* @dev: The device pointer
@@ -894,6 +919,16 @@ struct mtk_eth {
@@ -914,6 +939,16 @@ struct mtk_eth {
u32 tx_int_status_reg;
u32 rx_dma_l4_valid;
int ip_align;
@@ -297,7 +297,7 @@
};
/* struct mtk_mac - the structure that holds the info about the MACs of the
@@ -926,6 +961,7 @@ void mtk_stats_update_mac(struct mtk_mac
@@ -946,6 +981,7 @@ void mtk_stats_update_mac(struct mtk_mac
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg);
u32 mtk_r32(struct mtk_eth *eth, unsigned reg);
@@ -305,7 +305,7 @@
int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *np,
u32 ana_rgc3);
@@ -938,4 +974,13 @@ int mtk_gmac_sgmii_path_setup(struct mtk
@@ -958,4 +994,13 @@ int mtk_gmac_sgmii_path_setup(struct mtk
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);

View File

@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2210,6 +2210,31 @@ static int mtk_start_dma(struct mtk_eth
@@ -2235,6 +2235,31 @@ static int mtk_start_dma(struct mtk_eth
return 0;
}
@@ -32,7 +32,7 @@
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -2230,6 +2255,8 @@ static int mtk_open(struct net_device *d
@@ -2255,6 +2280,8 @@ static int mtk_open(struct net_device *d
if (err)
return err;
@@ -41,7 +41,7 @@
napi_enable(&eth->tx_napi);
napi_enable(&eth->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
@@ -2285,6 +2312,8 @@ static int mtk_stop(struct net_device *d
@@ -2310,6 +2337,8 @@ static int mtk_stop(struct net_device *d
if (!refcount_dec_and_test(&eth->dma_refcnt))
return 0;
@@ -50,8 +50,8 @@
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
napi_disable(&eth->tx_napi);
@@ -2411,8 +2440,6 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
@@ -2493,8 +2522,6 @@ static int mtk_hw_init(struct mtk_eth *e
/* disable delay and normal interrupt */
mtk_tx_irq_disable(eth, ~0);
mtk_rx_irq_disable(eth, ~0);
- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
@@ -59,7 +59,7 @@
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
@@ -2421,19 +2448,6 @@ static int mtk_hw_init(struct mtk_eth *e
@@ -2503,19 +2530,6 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
@@ -81,7 +81,7 @@
err_disable_pm:
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -84,6 +84,8 @@
@@ -85,6 +85,8 @@
#define MTK_GDMA_ICS_EN BIT(22)
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)

View File

@@ -1,24 +0,0 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1364,10 +1364,11 @@ static int mtk_poll_tx_qdma(struct mtk_e
u32 next_cpu = desc->txd2;
int mac = 0;
- desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
break;
+ desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
+
tx_buf = mtk_desc_to_tx_buf(ring, desc);
if (tx_buf->flags & MTK_TX_FLAGS_FPORT1)
mac = 1;
@@ -2191,7 +2192,7 @@ static int mtk_start_dma(struct mtk_eth
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
mtk_w32(eth,
- MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
+ MTK_TX_DMA_EN |
MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
MTK_RX_BT_32DWORDS,

View File

@@ -1,60 +0,0 @@
diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:28.403764254 +0800
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:39.803438475 +0800
@@ -2193,7 +2193,7 @@
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
mtk_w32(eth,
MTK_TX_DMA_EN |
- MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
+ MTK_DMA_SIZE_32DWORDS | MTK_NDP_CO_PRO |
MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
MTK_RX_BT_32DWORDS,
MTK_QDMA_GLO_CFG);
@@ -2434,11 +2434,10 @@
/* Enable RX VLan Offloading */
mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
- /* enable interrupt delay for RX */
- mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
+ /* enable interrupt delay for RX/TX */
+ mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT);
+ mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT);
- /* disable delay and normal interrupt */
- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
mtk_tx_irq_disable(eth, ~0);
mtk_rx_irq_disable(eth, ~0);
diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:22.939920398 +0800
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:43.359336855 +0800
@@ -19,8 +19,8 @@
#define MTK_QDMA_PAGE_SIZE 2048
#define MTK_MAX_RX_LENGTH 1536
#define MTK_TX_DMA_BUF_LEN 0x3fff
-#define MTK_DMA_SIZE 256
-#define MTK_NAPI_WEIGHT 64
+#define MTK_DMA_SIZE 2048
+#define MTK_NAPI_WEIGHT 256
#define MTK_MAC_COUNT 2
#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
@@ -198,6 +198,7 @@
#define MTK_NDP_CO_PRO BIT(10)
#define MTK_TX_WB_DDONE BIT(6)
#define MTK_DMA_SIZE_16DWORDS (2 << 4)
+#define MTK_DMA_SIZE_32DWORDS (3 << 4)
#define MTK_RX_DMA_BUSY BIT(3)
#define MTK_TX_DMA_BUSY BIT(1)
#define MTK_RX_DMA_EN BIT(2)
@@ -228,8 +229,8 @@
#define MTK_TX_DONE_INT1 BIT(1)
#define MTK_TX_DONE_INT0 BIT(0)
#define MTK_RX_DONE_INT MTK_RX_DONE_DLY
-#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
- MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
+#define MTK_TX_DONE_DLY BIT(28)
+#define MTK_TX_DONE_INT MTK_TX_DONE_DLY
/* QDMA Interrupt grouping registers */
#define MTK_QDMA_INT_GRP1 0x1a20