domenico/openwrt-R7800-nss
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

move voice packages

Browse Source 
SVN-Revision: 34695
This commit is contained in:
John Crispin
2012-12-15 02:00:45 +00:00
parent 06c9170a7c
commit baae9d16e9
11 changed files with 22 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

88
package/system/ltq-tapi/Config.in
View File

@@ -1,88 +0,0 @@
config VOICE_CPE_TAPI_FAX
bool "fax relay and modem support"
depends on PACKAGE_kmod-ltq-tapi
default n
help
Option to enable fax/modem support in TAPI.
Note: Newer platforms as AR9 and VR9 support a T.38 fax relay stack
in FW while older platforms like Danube or VINETIC-CPE require a
separate SW stack executed as an application.
config VOICE_CPE_TAPI_CID
bool "CID support"
depends on PACKAGE_kmod-ltq-tapi
default y
help
Option to enable Caller ID support.
config VOICE_CPE_TAPI_LT_GR909
bool "Linetesting GR-909 support"
depends on PACKAGE_kmod-ltq-tapi
default y
help
Option to enable linetesting GR-909.
config VOICE_CPE_TAPI_DECT
bool "DECT encoding for COSIC modem"
depends on PACKAGE_kmod-ltq-tapi
default n
help
Option to enable DECT encoding for COSIC modem.
config VOICE_CPE_TAPI_KPI
bool "KPI (Kernel Packet Interface)"
depends on PACKAGE_kmod-ltq-tapi
default y
help
Option to enable the generic kernel level packet interface
which allows accelerated packet transfer for various purposes.
The most important example is the QOS option, which allows
to redirect RTP packets directly into the IP stack.
Other options relying on KPI are DECT and HDLC.
config VOICE_CPE_TAPI_QOS
bool "QOS for accelerated RTP packet handling"
depends on PACKAGE_kmod-ltq-tapi
default y
help
Option to enable an accelerated RTP packet transfer inside
the LINUX kernel space. This option requires the KPI2UDP
packet, which actually provides the OS specific hooks in
the IP stack.
config VOICE_CPE_TAPI_STATISTICS
bool "TAPI statistics via /proc fs"
depends on PACKAGE_kmod-ltq-tapi
default y
help
Option to enable /proc fs statistics for packet counts etc.
config VOICE_CPE_TAPI_METERING
bool "Metering (TTX) support"
depends on PACKAGE_kmod-ltq-tapi
default n
help
Option to enable metering (TTX) support.
config VOICE_CPE_TAPI_HDLC
bool "PCM HDLC support, evaluation"
depends on PACKAGE_kmod-ltq-tapi
default n
help
Option to enable PCM HDLC framing inside the firmware, e.g. for
ISDN D-Channel access.
config VOICE_CPE_TAPI_TRACES
bool "enable driver traces"
depends on PACKAGE_kmod-ltq-tapi
default y
help
enable driver traces with different trace levels to be
configured dynamically from the application or during insmod
config VOICE_CPE_TAPI_LINUX_HOTPLUG
bool "enable driver Linux hotplug events"
depends on PACKAGE_kmod-ltq-tapi
default y
help
enable driver Linux hotplug events generation

70
package/system/ltq-tapi/Makefile
View File

@@ -1,70 +0,0 @@
#
# Copyright (C) 2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=drv_tapi
PKG_VERSION:=3.13.0
PKG_RELEASE:=3
PKG_SOURCE:=drv_tapi-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
PKG_MD5SUM:=edb43b494832c540cc035493d18db58f
PKG_MAINTAINER:=John Crispin <blogic@openwrt.org>
include $(INCLUDE_DIR)/ltqtapi.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/ltq-tapi
SUBMENU:=Voice over IP
TITLE:=Lantiq TAPI subsystem
URL:=http://www.lantiq.com/
DEPENDS:=$(LTQ_TAPI_TARGET) +kmod-ltq-ifxos
FILES:=$(PKG_BUILD_DIR)/src/drv_tapi.ko
AUTOLOAD:=$(call AutoLoad,20,drv_tapi)
endef
define KernelPackage/ltq-tapi/description
Voice Subsystem Telephony API High Level Driver
endef
define KernelPackage/ltq-tapi/config
source "$(SOURCE)/Config.in"
endef
CONFIGURE_ARGS += \
ARCH=$(LINUX_KARCH) \
--enable-linux-26 \
--enable-kernelbuild="$(LINUX_DIR)" \
--enable-kernelincl="$(LINUX_DIR)/include" \
--with-ifxos-incl=$(STAGING_DIR)/usr/include/ifxos \
$(call autoconf_bool,CONFIG_IFX_DRV_TAPI_EVENT_LOGGER,el-debug) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_FAX,fax t38) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_CID,cid) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_DECT,dect) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_KPI,kpi) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_QOS,qos) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_LT_GR909,lt) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_STATISTICS,statistics) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_METERING,metering) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_HDLC,hdlc) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_TRACES,trace) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_LINUX_HOTPLUG,hotplug)
define Build/Configure
(cd $(PKG_BUILD_DIR); aclocal && autoconf && automake)
$(call Build/Configure/Default)
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include/drv_tapi
$(CP) --dereference $(PKG_BUILD_DIR)/include/* $(1)/usr/include/drv_tapi
(cd $(1)/usr/include/drv_tapi && ln -s . include && ln -s ../ifxos/ifx_types.h .)
endef
$(eval $(call KernelPackage,ltq-tapi))

82
package/system/ltq-tapi/patches/000-portability.patch
View File

@@ -1,82 +0,0 @@
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -154,7 +154,7 @@ if KERNEL_2_6
drv_tapi_OBJS = "$(subst .c,.o, $(drv_tapi_SOURCES))"
drv_tapi.ko: $(drv_tapi_SOURCES) $(EXTRA_DIST)
- @echo -e "Making Linux 2.6.x kernel object"
+ @echo "Making Linux 2.6.x kernel object"
@for f in $(drv_tapi_SOURCES) ; do \
if test ! -e $(PWD)/$$f; then \
echo " LN $$f" ; \
@@ -162,10 +162,10 @@ drv_tapi.ko: $(drv_tapi_SOURCES) $(EXTRA
ln -s @abs_srcdir@/$$f $(PWD)/$$f; \
fi; \
done;
- @echo -e "# drv_tapi: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild
- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild
- @echo -e "$(subst .ko,,$@)-y := $(drv_tapi_OBJS)" >> $(PWD)/Kbuild
- @echo -e "EXTRA_CFLAGS := -DHAVE_CONFIG_H $(CFLAGS) $(drv_tapi_CFLAGS) $(INCLUDES)" >> $(PWD)/Kbuild
+ @echo "# drv_tapi: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild
+ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild
+ @echo "$(subst .ko,,$@)-y := $(drv_tapi_OBJS)" >> $(PWD)/Kbuild
+ @echo "EXTRA_CFLAGS := -DHAVE_CONFIG_H $(CFLAGS) $(drv_tapi_CFLAGS) $(INCLUDES)" >> $(PWD)/Kbuild
$(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules
clean-generic:
--- a/configure.in
+++ b/configure.in
@@ -128,7 +128,7 @@ dnl Set kernel build path
AC_ARG_ENABLE(kernelbuild,
AS_HELP_STRING(--enable-kernelbuild=x,Set the target kernel build path),
[
- if test -r $enableval/include/linux/autoconf.h; then
+ if test -e $enableval/include/linux/autoconf.h -o -e $enableval/include/generated/autoconf.h; then
AC_SUBST([KERNEL_BUILD_PATH],[$enableval])
else
AC_MSG_ERROR([The kernel build directory is not valid or not configured!])
--- a/src/drv_tapi_linux.h
+++ b/src/drv_tapi_linux.h
@@ -24,6 +24,7 @@
#include <linux/version.h>
#include <linux/interrupt.h> /* in_interrupt() */
#include <linux/delay.h> /* mdelay - udelay */
+#include <linux/workqueue.h> /* work_struct */
#include <asm/poll.h> /* POLLIN, POLLOUT */
#include "ifx_types.h" /* ifx type definitions */
--- a/src/drv_tapi_linux.c
+++ b/src/drv_tapi_linux.c
@@ -47,6 +47,7 @@
#include <linux/errno.h>
#include <asm/uaccess.h> /* copy_from_user(), ... */
#include <asm/byteorder.h>
+#include <linux/smp_lock.h> /* lock_kernel() */
#include <asm/io.h>
#ifdef LINUX_2_6
@@ -55,7 +56,11 @@
#include <linux/sched.h>
#undef CONFIG_DEVFS_FS
#ifndef UTS_RELEASE
- #include "linux/utsrelease.h"
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
+# include <linux/utsrelease.h>
+#else
+# include <generated/utsrelease.h>
+#endif
#endif /* UTC_RELEASE */
#else
#include <linux/tqueue.h>
@@ -3718,7 +3723,11 @@ IFX_void_t TAPI_OS_ThreadKill(IFXOS_Thre
flag and released after the down() call. */
lock_kernel();
mb();
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
kill_proc(pThrCntrl->tid, SIGKILL, 1);
+#else
+ kill_pid(find_vpid(pThrCntrl->tid), SIGKILL, 1);
+#endif
/* release the big kernel lock */
unlock_kernel();
wait_for_completion (&pThrCntrl->thrCompletion);

96
package/system/ltq-tapi/patches/100-ifxmips.patch
View File

@@ -1,96 +0,0 @@
--- a/src/drv_tapi_linux.c
+++ b/src/drv_tapi_linux.c
@@ -552,7 +552,7 @@ static ssize_t ifx_tapi_write (struct fi
IFX_uint8_t *pData;
IFX_size_t buf_size;
#endif /* TAPI_PACKET */
- IFX_ssize_t size = 0;
+ ssize_t size = 0;
#ifdef TAPI_PACKET
if (pTapiDev->bInitialized == IFX_FALSE)
--- a/src/drv_tapi_osmap.h
+++ b/src/drv_tapi_osmap.h
@@ -17,39 +17,6 @@
*/
#include "ifx_types.h" /* ifx type definitions */
-
-#ifndef HAVE_IFX_ULONG_T
- #warning please update your ifx_types.h, using local definition of IFX_ulong_t
- /* unsigned long type - valid for 32bit systems only */
- typedef unsigned long IFX_ulong_t;
- #define HAVE_IFX_ULONG_T
-#endif /* HAVE_IFX_ULONG_T */
-
-#ifndef HAVE_IFX_LONG_T
- #warning please update your ifx_types.h, using local definition of IFX_long_t
- /* long type - valid for 32bit systems only */
- typedef long IFX_long_t;
- #define HAVE_IFX_LONG_T
-#endif /* HAVE_IFX_LONG_T */
-
-#ifndef HAVE_IFX_INTPTR_T
- #warning please update your ifx_types.h, using local definition of IFX_intptr_t
- typedef IFX_long_t IFX_intptr_t;
- #define HAVE_IFX_INTPTR_T
-#endif /* HAVE_IFX_INTPTR_T */
-
-#ifndef HAVE_IFX_SIZE_T
- #warning please update your ifx_types.h, using local definition of IFX_size_t
- typedef IFX_ulong_t IFX_size_t;
- #define HAVE_IFX_SIZE_T
-#endif /* HAVE_IFX_SIZE_T */
-
-#ifndef HAVE_IFX_SSIZE_T
- #warning please update your ifx_types.h, using local definition of IFX_ssize_t
- typedef IFX_long_t IFX_ssize_t;
- #define HAVE_IFX_SSIZE_T
-#endif /* HAVE_IFX_SSIZE_T */
-
#include "ifxos_interrupt.h"
#include "ifxos_memory_alloc.h"
#include "ifxos_copy_user_space.h"
--- a/include/drv_tapi_ll_interface.h
+++ b/include/drv_tapi_ll_interface.h
@@ -40,13 +40,6 @@
#include "ifxos_select.h"
#endif /* TAPI_PACKET */
-#ifndef HAVE_IFX_ULONG_T
- #warning please update your ifx_types.h, using local definition of IFX_ulong_t
- /* unsigned long type - valid for 32bit systems only */
- typedef unsigned long IFX_ulong_t;
- #define HAVE_IFX_ULONG_T
-#endif /* HAVE_IFX_ULONG_T */
-
/* ============================= */
/* Local Macros Definitions */
/* ============================= */
--- a/src/lib/lib_bufferpool/lib_bufferpool.c
+++ b/src/lib/lib_bufferpool/lib_bufferpool.c
@@ -85,24 +85,6 @@
#include <stdlib.h>
#endif /*VXWORKS*/
-
-/* ============================= */
-/* Extra type definitions */
-/* ============================= */
-#ifndef HAVE_IFX_ULONG_T
- #warning please update your ifx_types.h, using local definition of IFX_ulong_t
- /* unsigned long type - valid for 32bit systems only */
- typedef unsigned long IFX_ulong_t;
- #define HAVE_IFX_ULONG_T
-#endif /* HAVE_IFX_ULONG_T */
-
-#ifndef HAVE_IFX_UINTPTR_T
- #warning please update your ifx_types.h, using local definition of IFX_uintptr_t
- typedef IFX_ulong_t IFX_uintptr_t;
- #define HAVE_IFX_UINTPTR_T
-#endif /* HAVE_IFX_UINTPTR_T */
-
-
/* ============================= */
/* Local Macros & Definitions */
/* ============================= */

108
package/system/ltq-tapi/patches/200-linux-37.patch
View File

@@ -1,108 +0,0 @@
--- a/src/drv_tapi_linux.c
+++ b/src/drv_tapi_linux.c
@@ -47,7 +47,9 @@
#include <linux/errno.h>
#include <asm/uaccess.h> /* copy_from_user(), ... */
#include <asm/byteorder.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/smp_lock.h> /* lock_kernel() */
+#endif
#include <asm/io.h>
#ifdef LINUX_2_6
@@ -65,7 +67,9 @@
#else
#include <linux/tqueue.h>
#include <linux/sched.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/smp_lock.h> /* lock_kernel() */
+#endif
#endif /* LINUX_2_6 */
#include "drv_tapi.h"
@@ -133,8 +137,13 @@
size_t count, loff_t * ppos);
static ssize_t ifx_tapi_read(struct file * filp, char *buf,
size_t length, loff_t * ppos);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
static int ifx_tapi_ioctl(struct inode *inode, struct file *filp,
unsigned int nCmd, unsigned long nArgument);
+#else
+static long ifx_tapi_ioctl(struct file *filp,
+ unsigned int nCmd, unsigned long nArgument);
+#endif
static unsigned int ifx_tapi_poll (struct file *filp, poll_table *table);
#ifdef CONFIG_PROC_FS
@@ -218,7 +227,11 @@
IFX_char_t *pRegDrvName = IFX_NULL;
IFX_int32_t ret = 0;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
if (tapi_fops.ioctl == IFX_NULL)
+#else
+ if (tapi_fops.unlocked_ioctl == IFX_NULL)
+#endif
{
#ifdef MODULE
tapi_fops.owner = THIS_MODULE;
@@ -226,7 +239,11 @@
tapi_fops.read = ifx_tapi_read;
tapi_fops.write = ifx_tapi_write;
tapi_fops.poll = ifx_tapi_poll;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
tapi_fops.ioctl = ifx_tapi_ioctl;
+#else
+ tapi_fops.unlocked_ioctl = ifx_tapi_ioctl;
+#endif
tapi_fops.open = ifx_tapi_open;
tapi_fops.release = ifx_tapi_release;
}
@@ -881,8 +898,13 @@
- 0 and positive values - success
- negative value - ioctl failed
*/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
static int ifx_tapi_ioctl(struct inode *inode, struct file *filp,
unsigned int nCmd, unsigned long nArg)
+#else
+static long ifx_tapi_ioctl(struct file *filp,
+ unsigned int nCmd, unsigned long nArg)
+#endif
{
TAPI_FD_PRIV_DATA_t *pTapiPriv;
IFX_TAPI_ioctlCtx_t ctx;
@@ -3721,7 +3743,9 @@
kernel lock (lock_kernel()). The lock must be
grabbed before changing the terminate
flag and released after the down() call. */
- lock_kernel();
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+ lock_kernel();
+#endif
mb();
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
kill_proc(pThrCntrl->tid, SIGKILL, 1);
@@ -3729,8 +3753,10 @@
kill_pid(find_vpid(pThrCntrl->tid), SIGKILL, 1);
#endif
/* release the big kernel lock */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
unlock_kernel();
- wait_for_completion (&pThrCntrl->thrCompletion);
+#endif
+ wait_for_completion (&pThrCntrl->thrCompletion);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
/* Now we are sure the thread is in zombie state.
--- a/src/lib/lib_fifo/lib_fifo.c
+++ b/src/lib/lib_fifo/lib_fifo.c
@@ -41,7 +41,7 @@
#ifdef LINUX
/* if linux/slab.h is not available, use the precessor linux/malloc.h */
#include <linux/slab.h>
-#elif VXWORKS
+#elif defined(VXWORKS)
#include <sys_drv_debug.h>
#endif /* LINUX */

95
package/system/ltq-vmmc/Config.in
View File

@@ -1,95 +0,0 @@
choice
prompt "device selection"
depends on PACKAGE_kmod-ltq-vmmc
default VOICE_CPE_VMMC_WITH_DEVICE_DANUBE
help
Select the target device.
config VOICE_CPE_VMMC_WITH_DEVICE_DANUBE
bool "Danube, Twinpass, Vinax"
depends on TARGET_lantiq_danube
config VOICE_CPE_VMMC_WITH_DEVICE_AR9
bool "AR9 family"
depends on TARGET_lantiq_ar9
config VOICE_CPE_VMMC_WITH_DEVICE_VR9
bool "VR9 family"
depends on TARGET_lantiq_vr9
config VOICE_VMMC_WITH_DEVICE_FALCON
bool "FALC-ON"
depends on (TARGET_lantiq_falcon||TARGET_lantiq_falcon_stable)
endchoice
choice
depends on PACKAGE_kmod-ltq-vmmc
prompt "FXS coefficients"
default LTQ_VOICE_CPE_VMMC_COEF_FALCON_ETSI
help
Select country specific FXS coefficient file.
config LTQ_VOICE_CPE_VMMC_COEF_FALCON_ETSI
bool "ETSI_T3R10: Vl:40V, Ic:25mA, Vid:25V, Vri:45Vrms, f:25Hz"
help
These coefficents contains a parameter set with line impedance Zr according to ETSI.
T: gain in transmit direction (attenuation 3dBr) [dBr]
R: gain in receive direction (attenuation 10dBr) [dBr]
Vl: on-hook voltage limit [V]
Ic: off-hook loop current [mA]
Vid: low-power-standby voltage [V]
Vri: ring voltage [v]
f: ring frequency [V]
config LTQ_VOICE_CPE_VMMC_COEF_FALCON_US600R
bool "USA_600R_T3R10: Vl:40V, Ic:25mA, Vid:25V, Vri:45V, f:20Hz"
help
These coefficents contains a parameter set with line impedance e.g. for USA.
T: gain in transmit direction (attenuation 3dBr) [dBr]
R: gain in receive direction (attenuation 10dBr) [dBr]
Vl: on-hook voltage limit [V]
Ic: off-hook loop current [mA]
Vid: low-power-standby voltage [V]
Vri: ring voltage [v]
f: ring frequency [V]
config LTQ_VOICE_CPE_VMMC_COEF_FALCON_USE_CUSTOM_FILE
bool "Select own FXS coefficient file"
endchoice
config VOICE_CPE_VMMC_PMC
depends on (VOICE_CPE_VMMC_WITH_DEVICE_AR9 || VOICE_CPE_VMMC_WITH_DEVICE_VR9)
bool "Power Management Control support"
default n
help
Option to enable Power Management Control on AR9, VR9. Not supported for Danube.
config VOICE_CPE_VMMC_DISABLE_DECT_NIBBLE_SWAP
bool "Disable DECT nibble swap"
depends on PACKAGE_kmod-ltq-vmmc
default n
help
Option to disable DECT nibble swap for COSIC modem (for backward compatibility only).
config VOICE_CPE_VMMC_EVENT_LOGGER
depends on BROKEN
bool "Event logger support"
depends on PACKAGE_kmod-ltq-vmmc
default n
help
Option to enable details traces between drv_vmmc and the voice FW
- for debugging only
- requires package ifx-evtlog
config VOICE_CPE_VMMC_MPS_HISTORY_SIZE
int "MPS history buffer in words (0<=size<=512)"
depends on PACKAGE_kmod-ltq-vmmc
default "128"
help
MPS history buffer (default=128 words, maximum=512 words, 0=disable)
To opimize the memory footprint in RAM, you might want to set the
buffer size to 0.

166
package/system/ltq-vmmc/Makefile
View File

@@ -1,166 +0,0 @@
#
# Copyright (C) 2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=drv_vmmc
PKG_VERSION:=1.9.0
PKG_RELEASE:=2
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_MD5SUM:=d8eee8cba0edb28974cc1f8532e3bd18
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
PKG_MAINTAINER:=John Crispin <blogic@openwrt.org>
include $(INCLUDE_DIR)/ltqtapi.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/ltq-vmmc
SUBMENU:=Voice over IP
TITLE:=TAPI LL driver for Voice Macro
URL:=http://www.lantiq.com/
DEPENDS:=$(LTQ_TAPI_TARGET) +kmod-ltq-tapi
FILES:=$(PKG_BUILD_DIR)/src/drv_vmmc.ko
AUTOLOAD:=$(call AutoLoad,25,drv_vmmc)
endef
define KernelPackage/ltq-vmmc/description
Voice Subsystem Low Level Driver for Danube, AR9, VR9 device families
endef
define KernelPackage/ltq-vmmc/config
source "$(SOURCE)/Config.in"
endef
CONFIGURE_ARGS += \
ARCH=$(LINUX_KARCH) \
--enable-linux-26 \
--enable-kernelbuild="$(LINUX_DIR)" \
--enable-kernelincl="$(LINUX_DIR)/include" \
--enable-tapiincl="$(STAGING_DIR)/usr/include/drv_tapi" \
--with-ifxos-incl=$(STAGING_DIR)/usr/include/ifxos \
$(call autoconf_bool,CONFIG_VOICE_CPE_VMMC_EVENT_LOGGER,el-debug) \
$(call autoconf_bool,CONFIG_VOICE_CPE_VMMC_PMC,pmc) \
$(call autoconf_bool,CONFIG_VOICE_CPE_VMMC_DISABLE_DECT_NIBBLE_SWAP,dect-nibble-swap) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_FAX,fax t38) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_CID,cid) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_DECT,dect) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_KPI,kpi) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_LT_GR909,lt calibration) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_HDLC,hdlc) \
$(call autoconf_bool,CONFIG_VOICE_CPE_TAPI_TRACES,trace)
ifneq ($(CONFIG_VOICE_CPE_VMMC_MPS_HISTORY_SIZE),128)
CONFIGURE_ARGS += --enable-history-buf=$(CONFIG_VOICE_CPE_VMMC_MPS_HISTORY_SIZE)
endif
#defaults
FW_URL:=http://localhost/
FW_TARGET:=ifx_firmware.bin
FW_FILE:=fw_voip_ifx.tar.gz
COEF_TARGET:=ifx_bbd_fxs.bin
COEF_FILE:=coef_voip_ifx.tar.gz
FW_DIR:=lib/firmware
FW_TARGET_GENERIC:=$(FW_TARGET)
COEF_TARGET_GENERIC:=$(COEF_TARGET)
ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_DANUBE)$(CONFIG_LTQ_VOICE_CPE_VMMC_WITH_DEVICE_DANUBE),y)
CONFIGURE_ARGS += --with-device=DANUBE
FW_SOURCE:=voip_R12.1.0.1.0-enc.bin
FW_TARGET:=danube_firmware.bin
FW_FILE=fw_voip_danube-12.1.0.1.0.tar.gz
FW_MD5SUM:=51868b88dee9dbc65d3dbba355ded91c
FW_DOWNLOAD:=1
COEF_SRC:=danube_bbd_fxs.bin
COEF_TARGET:=danube_bbd_fxs.bin
COEF_FILE:=coef_voip_danube-0.9.0.tar.gz
COEF_MD5SUM:=c8ac6592b304b03829a8123560e15710
COEF_DOWNLOAD:=1
endif
ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_AR9),y)
CONFIGURE_ARGS += --with-device=AR9
# TODO: add fw/coef
endif
COEF_SRC:=$(COEF_TARGET)
ifeq ($(CONFIG_VOICE_VMMC_WITH_DEVICE_FALCON),y)
CONFIGURE_ARGS += --with-device=FALCON
FW_SOURCE:=voip_R1.1.0.6.0-enc.bin
FW_MD5SUM:=cd4366a52a8010b76793e3810a4f14b3
FW_TARGET:=falcon_voip_fw.bin
FW_FILE=fw_voip_falcon-1.1.0.6.0.tar.gz
FW_DOWNLOAD:=1
COEF_TARGET:=falcon_bbd.bin
# FXS part
ifeq ($(CONFIG_LTQ_VOICE_CPE_VMMC_COEF_FALCON_ETSI),y)
COEF_SRC:=ETSI_3_10.BIN
endif
ifeq ($(CONFIG_LTQ_VOICE_CPE_VMMC_COEF_FALCON_US600R),y)
COEF_SRC:=R600_3_10.BIN
endif
ifeq ($(CONFIG_LTQ_VOICE_CPE_VMMC_COEF_FALCON_USE_CUSTOM_FILE),y)
COEF_SRC:=$(CONFIG_LTQ_VOICE_CPE_VMMC_COEF_FALCON_CUSTOM_FILE)
endif
COEF_FILE:=coef_voip_falcon.tar.gz
COEF_MD5SUM:=56c5a838f2bb9bd87d0e8dce271f810b
COEF_DOWNLOAD:=1
endif
ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_VR9),y)
CONFIGURE_ARGS += --with-device=VR9
# TODO: add fw/coef
endif
define Download/firmware
FILE:=$(FW_FILE)
URL:=$(FW_URL)
MD5SUM:=$(FW_MD5SUM)
endef
$(eval $(if $(FW_DOWNLOAD),$(call Download,firmware)))
define Download/coef
FILE:=$(COEF_FILE)
URL:=$(FW_URL)
MD5SUM:=$(COEF_MD5SUM)
endef
$(eval $(if $(COEF_DOWNLOAD),$(call Download,coef)))
define Build/Configure
rm -rf \
$(PKG_BUILD_DIR)/coef \
$(PKG_BUILD_DIR)/firmware
mkdir -p \
$(PKG_BUILD_DIR)/coef \
$(PKG_BUILD_DIR)/firmware
$(TAR) -C $(PKG_BUILD_DIR)/firmware -xvzf $(DL_DIR)/$(FW_FILE)
$(TAR) -C $(PKG_BUILD_DIR)/coef -xvzf $(DL_DIR)/$(COEF_FILE)
(cd $(PKG_BUILD_DIR); aclocal && autoconf && automake)
$(call Build/Configure/Default)
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include
mkdir -p $(1)/usr/include/drv_vmmc
$(CP) -v --dereference $(PKG_BUILD_DIR)/include/* $(1)/usr/include/drv_vmmc
(cd $(1)/usr/include/drv_vmmc && ln -snf . include)
endef
define KernelPackage/ltq-vmmc/install
$(INSTALL_DIR) $(1)/etc/init.d $(1)/$(FW_DIR)
$(INSTALL_BIN) ./files/vmmc.init $(1)/etc/init.d/vmmc
$(CP) $(PKG_BUILD_DIR)/firmware/$(FW_SOURCE) $(1)/$(FW_DIR)/$(FW_TARGET)
ln -s /$(FW_DIR)/$(FW_TARGET) $(1)/$(FW_DIR)/$(FW_TARGET_GENERIC)
$(CP) $(PKG_BUILD_DIR)/coef/$(COEF_SRC) $(1)/$(FW_DIR)/$(COEF_TARGET)
ln -s /$(FW_DIR)/$(COEF_TARGET) $(1)/$(FW_DIR)/$(COEF_TARGET_GENERIC)
endef
$(eval $(call KernelPackage,ltq-vmmc))

19
package/system/ltq-vmmc/files/vmmc.init
View File

@@ -1,19 +0,0 @@
#!/bin/sh /etc/rc.common
#
# Activate Voice CPE TAPI subsystem LL driver for VMMC
START=31
start() {
[ ! -c /dev/vmmc10 ] && {
mknod /dev/vmmc10 c 122 10
mknod /dev/vmmc11 c 122 11
mknod /dev/vmmc12 c 122 12
mknod /dev/vmmc13 c 122 13
mknod /dev/vmmc14 c 122 14
mknod /dev/vmmc15 c 122 15
mknod /dev/vmmc16 c 122 16
mknod /dev/vmmc17 c 122 17
mknod /dev/vmmc18 c 122 18
}
}

287
package/system/ltq-vmmc/patches/000-portability.patch
View File

@@ -1,287 +0,0 @@
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -228,7 +228,7 @@ drv_vmmc_CFLAGS += -fno-common
drv_vmmc_OBJS = "$(subst .c,.o, $(drv_vmmc_SOURCES) $(nodist_drv_vmmc_SOURCES))"
drv_vmmc.ko: $(drv_vmmc_SOURCES) $(EXTRA_DIST)
- @echo -e "Making Linux 2.6.x kernel object"
+ @echo "Making Linux 2.6.x kernel object"
@for f in $(drv_vmmc_SOURCES) $(nodist_drv_vmmc_SOURCES) ; do \
if test ! -e $(PWD)/$$f; then \
echo " LN $$f" ; \
@@ -236,10 +236,10 @@ drv_vmmc.ko: $(drv_vmmc_SOURCES) $(EXTRA
ln -s @abs_srcdir@/$$f $(PWD)/$$f; \
fi; \
done;
- @echo -e "# drv_vmmc: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild
- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild
- @echo -e "$(subst .ko,,$@)-y := $(drv_vmmc_OBJS)" >> $(PWD)/Kbuild
- @echo -e "EXTRA_CFLAGS := -DHAVE_CONFIG_H $(CFLAGS) $(drv_vmmc_CFLAGS) $(INCLUDES)" >> $(PWD)/Kbuild
+ @echo "# drv_vmmc: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild
+ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild
+ @echo "$(subst .ko,,$@)-y := $(drv_vmmc_OBJS)" >> $(PWD)/Kbuild
+ @echo "EXTRA_CFLAGS := -DHAVE_CONFIG_H $(CFLAGS) $(drv_vmmc_CFLAGS) $(INCLUDES)" >> $(PWD)/Kbuild
$(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules
clean-generic:
--- a/src/drv_vmmc_linux.c
+++ b/src/drv_vmmc_linux.c
@@ -27,11 +27,18 @@
#include <linux/proc_fs.h>
#include <linux/wait.h>
#include <linux/vmalloc.h>
+#include <linux/sched.h>
#ifdef LINUX_2_6
#include <linux/version.h>
#ifndef UTS_RELEASE
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
+#include <linux/autoconf.h>
#include <linux/utsrelease.h>
+#else
+#include <generated/autoconf.h>
+#include <generated/utsrelease.h>
+#endif
#endif /* UTC_RELEASE */
#undef CONFIG_DEVFS_FS
#endif /* LINUX_2_6 */
--- a/src/mps/drv_mps_vmmc_linux.c
+++ b/src/mps/drv_mps_vmmc_linux.c
@@ -19,11 +19,22 @@
#include "drv_config.h"
#include "drv_mps_version.h"
+#include <linux/version.h>
#ifdef CONFIG_DEBUG_MINI_BOOT
#define IKOS_MINI_BOOT
#endif /* */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/autoconf.h>
+#ifndef UTS_RELEASE
+#include <linux/utsrelease.h>
+#endif
+#else
+#include <generated/autoconf.h>
+#ifndef UTS_RELEASE
+#include <generated/utsrelease.h>
+#endif
+#endif
#include <linux/module.h>
#include <linux/init.h>
#include <linux/poll.h>
@@ -34,7 +45,13 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
#ifdef LINUX_2_6
+#ifndef UTS_RELEASE
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)
#include <linux/utsrelease.h>
+#else
+#include <generated/utsrelease.h>
+#endif
+#endif /* UTC_RELEASE */
#else /* */
#include <linux/uts.h>
#include <linux/moduleparam.h>
@@ -94,8 +111,13 @@ IFX_int32_t ifx_mps_get_status_proc (IFX
#ifndef __KERNEL__
IFX_int32_t ifx_mps_open (struct inode *inode, struct file *file_p);
IFX_int32_t ifx_mps_close (struct inode *inode, struct file *file_p);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
IFX_int32_t ifx_mps_ioctl (struct inode *inode, struct file *file_p,
IFX_uint32_t nCmd, IFX_ulong_t arg);
+#else
+long ifx_mps_ioctl (struct file *file_p,
+ IFX_uint32_t nCmd, IFX_ulong_t arg);
+#endif
IFX_int32_t ifx_mps_read_mailbox (mps_devices type, mps_message * rw);
IFX_int32_t ifx_mps_write_mailbox (mps_devices type, mps_message * rw);
IFX_int32_t ifx_mps_register_data_callback (mps_devices type, IFX_uint32_t dir,
@@ -155,7 +177,11 @@ IFX_char_t voice_channel_int_name[NUM_VO
static struct file_operations ifx_mps_fops = {
owner:THIS_MODULE,
poll:ifx_mps_poll,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ioctl:ifx_mps_ioctl,
+#else
+ unlocked_ioctl:ifx_mps_ioctl,
+#endif
open:ifx_mps_open,
release:ifx_mps_close
};
@@ -598,8 +624,13 @@ static IFX_uint32_t ifx_mps_poll (struct
* \return -ENOIOCTLCMD Invalid command
* \ingroup API
*/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
IFX_int32_t ifx_mps_ioctl (struct inode * inode, struct file * file_p,
IFX_uint32_t nCmd, IFX_ulong_t arg)
+#else
+long ifx_mps_ioctl (struct file *file_p,
+ IFX_uint32_t nCmd, IFX_ulong_t arg)
+#endif
{
IFX_int32_t retvalue = -EINVAL;
mps_message rw_struct;
@@ -613,17 +644,30 @@ IFX_int32_t ifx_mps_ioctl (struct inode
'mps_devices' enum type, which in fact is [0..8]; So, if inode value is
[0..NUM_VOICE_CHANNEL+1], then we make sure that we are calling from
kernel space. */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
if (((IFX_int32_t) inode >= 0) &&
((IFX_int32_t) inode < NUM_VOICE_CHANNEL + 1))
+#else
+ if (((IFX_int32_t) file_p >= 0) &&
+ ((IFX_int32_t) file_p < NUM_VOICE_CHANNEL + 1))
+#endif
{
from_kernel = 1;
/* Get corresponding mailbox device structure */
if ((pMBDev =
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ifx_mps_get_device ((mps_devices) ((IFX_int32_t) inode))) == 0)
+#else
+ ifx_mps_get_device ((mps_devices) ((IFX_int32_t) file_p))) == 0)
+#endif
{
return (-EINVAL);
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
+#else
+ file_p = NULL;
+#endif
}
else
{
--- a/src/mps/drv_mps_vmmc_common.c
+++ b/src/mps/drv_mps_vmmc_common.c
@@ -21,7 +21,11 @@
#undef USE_PLAIN_VOICE_FIRMWARE
#undef PRINT_ON_ERR_INTERRUPT
#undef FAIL_ON_ERR_INTERRUPT
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/autoconf.h>
+#else
+#include <generated/autoconf.h>
+#endif
#include <linux/interrupt.h>
#include <linux/delay.h>
@@ -92,7 +96,9 @@ extern IFX_uint32_t danube_get_cpu_ver (
extern mps_mbx_dev *ifx_mps_get_device (mps_devices type);
#ifdef LINUX_2_6
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39))
extern IFX_void_t bsp_mask_and_ack_irq (IFX_uint32_t irq_nr);
+#endif
#else /* */
extern IFX_void_t mask_and_ack_danube_irq (IFX_uint32_t irq_nr);
--- a/src/mps/drv_mps_vmmc_danube.c
+++ b/src/mps/drv_mps_vmmc_danube.c
@@ -20,7 +20,11 @@
#ifdef SYSTEM_DANUBE /* defined in drv_mps_vmmc_config.h */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
#include <linux/autoconf.h>
+#else
+#include <generated/autoconf.h>
+#endif
/* lib_ifxos headers */
#include "ifx_types.h"
--- a/configure.in
+++ b/configure.in
@@ -112,7 +112,7 @@ dnl Set kernel build path
AC_ARG_ENABLE(kernelbuild,
AS_HELP_STRING(--enable-kernelbuild=x,Set the target kernel build path),
[
- if test -r $enableval/include/linux/autoconf.h; then
+ if test -e $enableval/include/linux/autoconf.h -o -e $enableval/include/generated/autoconf.h; then
AC_SUBST([KERNEL_BUILD_PATH],[$enableval])
else
AC_MSG_ERROR([The kernel build directory is not valid or not configured!])
--- a/src/drv_vmmc_bbd.c
+++ b/src/drv_vmmc_bbd.c
@@ -1072,7 +1072,11 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
IFX_uint8_t padBytes = 0;
#endif
IFX_uint16_t cram_offset, cram_crc,
- pCmd [MAX_CMD_WORD] = {0};
+ pCmd [MAX_CMD_WORD]
+#if defined (__GNUC__) || defined (__GNUG__)
+ __attribute__ ((aligned(4)))
+#endif
+ = {0};
/* read offset */
cpb2w (&cram_offset, &bbd_cram->pData[0], sizeof (IFX_uint16_t));
--- a/src/drv_vmmc_init.c
+++ b/src/drv_vmmc_init.c
@@ -776,8 +776,13 @@ IFX_int32_t VMMC_TAPI_LL_FW_Start(IFX_TA
dwld.fwDwld.length = IoInit.pram_size;
/* download firmware */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ret = ifx_mps_ioctl((IFX_void_t *) command, IFX_NULL, FIO_MPS_DOWNLOAD,
(IFX_uint32_t) &dwld.fwDwld);
+#else
+ ret = ifx_mps_ioctl((IFX_void_t *) command, FIO_MPS_DOWNLOAD,
+ (IFX_uint32_t) &dwld.fwDwld);
+#endif
}
if (VMMC_SUCCESS(ret))
--- a/src/drv_vmmc_ioctl.c
+++ b/src/drv_vmmc_ioctl.c
@@ -426,18 +426,31 @@ IFX_int32_t VMMC_Dev_Spec_Ioctl (IFX_TAP
/* MPS driver will do the USR2KERN so just pass on the pointer. */
dwnld_struct.data = (IFX_void_t *)IoInit.pPRAMfw;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ret = ifx_mps_ioctl((IFX_void_t *)command, IFX_NULL,
FIO_MPS_DOWNLOAD, (IFX_uint32_t) &dwnld_struct);
+#else
+ ret = ifx_mps_ioctl((IFX_void_t *)command,
+ FIO_MPS_DOWNLOAD, (IFX_uint32_t) &dwnld_struct);
+#endif
break;
}
case FIO_DEV_RESET:
{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ret = ifx_mps_ioctl((IFX_void_t *)command, IFX_NULL, FIO_MPS_RESET, 0);
+#else
+ ret = ifx_mps_ioctl((IFX_void_t *)command, FIO_MPS_RESET, 0);
+#endif
break;
}
case FIO_DEV_RESTART:
{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
ret = ifx_mps_ioctl((IFX_void_t *)command, IFX_NULL, FIO_MPS_RESTART, 0);
+#else
+ ret = ifx_mps_ioctl((IFX_void_t *)command, FIO_MPS_RESTART, 0);
+#endif
break;
}
case FIO_LASTERR:
--- a/src/mps/drv_mps_vmmc.h
+++ b/src/mps/drv_mps_vmmc.h
@@ -279,8 +279,13 @@ typedef struct
#include <linux/fs.h>
IFX_int32_t ifx_mps_open (struct inode *inode, struct file *file_p);
IFX_int32_t ifx_mps_close (struct inode *inode, struct file *filp);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)
IFX_int32_t ifx_mps_ioctl (struct inode *inode, struct file *file_p,
IFX_uint32_t nCmd, unsigned long arg);
+#else
+long ifx_mps_ioctl (struct file *filp,
+ IFX_uint32_t nCmd, unsigned long arg);
+#endif
IFX_int32_t ifx_mps_register_data_callback (mps_devices type, IFX_uint32_t dir,
IFX_void_t (*callback) (mps_devices
type));

738
package/system/ltq-vmmc/patches/100-target.patch
View File

@@ -1,738 +0,0 @@
--- a/src/drv_vmmc_access.h
+++ b/src/drv_vmmc_access.h
@@ -24,6 +24,10 @@
#include "drv_mps_vmmc.h"
#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS IFXMIPS_MPS_BASE_ADDR
+#endif
+
/* ============================= */
/* Global Defines */
/* ============================= */
--- a/src/drv_vmmc_danube.h
+++ b/src/drv_vmmc_danube.h
@@ -15,56 +15,18 @@
*/
#if defined SYSTEM_DANUBE
-#include <asm/ifx/ifx_gpio.h>
+#include <lantiq_soc.h>
+
#else
#error no system selected
#endif
-#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
+#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
/**
*/
#define VMMC_PCM_IF_CFG_HOOK(mode, GPIOreserved, ret) \
do { \
- ret = VMMC_statusOk; \
- /* Reserve P0.0 as TDM/FSC */ \
- if (!GPIOreserved) \
- ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel0_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel1_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID);\
- \
- /* Reserve P1.9 as TDM/DO */ \
- if (!GPIOreserved) \
- ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel0_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel1_clear(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- \
- /* Reserve P1.10 as TDM/DI */ \
- if (!GPIOreserved) \
- ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(1,10), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel0_clear(IFX_GPIO_PIN_ID(1,10), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel1_set(IFX_GPIO_PIN_ID(1,10), VMMC_TAPI_GPIO_MODULE_ID);\
- ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(1,10), VMMC_TAPI_GPIO_MODULE_ID); \
- \
- /* Reserve P1.11 as TDM/DCL */ \
- if (!GPIOreserved) \
- ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel0_set(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_altsel1_clear(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- \
- if (mode == 2) { \
- /* TDM/FSC+DCL Master */ \
- ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- } else { \
- /* TDM/FSC+DCL Slave */ \
- ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
- } \
} while(0);
/**
@@ -72,11 +34,6 @@
*/
#define VMMC_DRIVER_UNLOAD_HOOK(ret) \
do { \
- ret = VMMC_statusOk; \
- ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(1,10), VMMC_TAPI_GPIO_MODULE_ID); \
- ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(1,11), VMMC_TAPI_GPIO_MODULE_ID); \
} while (0)
#endif /* _DRV_VMMC_AMAZON_S_H */
--- a/src/drv_vmmc_init.c
+++ b/src/drv_vmmc_init.c
@@ -52,6 +52,14 @@
#include "ifx_pmu.h"
#endif /* PMU_SUPPORTED */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
+# define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
+# define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
+# define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
+#endif
/* ============================= */
/* Local Macros & Definitions */
@@ -1591,7 +1599,7 @@
#ifdef VMMC_DRIVER_UNLOAD_HOOK
if (VDevices[0].nDevState & DS_GPIO_RESERVED)
{
- IFX_int32_t ret;
+ IFX_int32_t ret = 0;
VMMC_DRIVER_UNLOAD_HOOK(ret);
if (!VMMC_SUCCESS(ret))
{
--- a/src/drv_vmmc_init_cap.c
+++ b/src/drv_vmmc_init_cap.c
@@ -22,6 +22,11 @@
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_device.h"
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS_CHIPID_VERSION_GET IFXMIPS_MPS_CHIPID_VERSION_GET
+# define IFX_MPS_CHIPID IFXMIPS_MPS_CHIPID
+#endif
+
/* ============================= */
/* Configuration defintions */
/* ============================= */
--- a/src/mps/drv_mps_vmmc_common.c
+++ b/src/mps/drv_mps_vmmc_common.c
@@ -17,6 +17,7 @@
/* Includes */
/* ============================= */
#include "drv_config.h"
+#include "drv_vmmc_init.h"
#undef USE_PLAIN_VOICE_FIRMWARE
#undef PRINT_ON_ERR_INTERRUPT
@@ -39,8 +40,32 @@
#include "ifxos_interrupt.h"
#include "ifxos_time.h"
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx/ifx_gptu.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <lantiq.h>
+# include <irq.h>
+# include <lantiq_timer.h>
+
+# define ifx_gptu_timer_request lq_request_timer
+# define ifx_gptu_timer_start lq_start_timer
+# define ifx_gptu_countvalue_get lq_get_count_value
+# define ifx_gptu_timer_free lq_free_timer
+
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39))
+# define bsp_mask_and_ack_irq ltq_mask_and_ack_irq
+#else
+extern void ltq_mask_and_ack_irq(struct irq_data *d);
+static void inline bsp_mask_and_ack_irq(int x)
+{
+ struct irq_data d;
+ d.irq = x;
+ ltq_mask_and_ack_irq(&d);
+}
+#endif
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx/ifx_gptu.h>
+#endif
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_dbg.h"
@@ -104,6 +129,9 @@
extern IFX_void_t mask_and_ack_danube_irq (IFX_uint32_t irq_nr);
#endif /* */
+
+extern void sys_hw_setup (void);
+
extern IFXOS_event_t fw_ready_evt;
/* callback function to free all data buffers currently used by voice FW */
IFX_void_t (*ifx_mps_bufman_freeall)(IFX_void_t) = IFX_NULL;
@@ -207,7 +235,8 @@
*/
IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority)
{
- IFX_uint32_t ptr, flags;
+ IFXOS_INTSTAT flags;
+ IFX_uint32_t ptr;
IFX_int32_t index = fastbuf_index;
if (fastbuf_initialized == 0)
@@ -261,7 +290,7 @@
*/
IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFX_int32_t index = fastbuf_index;
IFXOS_LOCKINT (flags);
@@ -457,7 +486,7 @@
*/
static IFX_int32_t ifx_mps_bufman_inc_level (IFX_uint32_t value)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
if (mps_buffer.buf_level + value > MPS_BUFFER_MAX_LEVEL)
{
@@ -484,7 +513,7 @@
*/
static IFX_int32_t ifx_mps_bufman_dec_level (IFX_uint32_t value)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
if (mps_buffer.buf_level < value)
{
@@ -636,7 +665,7 @@
mem_seg_ptr[i] =
(IFX_uint32_t *) CPHYSADDR ((IFX_uint32_t) mps_buffer.
malloc (segment_size, FASTBUF_FW_OWNED));
- if (mem_seg_ptr[i] == CPHYSADDR (IFX_NULL))
+ if (mem_seg_ptr[i] == (IFX_uint32_t *)CPHYSADDR (IFX_NULL))
{
TRACE (MPS, DBG_LEVEL_HIGH,
("%s(): cannot allocate buffer\n", __FUNCTION__));
@@ -952,7 +981,7 @@
mps_mbx_dev * pMBDev, IFX_int32_t bcommand,
IFX_boolean_t from_kernel)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFXOS_LOCKINT (flags);
@@ -1068,7 +1097,7 @@
IFX_void_t ifx_mps_release_structures (mps_comm_dev * pDev)
{
IFX_int32_t count;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFXOS_LOCKINT (flags);
IFXOS_BlockFree (pFW_img_data);
@@ -1117,7 +1146,7 @@
/* Initialize MPS main structure */
memset ((IFX_void_t *) pDev, 0, sizeof (mps_comm_dev));
- pDev->base_global = (mps_mbx_reg *) IFX_MPS_SRAM;
+ pDev->base_global = (mps_mbx_reg *) IFXMIPS_MPS_SRAM;
pDev->flags = 0x00000000;
MBX_Memory = pDev->base_global;
@@ -1125,9 +1154,11 @@
for MBX communication. These are: mailbox base address, mailbox size, *
mailbox read index and mailbox write index. for command and voice
mailbox, * upstream and downstream direction. */
- memset ((IFX_void_t *) MBX_Memory, /* avoid to overwrite CPU boot
- registers */
- 0, sizeof (mps_mbx_reg) - 2 * sizeof (mps_boot_cfg_reg));
+ memset (
+ /* avoid to overwrite CPU boot registers */
+ (IFX_void_t *) MBX_Memory,
+ 0,
+ sizeof (mps_mbx_reg) - 2 * sizeof (mps_boot_cfg_reg));
MBX_Memory->MBX_UPSTR_CMD_BASE =
(IFX_uint32_t *) CPHYSADDR ((IFX_uint32_t) MBX_UPSTRM_CMD_FIFO_BASE);
MBX_Memory->MBX_UPSTR_CMD_SIZE = MBX_CMD_FIFO_SIZE;
@@ -1564,7 +1595,7 @@
IFX_uint32_t * bytes)
{
IFX_int32_t i, ret;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFXOS_LOCKINT (flags);
@@ -1774,7 +1805,7 @@
{
mps_fifo *mbx;
IFX_uint32_t i;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFX_int32_t retval = -EAGAIN;
IFX_int32_t retries = 0;
IFX_uint32_t word = 0;
@@ -2169,6 +2200,7 @@
TRACE (MPS, DBG_LEVEL_HIGH,
("%s(): Invalid device ID %d !\n", __FUNCTION__, pMBDev->devID));
}
+
return retval;
}
@@ -2192,7 +2224,7 @@
mps_mbx_dev *mbx_dev;
MbxMsg_s msg;
IFX_uint32_t bytes_read = 0;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
IFX_int32_t ret;
/* set pointer to data upstream mailbox, no matter if 0,1,2 or 3 because
@@ -2283,7 +2315,7 @@
{
ifx_mps_bufman_dec_level (1);
if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
{
IFXOS_LockRelease (pMPSDev->provide_buffer);
}
@@ -2326,7 +2358,7 @@
#endif /* CONFIG_PROC_FS */
ifx_mps_bufman_dec_level (1);
if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
{
IFXOS_LockRelease (pMPSDev->provide_buffer);
}
@@ -2356,7 +2388,7 @@
IFX_void_t ifx_mps_mbx_cmd_upstream (IFX_ulong_t dummy)
{
mps_fifo *mbx;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
/* set pointer to upstream command mailbox */
mbx = &(pMPSDev->cmd_upstrm_fifo);
@@ -2404,7 +2436,7 @@
mps_event_msg msg;
IFX_int32_t length = 0;
IFX_int32_t read_length = 0;
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
/* set pointer to upstream event mailbox */
mbx = &(pMPSDev->event_upstrm_fifo);
@@ -2619,6 +2651,7 @@
#endif
*IFX_MPS_AD0ENR = Ad0Reg.val;
+
}
/**
@@ -2647,7 +2680,7 @@
*/
IFX_void_t ifx_mps_dd_mbx_int_enable (IFX_void_t)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
MPS_Ad0Reg_u Ad0Reg;
IFXOS_LOCKINT (flags);
@@ -2673,7 +2706,7 @@
*/
IFX_void_t ifx_mps_dd_mbx_int_disable (IFX_void_t)
{
- IFX_uint32_t flags;
+ IFXOS_INTSTAT flags;
MPS_Ad0Reg_u Ad0Reg;
IFXOS_LOCKINT (flags);
@@ -2738,7 +2771,6 @@
#else /* */
mask_and_ack_danube_irq (irq);
#endif /* */
-
/* FW is up and ready to process commands */
if (MPS_Ad0StatusReg.fld.dl_end)
{
@@ -2800,6 +2832,7 @@
}
}
+
if (MPS_Ad0StatusReg.fld.du_mbx)
{
#ifdef CONFIG_PROC_FS
@@ -2944,12 +2977,12 @@
IFX_MPS_CVC0SR[chan] = MPS_VCStatusReg.val;
/* handle only enabled interrupts */
MPS_VCStatusReg.val &= IFX_MPS_VC0ENR[chan];
-
#ifdef LINUX_2_6
bsp_mask_and_ack_irq (irq);
#else /* */
mask_and_ack_danube_irq (irq);
#endif /* */
+
pMPSDev->event.MPS_VCStatReg[chan].val = MPS_VCStatusReg.val;
#ifdef PRINT_ON_ERR_INTERRUPT
if (MPS_VCStatusReg.fld.rcv_ov)
@@ -3093,7 +3126,8 @@
*/
IFX_return_t ifx_mps_init_gpt ()
{
- IFX_uint32_t flags, timer_flags, timer, loops = 0;
+ unsigned long flags;
+ IFX_uint32_t timer_flags, timer, loops = 0;
IFX_ulong_t count;
#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
timer = TIMER1A;
@@ -3166,6 +3200,7 @@
#else /* Danube */
timer = TIMER1B;
#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
+
ifx_gptu_timer_free (timer);
}
--- a/src/mps/drv_mps_vmmc_danube.c
+++ b/src/mps/drv_mps_vmmc_danube.c
@@ -16,6 +16,7 @@
/* ============================= */
/* Includes */
/* ============================= */
+#include "linux/version.h"
#include "drv_config.h"
#ifdef SYSTEM_DANUBE /* defined in drv_mps_vmmc_config.h */
@@ -36,9 +37,22 @@
#include "ifxos_select.h"
#include "ifxos_interrupt.h"
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx/ifx_gpio.h>
-#include <asm/ifx/common_routines.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <lantiq.h>
+# include <irq.h>
+# include <lantiq_timer.h>
+# include <linux/dma-mapping.h>
+
+
+#define LQ_RCU_BASE_ADDR (KSEG1 + LTQ_RCU_BASE_ADDR)
+# define LQ_RCU_RST ((u32 *)(LQ_RCU_BASE_ADDR + 0x0010))
+#define IFX_RCU_RST_REQ_CPU1 (1 << 3)
+# define IFX_RCU_RST_REQ LQ_RCU_RST
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx_vpe.h>
+# include <asm/ifx/ifx_gpio.h>
+#endif
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_dbg.h"
@@ -75,6 +89,20 @@
/* Local function definition */
/* ============================= */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+IFX_uint32_t ifx_get_cp1_size(IFX_void_t)
+{
+ return 1;
+}
+
+unsigned int *ltq_get_cp1_base(void);
+
+IFX_uint32_t *ifx_get_cp1_base(IFX_void_t)
+{
+ return ltq_get_cp1_base();
+}
+#endif
+
/******************************************************************************
* DANUBE Specific Routines
******************************************************************************/
@@ -134,6 +162,15 @@
}
/* check if FW image fits in available memory space */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+ if (mem > ifx_get_cp1_size()<<20)
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("[%s %s %d]: error, firmware memory exceeds reserved space (%i > %i)!\n",
+ __FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()<<20));
+ return IFX_ERROR;
+ }
+#else
if (mem > ifx_get_cp1_size())
{
TRACE (MPS, DBG_LEVEL_HIGH,
@@ -141,6 +178,7 @@
__FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()));
return IFX_ERROR;
}
+#endif
/* reset the driver */
ifx_mps_reset ();
@@ -361,7 +399,7 @@
*/
IFX_void_t ifx_mps_wdog_expiry()
{
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
/* recalculate and compare the firmware checksum */
--- a/src/mps/drv_mps_vmmc_device.h
+++ b/src/mps/drv_mps_vmmc_device.h
@@ -16,8 +16,58 @@
declarations.
*******************************************************************************/
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx_vpe.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <lantiq.h>
+# include <irq.h>
+# include <lantiq_soc.h>
+# include <gpio.h>
+#define IFXMIPS_MPS_SRAM ((u32 *)(KSEG1 + 0x1F200000))
+#define IFXMIPS_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
+#define IFXMIPS_MPS_CHIPID ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0344))
+#define IFXMIPS_MPS_VC0ENR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0000))
+#define IFXMIPS_MPS_RVC0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0010))
+#define IFXMIPS_MPS_CVC0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0030))
+#define IFXMIPS_MPS_CVC1SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0034))
+#define IFXMIPS_MPS_CVC2SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0038))
+#define IFXMIPS_MPS_CVC3SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x003C))
+#define IFXMIPS_MPS_RAD0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0040))
+#define IFXMIPS_MPS_RAD1SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0044))
+#define IFXMIPS_MPS_SAD0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0048))
+#define IFXMIPS_MPS_SAD1SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x004C))
+#define IFXMIPS_MPS_CAD0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0050))
+#define IFXMIPS_MPS_CAD1SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0054))
+#define IFXMIPS_MPS_AD0ENR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0058))
+#define IFXMIPS_MPS_AD1ENR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x005C))
+
+#define IFXMIPS_MPS_CHIPID_VERSION_GET(value) (((value) >> 28) & ((1 << 4) - 1))
+#define IFXMIPS_MPS_CHIPID_VERSION_SET(value) ((((1 << 4) - 1) & (value)) << 28)
+#define IFXMIPS_MPS_CHIPID_PARTNUM_GET(value) (((value) >> 12) & ((1 << 16) - 1))
+#define IFXMIPS_MPS_CHIPID_PARTNUM_SET(value) ((((1 << 16) - 1) & (value)) << 12)
+#define IFXMIPS_MPS_CHIPID_MANID_GET(value) (((value) >> 1) & ((1 << 10) - 1))
+#define IFXMIPS_MPS_CHIPID_MANID_SET(value) ((((1 << 10) - 1) & (value)) << 1)
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx_vpe.h>
+#endif
+/* MPS register */
+# define IFX_MPS_AD0ENR IFXMIPS_MPS_AD0ENR
+# define IFX_MPS_AD1ENR IFXMIPS_MPS_AD1ENR
+# define IFX_MPS_RAD0SR IFXMIPS_MPS_RAD0SR
+# define IFX_MPS_RAD1SR IFXMIPS_MPS_RAD1SR
+# define IFX_MPS_VC0ENR IFXMIPS_MPS_VC0ENR
+# define IFX_MPS_RVC0SR IFXMIPS_MPS_RVC0SR
+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
+# define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
+# define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
+# define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
+# define IFX_MPS_SAD0SR IFXMIPS_MPS_SAD0SR
+/* interrupt vectors */
+# define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
+# define INT_NUM_IM4_IRL18 (INT_NUM_IM4_IRL0 + 18)
+# define INT_NUM_IM4_IRL19 (INT_NUM_IM4_IRL0 + 19)
+# define IFX_ICU_IM4_IER IFXMIPS_ICU_IM4_IER
/* ============================= */
/* MPS Common defines */
@@ -26,32 +76,28 @@
#define MPS_BASEADDRESS 0xBF107000
#define MPS_RAD0SR MPS_BASEADDRESS + 0x0004
-#define MPS_RAD0SR_DU (1<<0)
-#define MPS_RAD0SR_CU (1<<1)
-
#define MBX_BASEADDRESS 0xBF200000
#define VCPU_BASEADDRESS 0xBF208000 /* 0xBF108000 */
/*---------------------------------------------------------------------------*/
+#if !defined(CONFIG_LANTIQ)
+/* enabling interrupts is done with request_irq by the BSP
+ The related code should not be needed anymore */
#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
/* TODO: doublecheck - IM4 or different! */
#define MPS_INTERRUPTS_ENABLE(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IER) |= X;
#define MPS_INTERRUPTS_DISABLE(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IER) &= ~X;
-#define MPS_INTERRUPTS_CLEAR(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_ISR) = X;
-#define MPS_INTERRUPTS_SET(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IRSR) = X;/* |= ? */
#else /* Danube */
/* TODO: possibly needs to be changed to IM4 !!!!!! */
#ifdef LINUX_2_6
#define MPS_INTERRUPTS_ENABLE(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IER) |= X;
#define MPS_INTERRUPTS_DISABLE(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IER) &= ~X;
-#define MPS_INTERRUPTS_CLEAR(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_ISR) = X;
-#define MPS_INTERRUPTS_SET(X) *((volatile IFX_uint32_t*) IFX_ICU_IM4_IRSR) = X;/* |= ? */
#else /* */
#define MPS_INTERRUPTS_ENABLE(X) *((volatile IFX_uint32_t*) DANUBE_ICU_IM5_IER) |= X;
#define MPS_INTERRUPTS_DISABLE(X) *((volatile IFX_uint32_t*) DANUBE_ICU_IM5_IER) &= ~X;
-#define MPS_INTERRUPTS_CLEAR(X) *((volatile IFX_uint32_t*) DANUBE_ICU_IM5_ISR) = X;
-#define MPS_INTERRUPTS_SET(X) *((volatile IFX_uint32_t*) DANUBE_ICU_IM5_IRSR) = X;/* |= ? */
#endif /* LINUX_2_6 */
#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
+#endif /* !defined(CONFIG_LANTIQ) */
+
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
@@ -142,53 +188,9 @@
#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
/* ***** Amazon-S specific defines ***** */
#define IFX_MPS_Base AMAZON_S_MPS
-
-//#define IFX_MPS_CHIPID AMAZON_S_MPS_CHIPID
-//#define IFX_MPS_CHIPID_VERSION_GET AMAZON_S_MPS_CHIPID_VERSION_GET
-
-//#define IFX_MPS_AD0ENR AMAZON_S_MPS_AD0ENR
-//#define IFX_MPS_AD1ENR AMAZON_S_MPS_AD1ENR
-//#define IFX_MPS_VC0ENR AMAZON_S_MPS_VC0ENR
-//#define IFX_MPS_SAD0SR AMAZON_S_MPS_SAD0SR
-//#define IFX_MPS_RAD0SR AMAZON_S_MPS_RAD0SR
-//#define IFX_MPS_CAD0SR AMAZON_S_MPS_CAD0SR
-//#define IFX_MPS_RAD1SR AMAZON_S_MPS_RAD1SR
-//#define IFX_MPS_CAD1SR AMAZON_S_MPS_CAD1SR
-//#define IFX_MPS_RVC0SR AMAZON_S_MPS_RVC0SR
-//#define IFX_MPS_CVC0SR AMAZON_S_MPS_CVC0SR
-//#define IFX_MPS_CVC1SR AMAZON_S_MPS_CVC1SR
-//#define IFX_MPS_CVC2SR AMAZON_S_MPS_CVC2SR
-//#define IFX_MPS_CVC3SR AMAZON_S_MPS_CVC3SR
-
-//#define IFX_MPS_SRAM AMAZON_S_MPS_SRAM
#else /* */
/* ***** DANUBE specific defines ***** */
#define IFX_MPS_Base DANUBE_MPS
-
-//#define IFX_MPS_CHIPID DANUBE_MPS_CHIPID
-//#define IFX_MPS_CHIPID_VERSION_GET DANUBE_MPS_CHIPID_VERSION_GET
-//#define IFX_MPS_CHIPID_VERSION_SET DANUBE_MPS_CHIPID_VERSION_SET
-//#define IFX_MPS_CHIPID_PARTNUM_GET DANUBE_MPS_CHIPID_PARTNUM_GET
-//#define IFX_MPS_CHIPID_PARTNUM_SET DANUBE_MPS_CHIPID_PARTNUM_SET
-//#define IFX_MPS_CHIPID_MANID_GET DANUBE_MPS_CHIPID_MANID_GET
-//#define IFX_MPS_CHIPID_MANID_SET DANUBE_MPS_CHIPID_MANID_SET
-//#define IFX_MPS_SUBVER DANUBE_MPS_SUBVER
-
-//#define IFX_MPS_AD0ENR DANUBE_MPS_AD0ENR
-//#define IFX_MPS_AD1ENR DANUBE_MPS_AD1ENR
-//#define IFX_MPS_VC0ENR DANUBE_MPS_VC0ENR
-//#define IFX_MPS_SAD0SR DANUBE_MPS_SAD0SR
-//#define IFX_MPS_RAD0SR DANUBE_MPS_RAD0SR
-//#define IFX_MPS_CAD0SR DANUBE_MPS_CAD0SR
-//#define IFX_MPS_RAD1SR DANUBE_MPS_RAD1SR
-//#define IFX_MPS_CAD1SR DANUBE_MPS_CAD1SR
-//#define IFX_MPS_RVC0SR DANUBE_MPS_RVC0SR
-//#define IFX_MPS_CVC0SR DANUBE_MPS_CVC0SR
-//#define IFX_MPS_CVC1SR DANUBE_MPS_CVC1SR
-//#define IFX_MPS_CVC2SR DANUBE_MPS_CVC2SR
-//#define IFX_MPS_CVC3SR DANUBE_MPS_CVC3SR
-
-//#define IFX_MPS_SRAM DANUBE_MPS_SRAM
#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
typedef enum
{
--- a/src/mps/drv_mps_vmmc_linux.c
+++ b/src/mps/drv_mps_vmmc_linux.c
@@ -57,10 +57,11 @@
#include <linux/moduleparam.h>
#endif /* */
-
+#if !defined CONFIG_LANTIQ
#include <asm/ifx/irq.h>
#include <asm/ifx/ifx_regs.h>
#include <asm/ifx_vpe.h>
+#endif
/* lib_ifxos headers */
#include "ifx_types.h"
@@ -959,7 +960,7 @@
#endif /* MPS_FIFO_BLOCKING_WRITE */
case FIO_MPS_GET_STATUS:
{
- IFX_uint32_t flags;
+ unsigned long flags;
/* get the status of the channel */
if (!from_kernel)
@@ -993,7 +994,7 @@
#if CONFIG_MPS_HISTORY_SIZE > 0
case FIO_MPS_GET_CMD_HISTORY:
{
- IFX_uint32_t flags;
+ unsigned long flags;
if (from_kernel)
{
@@ -1685,6 +1686,7 @@
sprintf (buf + len, " minLv: \t %8d\n",
ifx_mps_dev.voice_mb[i].upstrm_fifo->min_space);
}
+
return len;
}
@@ -2291,9 +2293,11 @@
return result;
}
+#if !defined(CONFIG_LANTIQ)
+ /** \todo This is handled already with request_irq, remove */
/* Enable all MPS Interrupts at ICU0 */
MPS_INTERRUPTS_ENABLE (0x0000FF80);
-
+#endif
/* enable mailbox interrupts */
ifx_mps_enable_mailbox_int ();
/* init FW ready event */
@@ -2421,9 +2425,11 @@
/* disable mailbox interrupts */
ifx_mps_disable_mailbox_int ();
+#if !defined(CONFIG_LANTIQ)
/* disable Interrupts at ICU0 */
- MPS_INTERRUPTS_DISABLE (DANUBE_MPS_AD0_IR4); /* Disable DFE/AFE 0 Interrupts
- */
+ /* Disable DFE/AFE 0 Interrupts*/
+ MPS_INTERRUPTS_DISABLE (DANUBE_MPS_AD0_IR4);
+#endif
/* disable all MPS interrupts */
ifx_mps_disable_all_int ();
--- a/src/drv_vmmc_ioctl.c
+++ b/src/drv_vmmc_ioctl.c
@@ -18,6 +18,7 @@
/* Includes */
/* ============================= */
#include "drv_api.h"
+#include "drv_vmmc_init.h"
#include "drv_vmmc_api.h"
#include "drv_vmmc_bbd.h"

968
package/system/ltq-vmmc/patches/400-falcon.patch
View File

@@ -1,968 +0,0 @@
--- a/configure.in
+++ b/configure.in
@@ -956,14 +956,15 @@ AC_DEFINE([VMMC],[1],[enable VMMC suppor
AM_CONDITIONAL(DANUBE, false)
AM_CONDITIONAL(AR9, false)
AM_CONDITIONAL(VR9, false)
+AM_CONDITIONAL(FALCON, false)
AC_ARG_WITH(device,
AC_HELP_STRING(
- [--with-device=DANUBE|TWINPASS|AR9|VR9],
+ [--with-device=DANUBE|TWINPASS|AR9|VR9|FALCON],
[Set device type, default is DANUBE]
),
[
if test "$withval" = yes; then
- AC_MSG_ERROR([Set device type! Valid choices are DANUBE|TWINPASS|AR9|VR9]);
+ AC_MSG_ERROR([Set device type! Valid choices are DANUBE|TWINPASS|AR9|VR9|FALCON]);
else
case $withval in
DANUBE)
@@ -986,8 +987,13 @@ AC_ARG_WITH(device,
AC_DEFINE([SYSTEM_VR9],[1],[enable VR9 specific code])
AM_CONDITIONAL(VR9, true)
;;
+ FALCON)
+ AC_MSG_RESULT(FALCON device is used);
+ AC_DEFINE([SYSTEM_FALCON],[1],[enable FALCON specific code])
+ AM_CONDITIONAL(FALCON, true)
+ ;;
*)
- AC_MSG_ERROR([Set device type! Valid choices are DANUBE|TWINPASS|AR9|VR9]);
+ AC_MSG_ERROR([Set device type! Valid choices are DANUBE|TWINPASS|AR9|VR9|FALCON]);
;;
esac
fi
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -70,6 +70,11 @@ drv_vmmc_SOURCES +=\
mps/drv_mps_vmmc_ar9.c
endif
+if FALCON
+drv_vmmc_SOURCES +=\
+ mps/drv_mps_vmmc_falcon.c
+endif
+
endif
if PMC_SUPPORT
--- a/drv_version.h
+++ b/drv_version.h
@@ -36,6 +36,10 @@
#define MIN_FW_MAJORSTEP 2
#define MIN_FW_MINORSTEP 1
#define MIN_FW_HOTFIXSTEP 0
+#elif defined(SYSTEM_FALCON)
+#define MIN_FW_MAJORSTEP 0
+#define MIN_FW_MINORSTEP 1
+#define MIN_FW_HOTFIXSTEP 0
#else
#error unknown system
#endif
--- a/src/drv_vmmc_bbd.c
+++ b/src/drv_vmmc_bbd.c
@@ -34,6 +34,7 @@
#define VMMC_WL_SDD_BASIC_CFG 0x04000400
#define VMMC_WL_SDD_RING_CFG 0x04000500
#define VMMC_WL_SDD_DCDC_CFG 0x04000C00
+#define VMMC_WL_SDD_MWI_CFG 0x04000600
#define IDLE_EXT_TOGGLE_SLEEP_MS 5
@@ -52,6 +53,8 @@
#define BBD_VMMC_MAGIC 0x41523921 /* "AR9" */
#elif defined(SYSTEM_VR9)
#define BBD_VMMC_MAGIC 0x56523921 /* "VR9" */
+#elif defined(SYSTEM_FALCON)
+#define BBD_VMMC_MAGIC 0x46414C43 /* "FALC" */
#else
#error system undefined
#endif
@@ -525,9 +528,6 @@ static IFX_int32_t VMMC_BBD_BlockHandler
IFX_uint16_t slic_val;
IFX_int32_t ret = IFX_SUCCESS;
- TRACE(VMMC, DBG_LEVEL_LOW,
- ("bbd block with tag 0x%04X passed\n", pBBDblock->tag));
-
/* for FXO line allowed blocks are FXO_CRAM and TRANSPARENT */
if (pCh->pALM->line_type_fxs != IFX_TRUE)
{
@@ -686,6 +686,7 @@ static IFX_int32_t VMMC_BBD_BlockHandler
break;
}
} /* if */
+
return ret;
}
@@ -1026,6 +1027,7 @@ static IFX_int32_t vmmc_BBD_WhiteListedC
}
case VMMC_WL_SDD_RING_CFG:
case VMMC_WL_SDD_DCDC_CFG:
+ case VMMC_WL_SDD_MWI_CFG:
ret = CmdWrite (pCh->pParent, Msg.val, Msg.cmd.LENGTH);
break;
@@ -1068,7 +1070,7 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
IFX_uint32_t countWords;
IFX_uint32_t posBytes = 0;
IFX_uint8_t lenBytes, *pByte;
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
IFX_uint8_t padBytes = 0;
#endif
IFX_uint16_t cram_offset, cram_crc,
@@ -1088,7 +1090,7 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
#ifdef SYSTEM_DANUBE
/* CMD1 is a COP command */
pCmd[0] = (0x0200) | (pCh->nChannel - 1);
-#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/* SDD_Coef command */
pCmd[0] = (0x0400) | (pCh->nChannel - 1);
pCmd[1] = (0x0D00);
@@ -1111,7 +1113,7 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
pCmd[1] = ((cram_offset + (posBytes >> 1)) << 8);
/* set CRAM data while taking care of endianess */
cpb2w (&pCmd[2], &pByte[posBytes], lenBytes);
-#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/* calculate length to download (in words = 16bit),
maximum allowed length for this message is 56 Bytes = 28 Words */
if (countWords > ((MAX_CMD_WORD - CMD_HDR_CNT - 1)))
@@ -1140,7 +1142,7 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
/* write Data */
#if defined SYSTEM_DANUBE
ret = CmdWrite (pCh->pParent, (IFX_uint32_t *) pCmd, lenBytes);
-#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
#if 1
/* lenBytes + 2 bytes for block offset/length which are not calculated
in the download progress */
--- a/src/mps/drv_mps_version.h
+++ b/src/mps/drv_mps_version.h
@@ -17,7 +17,7 @@
#define VERSIONSTEP 2
#define VERS_TYPE 5
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
#define IFX_MPS_PLATFORM_NAME "MIPS34KEc"
#elif defined(SYSTEM_DANUBE)
#define IFX_MPS_PLATFORM_NAME "MIPS24KEc"
--- a/src/mps/drv_mps_vmmc_linux.c
+++ b/src/mps/drv_mps_vmmc_linux.c
@@ -2225,7 +2225,7 @@ IFX_int32_t __init ifx_mps_init_module (
#if defined(CONFIG_MIPS) && !defined(CONFIG_MIPS_UNCACHED)
#if defined(SYSTEM_DANUBE)
bDoCacheOps = IFX_TRUE; /* on Danube always perform cache ops */
-#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/* on AR9/VR9 cache is configured by BSP;
here we check whether the D-cache is shared or partitioned;
1) in case of shared D-cache all cache operations are omitted;
@@ -2255,7 +2255,8 @@ IFX_int32_t __init ifx_mps_init_module (
/* reset the device before initializing the device driver */
ifx_mps_reset ();
- result = request_irq (INT_NUM_IM4_IRL18,
+
+ result = request_irq (INT_NUM_IM4_IRL18,
#ifdef LINUX_2_6
ifx_mps_ad0_irq, IRQF_DISABLED
#else /* */
@@ -2396,7 +2397,7 @@ IFX_int32_t __init ifx_mps_init_module (
if (result = ifx_mps_init_gpt_danube ())
return result;
#endif /*DANUBE*/
- TRACE (MPS, DBG_LEVEL_HIGH, ("Downloading Firmware...\n"));
+ TRACE (MPS, DBG_LEVEL_HIGH, ("Downloading Firmware...\n"));
ifx_mps_download_firmware (IFX_NULL, (mps_fw *) 0xa0a00000);
udelay (500);
TRACE (MPS, DBG_LEVEL_HIGH, ("Providing Buffers...\n"));
--- /dev/null
+++ b/src/mps/drv_mps_vmmc_falcon.c
@@ -0,0 +1,463 @@
+/******************************************************************************
+
+ Copyright (c) 2009
+ Lantiq Deutschland GmbH
+ Am Campeon 3; 85579 Neubiberg, Germany
+
+ For licensing information, see the file 'LICENSE' in the root folder of
+ this software module.
+
+****************************************************************************
+ Module : drv_mps_vmmc_falcon.c
+ Description : This file contains the implementation of the FALC-ON specific
+ driver functions.
+*******************************************************************************/
+
+/* ============================= */
+/* Includes */
+/* ============================= */
+#include "drv_config.h"
+
+#if defined(SYSTEM_FALCON) /* defined in drv_config.h */
+
+/* lib_ifxos headers */
+#include "ifx_types.h"
+#include "ifxos_linux_drv.h"
+#include "ifxos_copy_user_space.h"
+#include "ifxos_event.h"
+#include "ifxos_lock.h"
+#include "ifxos_select.h"
+#include "ifxos_interrupt.h"
+#include <linux/gpio.h>
+#include <sys1_reg.h>
+#include <falcon.h>
+#include <falcon_irq.h>
+#include <vpe.h>
+#include <sysctrl.h>
+void (*ifx_bsp_basic_mps_decrypt)(unsigned int addr, int n) = (void (*)(unsigned int, int))0xbf000290;
+
+#define IFX_MPS_SRAM IFXMIPS_MPS_SRAM
+
+/*#define USE_PLAIN_VOICE_FIRMWARE*/
+/* board specific headers */
+
+/* device specific headers */
+#include "drv_mps_vmmc.h"
+#include "drv_mps_vmmc_dbg.h"
+#include "drv_mps_vmmc_device.h"
+
+/* ============================= */
+/* Local Macros & Definitions */
+/* ============================= */
+/* Firmware watchdog timer counter address */
+#define VPE1_WDOG_CTR_ADDR ((IFX_uint32_t)((IFX_uint8_t* )IFX_MPS_SRAM + 432))
+
+/* Firmware watchdog timeout range, values in ms */
+#define VPE1_WDOG_TMOUT_MIN 20
+#define VPE1_WDOG_TMOUT_MAX 5000
+
+/* ============================= */
+/* Global variable definition */
+/* ============================= */
+extern mps_comm_dev *pMPSDev;
+
+/* ============================= */
+/* Global function declaration */
+/* ============================= */
+IFX_void_t ifx_mps_release (IFX_void_t);
+extern IFX_uint32_t ifx_mps_reset_structures (mps_comm_dev * pMPSDev);
+extern IFX_int32_t ifx_mps_bufman_close (IFX_void_t);
+IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count);
+extern IFXOS_event_t fw_ready_evt;
+/* ============================= */
+/* Local function declaration */
+/* ============================= */
+static IFX_int32_t ifx_mps_fw_wdog_start_ar9(IFX_void_t);
+
+/* ============================= */
+/* Local variable definition */
+/* ============================= */
+static IFX_int32_t vpe1_started = 0;
+/* VMMC watchdog timer callback */
+IFX_int32_t (*ifx_wdog_callback) (IFX_uint32_t flags) = IFX_NULL;
+
+/* ============================= */
+/* Local function definition */
+/* ============================= */
+
+/******************************************************************************
+ * AR9 Specific Routines
+ ******************************************************************************/
+
+/**
+ * Start AR9 EDSP firmware watchdog mechanism.
+ * Called after download and startup of VPE1.
+ *
+ * \param none
+ * \return 0 IFX_SUCCESS
+ * \return -1 IFX_ERROR
+ * \ingroup Internal
+ */
+IFX_int32_t ifx_mps_fw_wdog_start_ar9()
+{
+ return IFX_SUCCESS;
+}
+
+/**
+ * Firmware download to Voice CPU
+ * This function performs a firmware download to the coprocessor.
+ *
+ * \param pMBDev Pointer to mailbox device structure
+ * \param pFWDwnld Pointer to firmware structure
+ * \return 0 IFX_SUCCESS, firmware ready
+ * \return -1 IFX_ERROR, firmware not downloaded.
+ * \ingroup Internal
+ */
+IFX_int32_t ifx_mps_download_firmware (mps_mbx_dev *pMBDev, mps_fw *pFWDwnld)
+{
+ IFX_uint32_t mem, cksum;
+ IFX_uint8_t crc;
+ IFX_boolean_t bMemReqNotPresent = IFX_FALSE;
+
+ /* VCC register */
+ /* dummy accesss on GTC for GPONC-55, otherwise upper bits are random on read */
+ ltq_r32 ((u32 *)((KSEG1 | 0x1DC000B0)));
+ /* NTR Frequency Select 1536 kHz per default or take existing,
+ NTR Output Enable and NTR8K Output Enable */
+ if ((ltq_r32 ((u32 *)(GPON_SYS_BASE + 0xBC)) & 7) == 0)
+ ltq_w32_mask (0x10187, 0x183, (u32 *)(GPON_SYS_BASE + 0xBC));
+ else
+ ltq_w32_mask (0x10180, 0x180, (u32 *)(GPON_SYS_BASE + 0xBC));
+#if 0
+ /* BIU-ICU1-IM1_ISR - IM1:FSCT_CMP1=1 and FSC_ROOT=1
+ (0x1f880328 = 0x00002800) */
+ ltq_w32 (0x00002800, (u32 *)(GPON_ICU1_BASE + 0x30));
+#endif
+ /* copy FW footer from user space */
+ if (IFX_NULL == IFXOS_CpyFromUser(pFW_img_data,
+ pFWDwnld->data+pFWDwnld->length/4-sizeof(*pFW_img_data)/4,
+ sizeof(*pFW_img_data)))
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ (KERN_ERR "[%s %s %d]: copy_from_user error\r\n",
+ __FILE__, __func__, __LINE__));
+ return IFX_ERROR;
+ }
+
+ mem = pFW_img_data->mem;
+
+ /* memory requirement sanity check */
+ if ((crc = ~((mem >> 16) + (mem >> 8) + mem)) != (mem >> 24))
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("[%s %s %d]: warning, image does not contain size - assuming 1MB!\n",
+ __FILE__, __func__, __LINE__));
+ mem = 1 * 1024 * 1024;
+ bMemReqNotPresent = IFX_TRUE;
+ }
+ else
+ {
+ mem &= 0x00FFFFFF;
+ }
+
+ /* check if FW image fits in available memory space */
+ if (mem > vpe1_get_max_mem(0))
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("[%s %s %d]: error, firmware memory exceeds reserved space (%i > %i)!\n",
+ __FILE__, __func__, __LINE__, mem, vpe1_get_max_mem(0)));
+ return IFX_ERROR;
+ }
+
+ /* reset the driver */
+ ifx_mps_reset ();
+
+ /* call BSP to get cpu1 base address */
+ cpu1_base_addr = (IFX_uint32_t *)vpe1_get_load_addr(0);
+
+ /* check if CPU1 base address is sane
+ \todo: check if address is 1MB aligned,
+ also make it visible in a /proc fs */
+ if (!cpu1_base_addr)
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ (KERN_ERR "IFX_MPS: CPU1 base address is invalid!\r\n"));
+ return IFX_ERROR;
+ }
+ /* further use uncached value */
+ cpu1_base_addr = (IFX_uint32_t *)KSEG1ADDR(cpu1_base_addr);
+
+ /* free all data buffers that might be currently used by FW */
+ if (IFX_NULL != ifx_mps_bufman_freeall)
+ {
+ ifx_mps_bufman_freeall();
+ }
+
+ if(FW_FORMAT_NEW)
+ {
+ /* adjust download length */
+ pFWDwnld->length -= (sizeof(*pFW_img_data)-sizeof(IFX_uint32_t));
+ }
+ else
+ {
+ pFWDwnld->length -= sizeof(IFX_uint32_t);
+
+ /* handle unlikely case if FW image does not contain memory requirement -
+ assumed for old format only */
+ if (IFX_TRUE == bMemReqNotPresent)
+ pFWDwnld->length += sizeof(IFX_uint32_t);
+
+ /* in case of old FW format always assume that FW is encrypted;
+ use compile switch USE_PLAIN_VOICE_FIRMWARE for plain FW */
+#ifndef USE_PLAIN_VOICE_FIRMWARE
+ pFW_img_data->enc = 1;
+#else
+#warning Using unencrypted firmware!
+ pFW_img_data->enc = 0;
+#endif /* USE_PLAIN_VOICE_FIRMWARE */
+ /* initializations for the old format */
+ pFW_img_data->st_addr_crc = 2*sizeof(IFX_uint32_t) +
+ FW_AR9_OLD_FMT_XCPT_AREA_SZ;
+ pFW_img_data->en_addr_crc = pFWDwnld->length;
+ pFW_img_data->fw_vers = 0;
+ pFW_img_data->magic = 0;
+ }
+
+ /* copy FW image to base address of CPU1 */
+ if (IFX_NULL ==
+ IFXOS_CpyFromUser ((IFX_void_t *)cpu1_base_addr,
+ (IFX_void_t *)pFWDwnld->data, pFWDwnld->length))
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ (KERN_ERR "[%s %s %d]: copy_from_user error\r\n", __FILE__,
+ __func__, __LINE__));
+ return IFX_ERROR;
+ }
+
+ /* process firmware decryption */
+ if (pFW_img_data->enc == 1)
+ {
+ if(FW_FORMAT_NEW)
+ {
+ /* adjust decryption length (avoid decrypting CRC32 checksum) */
+ pFWDwnld->length -= sizeof(IFX_uint32_t);
+ }
+ /* BootROM actually decrypts n+4 bytes if n bytes were passed for
+ decryption. Subtract sizeof(u32) from length to avoid decryption
+ of data beyond the FW image code */
+ pFWDwnld->length -= sizeof(IFX_uint32_t);
+ ifx_bsp_basic_mps_decrypt((unsigned int)cpu1_base_addr, pFWDwnld->length);
+ }
+
+ /* calculate CRC32 checksum over downloaded image */
+ cksum = ifx_mps_fw_crc32(cpu1_base_addr, pFW_img_data);
+
+ /* verify the checksum */
+ if(FW_FORMAT_NEW)
+ {
+ if (cksum != pFW_img_data->crc32)
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("MPS: FW checksum error: img=0x%08x calc=0x%08x\r\n",
+ pFW_img_data->crc32, cksum));
+ /*return IFX_ERROR;*/
+ }
+ }
+ else
+ {
+ /* just store self-calculated checksum */
+ pFW_img_data->crc32 = cksum;
+ }
+
+ /* start VPE1 */
+ ifx_mps_release ();
+#if 0
+ /* start FW watchdog mechanism */
+ ifx_mps_fw_wdog_start_ar9();
+#endif
+ /* get FW version */
+ return ifx_mps_get_fw_version (0);
+}
+
+
+/**
+ * Restart CPU1
+ * This function restarts CPU1 by accessing the reset request register and
+ * reinitializes the mailbox.
+ *
+ * \return 0 IFX_SUCCESS, successful restart
+ * \return -1 IFX_ERROR, if reset failed
+ * \ingroup Internal
+ */
+IFX_int32_t ifx_mps_restart (IFX_void_t)
+{
+ /* raise reset request for CPU1 and reset driver structures */
+ ifx_mps_reset ();
+ /* Disable GPTC Interrupt to CPU1 */
+ ifx_mps_shutdown_gpt ();
+ /* re-configure GPTC */
+ ifx_mps_init_gpt ();
+ /* let CPU1 run */
+ ifx_mps_release ();
+ /* start FW watchdog mechanism */
+ ifx_mps_fw_wdog_start_ar9();
+ TRACE (MPS, DBG_LEVEL_HIGH, ("IFX_MPS: Restarting firmware..."));
+ return ifx_mps_get_fw_version (0);
+}
+
+/**
+ * Shutdown MPS - stop VPE1
+ * This function stops VPE1
+ *
+ * \ingroup Internal
+ */
+IFX_void_t ifx_mps_shutdown (IFX_void_t)
+{
+ if (vpe1_started)
+ {
+ /* stop software watchdog timer */
+ vpe1_sw_wdog_stop (0);
+ /* clean up the BSP callback function */
+ vpe1_sw_wdog_register_reset_handler (IFX_NULL);
+ /* stop VPE1 */
+ vpe1_sw_stop (0);
+ vpe1_started = 0;
+ }
+ /* free GPTC */
+ ifx_mps_shutdown_gpt ();
+}
+
+/**
+ * Reset CPU1
+ * This function causes a reset of CPU1 by clearing the CPU0 boot ready bit
+ * in the reset request register RCU_RST_REQ.
+ * It does not change the boot configuration registers for CPU0 or CPU1.
+ *
+ * \return 0 IFX_SUCCESS, cannot fail
+ * \ingroup Internal
+ */
+IFX_void_t ifx_mps_reset (IFX_void_t)
+{
+ /* if VPE1 is already started, stop it */
+ if (vpe1_started)
+ {
+ /* stop software watchdog timer first */
+ vpe1_sw_wdog_stop (0);
+ vpe1_sw_stop (0);
+ vpe1_started = 0;
+ }
+
+ /* reset driver */
+ ifx_mps_reset_structures (pMPSDev);
+ ifx_mps_bufman_close ();
+ return;
+}
+
+/**
+ * Let CPU1 run
+ * This function starts VPE1
+ *
+ * \return none
+ * \ingroup Internal
+ */
+IFX_void_t ifx_mps_release (IFX_void_t)
+{
+ IFX_int_t ret;
+ IFX_int32_t RetCode = 0;
+
+ /* Start VPE1 */
+ if (IFX_SUCCESS !=
+ vpe1_sw_start ((IFX_void_t *)cpu1_base_addr, 0, 0))
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH, (KERN_ERR "Error starting VPE1\r\n"));
+ return;
+ }
+ vpe1_started = 1;
+
+ /* sleep 3 seconds until FW is ready */
+ ret = IFXOS_EventWait (&fw_ready_evt, 3000, &RetCode);
+ if ((ret == IFX_ERROR) && (RetCode == 1))
+ {
+ /* timeout */
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ (KERN_ERR "[%s %s %d]: Timeout waiting for firmware ready.\r\n",
+ __FILE__, __func__, __LINE__));
+ /* recalculate and compare the firmware checksum */
+ ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
+ /* dump exception area on a console */
+ ifx_mps_dump_fw_xcpt(cpu1_base_addr, pFW_img_data);
+ }
+}
+
+/**
+ * WDT callback.
+ * This function is called by BSP (module softdog_vpe) in case if software
+ * watchdog timer expiration is detected by BSP.
+ * This function needs to be registered at BSP as WDT callback using
+ * vpe1_sw_wdog_register_reset_handler() API.
+ *
+ * \return 0 IFX_SUCCESS, cannot fail
+ * \ingroup Internal
+ */
+IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count)
+{
+#ifdef DEBUG
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("MPS: watchdog callback! arg=0x%08x\r\n", wdog_cleared_ok_count));
+#endif /* DEBUG */
+
+ /* reset SmartSLIC is done by FW */
+ /* recalculate and compare the firmware checksum */
+ ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
+
+ /* dump exception area on a console */
+ ifx_mps_dump_fw_xcpt(cpu1_base_addr, pFW_img_data);
+
+ if (IFX_NULL != ifx_wdog_callback)
+ {
+ /* call VMMC driver */
+ ifx_wdog_callback (wdog_cleared_ok_count);
+ }
+ else
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ (KERN_WARNING "MPS: VMMC watchdog timer callback is NULL.\r\n"));
+ }
+ return 0;
+}
+
+/**
+ * Register WDT callback.
+ * This function is called by VMMC driver to register its callback in
+ * the MPS driver.
+ *
+ * \return 0 IFX_SUCCESS, cannot fail
+ * \ingroup Internal
+ */
+IFX_int32_t
+ifx_mps_register_wdog_callback (IFX_int32_t (*pfn) (IFX_uint32_t flags))
+{
+ ifx_wdog_callback = pfn;
+ return 0;
+}
+
+/**
+ Hardware setup on FALC ON
+*/
+void sys_hw_setup (void)
+{
+ /* Set INFRAC register bit 1: clock enable of the GPE primary clock. */
+ sys_gpe_hw_activate (0);
+ /* enable 1.5 V */
+ ltq_w32_mask (0xf, 0x0b, (u32 *)(GPON_SYS1_BASE | 0xbc));
+ /* SYS1-CLKEN:GPTC = 1 and MPS, no longer FSCT = 1 */
+ sys1_hw_activate (ACTS_MPS | ACTS_GPTC);
+ /* GPTC:CLC:RMC = 1 */
+ ltq_w32 (0x00000100, (u32 *)(KSEG1 | 0x1E100E00));
+}
+
+#ifndef VMMC_WITH_MPS
+EXPORT_SYMBOL (ifx_mps_register_wdog_callback);
+#endif /* !VMMC_WITH_MPS */
+
+#endif /* SYSTEM_FALCON */
--- a/src/mps/drv_mps_vmmc_common.c
+++ b/src/mps/drv_mps_vmmc_common.c
@@ -66,6 +66,10 @@ static void inline bsp_mask_and_ack_irq(
# include <asm/ifx/ifx_regs.h>
# include <asm/ifx/ifx_gptu.h>
#endif
+#if defined(SYSTEM_FALCON)
+#include <sys1_reg.h>
+#include <sysctrl.h>
+#endif
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_dbg.h"
@@ -1156,7 +1160,12 @@ IFX_uint32_t ifx_mps_init_structures (mp
mailbox, * upstream and downstream direction. */
memset (
/* avoid to overwrite CPU boot registers */
+#if defined(SYSTEM_FALCON)
+ (IFX_void_t *) MBX_Memory +
+ 2 * sizeof (mps_boot_cfg_reg),
+#else
(IFX_void_t *) MBX_Memory,
+#endif
0,
sizeof (mps_mbx_reg) - 2 * sizeof (mps_boot_cfg_reg));
MBX_Memory->MBX_UPSTR_CMD_BASE =
@@ -2651,7 +2660,6 @@ IFX_void_t ifx_mps_enable_mailbox_int ()
#endif
*IFX_MPS_AD0ENR = Ad0Reg.val;
-
}
/**
@@ -2669,6 +2677,7 @@ IFX_void_t ifx_mps_disable_mailbox_int (
Ad0Reg.fld.cu_mbx = 0;
Ad0Reg.fld.du_mbx = 0;
*IFX_MPS_AD0ENR = Ad0Reg.val;
+
}
/**
@@ -2766,11 +2775,13 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
/* handle only enabled interrupts */
MPS_Ad0StatusReg.val &= *IFX_MPS_AD0ENR;
+#if !defined(SYSTEM_FALCON)
#ifdef LINUX_2_6
bsp_mask_and_ack_irq (irq);
#else /* */
mask_and_ack_danube_irq (irq);
#endif /* */
+#endif /* !defined(SYSTEM_FALCON) */
/* FW is up and ready to process commands */
if (MPS_Ad0StatusReg.fld.dl_end)
{
@@ -2919,11 +2930,13 @@ irqreturn_t ifx_mps_ad1_irq (IFX_int32_t
/* handle only enabled interrupts */
MPS_Ad1StatusReg.val &= *IFX_MPS_AD1ENR;
+#if !defined(SYSTEM_FALCON)
#ifdef LINUX_2_6
bsp_mask_and_ack_irq (irq);
#else /* */
mask_and_ack_danube_irq (irq);
#endif /* */
+#endif /* !defined(SYSTEM_FALCON) */
pMPSDev->event.MPS_Ad1Reg.val = MPS_Ad1StatusReg.val;
/* use callback function or queue wake up to notify about data reception */
@@ -2977,11 +2990,13 @@ irqreturn_t ifx_mps_vc_irq (IFX_int32_t
IFX_MPS_CVC0SR[chan] = MPS_VCStatusReg.val;
/* handle only enabled interrupts */
MPS_VCStatusReg.val &= IFX_MPS_VC0ENR[chan];
+#if !defined(SYSTEM_FALCON)
#ifdef LINUX_2_6
bsp_mask_and_ack_irq (irq);
#else /* */
mask_and_ack_danube_irq (irq);
#endif /* */
+#endif /* !defined(SYSTEM_FALCON) */
pMPSDev->event.MPS_VCStatReg[chan].val = MPS_VCStatusReg.val;
#ifdef PRINT_ON_ERR_INTERRUPT
@@ -3126,6 +3141,7 @@ IFX_int32_t ifx_mps_get_fw_version (IFX_
*/
IFX_return_t ifx_mps_init_gpt ()
{
+#if !defined(SYSTEM_FALCON)
unsigned long flags;
IFX_uint32_t timer_flags, timer, loops = 0;
IFX_ulong_t count;
@@ -3134,7 +3150,11 @@ IFX_return_t ifx_mps_init_gpt ()
#else /* Danube */
timer = TIMER1B;
#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
+#endif
+#if defined(SYSTEM_FALCON)
+ sys_hw_setup ();
+#else
/* calibration loop - required to syncronize GPTC interrupt with falling
edge of FSC clock */
timer_flags =
@@ -3179,7 +3199,7 @@ Probably already in use.\r\n", __FILE__,
#endif /* DEBUG */
IFXOS_UNLOCKINT (flags);
-
+#endif
return IFX_SUCCESS;
}
@@ -3194,6 +3214,9 @@ Probably already in use.\r\n", __FILE__,
*/
IFX_void_t ifx_mps_shutdown_gpt (IFX_void_t)
{
+#if defined(SYSTEM_FALCON)
+ sys1_hw_deactivate (ACTS_MPS);
+#else
IFX_uint32_t timer;
#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
timer = TIMER1A;
@@ -3202,6 +3225,7 @@ IFX_void_t ifx_mps_shutdown_gpt (IFX_voi
#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
ifx_gptu_timer_free (timer);
+#endif
}
/**
--- a/src/mps/drv_mps_vmmc_device.h
+++ b/src/mps/drv_mps_vmmc_device.h
@@ -22,7 +22,12 @@
# include <lantiq_soc.h>
# include <gpio.h>
#define IFXMIPS_MPS_SRAM ((u32 *)(KSEG1 + 0x1F200000))
+#if defined(SYSTEM_FALCON)
+#define IFXMIPS_MPS_BASE_ADDR (KSEG1 + 0x1D004000)
+#else
#define IFXMIPS_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
+#endif
+
#define IFXMIPS_MPS_CHIPID ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0344))
#define IFXMIPS_MPS_VC0ENR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0000))
#define IFXMIPS_MPS_RVC0SR ((u32 *)(IFXMIPS_MPS_BASE_ADDR + 0x0010))
@@ -73,10 +78,11 @@
/* MPS Common defines */
/* ============================= */
-#define MPS_BASEADDRESS 0xBF107000
-#define MPS_RAD0SR MPS_BASEADDRESS + 0x0004
-
+#if defined(SYSTEM_FALCON)
+#define MBX_BASEADDRESS 0xBF200040
+#else
#define MBX_BASEADDRESS 0xBF200000
+#endif
#define VCPU_BASEADDRESS 0xBF208000 /* 0xBF108000 */
/*---------------------------------------------------------------------------*/
#if !defined(CONFIG_LANTIQ)
@@ -118,7 +124,6 @@
/*---------------------------------------------------------------------------*/
#ifdef CONFIG_MPS_EVENT_MBX
-
#define MBX_CMD_FIFO_SIZE 64 /**< Size of command FIFO in bytes */
#define MBX_DATA_UPSTRM_FIFO_SIZE 64
#define MBX_DATA_DNSTRM_FIFO_SIZE 128
@@ -294,6 +299,10 @@ typedef struct
#ifdef CONFIG_MPS_EVENT_MBX
typedef struct
{
+#if defined(SYSTEM_FALCON)
+ mps_boot_cfg_reg MBX_CPU0_BOOT_CFG; /**< CPU0 Boot Configuration */
+ mps_boot_cfg_reg MBX_CPU1_BOOT_CFG; /**< CPU1 Boot Configuration */
+#endif
volatile IFX_uint32_t *MBX_UPSTR_CMD_BASE; /**< Upstream Command FIFO Base Address */
volatile IFX_uint32_t MBX_UPSTR_CMD_SIZE; /**< Upstream Command FIFO size in byte */
volatile IFX_uint32_t *MBX_DNSTR_CMD_BASE; /**< Downstream Command FIFO Base Address */
@@ -317,13 +326,19 @@ typedef struct
volatile IFX_uint32_t MBX_UPSTR_EVENT_WRITE; /**< Upstream Event FIFO Write Index */
volatile IFX_uint32_t MBX_EVENT[MBX_EVENT_DATA_WORDS];
volatile IFX_uint32_t reserved[4];
+#if !defined(SYSTEM_FALCON)
mps_boot_cfg_reg MBX_CPU0_BOOT_CFG; /**< CPU0 Boot Configuration */
mps_boot_cfg_reg MBX_CPU1_BOOT_CFG; /**< CPU1 Boot Configuration */
+#endif
} mps_mbx_reg;
#else /* */
typedef struct
{
+#if defined(SYSTEM_FALCON)
+ mps_boot_cfg_reg MBX_CPU0_BOOT_CFG; /**< CPU0 Boot Configuration */
+ mps_boot_cfg_reg MBX_CPU1_BOOT_CFG; /**< CPU1 Boot Configuration */
+#endif
volatile IFX_uint32_t *MBX_UPSTR_CMD_BASE; /**< Upstream Command FIFO Base Address */
volatile IFX_uint32_t MBX_UPSTR_CMD_SIZE; /**< Upstream Command FIFO size in byte */
volatile IFX_uint32_t *MBX_DNSTR_CMD_BASE; /**< Downstream Command FIFO Base Address */
@@ -341,8 +356,10 @@ typedef struct
volatile IFX_uint32_t MBX_DNSTR_DATA_READ; /**< Downstream Data FIFO Read Index */
volatile IFX_uint32_t MBX_DNSTR_DATA_WRITE; /**< Downstream Data FIFO Write Index */
volatile IFX_uint32_t MBX_DATA[MBX_DATA_WORDS];
+#if !defined(SYSTEM_FALCON)
mps_boot_cfg_reg MBX_CPU0_BOOT_CFG; /**< CPU0 Boot Configuration */
mps_boot_cfg_reg MBX_CPU1_BOOT_CFG; /**< CPU1 Boot Configuration */
+#endif
} mps_mbx_reg;
#endif /* CONFIG_MPS_EVENT_MBX */
--- a/src/drv_api.h
+++ b/src/drv_api.h
@@ -183,7 +183,7 @@
#endif
/* TAPI FXS Phone Detection feature is not available for Danube platform */
-#if defined(TAPI_PHONE_DETECTION) && (defined(SYSTEM_AR9) || defined(SYSTEM_VR9))
+#if defined(TAPI_PHONE_DETECTION) && (defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON))
#define VMMC_CFG_ADD_FEAT_PHONE_DETECTION VMMC_FEAT_PHONE_DETECTION
#else
#define VMMC_CFG_ADD_FEAT_PHONE_DETECTION 0
--- a/src/drv_vmmc_alm.c
+++ b/src/drv_vmmc_alm.c
@@ -800,7 +800,7 @@ IFX_void_t VMMC_ALM_Free_Ch_Structures (
}
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/**
Check whether SmartSLIC is connected
@@ -836,7 +836,7 @@ IFX_boolean_t VMMC_ALM_SmartSLIC_IsConne
#endif /*SYSTEM_AR9 || SYSTEM_VR9*/
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/**
Read the number of channels on the SmartSLIC.
@@ -1876,7 +1876,7 @@ IFX_int32_t VMMC_TAPI_LL_ALM_VMMC_Test_L
/* write updated message contents */
ret = CmdWrite (pDev, (IFX_uint32_t *)((IFX_void_t *)&debugCfg),
DCCTL_CMD_LEN);
-#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#elif defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
IFX_uint32_t dcctrlLoop[2];
IFX_uint32_t ch = (IFX_uint32_t)(pCh->nChannel - 1);
--- a/src/drv_vmmc_alm.h
+++ b/src/drv_vmmc_alm.h
@@ -65,7 +65,7 @@ extern IFX_void_t irq_VMMC_ALM_LineDisab
extern IFX_void_t VMMC_ALM_CorrectLinemodeCache (VMMC_CHANNEL *pCh,
IFX_uint16_t lm);
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
extern IFX_boolean_t VMMC_ALM_SmartSLIC_IsConnected (
VMMC_DEVICE *pDev);
--- a/src/drv_vmmc_init.c
+++ b/src/drv_vmmc_init.c
@@ -52,15 +52,6 @@
#include "ifx_pmu.h"
#endif /* PMU_SUPPORTED */
-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
-# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
-# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
-# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
-# define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
-# define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
-# define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
-#endif
-
/* ============================= */
/* Local Macros & Definitions */
/* ============================= */
@@ -820,7 +811,7 @@ static IFX_int32_t VMMC_TAPI_LL_FW_Init(
MIN_FW_HOTFIXSTEP};
IFX_uint8_t tmp1, tmp2;
IFX_TAPI_RESOURCE nResource;
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
IFX_uint8_t nChannels, nFXOChannels;
#endif /*SYSTEM_AR9 || SYSTEM_VR9*/
IFX_int32_t ret = VMMC_statusOk;
@@ -874,7 +865,7 @@ static IFX_int32_t VMMC_TAPI_LL_FW_Init(
pDev->bSmartSlic = IFX_FALSE;
pDev->bSlicSupportsIdleMode = IFX_FALSE;
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
if (VMMC_SUCCESS(ret))
{
/* Reduce the number of ALM channels in the capabilities if the SLIC
--- a/src/drv_vmmc_ioctl.c
+++ b/src/drv_vmmc_ioctl.c
@@ -273,7 +273,7 @@ IFX_int32_t VMMC_Dev_Spec_Ioctl (IFX_TAP
case FIO_GET_VERS:
{
VMMC_IO_VERSION *pVers;
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
VMMC_SDD_REVISION_READ_t *pSDDVersCmd = IFX_NULL;
#endif /*SYSTEM_AR9 || SYSTEM_VR9*/
SYS_VER_t *pCmd;
@@ -322,7 +322,7 @@ IFX_int32_t VMMC_Dev_Spec_Ioctl (IFX_TAP
pVers->nTapiVers = 3;
pVers->nDrvVers = MAJORSTEP << 24 | MINORSTEP << 16 |
VERSIONSTEP << 8 | VERS_TYPE;
-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9) || defined(SYSTEM_FALCON)
/* in case of SmartSLIC based systems, we can give some more
versions.*/
if (VMMC_ALM_SmartSLIC_IsConnected(pDev))