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generic: net: phy: realtek: work-around hang on SerDes setup

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On some but not all devices using the RTL8221B 2.5GBit/s PHY the SerDes
setup sequence may hang under some circumstances (eg. <2500M link
partner present during boot).

RTL8221B-VB-CG 2.5Gbps PHY (C45) mdio-bus:01: rtl822xb_config_init failed: -110

Work-around the issue by performing a hardware reset and subsequent
retry of the SerDes setup, which seems to always succeed.

Doing this requires moving ALDPS setup to config_init (which is anyway
the better place for that) as it otherwise doesn't survive the reset.

Also disable listening on MDIO address 0 which may be used by other PHYs
despite being spec'ed as "broadcast address", as bus activity on address
0 may otherwise confuse the RealTek PHY for good reasons.

Tested-by: Luis Mita <luis@luismita.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle
2025-01-30 05:49:43 +00:00
parent 17f8a197f3
commit c87a767801
7 changed files with 138 additions and 115 deletions
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42
target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch Normal file
View File

@@ -0,0 +1,42 @@
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
+ if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
+ ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ else
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ if (ret < 0)
+ return ret;
+
/* Disable SGMII AN */
ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
if (ret < 0)