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realtek: fix egress L2 learning on rtl839x

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The flag to enable L2 address learning on egress frames is in CPU header
bit 40, with bit 0 being the leftmost bit of the header. This
corresponds to BIT(7) in the third 16-bit value of the header.

Correctly set L2LEARNING by fixing the off-by-one error.

Fixes: 9eab76c84e ("realtek: Improve TX CPU-Tag usage")
Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This commit is contained in:
Sander Vanheule
2022-06-28 21:15:00 +02:00
parent d9516cacb0
commit d6165ea75b
1 changed files with 1 additions and 1 deletions
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2
target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
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@@ -127,7 +127,7 @@ static void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
h->cpu_tag[5] = BIT(dest_port) & 0xffff; h->cpu_tag[5] = BIT(dest_port) & 0xffff;
} }
h->cpu_tag[2] |= BIT(4); // Enable destination port mask use h->cpu_tag[2] |= BIT(4); // Enable destination port mask use
h->cpu_tag[2] |= BIT(8); // Enable L2 Learning h->cpu_tag[2] |= BIT(7); // Enable L2 Learning
// Set internal priority and AS_PRIO // Set internal priority and AS_PRIO
if (prio >= 0) if (prio >= 0)
h->cpu_tag[1] |= prio | BIT(3); h->cpu_tag[1] |= prio | BIT(3);