mediatek: add support for CMCC A10
This board is also as known as SuperElectron ZN-M5 and ZN-M8. However,
for ZN-M5 and ZN-M8, there's another version uses ZX279128 as CPU
chip, which is unsupported.
You can check it in "高级设置" > "系统日志" > "内核日志" page from webUI.
Hardware specification:
SoC: MediaTek MT7981B 2x A53
Flash: 128 MB SPI-NAND
RAM: 256MB
Ethernet: 4x 10/100/1000 Mbps
Switch: MediaTek MT7531AE
WiFi: MediaTek MT7976C
Button: Reset, WPS
Power: DC 12V 1A
Stock layout flash instructions:
Login into webUI and upload sysupgrade firmware in "系统管理" > "升级固件" page.
Remember to unselect "保留配置" ("Keep configurations") first before doing that.
OpenWrt U-Boot layout flash instructions:
1. Flash stock layout firmware first.
2. Connect to the device via SSH, and backup everything,
especially 'Factory' partition.
3. Unlock MTD partitions:
opkg update && opkg install kmod-mtd-rw
insmod mtd-rw i_want_a_brick=1
4. Write new BL2 and FIP:
mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin BL2
mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip FIP
5. Set static IP on your PC:
IP 192.168.1.254/24, GW 192.168.1.1
6. Serve OpenWrt initramfs image using TFTP server.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt has booted, perform sysupgrade.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/18121
(cherry picked from commit 96c6608346)
[sync uboot defconfigs with 24.10 branch, change apk to opkg]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/18218
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Tianling Shen
committed by
Hauke Mehrtens
Hauke Mehrtens
parent
3da9786da3
commit
df8679e29f
40
target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts
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40
target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts
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@@ -0,0 +1,40 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981b-cmcc-a10.dtsi"
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/ {
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model = "CMCC A10 (stock layout)";
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compatible = "cmcc,a10-stock", "mediatek,mt7981";
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};
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&partitions {
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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partition@4580000 {
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label = "firmware_backup";
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reg = <0x4580000 0x2000000>;
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read-only;
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};
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partition@6580000 {
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label = "zrsave";
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reg = <0x6580000 0x100000>;
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read-only;
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};
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partition@6680000 {
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label = "config2";
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reg = <0x6680000 0x100000>;
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read-only;
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};
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};
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&spi_nand {
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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};
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28
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
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28
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
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@@ -0,0 +1,28 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981b-cmcc-a10.dtsi"
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/ {
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model = "CMCC A10 (OpenWrt U-Boot layout)";
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compatible = "cmcc,a10-ubootmod", "mediatek,mt7981";
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};
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&chosen {
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bootargs = "root=/dev/fit0 rootwait";
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rootdisk = <&ubi_rootdisk>;
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};
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&partitions {
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partition@580000 {
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compatible = "linux,ubi";
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label = "ubi";
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reg = <0x580000 0x7a80000>;
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volumes {
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ubi_rootdisk: ubi-volume-fit {
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volname = "fit";
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};
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};
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};
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};
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254
target/linux/mediatek/dts/mt7981b-cmcc-a10.dtsi
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254
target/linux/mediatek/dts/mt7981b-cmcc-a10.dtsi
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@@ -0,0 +1,254 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7981.dtsi"
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/ {
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aliases {
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led-boot = &boot_led;
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led-failsafe = &boot_led;
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led-running = &running_led;
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led-upgrade = &running_led;
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serial0 = &uart0;
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};
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chosen: chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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reg = <0 0x40000000 0 0x10000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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running_led: led-1 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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boot_led: led-2 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_factory_2a 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions: partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_a: macaddr@a {
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compatible = "mac-base";
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reg = <0xa 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_24: macaddr@24 {
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compatible = "mac-base";
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reg = <0x24 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_2a: macaddr@2a {
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compatible = "mac-base";
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reg = <0x2a 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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nvmem-cells = <&macaddr_factory_24 0>;
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nvmem-cell-names = "mac-address";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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status = "okay";
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band@1 {
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reg = <1>;
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nvmem-cells = <&macaddr_factory_a 0>;
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nvmem-cell-names = "mac-address";
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};
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};
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@@ -30,6 +30,8 @@ mediatek_setup_interfaces()
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;;
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asus,rt-ax59u|\
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cetron,ct3003|\
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cmcc,a10-stock|\
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cmcc,a10-ubootmod|\
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confiabits,mt7981|\
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cudy,wr3000-v1|\
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jcg,q30-pro|\
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@@ -71,6 +71,7 @@ platform_do_upgrade() {
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bananapi,bpi-r3-mini|\
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bananapi,bpi-r4|\
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bananapi,bpi-r4-poe|\
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cmcc,a10-ubootmod|\
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cmcc,rax3000m|\
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gatonetworks,gdsp|\
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h3c,magic-nx30-pro|\
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@@ -500,6 +500,61 @@ define Device/cetron_ct3003
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endef
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TARGET_DEVICES += cetron_ct3003
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define Device/cmcc_a10-stock
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := A10 (stock layout)
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DEVICE_ALT0_VENDOR := SuperElectron
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DEVICE_ALT0_MODEL := ZN-M5 (stock layout)
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DEVICE_ALT1_VENDOR := SuperElectron
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DEVICE_ALT1_MODEL := ZN-M8 (stock layout)
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DEVICE_DTS := mt7981b-cmcc-a10-stock
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DEVICE_DTS_DIR := ../dts
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SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
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DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 65536k
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KERNEL_IN_UBI := 1
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IMAGES += factory.bin
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IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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KERNEL = kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
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KERNEL_INITRAMFS = kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
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endef
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TARGET_DEVICES += cmcc_a10-stock
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define Device/cmcc_a10-ubootmod
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := A10 (OpenWrt U-Boot layout)
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DEVICE_ALT0_VENDOR := SuperElectron
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DEVICE_ALT0_MODEL := ZN-M5 (OpenWrt U-Boot layout)
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DEVICE_ALT1_VENDOR := SuperElectron
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DEVICE_ALT1_MODEL := ZN-M8 (OpenWrt U-Boot layout)
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DEVICE_DTS := mt7981b-cmcc-a10-ubootmod
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DEVICE_DTS_DIR := ../dts
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SUPPORTED_DEVICES += cmcc,a10
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DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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KERNEL_IN_UBI := 1
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UBOOTENV_IN_UBI := 1
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IMAGES := sysupgrade.itb
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KERNEL_INITRAMFS_SUFFIX := -recovery.itb
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KERNEL := kernel-bin | gzip
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KERNEL_INITRAMFS := kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
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IMAGE/sysupgrade.itb := append-kernel | \
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fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
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ARTIFACTS := preloader.bin bl31-uboot.fip
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ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
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ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot cmcc_a10
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endef
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TARGET_DEVICES += cmcc_a10-ubootmod
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define Device/cmcc_rax3000m
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := RAX3000M
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Reference in New Issue
Block a user