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ipq807x: rename target to qualcommax

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Currently, ipq807x only covers Qualcomm IPQ807x SoC-s.
However, Qualcomm also has IPQ60xx and IPQ50xx SoC-s under the AX WiSoC-s
and they share a lot of stuff with IPQ807x, especially IPQ60xx so to avoid
duplicating kernel patches and everything lets make a common target with
per SoC subtargets.

Start doing that by renaming ipq807x to qualcommax so that dependencies
on ipq807x target can be updated.

Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Robert Marko
2023-06-11 19:32:52 +02:00
committed by Christian Marangi
parent de9955a62f
commit f02f6aaa8d
86 changed files with 12 additions and 12 deletions
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70
target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch Normal file
View File

@@ -0,0 +1,70 @@
From ad2d07f71739351eeea1d8a120c0918e2c4b265f Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 22 Dec 2021 12:23:34 +0100
Subject: [PATCH] arm64: dts: ipq8074: add reserved memory nodes
IPQ8074 has multiple reserved memory ranges, if they are not defined
then weird things tend to happen, board hangs and resets when PCI or
WLAN is used etc.
So, to avoid all of that add the reserved memory nodes from the downstream
5.4 kernel from QCA.
This is their default layout meant for devices with 1GB of RAM, but
devices with lower ammounts can override the Q6 node.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 35 +++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -85,6 +85,26 @@
#size-cells = <2>;
ranges;
+ nss@40000000 {
+ no-map;
+ reg = <0x0 0x40000000 0x0 0x01000000>;
+ };
+
+ tzapp_region: tzapp@4a400000 {
+ no-map;
+ reg = <0x0 0x4a400000 0x0 0x00200000>;
+ };
+
+ uboot@4a600000 {
+ no-map;
+ reg = <0x0 0x4a600000 0x0 0x00400000>;
+ };
+
+ sbl@4aa00000 {
+ no-map;
+ reg = <0x0 0x4aa00000 0x0 0x00100000>;
+ };
+
smem@4ab00000 {
compatible = "qcom,smem";
reg = <0x0 0x4ab00000 0x0 0x00100000>;
@@ -97,6 +117,21 @@
no-map;
reg = <0x0 0x4ac00000 0x0 0x00400000>;
};
+
+ q6_region: wcnss@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x05f00000>;
+ };
+
+ q6_etr_region: q6_etr_dump@50f00000 {
+ no-map;
+ reg = <0x0 0x50f00000 0x0 0x00100000>;
+ };
+
+ m3_dump_region: m3_dump@51000000 {
+ no-map;
+ reg = <0x0 0x51000000 0x0 0x100000>;
+ };
};
firmware {