The RTL8214FC currently uses generic PHY functions. That makes it look like a copper
device. Switching to/from fibre works fortunately but the autonegotiation handling
still works on MII_LPA (PHY register 5) as if a copper link is used. Fix that by
- advertising a superset of TP/FIBRE features
- using clause 37 functions when on fibre
Additionally enhance the code of the driver to assist further development.
- log the speed of the inserted module to detect wrongly inserted 10gbase-r modules
- order phy driver functions alphabetically (keep match/name on top)
- remove genphy_loopback as the kernel uses it if not provided
Remark! The driver internally uses PORT_MII for the TP port. Align with that and
report MII to ethtool instead of TP. Other drivers do the same and it can be
changed in the future if needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18724
Signed-off-by: Robert Marko <robimarko@gmail.com>
When many multicast entries are installed broadcast flooding might
potentially stop working for several ports. This is because the layer
2 broadcast flood port mask index has the wrong offset. It should be
9 bits, matching the 2^9 = 512 indexes on rtl838x, not 12.
The wrong offset leads to L2_BC_FLD_PMSK being set to 504, not 511
((511 << 12) >> 9) & 511 = 504). So, as by default an unset PMSK
is set to all ports, the issue would only become noticeable once
many multicast entries are installed, causing the 504th entry to be set
to something other than all ports.
Fixing this by setting the offset to 9 bits, to correctly point to our
511th reserved entry for all ports.
Tested-on: ZyXEL GS1900-24HP v1
Fixes: 28e972b2ea ("realtek: Configure initial L2 learning setup")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/18733
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some DTS files have a qsgmii link mode for the CPU port. This does
not harm but it is wrong. The CPU port of the realtek switch is always
directly connected to the switch by some unknown wiring and should
therefore be described as internal. Align the wrongly defined DTS
files to the standard.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18691
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit d7e82c78d7 added a generic kernel patch that exposes a new
symbol REALTEK_PHY_HWMON when REALTEK_PHY and HWMON are enabled. The new
symbol was added to kmod-phy-realtek, but the kmod is not used in the
realtek target.
Fixes: d7e82c78d7 ("generic: backport Realtek PHY patches from upstream")
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Probing of the RTL8214FC on RTL839x is currently very strange.
- On RTL8393 nothing is detected and only generic PHY is reported
- On RTL8392 the port 1 is not detected while port 2-4 seem to work
Someone left a special RTL8393 detection rules that seems to indicate
that the we probe the internal SerDes instead. That is not true. Since
upgrade to kernel 6.6 the RTL8218/RTL8214FC detection is 100% accurate
and probing functions are only called when really needed.
Fix the issue by removing the condition. For now do PHY patching only
on the RTL838x where it already worked before.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18671
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The ATS SFP GT-T quirk patch was backported to stable kernel 6.6 but
was not notice while bumping the kernel version as they listed the quirk
at the bottom of the SFP quirk table while our hack patch put it at the
top.
With migrating to the upstream version, the duplication was made more
apparent.
Drop the double entry for the SFP module as it's already there and not
needed and refresh patches.
Link: https://github.com/openwrt/openwrt/pull/18484
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Move all patch that got merged upstream from pending to backport and add
related tag. This is to make it easier to update to kernel 6.12.
Patch 680 required some special care as the upstream version had to be
split in a series of 6 patch.
Referesh all affected patch.
Link: https://github.com/openwrt/openwrt/pull/18464
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This patch adds support for D-Link DGS-1210-26 rev. F1
Hardware specification
----------------------
* RTL8382M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DRAM
* 32MB NOR Flash (MX25L25635E)
* 24 x 10/100/1000BASE-T ports
* 2 x SFP ports
* Power LED
* Reset button on front panel
Installation using OEM webinterface
-----------------------------------
1. Make sure you are running OEM firmware from secondary slot. If not, switch to image2 using the menus
System > Firmware Information > Boot from image2
Tools > reboot
2. Upload image squashfs-factory_image1.bin via Tools > Backup / Upgrade Firmware > image1
3. Toggle startup image via System > Firmware Information > Boot from image1
4. Tools > reboot
Known working firmware version for this procedure: 6.20.007
Installation using TFTP and serial console
------------------------------------------
1. Prepare a TFTP server with the OpenWrt *initramfs-kernel.bin and assign it an IP from 10.90.90.0/24 (except 10.90.90.90)
2. Connect the TFTP server to one of switch's ports
3. Connect to the serial console (115200 baud) and power on the switch
4. Press the ESC key once you see "Hit Esc key to stop autoboot" in the console output
5. Press CTRL+C keys to get into the real U-Boot prompt
6. Init the network with the command "rtk network on"
7. Load the OpenWrt image with the command "tftpboot 0x8f000000 <TFTP_SERVER_IP>:<IMAGE_FILE>"
(<TFTP_SERVER_IP> is the TFTP server's IP, e.g. 10.90.90.100; <IMAGE_FILE> is the name of the image provided by the TFTP server)
8. Boot the OpenWrt image with the command "bootm"
9. Browse to https://192.168.1.1/cgi-bin/luci/admin/system/flash
10. Upload the the OpenWrt *squashfs-sysupgrade.bin to the switch
11. Wait for it to reboot
Signed-off-by: Christian Steiner <christian.steiner@outlook.de>
Link: https://github.com/openwrt/openwrt/pull/18378
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The CONFIG_NET_SWITCHDEV option is needed by CONFIG_DSA and some other
options. It is boolean, we have to compile it into the kernel it self.
Activate it for all targets in the generic configuration, it is already
activated for most of them. This allows to install DSA drivers as a
module.
On the ramips/mt7620 target the kernel would grown by 4.5kB.
For some small targets which do not support a DSA switch by default the
option is deactivated.
Link: https://github.com/openwrt/openwrt/pull/17668
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This fixes the handling of some FS copper SFP modules using the RollBall
protocol and needing some extra treatment.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Some devices have both the color/function and label property defined.
The label can be constructed from the former properties, making it
redundant.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This makes sgmii work for 1000Base-T SFPs by stupidly adding the sgmii mode
wherever 1000base-x is accepted. No intelligence has been used in the
process. But it "works for me".
There is an obvious need for refactoring this code to make it more obvious
how and why we configure the mac/phy link like we do for different modes.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This driver use "phy-handle" as a placeholder for mac configuration
data. Such handles are therefore required for all ports - even those
connected directly to SFP slots and having a managed property set to
"in-band-status".
The DSA core will register these nodes as if they are real phys. This
prevents later attachment of pluggable phys with errors like
sfp sfp-p8: sfp_add_phy failed: -EBUSY
Replace the virtual SFP slot handles with "pseudo-phy-handle" to keep
the driver logic as-is but hide the node from the DSA core.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The log noise emmitted by this driver is overwhelming, even for developers
looking at specific issues. Demoting to debug allows individual messages
to be dynamically enabled instead.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Adding a static IPv4 route made the driver repeatedly print
rtl83xx_l3_nexthop_update: Setting up fwding: ip 192.168.1.42, GW mac 0000001b21a7xxxx
Route with id 3 to 192.168.99.0 / 24
rtl83xx_l3_nexthop_update: total packets: 0
Warning: TEMPLATE_FIELD_RANGE_CHK: not configured
These messages are only useful to developers while debugging offloading.
Demote to debug level, which in general is more useful for developers
by allowing precise dynamic control.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Both hardware and firmware of these devices appears identical except for the
manufacturers logo and device name. The documented XikeStor SKS8300-8X
installation method is verified to work on the ONTi ONT-S508CL-8S using
Openwrt images made for the XikeStor SKS8300-8X. This includes the OEM boot
loader magic password phrases.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/18071
Signed-off-by: Sander Vanheule <sander@svanheule.net>
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The JG928A has an RTL8231 on the aux mdio bus. Add it to dts to expose
the GPIO pins used to control and monitor the fan speed. To enable speed
control, add the appropriate kernel driver module to DEVICE_PACKAGES.
Of note, this does not control all fans for the unit. The power supply
fans are not controlled.
Signed-off-by: Evan Jobling <evan@jobling.au>
Link: https://github.com/openwrt/openwrt/pull/17699
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The old RTL8231 driver integrated the MDIO bus access with the GPIO
control ops, making this driver not very portable to newer platforms.
It depended on the SoC ID instead of the compatible to determine the
MDIO access register, further complicating portability.
A new MFD driver is now available, which offers proper pin config as
well as optional LED support, which can work on any (bitbanged) MDIO
bus. Now that all devices have been migrated, we can drop the old code.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Switch the implementation for the RTL8231 GPIO expander to the new
driver.
This allows specifying the GPIO driving the RTL8231's reset as a proper
MDIO reset line, so the gpio-hog can be dropped. Since it was pinned at
a high level, the reset line is actually active-low (i.e. high when not
in reset).
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Update the common external GPIO DTSI file for the DGS-1210 devices to
use an MDIO device on the auxilairy MDIO bus, as the original driver was
doing behind the screen.
Switching to the new driver will allow for full pin-control and will no
longer reset pin config set by the bootloader.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The DTS file for the DGS-1210-10P is slightly different from the other
DGS-1210 devices, in that it didn't specify a gpio-restart node when it
was added. The gpio-restart has been found to work on the DGS-1210-10P
as well, so switch it over to the common definitions.
This converts the last device from the product family to the common
definition for the (external) GPIOs.
Tested-by: Michel Thill <jmthill@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The 'indirect-access-id' property on gpio0 is a remnant from the
original GPIO driver. This property has not been relevant on the SoC's
embedded GPIO controller for a long time, so just drop it.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Change devices with RTL8231 GPIO expander definition that can easily be
translated to the new RTL8231 binding and carry over any gpio-hogs. This
will let them use the new RTL8231 MFD driver, without any functional
changes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Zyxel GS1900-8 v2 devices have been produced more recently than v1
devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
safely be assumed that all v2 devices will also have a recent SoC
revision, supporting the hardware auxiliary MDIO controller.
Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
compatibility with devices containing an RTL8380M rev. A.
Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
an RTL8380M rev. B or C will also be able to use the (more efficient) v2
image. This includes any currently functioning device with OpenWrt, so
include the old compatible as a supported device for the GS1900-8 v2.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The mdio-gpio driver is required to support early revision of RTL8380M
slicon (rev A) where the auxilairy MDIO controller does not function
correctly. Add this driver to the rtl838x kernel so devices with old
SoCs are also able to function correctly.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
In order to be able to define the external GPIO controller on an
emulated MDIO bus, move the controller definition outside of the main
GS1900 include for RTL838x-based devices.
Additionally, a new DTSI is provided defining the RTL8231 on the
emulated MDIO bus.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Some RTL8380M-based devices have been around for a long time and use an
early A revision of the RTL8380M SoC. This revision has an issue with
the auxiliary MDIO controller, causing it to malfunction. This may lead
to device reboots when the controller is used.
Provide a bit-banged MDIO bus, which muxes the auxiliary MDIO pins to
their GPIO function. Although this will result in lower performance,
there should otherwise be no functional differences.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
As the bootloader is reconfiguring the RTL8231 on these devices anyway,
no pin state can be maintained over warm reboots. This results in for
example the PoE disable pin always being asserted by the bootloader.
Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem
will also reset the expander on boot and ensure the line in the correct
state.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Supported devices are listed in the metadata as the first part of the
DTS compatible. This normally follows the format "vendor,device".
When updating the device name of the 180W 1920-8G PoE an underscore was
used, instead of a comma, to join the vendor and device name. This will
lead to warnings for users wanting to sysupgrade a device with an older
compatible, as the device's info does not match the one the metadata.
Fixes: 987c96e889 ("realtek: rename hpe,1920-8g-poe to match hardware")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
XikeStor (Seeker) SKS8300-8X is a 8 ports Multi-Gig switch, based on
RTL9303.
Specification:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Winbond W25Q256JVFIQ)
- Ethernet : 8x 1/2.5/10 Gbps (SFP+)
- LEDs/Keys (GPIO): 1x/1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 9600n8
- Watchdog : Diodes PT7A7514WE
- Power : 12 VDC, 2 A
Flash instruction using initramfs image:
1. Prepare TFTP server with an IP address "192.168.2.36"
2. Connect your PC to Port1 on SKS8300-8X
3. Power on SKS8300-8X and interrupt by Ctrl + B
4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env"
5. Login to the U-Boot CLI by "debug_unish_env" command
6. Enable Port1 with the following commands
rtk 10g 0 fiber1g (or fiber10g if 10GBase-*R)
rtk ext-devInit 0
rtk ext-pinSet 2 0
Note: the last command sets tx-disable to low
7. Download initramfs image from TFTP server
tftpboot 0x82000000 <image name>
8. Boot with the downloaded image
bootm
9. On the initramfs image, backup the stock firmware if needed
10. Upload (or download) sysupgrade image to the device
11. Erase "firmware" partition to cleanup JFFS2 of stock FW
mtd erase firmware
12. Perform sysupgrade with the sysupgrade image
13. Wait ~120 sec to complete flashing
Notes:
- A kernel binary "nos.img" needs to be stored into JFFS2 filesystem
using 4KiB erase block instead of 64KiB.
- PT7A7514WE is handled by hardware-assited system LED output
(blinking).
- Some Japanese users asked to XikeStor about maximum power limit of
SFP+ ports and got approximate criteria:
- per port : <= 2.9 W
- total (8 ports): <= 15.8 W
MAC addresses:
eth0 : 84:E5:D8:xx:xx:37 (board-info (stock:"flash_raw"), 0x218 (hex))
(ports): 84:E5:D8:xx:xx:36 (board-info (stock:"flash_raw"), 0x1f1 (hex))
Reverting to stock firmware:
1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it
Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
erase size and not usable for SKS8300-8X
2. Create a directory for working
3. Download official firmware for SKS8300-8X from XikeStor's official
website
4. Rename the downloaded firmware to "nos.img" and place it to the
working directory
5. Create a JFFS2 filesystem binary with the working directory
/path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
-o nos.img.jffs2 -d /path/to/working/dir/
6. Upload the created JFFS2 filesystem binary to the device
7. Erase the "firmware" partition
mtd erase firmware
8. Write the JFFS2 filesystem binary to the "firmware" partition
mtd write /path/to/nos.img.jffs2 firmware
9. After writing, reboot the device by power cycle
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17593
Signed-off-by: Sander Vanheule <sander@svanheule.net>
