3ba4a4e32c
The ar8216 switch driver supports exposing configuration of AR8327 and AR8337 switch LEDs to the userspace, however it is only configurable through platform data, causing the devices ported from ar71xx target to lack the support. Since there is still a long way to go until we can migrate the target to qca8k, an interim solution is needed. Extend ar8327_hw_config_of function to parse a "leds" subnode, which will populate the missing platform data based on device tree contents, and restore the existing support for the LEDs. Standard bindings apply, mapping "reg" property to LED index, with addition of "qca,led-mode" property, which selects HW (0) or SW (1) mode, defaulting to HW mode. Signed-off-by: Lech Perczak <lech.perczak@gmail.com> Link: https://github.com/openwrt/openwrt/pull/12487 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
135 lines
2.8 KiB
C
135 lines
2.8 KiB
C
/*
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* AR8216 switch driver platform data
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*
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* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef AR8216_PLATFORM_H
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#define AR8216_PLATFORM_H
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enum ar8327_pad_mode {
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AR8327_PAD_NC = 0,
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AR8327_PAD_MAC2MAC_MII,
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AR8327_PAD_MAC2MAC_GMII,
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AR8327_PAD_MAC_SGMII,
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AR8327_PAD_MAC2PHY_MII,
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AR8327_PAD_MAC2PHY_GMII,
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AR8327_PAD_MAC_RGMII,
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AR8327_PAD_PHY_GMII,
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AR8327_PAD_PHY_RGMII,
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AR8327_PAD_PHY_MII,
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};
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enum ar8327_clk_delay_sel {
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AR8327_CLK_DELAY_SEL0 = 0,
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AR8327_CLK_DELAY_SEL1,
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AR8327_CLK_DELAY_SEL2,
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AR8327_CLK_DELAY_SEL3,
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};
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struct ar8327_pad_cfg {
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enum ar8327_pad_mode mode;
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bool rxclk_sel;
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bool txclk_sel;
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bool pipe_rxclk_sel;
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bool txclk_delay_en;
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bool rxclk_delay_en;
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bool sgmii_delay_en;
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enum ar8327_clk_delay_sel txclk_delay_sel;
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enum ar8327_clk_delay_sel rxclk_delay_sel;
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bool mac06_exchange_dis;
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};
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enum ar8327_port_speed {
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AR8327_PORT_SPEED_10 = 0,
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AR8327_PORT_SPEED_100,
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AR8327_PORT_SPEED_1000,
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};
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struct ar8327_port_cfg {
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int force_link:1;
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enum ar8327_port_speed speed;
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int txpause:1;
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int rxpause:1;
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int duplex:1;
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};
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struct ar8327_sgmii_cfg {
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u32 sgmii_ctrl;
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bool serdes_aen;
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};
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struct ar8327_led_cfg {
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u32 led_ctrl0;
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u32 led_ctrl1;
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u32 led_ctrl2;
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u32 led_ctrl3;
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bool open_drain;
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};
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enum ar8327_led_num {
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AR8327_LED_PHY0_0 = 0,
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AR8327_LED_PHY0_1,
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AR8327_LED_PHY0_2,
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AR8327_LED_PHY1_0,
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AR8327_LED_PHY1_1,
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AR8327_LED_PHY1_2,
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AR8327_LED_PHY2_0,
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AR8327_LED_PHY2_1,
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AR8327_LED_PHY2_2,
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AR8327_LED_PHY3_0,
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AR8327_LED_PHY3_1,
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AR8327_LED_PHY3_2,
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AR8327_LED_PHY4_0,
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AR8327_LED_PHY4_1,
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AR8327_LED_PHY4_2,
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};
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enum ar8327_led_mode {
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AR8327_LED_MODE_HW = 0,
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AR8327_LED_MODE_SW,
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};
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struct ar8327_led_info {
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const char *name;
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const char *default_trigger;
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bool active_low;
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enum ar8327_led_num led_num;
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enum ar8327_led_mode mode;
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struct fwnode_handle *fwnode;
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};
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#define AR8327_LED_INFO(_led, _mode, _name) { \
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.name = (_name), \
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.led_num = AR8327_LED_ ## _led, \
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.mode = AR8327_LED_MODE_ ## _mode \
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}
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struct ar8327_platform_data {
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struct ar8327_pad_cfg *pad0_cfg;
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struct ar8327_pad_cfg *pad5_cfg;
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struct ar8327_pad_cfg *pad6_cfg;
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struct ar8327_sgmii_cfg *sgmii_cfg;
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struct ar8327_port_cfg port0_cfg;
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struct ar8327_port_cfg port6_cfg;
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struct ar8327_led_cfg *led_cfg;
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int (*get_port_link)(unsigned port);
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unsigned num_leds;
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const struct ar8327_led_info *leds;
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};
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#endif /* AR8216_PLATFORM_H */
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