41b0340ff0
RTL93xx devices have a NAND controller built in. Upstream already has a driver in place. Include it downstream. Activate it in the RTL93xx builds and disable it for the RTL83xx builds. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/19583 Signed-off-by: Robert Marko <robimarko@gmail.com>
97 lines
2.8 KiB
Diff
97 lines
2.8 KiB
Diff
From 25d284715845a465a1a3693a09cf8b6ab8bd9caf Mon Sep 17 00:00:00 2001
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From: Chris Packham <chris.packham@alliedtelesis.co.nz>
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Date: Thu, 31 Oct 2024 08:49:20 +1300
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Subject: [PATCH] spi: spi-mem: rtl-snand: Correctly handle DMA transfers
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The RTL9300 has some limitations on the maximum DMA transfers possible.
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For reads this is 2080 bytes (520*4) for writes this is 520 bytes. Deal
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with this by splitting transfers into appropriately sized parts.
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Fixes: 42d20a6a61b8 ("spi: spi-mem: Add Realtek SPI-NAND controller")
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Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
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Link: https://patch.msgid.link/20241030194920.3202282-1-chris.packham@alliedtelesis.co.nz
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-realtek-rtl-snand.c | 46 +++++++++++++++++++----------
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1 file changed, 30 insertions(+), 16 deletions(-)
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--- a/drivers/spi/spi-realtek-rtl-snand.c
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+++ b/drivers/spi/spi-realtek-rtl-snand.c
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@@ -231,19 +231,22 @@ out_deselect:
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static int rtl_snand_dma_xfer(struct rtl_snand *snand, int cs, const struct spi_mem_op *op)
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{
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+ unsigned int pos, nbytes;
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int ret;
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dma_addr_t buf_dma;
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enum dma_data_direction dir;
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- u32 trig;
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+ u32 trig, len, maxlen;
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ret = rtl_snand_xfer_head(snand, cs, op);
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if (ret)
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goto out_deselect;
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if (op->data.dir == SPI_MEM_DATA_IN) {
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+ maxlen = 2080;
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dir = DMA_FROM_DEVICE;
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trig = 0;
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} else if (op->data.dir == SPI_MEM_DATA_OUT) {
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+ maxlen = 520;
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dir = DMA_TO_DEVICE;
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trig = 1;
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} else {
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@@ -264,26 +267,37 @@ static int rtl_snand_dma_xfer(struct rtl
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if (ret)
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goto out_unmap;
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- reinit_completion(&snand->comp);
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+ pos = 0;
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+ len = op->data.nbytes;
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- ret = regmap_write(snand->regmap, SNAFDRSAR, buf_dma);
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- if (ret)
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- goto out_disable_int;
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+ while (pos < len) {
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+ nbytes = len - pos;
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+ if (nbytes > maxlen)
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+ nbytes = maxlen;
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- ret = regmap_write(snand->regmap, SNAFDLR,
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- CMR_WID(op->data.buswidth) | (op->data.nbytes & 0xffff));
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- if (ret)
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- goto out_disable_int;
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+ reinit_completion(&snand->comp);
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- ret = regmap_write(snand->regmap, SNAFDTR, trig);
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- if (ret)
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- goto out_disable_int;
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+ ret = regmap_write(snand->regmap, SNAFDRSAR, buf_dma + pos);
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+ if (ret)
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+ goto out_disable_int;
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- if (!wait_for_completion_timeout(&snand->comp, usecs_to_jiffies(20000)))
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- ret = -ETIMEDOUT;
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+ pos += nbytes;
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- if (ret)
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- goto out_disable_int;
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+ ret = regmap_write(snand->regmap, SNAFDLR,
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+ CMR_WID(op->data.buswidth) | nbytes);
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+ if (ret)
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+ goto out_disable_int;
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+
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+ ret = regmap_write(snand->regmap, SNAFDTR, trig);
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+ if (ret)
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+ goto out_disable_int;
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+
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+ if (!wait_for_completion_timeout(&snand->comp, usecs_to_jiffies(20000)))
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+ ret = -ETIMEDOUT;
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+
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+ if (ret)
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+ goto out_disable_int;
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+ }
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out_disable_int:
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regmap_update_bits(snand->regmap, SNAFCFR, SNAFCFR_DMA_IE, 0);
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