6782d0e66f
The IPQ5018 GE Phy driver registers two fixed rate clocks which are passed on to the GCC which gatekeeps and passes them back to the phy. Fix 'bad phandle' warning and tell consumer (GCC) how many cells to expect when compiling. Warning (clocks_property): /soc@0/clock-controller@1800000: Missing property '#clock-cells' in node /soc@0/mdio@88000/ethernet-phy@7 or bad phandle (referred from clocks[5]) Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/18548 Signed-off-by: Robert Marko <robimarko@gmail.com>