20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
25 lines
872 B
Diff
25 lines
872 B
Diff
From 80c0520cfe63849639bb0ee4db6f82606ca844cb Mon Sep 17 00:00:00 2001
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From: Ben Avison <bavison@riscosopen.org>
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Date: Wed, 30 Mar 2022 11:43:25 +0100
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Subject: [PATCH] ARM: dts: Enable PMU on Cortex-A72 in AArch32 state
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There is no specific AArch32 driver for the Cortex-A72 PMU, but the
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Cortex-A7 one works and is much better than no PMU driver at all.
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Signed-off-by: Ben Avison <bavison@riscosopen.org>
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---
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arch/arm/boot/dts/bcm2711.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/bcm2711.dtsi
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+++ b/arch/arm/boot/dts/bcm2711.dtsi
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@@ -445,7 +445,7 @@
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};
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arm-pmu {
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- compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
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+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
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