The "/dts-v1/;" identifier is supposed to be present once at the top of a device tree file after the includes have been processed. Like done for other targets recently, put the dts-v1 statement into the top-level SoC-based DTSI files, and remove all other occurences. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
		
			
				
	
	
		
			136 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			136 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/dts-v1/;
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/ {
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	#address-cells = <1>;
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	#size-cells = <1>;
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	compatible = "brcm,bcm3368";
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	aliases {
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		pflash = &pflash;
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		gpio0 = &gpio0;
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		gpio1 = &gpio1;
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		serial0 = &uart0;
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		serial1 = &uart1;
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		spi0 = &lsspi;
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	};
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	cpus {
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		#address-cells = <1>;
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		#size-cells = <0>;
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		cpu@0 {
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			compatible = "brcm,bmips4350", "mips,mips4Kc";
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			device_type = "cpu";
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			reg = <0>;
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		};
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		cpu@1 {
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			compatible = "brcm,bmips4350", "mips,mips4Kc";
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			device_type = "cpu";
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			reg = <1>;
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		};
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	};
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	cpu_intc: interrupt-controller {
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		#address-cells = <0>;
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		compatible = "mti,cpu-interrupt-controller";
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		interrupt-controller;
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		#interrupt-cells = <1>;
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	};
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	memory { device_type = "memory"; reg = <0 0>; };
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	pflash: nor@1e000000 {
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		compatible = "cfi-flash";
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		reg = <0x1e000000 0x2000000>;
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		bank-width = <2>;
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		#address-cells = <1>;
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		#size-cells = <1>;
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		status = "disabled";
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	};
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	ubus@fff00000 {
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		#address-cells = <1>;
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		#size-cells = <1>;
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		ranges;
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		compatible = "simple-bus";
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		interrupt-parent = <&periph_intc>;
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		periph_intc: interrupt-controller@fff8c00c {
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			compatible = "brcm,bcm6345-l1-intc";
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			reg = <0xfff8c00c 0x8>;
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			interrupt-controller;
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			#interrupt-cells = <1>;
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			interrupt-parent = <&cpu_intc>;
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			interrupts = <2>;
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		};
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		ext_intc0: interrupt-controller@fff8c014 {
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			compatible = "brcm,bcm6345-ext-intc";
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			reg = <0xfff8c014 0x4>;
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			interrupt-controller;
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			#interrupt-cells = <2>;
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			interrupts = <25>, <26>, <27>, <28>;
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		};
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		gpio1: gpio-controller@fff8c080 {
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			compatible = "brcm,bcm6345-gpio";
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			reg = <0xfff8c080 4>, <0xfff8c088 4>;
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			gpio-controller;
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			#gpio-cells = <2>;
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			ngpios = <8>;
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		};
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		gpio0: gpio-controller@fff8c084 {
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			compatible = "brcm,bcm6345-gpio";
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			reg = <0xfff8c084 4>, <0xfff8c08c 4>;
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			gpio-controller;
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			#gpio-cells = <2>;
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		};
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		uart0: serial@fff8c100 {
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			compatible = "brcm,bcm6345-uart";
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			reg = <0xfff8c100 0x18>;
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			interrupt-parent = <&periph_intc>;
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			interrupts = <2>;
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			/* clocks = <&periph_clk>; */
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			/* clock-names = "refclk"; */
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			status = "disabled";
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		};
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		uart1: serial@fff8c120 {
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			compatible = "brcm,bcm6345-uart";
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			reg = <0xfff8c120 0x18>;
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			interrupt-parent = <&periph_intc>;
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			interrupts = <3>;
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			/* clocks = <&periph_clk>; */
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			/* clock-names = "refclk"; */
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			status = "disabled";
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		};
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		lsspi: spi@fff8c800 {
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			#address-cells = <1>;
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			#size-cells = <0>;
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			compatible = "brcm,bcm6358-spi";
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			reg = <0xfff8c800 0x70c>;
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			interrupts = <1>;
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			/* clocks = <&clkctl 9>; */
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		};
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	};
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};
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