0f45601ccd
Add pending PCI patch that should correctly fix mediatek driver with
Airoha SoC.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit f22febae1a)
63 lines
2.4 KiB
Diff
63 lines
2.4 KiB
Diff
From 90d4e466c9ea2010f33880a36317a8486ccbe082 Mon Sep 17 00:00:00 2001
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Message-ID: <90d4e466c9ea2010f33880a36317a8486ccbe082.1736960708.git.lorenzo@kernel.org>
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In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
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References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Wed, 8 Jan 2025 10:50:43 +0100
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Subject: [PATCH 4/6] PCI: mediatek-gen3: Move reset delay in
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mtk_pcie_en7581_power_up()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
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causing occasional PCIe link down issues. In order to overcome the
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problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and
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REG_RESET_CONTROL (0x834) registers available in the clock module
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running clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up().
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In order to make the code more readable, move the wait for the time
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needed to complete the PCIe reset from en7581_pci_enable() to
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mtk_pcie_en7581_power_up().
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Reduce reset timeout from 250ms to the standard PCIE_T_PVPERL_MS value
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(100ms) since it has no impact on the driver behavior.
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Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-4-21ac939a3b9b@kernel.org
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/clk-en7523.c | 1 -
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drivers/pci/controller/pcie-mediatek-gen3.c | 7 +++++++
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2 files changed, 7 insertions(+), 1 deletion(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -489,7 +489,6 @@ static int en7581_pci_enable(struct clk_
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REG_PCI_CONTROL_PERSTOUT;
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val = readl(np_base + REG_PCI_CONTROL);
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writel(val | mask, np_base + REG_PCI_CONTROL);
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- msleep(250);
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return 0;
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}
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--- a/drivers/pci/controller/pcie-mediatek-gen3.c
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+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
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@@ -936,6 +936,13 @@ static int mtk_pcie_en7581_power_up(stru
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goto err_clk_prepare_enable;
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}
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+ /*
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+ * Airoha EN7581 performs PCIe reset via clk callbacks since it has a
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+ * hw issue with PCIE_PE_RSTB signal. Add wait for the time needed to
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+ * complete the PCIe reset.
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+ */
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+ msleep(PCIE_T_PVPERL_MS);
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+
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return 0;
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err_clk_prepare_enable:
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