Shiji Yang
96adba2768
mediatek: filogic: fix SPI node reg size dtc warnings
Add missing #address-cells and #size-cells to fix the
following dtc warnings:
../dts/mt7981b-cmcc-rax3000m-nand.dtso:67.5-15: Warning (reg_format): /fragment@4/__overlay__/spi_nand@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
mt7988a-rfb-snfi-nand.dtso:20.5-15: Warning (reg_format): /fragment@0/__overlay__/flash@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
mt7988a-rfb-spim-nand.dtso:22.5-15: Warning (reg_format): /fragment@0/__overlay__/flash@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
mt7988a-rfb-spim-nor.dtso:31.5-15: Warning (reg_format): /fragment@0/__overlay__/flash@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2025-05-19 20:01:00 +08:00
..
2025-05-03 19:57:53 +02:00
2025-05-17 20:14:27 +02:00
2025-05-18 19:35:00 +02:00
2025-05-17 20:14:27 +02:00
2025-04-28 10:31:59 +02:00
2025-05-13 21:43:34 +02:00
2025-05-14 11:37:51 +02:00
2025-05-02 19:17:53 +02:00
2025-05-18 10:02:09 +02:00
2025-05-13 21:43:34 +02:00
2025-05-18 19:35:00 +02:00
2025-05-18 19:35:00 +02:00
2025-05-18 19:35:00 +02:00
2025-05-03 19:57:53 +02:00
2025-05-19 20:01:00 +08:00
2025-05-18 19:35:00 +02:00
2025-05-17 20:14:27 +02:00
2025-05-18 19:35:00 +02:00
2025-05-12 15:06:24 +02:00
2025-05-18 19:35:00 +02:00
2025-05-15 19:01:22 +02:00
2025-05-17 11:30:20 +02:00
2025-05-02 01:34:24 +02:00
2025-05-13 21:43:34 +02:00
2025-05-17 11:39:06 +02:00