afa4662ed0
The RTL839x mdio functions are scattered around the code. Relocate
them to the bus (still inside the ethernet driver).
Additionally provide a consistent SerDes register access through the
mdio bus. Until now when a SerDes directly drives a SFP module there
is no clear rule of how to handle its register set that consists of
two parts:
- c22 phy registers 0-15 live in the fiber page (2) of the SerDes
- other SerDes specific registers exist in pages before and after
The mdio bus and other SerDes functions are a wild mix of directly
looking into page 2 or just using self defined methods to access
data.
Adapt the bus to the new consistent phy interface that mixes the
SerDes register set like classic Realtek phys do it.
- Use register 31 as page select (already in the bus)
- Always keep the common registers 0-15 in place and read fiber page
- Map the SerDes internal registers into the upper vendor specific
registers 16-23 according to the page select register (31).
That gives a register mapping as follows:
+-----------------------+-----------------------+---------------+-------------+
| reg 0x00-0x0f | reg 0x10-0x17 | reg 0x18-0x1e | reg 0x1f |
+-----------------------+-----------------------+---------------+-------------+
| SerDes fiber page (3) | real SerDes registers | zero | SerDes page |
| registers 0 - 15 | in packages of 8 | | select reg |
+-----------------------+-----------------------+---------------+-------------+
Example to make it as clear as possible.
SerDes registers on a RTL839x show
Page / Reg | 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B ...
-------------+----------------------------------------------------------------
0 - SDS | 0C03 0F00 7060 7106 074D 0EBF 0F0F 0359 5248 0000 0F80 0000 ...
1 - SDS_EXT | 0000 0000 85FA 8C6D 5CCC 0000 20D8 0003 79AA 8C64 00C3 1482 ...
2 - FIB | 1140 6189 001C CA40 01A0 0000 0000 0004 0000 0000 0000 0000 ...
3 - FIB_EXT | 1140 6109 001C CA40 01A0 0000 0000 0004 0000 0000 0000 0000 ...
This translates to this phy layout
| SerDes fiber registers normal SerDes registers zero p.sel
Page / Reg | 0x00 0x01 0x02 0x03 ... 0x10 0x11 0x12 0x13 ... 0x18 ... 0x1f
-------------+---------------------------------------------------------------
0 | 1140 6189 001C CA40 ... 0C03 0F00 7060 7106 ... 0000 ... 0000
1 | 1140 6189 001C CA40 ... 5248 0000 0F80 0000 ... 0000 ... 0001
...
4 | 1140 6189 001C CA40 ... 0000 0000 85FA 8C6D ... 0000 ... 0004
...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19634
Signed-off-by: Robert Marko <robimarko@gmail.com>
224 lines
7.1 KiB
C
224 lines
7.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _NET_DSA_RTL83XX_H
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#define _NET_DSA_RTL83XX_H
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#include <net/dsa.h>
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#include "rtl838x.h"
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#define RTL8380_VERSION_A 'A'
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#define RTL8390_VERSION_A 'A'
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#define RTL8380_VERSION_B 'B'
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struct fdb_update_work {
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struct work_struct work;
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struct net_device *ndev;
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u64 macs[];
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};
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enum mib_reg {
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MIB_REG_INVALID = 0,
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MIB_REG_STD,
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MIB_REG_PRV
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};
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#define MIB_ITEM(_reg, _offset, _size) \
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{.reg = _reg, .offset = _offset, .size = _size}
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#define MIB_LIST_ITEM(_name, _item) \
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{.name = _name, .item = _item}
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struct rtldsa_mib_item {
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enum mib_reg reg;
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unsigned int offset;
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unsigned int size;
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};
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struct rtldsa_mib_list_item {
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const char *name;
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struct rtldsa_mib_item item;
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};
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struct rtldsa_mib_desc {
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struct rtldsa_mib_item symbol_errors;
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struct rtldsa_mib_item if_in_octets;
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struct rtldsa_mib_item if_out_octets;
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struct rtldsa_mib_item if_in_ucast_pkts;
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struct rtldsa_mib_item if_in_mcast_pkts;
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struct rtldsa_mib_item if_in_bcast_pkts;
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struct rtldsa_mib_item if_out_ucast_pkts;
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struct rtldsa_mib_item if_out_mcast_pkts;
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struct rtldsa_mib_item if_out_bcast_pkts;
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struct rtldsa_mib_item if_out_discards;
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struct rtldsa_mib_item single_collisions;
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struct rtldsa_mib_item multiple_collisions;
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struct rtldsa_mib_item deferred_transmissions;
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struct rtldsa_mib_item late_collisions;
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struct rtldsa_mib_item excessive_collisions;
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struct rtldsa_mib_item crc_align_errors;
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struct rtldsa_mib_item rx_pkts_over_max_octets;
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struct rtldsa_mib_item unsupported_opcodes;
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struct rtldsa_mib_item rx_undersize_pkts;
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struct rtldsa_mib_item rx_oversize_pkts;
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struct rtldsa_mib_item rx_fragments;
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struct rtldsa_mib_item rx_jabbers;
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struct rtldsa_mib_item tx_pkts[ETHTOOL_RMON_HIST_MAX];
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struct rtldsa_mib_item rx_pkts[ETHTOOL_RMON_HIST_MAX];
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struct ethtool_rmon_hist_range rmon_ranges[ETHTOOL_RMON_HIST_MAX];
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struct rtldsa_mib_item drop_events;
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struct rtldsa_mib_item collisions;
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struct rtldsa_mib_item rx_pause_frames;
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struct rtldsa_mib_item tx_pause_frames;
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size_t list_count;
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const struct rtldsa_mib_list_item *list;
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};
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/* API for switch table access */
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struct table_reg {
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u16 addr;
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u16 data;
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u8 max_data;
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u8 c_bit;
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u8 t_bit;
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u8 rmode;
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u8 tbl;
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struct mutex lock;
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};
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#define TBL_DESC(_addr, _data, _max_data, _c_bit, _t_bit, _rmode) \
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{ .addr = _addr, .data = _data, .max_data = _max_data, .c_bit = _c_bit, \
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.t_bit = _t_bit, .rmode = _rmode \
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}
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typedef enum {
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RTL8380_TBL_L2 = 0,
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RTL8380_TBL_0,
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RTL8380_TBL_1,
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RTL8390_TBL_L2,
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RTL8390_TBL_0,
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RTL8390_TBL_1,
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RTL8390_TBL_2,
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RTL9300_TBL_L2,
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RTL9300_TBL_0,
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RTL9300_TBL_1,
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RTL9300_TBL_2,
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RTL9300_TBL_HSB,
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RTL9300_TBL_HSA,
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RTL9310_TBL_0,
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RTL9310_TBL_1,
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RTL9310_TBL_2,
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RTL9310_TBL_3,
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RTL9310_TBL_4,
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RTL9310_TBL_5,
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RTL_TBL_END
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} rtl838x_tbl_reg_t;
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void rtl_table_init(void);
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struct table_reg *rtl_table_get(rtl838x_tbl_reg_t r, int t);
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void rtl_table_release(struct table_reg *r);
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int rtl_table_read(struct table_reg *r, int idx);
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int rtl_table_write(struct table_reg *r, int idx);
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inline u16 rtl_table_data(struct table_reg *r, int i);
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inline u32 rtl_table_data_r(struct table_reg *r, int i);
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inline void rtl_table_data_w(struct table_reg *r, u32 v, int i);
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void __init rtl83xx_setup_qos(struct rtl838x_switch_priv *priv);
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void rtl83xx_fast_age(struct dsa_switch *ds, int port);
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int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv);
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int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
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int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv);
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void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
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int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data);
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/* Port register accessor functions for the RTL839x and RTL931X SoCs */
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void rtl839x_mask_port_reg_be(u64 clear, u64 set, int reg);
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u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
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u64 rtl839x_get_port_reg_be(int reg);
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void rtl839x_set_port_reg_be(u64 set, int reg);
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void rtl839x_mask_port_reg_le(u64 clear, u64 set, int reg);
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int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
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void rtl839x_set_port_reg_le(u64 set, int reg);
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u64 rtl839x_get_port_reg_le(int reg);
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/* Port register accessor functions for the RTL838x and RTL930X SoCs */
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void rtl838x_mask_port_reg(u64 clear, u64 set, int reg);
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void rtl838x_set_port_reg(u64 set, int reg);
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u32 rtl838x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
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u64 rtl838x_get_port_reg(int reg);
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int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
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/* RTL838x-specific */
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u32 rtl838x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl838x_switch_irq(int irq, void *dev_id);
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void rtl8380_get_version(struct rtl838x_switch_priv *priv);
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void rtl838x_vlan_profile_dump(int index);
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void rtl8380_sds_rst(int mac);
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int rtl8380_sds_power(int mac, int val);
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void rtl838x_print_matrix(void);
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/* RTL839x-specific */
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u32 rtl839x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
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void rtl8390_get_version(struct rtl838x_switch_priv *priv);
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void rtl839x_vlan_profile_dump(int index);
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void rtl839x_exec_tbl2_cmd(u32 cmd);
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void rtl839x_print_matrix(void);
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/* RTL930x-specific */
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u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl930x_switch_irq(int irq, void *dev_id);
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irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
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void rtl930x_vlan_profile_dump(int index);
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int rtl9300_sds_power(int mac, int val);
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extern int rtl9300_serdes_setup(int port, int sds_num, phy_interface_t phy_mode);
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void rtl930x_print_matrix(void);
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/* RTL931x-specific */
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irqreturn_t rtl931x_switch_irq(int irq, void *dev_id);
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int rtl931x_sds_cmu_band_get(int sds, phy_interface_t mode);
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int rtl931x_sds_cmu_band_set(int sds, bool enable, u32 band, phy_interface_t mode);
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extern void rtl931x_sds_init(u32 sds, phy_interface_t mode);
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void rtl931x_print_matrix(void);
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int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port, struct netdev_lag_upper_info *info);
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int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port);
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/* phy functions that will need to be moved to the future mdio driver */
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int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
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int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
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int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
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int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
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/*
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* TODO: The following functions are currently not in use. So compiler will complain if
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* they are static and not made available externally. To preserve them for future use
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* collect them in this section.
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*/
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void rtl838x_egress_rate_queue_limit(struct rtl838x_switch_priv *priv, int port,
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int queue, u32 rate);
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int rtl8390_sds_power(int mac, int val);
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void rtl839x_pie_rule_dump(struct pie_rule *pr);
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void rtl839x_set_egress_queue(int port, int queue);
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void rtl9300_dump_debug(void);
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void rtl930x_pie_rule_dump_raw(u32 r[]);
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void rtl931x_print_matrix(void);
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void rtl931x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action);
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void rtl931x_sw_init(struct rtl838x_switch_priv *priv);
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#endif /* _NET_DSA_RTL83XX_H */
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