8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
77 lines
3.0 KiB
Diff
77 lines
3.0 KiB
Diff
From cfd0ecb25ac9aecd0e6401d951a41988b7672776 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Fri, 17 Dec 2021 13:36:52 +0000
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Subject: [PATCH 0018/1085] drm/dsi: Document the meaning and spec references
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for MIPI_DSI_MODE_*
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The MIPI_DSI_MODE_* flags have fairly terse descriptions and no reference
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to the DSI specification as to their exact meaning. Usage has therefore
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been rather fluid.
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Extend the descriptions and provide references to the part of the
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MIPI DSI specification regarding what they mean.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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include/drm/drm_mipi_dsi.h | 38 ++++++++++++++++++++++++++------------
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1 file changed, 26 insertions(+), 12 deletions(-)
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--- a/include/drm/drm_mipi_dsi.h
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+++ b/include/drm/drm_mipi_dsi.h
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@@ -113,29 +113,43 @@ struct mipi_dsi_host *of_find_mipi_dsi_h
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/* DSI mode flags */
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-/* video mode */
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+/* Video mode display.
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+ * Not set denotes a command mode display.
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+ */
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#define MIPI_DSI_MODE_VIDEO BIT(0)
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-/* video burst mode */
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+/* Video burst mode.
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+ * Link frequency to be configured via platform configuration.
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+ * This should always be set in conjunction with MIPI_DSI_MODE_VIDEO.
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+ * (DSI spec V1.1 8.11.4)
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+ */
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#define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
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-/* video pulse mode */
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+/* Video pulse mode.
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+ * Not set denotes sync event mode. (DSI spec V1.1 8.11.2)
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+ */
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#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
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-/* enable auto vertical count mode */
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+/* Enable auto vertical count mode */
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#define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
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-/* enable hsync-end packets in vsync-pulse and v-porch area */
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+/* Enable hsync-end packets in vsync-pulse and v-porch area */
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#define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
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-/* disable hfront-porch area */
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+/* Transmit NULL packets or LP mode during hfront-porch area.
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+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
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+ */
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#define MIPI_DSI_MODE_VIDEO_NO_HFP BIT(5)
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-/* disable hback-porch area */
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+/* Transmit NULL packets or LP mode during hback-porch area.
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+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
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+ */
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#define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6)
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-/* disable hsync-active area */
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+/* Transmit NULL packets or LP mode during hsync-active area.
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+ * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1)
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+ */
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#define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7)
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-/* flush display FIFO on vsync pulse */
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+/* Flush display FIFO on vsync pulse */
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#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
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-/* disable EoT packets in HS mode */
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+/* Disable EoT packets in HS mode. (DSI spec V1.1 8.1) */
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#define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9)
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-/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
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+/* Device supports non-continuous clock behavior (DSI spec V1.1 5.6.1) */
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#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
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-/* transmit data in low power */
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+/* Transmit data in low power */
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#define MIPI_DSI_MODE_LPM BIT(11)
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/* transmit data ending at the same time for all lanes within one hsync */
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#define MIPI_DSI_HS_PKT_END_ALIGNED BIT(12)
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