e2e2fc3cd0
Add updated patches for 6.6. DMA/cache-handling patches have been reworked / backported from upstream. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
108 lines
4.0 KiB
Diff
108 lines
4.0 KiB
Diff
From 6ee4d4568314425079ae88229bb9abbff9b92b8b Mon Sep 17 00:00:00 2001
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From: Minda Chen <minda.chen@starfivetech.com>
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Date: Mon, 8 Jan 2024 19:05:54 +0800
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Subject: [PATCH 017/116] PCI: microchip: Add bridge_addr field to struct
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mc_pcie
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For bridge address base is common PLDA field, Add this to struct mc_pcie
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first.
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INTx and MSI codes interrupts codes will get the bridge base address from
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port->bridge_addr. These codes will be changed to common codes.
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axi_base_addr is Microchip its own data.
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Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
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---
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.../pci/controller/plda/pcie-microchip-host.c | 23 ++++++++-----------
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1 file changed, 9 insertions(+), 14 deletions(-)
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--- a/drivers/pci/controller/plda/pcie-microchip-host.c
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+++ b/drivers/pci/controller/plda/pcie-microchip-host.c
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@@ -195,6 +195,7 @@ struct mc_pcie {
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struct irq_domain *event_domain;
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raw_spinlock_t lock;
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struct mc_msi msi;
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+ void __iomem *bridge_addr;
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};
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struct cause {
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@@ -339,8 +340,7 @@ static void mc_handle_msi(struct irq_des
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct device *dev = port->dev;
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struct mc_msi *msi = &port->msi;
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long status;
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u32 bit;
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int ret;
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@@ -365,8 +365,7 @@ static void mc_handle_msi(struct irq_des
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static void mc_msi_bottom_irq_ack(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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u32 bitpos = data->hwirq;
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writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI);
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@@ -488,8 +487,7 @@ static void mc_handle_intx(struct irq_de
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struct mc_pcie *port = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct device *dev = port->dev;
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long status;
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u32 bit;
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int ret;
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@@ -514,8 +512,7 @@ static void mc_handle_intx(struct irq_de
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static void mc_ack_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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writel_relaxed(mask, bridge_base_addr + ISTATUS_LOCAL);
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@@ -524,8 +521,7 @@ static void mc_ack_intx_irq(struct irq_d
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static void mc_mask_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long flags;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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u32 val;
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@@ -540,8 +536,7 @@ static void mc_mask_intx_irq(struct irq_
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static void mc_unmask_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long flags;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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u32 val;
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@@ -896,8 +891,7 @@ static void mc_pcie_setup_window(void __
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static int mc_pcie_setup_windows(struct platform_device *pdev,
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struct mc_pcie *port)
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{
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- void __iomem *bridge_base_addr =
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- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ void __iomem *bridge_base_addr = port->bridge_addr;
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struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
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struct resource_entry *entry;
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u64 pci_addr;
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@@ -1081,6 +1075,7 @@ static int mc_host_probe(struct platform
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mc_disable_interrupts(port);
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bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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+ port->bridge_addr = bridge_base_addr;
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/* Allow enabling MSI by disabling MSI-X */
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val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0);
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