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This commit is contained in:
domenico
@@ -0,0 +1,106 @@
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -953,10 +953,6 @@ CRTTOOL ?= ${CRTTOOLPATH}/cert_create$
|
||||
ENCTOOLPATH ?= tools/encrypt_fw
|
||||
ENCTOOL ?= ${ENCTOOLPATH}/encrypt_fw${BIN_EXT}
|
||||
|
||||
-# Variables for use with Firmware Image Package
|
||||
-FIPTOOLPATH ?= tools/fiptool
|
||||
-FIPTOOL ?= ${FIPTOOLPATH}/fiptool${BIN_EXT}
|
||||
-
|
||||
# Variables for use with sptool
|
||||
SPTOOLPATH ?= tools/sptool
|
||||
SPTOOL ?= ${SPTOOLPATH}/sptool.py
|
||||
@@ -1409,13 +1405,6 @@ endif
|
||||
clean:
|
||||
@echo " CLEAN"
|
||||
$(call SHELL_REMOVE_DIR,${BUILD_PLAT})
|
||||
-ifdef UNIX_MK
|
||||
- ${Q}${MAKE} --no-print-directory -C ${FIPTOOLPATH} clean
|
||||
-else
|
||||
-# Clear the MAKEFLAGS as we do not want
|
||||
-# to pass the gnumake flags to nmake.
|
||||
- ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) clean
|
||||
-endif
|
||||
${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean
|
||||
${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} clean
|
||||
${Q}${MAKE} --no-print-directory -C ${ROMLIBPATH} clean
|
||||
@@ -1424,13 +1413,6 @@ realclean distclean:
|
||||
@echo " REALCLEAN"
|
||||
$(call SHELL_REMOVE_DIR,${BUILD_BASE})
|
||||
$(call SHELL_DELETE_ALL, ${CURDIR}/cscope.*)
|
||||
-ifdef UNIX_MK
|
||||
- ${Q}${MAKE} --no-print-directory -C ${FIPTOOLPATH} clean
|
||||
-else
|
||||
-# Clear the MAKEFLAGS as we do not want
|
||||
-# to pass the gnumake flags to nmake.
|
||||
- ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) realclean
|
||||
-endif
|
||||
${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} realclean
|
||||
${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} realclean
|
||||
${Q}${MAKE} --no-print-directory -C ${ROMLIBPATH} clean
|
||||
@@ -1486,7 +1468,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL}
|
||||
@${ECHO_BLANK_LINE}
|
||||
endif
|
||||
|
||||
-${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} ${FIPTOOL}
|
||||
+${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS}
|
||||
$(eval ${CHECK_FIP_CMD})
|
||||
${Q}${FIPTOOL} create ${FIP_ARGS} $@
|
||||
${Q}${FIPTOOL} info $@
|
||||
@@ -1503,7 +1485,7 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT
|
||||
@${ECHO_BLANK_LINE}
|
||||
endif
|
||||
|
||||
-${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} ${FIPTOOL}
|
||||
+${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS}
|
||||
$(eval ${CHECK_FWU_FIP_CMD})
|
||||
${Q}${FIPTOOL} create ${FWU_FIP_ARGS} $@
|
||||
${Q}${FIPTOOL} info $@
|
||||
@@ -1511,19 +1493,9 @@ ${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP
|
||||
@echo "Built $@ successfully"
|
||||
@${ECHO_BLANK_LINE}
|
||||
|
||||
-fiptool: ${FIPTOOL}
|
||||
fip: ${BUILD_PLAT}/${FIP_NAME}
|
||||
fwu_fip: ${BUILD_PLAT}/${FWU_FIP_NAME}
|
||||
|
||||
-${FIPTOOL}: FORCE
|
||||
-ifdef UNIX_MK
|
||||
- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" FIPTOOL=${FIPTOOL} OPENSSL_DIR=${OPENSSL_DIR} DEBUG=${DEBUG} V=${V} --no-print-directory -C ${FIPTOOLPATH} all
|
||||
-else
|
||||
-# Clear the MAKEFLAGS as we do not want
|
||||
-# to pass the gnumake flags to nmake.
|
||||
- ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL))
|
||||
-endif
|
||||
-
|
||||
romlib.bin: libraries FORCE
|
||||
${Q}${MAKE} PLAT_DIR=${PLAT_DIR} BUILD_PLAT=${BUILD_PLAT} ENABLE_BTI=${ENABLE_BTI} ARM_ARCH_MINOR=${ARM_ARCH_MINOR} INCLUDES='${INCLUDES}' DEFINES='${DEFINES}' --no-print-directory -C ${ROMLIBPATH} all
|
||||
|
||||
--- a/tools/fiptool/Makefile
|
||||
+++ b/tools/fiptool/Makefile
|
||||
@@ -67,7 +67,7 @@ all: ${PROJECT}
|
||||
|
||||
${PROJECT}: --openssl ${OBJECTS} Makefile
|
||||
@echo " HOSTLD $@"
|
||||
- ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS}
|
||||
+ ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} $(LDFLAGS)
|
||||
@${ECHO_BLANK_LINE}
|
||||
@echo "Built $@ successfully"
|
||||
@${ECHO_BLANK_LINE}
|
||||
--- a/tools/nxp/plat_fiptool/plat_fiptool.mk
|
||||
+++ b/tools/nxp/plat_fiptool/plat_fiptool.mk
|
||||
@@ -22,11 +22,11 @@ INCLUDE_PATHS += -I${PLAT_DEF_UUID_OID_C
|
||||
$(shell rm ${PLAT_DEF_UUID_CONFIG_FILE_PATH}/${PLAT_DEF_UUID_CONFIG_FILE_NAME}.o)
|
||||
|
||||
ifeq (${PLAT_DEF_OID},yes)
|
||||
-HOSTCCFLAGS += -DPLAT_DEF_OID
|
||||
+override HOSTCCFLAGS += -DPLAT_DEF_OID
|
||||
endif
|
||||
|
||||
ifeq (${PLAT_DEF_UUID},yes)
|
||||
-HOSTCCFLAGS += -DPLAT_DEF_FIP_UUID
|
||||
+override HOSTCCFLAGS += -DPLAT_DEF_FIP_UUID
|
||||
PLAT_OBJECTS += ${PLAT_DEF_UUID_CONFIG_FILE_PATH}/${PLAT_DEF_UUID_CONFIG_FILE_NAME}.o
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,53 @@
|
||||
From 8a458876013991fe2f288bbe4694264b16c3b9e9 Mon Sep 17 00:00:00 2001
|
||||
From: Biwen Li <biwen.li@nxp.com>
|
||||
Date: Fri, 26 Jul 2019 15:44:10 +0800
|
||||
Subject: [PATCH 3/3] tools/nxp: fix create_pbl and byte_swap host build
|
||||
|
||||
Not compile create_pbl and byte_swap in the process of cross compilation
|
||||
|
||||
Signed-off-by: Biwen Li <biwen.li@nxp.com>
|
||||
---
|
||||
tools/nxp/pbl_ch2.mk | 3 ---
|
||||
tools/nxp/pbl_ch3.mk | 5 -----
|
||||
2 files changed, 8 deletions(-)
|
||||
|
||||
--- a/tools/nxp/create_pbl/pbl_ch2.mk
|
||||
+++ b/tools/nxp/create_pbl/pbl_ch2.mk
|
||||
@@ -19,8 +19,6 @@ ifeq ($(RCW),"")
|
||||
else
|
||||
# Generate header for bl2.bin
|
||||
$(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE}
|
||||
- # Compile create_pbl tool
|
||||
- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};\
|
||||
# Add bl2.bin to RCW
|
||||
${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\
|
||||
-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ;\
|
||||
@@ -42,7 +40,6 @@ ifeq ($(RCW),"")
|
||||
${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}"
|
||||
else
|
||||
# -a option appends the image for Chassis 3 devices in case of non secure boot
|
||||
- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};
|
||||
${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \
|
||||
-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ;
|
||||
# Swapping of RCW is required for QSPi Chassis 2 devices
|
||||
--- a/tools/nxp/create_pbl/pbl_ch3.mk
|
||||
+++ b/tools/nxp/create_pbl/pbl_ch3.mk
|
||||
@@ -26,9 +26,6 @@ else
|
||||
# Generate header for bl2.bin
|
||||
$(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE}
|
||||
|
||||
- # Compile create_pbl tool
|
||||
- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};\
|
||||
-
|
||||
# Add Block Copy command for bl2.bin to RCW
|
||||
${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\
|
||||
-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl -f ${BL2_SRC_OFFSET};\
|
||||
@@ -56,8 +53,6 @@ else #SECURE_BOOT
|
||||
ifeq ($(RCW),"")
|
||||
${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}"
|
||||
else
|
||||
- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};
|
||||
-
|
||||
# Add Block Copy command and populate boot loc ptrfor bl2.bin to RCW
|
||||
${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \
|
||||
-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl -f ${BL2_SRC_OFFSET};
|
||||
@@ -0,0 +1,205 @@
|
||||
From 8c6a66feb721f18c930c7df03d1fbb7304107af6 Mon Sep 17 00:00:00 2001
|
||||
From: Wojciech Dubowik <Wojciech.Dubowik@protonmail.ch>
|
||||
Date: Thu, 20 Apr 2023 16:21:25 +0200
|
||||
Subject: [PATCH] tfa-layerscape: Restore ls1012afrdm support
|
||||
|
||||
Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@protonmail.ch>
|
||||
---
|
||||
plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c | 34 +++++++
|
||||
plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h | 83 +++++++++++++++++++
|
||||
plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk | 25 +++++
|
||||
.../soc-ls1012a/ls1012afrdm/platform_def.h | 13 +++
|
||||
plat/nxp/soc-ls1012a/ls1012afrdm/policy.h | 16 ++++
|
||||
5 files changed, 180 insertions(+)
|
||||
create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c
|
||||
create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h
|
||||
create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk
|
||||
create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h
|
||||
create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/policy.h
|
||||
|
||||
--- /dev/null
|
||||
+++ b/plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c
|
||||
@@ -0,0 +1,34 @@
|
||||
+/*
|
||||
+ * Copyright 2018-2022 NXP
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: BSD-3-Clause
|
||||
+ */
|
||||
+
|
||||
+#include <common/debug.h>
|
||||
+#include <fsl_mmdc.h>
|
||||
+
|
||||
+#include <platform_def.h>
|
||||
+
|
||||
+long long init_ddr(void)
|
||||
+{
|
||||
+ static const struct fsl_mmdc_info mparam = {
|
||||
+ .mdctl = U(0x04180000),
|
||||
+ .mdpdc = U(0x00030035),
|
||||
+ .mdotc = U(0x12554000),
|
||||
+ .mdcfg0 = U(0xbabf7954),
|
||||
+ .mdcfg1 = U(0xdb328f64),
|
||||
+ .mdcfg2 = U(0x01ff00db),
|
||||
+ .mdmisc = U(0x00001680),
|
||||
+ .mdref = U(0x0f3c8000),
|
||||
+ .mdrwd = U(0x00002000),
|
||||
+ .mdor = U(0x00bf1023),
|
||||
+ .mdasp = U(0x0000003f),
|
||||
+ .mpodtctrl = U(0x0000022a),
|
||||
+ .mpzqhwctrl = U(0xa1390003),
|
||||
+ };
|
||||
+
|
||||
+ mmdc_init(&mparam, NXP_DDR_ADDR);
|
||||
+ NOTICE("DDR Init Done\n");
|
||||
+
|
||||
+ return NXP_DRAM0_SIZE;
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h
|
||||
@@ -0,0 +1,83 @@
|
||||
+/*
|
||||
+ * Copyright 2022 NXP
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: BSD-3-Clause
|
||||
+ */
|
||||
+
|
||||
+#ifndef PLAT_DEF_H
|
||||
+#define PLAT_DEF_H
|
||||
+
|
||||
+#include <arch.h>
|
||||
+/*
|
||||
+ * Required without TBBR.
|
||||
+ * To include the defines for DDR PHY
|
||||
+ * Images.
|
||||
+ */
|
||||
+#include <tbbr_img_def.h>
|
||||
+
|
||||
+#include <policy.h>
|
||||
+#include <soc.h>
|
||||
+
|
||||
+/* DDR Related definition */
|
||||
+#define PLAT_DEF_DRAM0_SIZE 0x20000000 /* 512 MB */
|
||||
+
|
||||
+#define NXP_SYSCLK_FREQ 125000000
|
||||
+#define NXP_DDRCLK_FREQ 100000000
|
||||
+
|
||||
+/* UART related definition */
|
||||
+#define NXP_CONSOLE_ADDR NXP_UART_ADDR
|
||||
+#define NXP_CONSOLE_BAUDRATE 115200
|
||||
+
|
||||
+#define NXP_SPD_EEPROM0 0x51
|
||||
+
|
||||
+/* Size of cacheable stacks */
|
||||
+#if defined(IMAGE_BL2)
|
||||
+#if defined(TRUSTED_BOARD_BOOT)
|
||||
+#define PLATFORM_STACK_SIZE 0x2000
|
||||
+#else
|
||||
+#define PLATFORM_STACK_SIZE 0x1000
|
||||
+#endif
|
||||
+#elif defined(IMAGE_BL31)
|
||||
+#define PLATFORM_STACK_SIZE 0x1000
|
||||
+#endif
|
||||
+
|
||||
+/* SD block buffer */
|
||||
+#define NXP_SD_BLOCK_BUF_SIZE (0x00100000)
|
||||
+#define NXP_SD_BLOCK_BUF_ADDR ULL(0x80000000)
|
||||
+
|
||||
+#define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE)
|
||||
+
|
||||
+/* IO defines as needed by IO driver framework */
|
||||
+#define MAX_IO_DEVICES 3
|
||||
+#define MAX_IO_BLOCK_DEVICES 1
|
||||
+#define MAX_IO_HANDLES 4
|
||||
+
|
||||
+/*
|
||||
+ * FIP image defines - Offset at which FIP Image would be present
|
||||
+ * Image would include Bl31 , Bl33 and Bl32 (optional)
|
||||
+ */
|
||||
+#ifdef POLICY_FUSE_PROVISION
|
||||
+#define MAX_FIP_DEVICES 2
|
||||
+#endif
|
||||
+
|
||||
+#ifndef MAX_FIP_DEVICES
|
||||
+#define MAX_FIP_DEVICES 1
|
||||
+#endif
|
||||
+
|
||||
+/*
|
||||
+ * ID of the secure physical generic timer interrupt used by the BL32.
|
||||
+ */
|
||||
+#define BL32_IRQ_SEC_PHY_TIMER 29
|
||||
+
|
||||
+/*
|
||||
+ * Define properties of Group 1 Secure and Group 0 interrupts as per GICv3
|
||||
+ * terminology. On a GICv2 system or mode, the lists will be merged and treated
|
||||
+ * as Group 0 interrupts.
|
||||
+ */
|
||||
+#define PLAT_LS_G1S_IRQ_PROPS(grp) \
|
||||
+ INTR_PROP_DESC(BL32_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, grp, \
|
||||
+ GIC_INTR_CFG_LEVEL)
|
||||
+
|
||||
+#define PLAT_LS_G0_IRQ_PROPS(grp)
|
||||
+
|
||||
+#endif
|
||||
--- /dev/null
|
||||
+++ b/plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk
|
||||
@@ -0,0 +1,25 @@
|
||||
+#
|
||||
+# Copyright 2018-2022 NXP
|
||||
+#
|
||||
+# SPDX-License-Identifier: BSD-3-Clause
|
||||
+#
|
||||
+
|
||||
+# board-specific build parameters
|
||||
+BOOT_MODE := qspi
|
||||
+BOARD := ls1012afrdm
|
||||
+
|
||||
+# DDR Compilation Configs
|
||||
+DDRC_NUM_CS := 1
|
||||
+
|
||||
+# On-Board Flash Details
|
||||
+QSPI_FLASH_SZ := 0x4000000
|
||||
+
|
||||
+BL2_SOURCES += ${BOARD_PATH}/ddr_init.c
|
||||
+
|
||||
+SUPPORTED_BOOT_MODE := qspi
|
||||
+
|
||||
+# Adding platform board build info
|
||||
+include plat/nxp/common/plat_make_helper/plat_common_def.mk
|
||||
+
|
||||
+# Adding SoC build info
|
||||
+include plat/nxp/soc-ls1012a/soc.mk
|
||||
--- /dev/null
|
||||
+++ b/plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h
|
||||
@@ -0,0 +1,13 @@
|
||||
+/*
|
||||
+ * Copyright 2022 NXP
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: BSD-3-Clause
|
||||
+ */
|
||||
+
|
||||
+#ifndef PLATFORM_DEF_H
|
||||
+#define PLATFORM_DEF_H
|
||||
+
|
||||
+#include <plat_def.h>
|
||||
+#include <plat_default_def.h>
|
||||
+
|
||||
+#endif /* PLATFORM_DEF_H */
|
||||
--- /dev/null
|
||||
+++ b/plat/nxp/soc-ls1012a/ls1012afrdm/policy.h
|
||||
@@ -0,0 +1,16 @@
|
||||
+/*
|
||||
+ * Copyright 2018-2022 NXP
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: BSD-3-Clause
|
||||
+ */
|
||||
+
|
||||
+#ifndef POLICY_H
|
||||
+#define POLICY_H
|
||||
+
|
||||
+/*
|
||||
+ * Set this to 0x0 to leave the default SMMU page size in sACR
|
||||
+ * Set this to 0x1 to change the SMMU page size to 64K
|
||||
+ */
|
||||
+#define POLICY_SMMU_PAGESZ_64K 0x0
|
||||
+
|
||||
+#endif /* POLICY_H */
|
||||
Reference in New Issue
Block a user