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This commit is contained in:
121
package/kernel/ath10k-ct/Makefile
Normal file
121
package/kernel/ath10k-ct/Makefile
Normal file
@@ -0,0 +1,121 @@
|
||||
include $(TOPDIR)/rules.mk
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PKG_NAME:=ath10k-ct
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PKG_RELEASE:=1
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PKG_LICENSE:=GPLv2
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PKG_LICENSE_FILES:=
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PKG_SOURCE_URL:=https://github.com/greearb/ath10k-ct.git
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_DATE:=2024-03-03
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PKG_SOURCE_VERSION:=eb3f488a200fafc46140fd51b5e21f737ee50f24
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PKG_MIRROR_HASH:=368ed648dc7239dbcac3c6ba09be92c4b706118052d35e058cf5d1dae2917039
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# Build the 6.7 ath10k-ct driver version.
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# Probably this should match as closely as
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# possible to whatever mac80211 backports version is being used.
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CT_KVER="-6.7"
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PKG_MAINTAINER:=Ben Greear <greearb@candelatech.com>
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PKG_BUILD_PARALLEL:=1
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PKG_EXTMOD_SUBDIRS:=ath10k$(CT_KVER)
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STAMP_CONFIGURED_DEPENDS := $(STAGING_DIR)/usr/include/mac80211-backport/backport/autoconf.h
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include $(INCLUDE_DIR)/kernel.mk
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include $(INCLUDE_DIR)/package.mk
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define KernelPackage/ath10k-ct
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SUBMENU:=Wireless Drivers
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TITLE:=ath10k-ct driver optimized for CT ath10k firmware
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DEPENDS:=+kmod-mac80211 +kmod-ath +@DRIVER_11AC_SUPPORT @PCI_SUPPORT +kmod-hwmon-core
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FILES:=\
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$(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_pci.ko \
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$(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_core.ko
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AUTOLOAD:=$(call AutoProbe,ath10k_pci)
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PROVIDES:=kmod-ath10k
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VARIANT:=regular
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endef
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define KernelPackage/ath10k-ct/config
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config ATH10K-CT_LEDS
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bool "Enable LED support"
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default y
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depends on PACKAGE_kmod-ath10k-ct || PACKAGE_kmod-ath10k-ct-smallbuffers
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endef
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define KernelPackage/ath10k-ct-smallbuffers
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$(call KernelPackage/ath10k-ct)
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TITLE+= (small buffers for low-RAM devices)
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VARIANT:=smallbuffers
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endef
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NOSTDINC_FLAGS := \
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$(KERNEL_NOSTDINC_FLAGS) \
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-I$(PKG_BUILD_DIR) \
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-I$(STAGING_DIR)/usr/include/mac80211-backport/uapi \
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-I$(STAGING_DIR)/usr/include/mac80211-backport \
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-I$(STAGING_DIR)/usr/include/mac80211/uapi \
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-I$(STAGING_DIR)/usr/include/mac80211 \
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-include backport/autoconf.h \
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-include backport/backport.h
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ifdef CONFIG_PACKAGE_MAC80211_MESH
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NOSTDINC_FLAGS += -DCONFIG_MAC80211_MESH
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endif
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CT_MAKEDEFS += CONFIG_ATH10K=m CONFIG_ATH10K_PCI=m CONFIG_ATH10K_CE=y
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# This AHB logic is needed for IPQ4019 radios
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CT_MAKEDEFS += CONFIG_ATH10K_AHB=m
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_AHB
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NOSTDINC_FLAGS += -DSTANDALONE_CT
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|
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ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS
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CT_MAKEDEFS += CONFIG_ATH10K_DEBUGFS=y CONFIG_MAC80211_DEBUGFS=y
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NOSTDINC_FLAGS += -DCONFIG_MAC80211_DEBUGFS
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_DEBUGFS
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endif
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|
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ifdef CONFIG_PACKAGE_ATH_DEBUG
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_DEBUG
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endif
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ifdef CONFIG_PACKAGE_ATH_DFS
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_DFS_CERTIFIED
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endif
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|
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ifdef CONFIG_PACKAGE_ATH_SPECTRAL
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CT_MAKEDEFS += CONFIG_ATH10K_SPECTRAL=y
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_SPECTRAL
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endif
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ifeq ($(CONFIG_ATH10K-CT_LEDS),y)
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CT_MAKEDEFS += CONFIG_ATH10K_LEDS=y
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_LEDS
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endif
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|
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ifeq ($(BUILD_VARIANT),smallbuffers)
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NOSTDINC_FLAGS += -DCONFIG_ATH10K_SMALLBUFFERS
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endif
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define Build/Configure
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cp $(STAGING_DIR)/usr/include/mac80211/ath/*.h $(PKG_BUILD_DIR)
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endef
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ifneq ($(findstring c,$(OPENWRT_VERBOSE)),)
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CT_MAKEDEFS += V=1
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endif
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define Build/Compile
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+$(KERNEL_MAKE) $(CT_MAKEDEFS) $(PKG_JOBS) \
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M="$(PKG_BUILD_DIR)/ath10k$(CT_KVER)" \
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NOSTDINC_FLAGS="$(NOSTDINC_FLAGS)" \
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modules
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endef
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$(eval $(call KernelPackage,ath10k-ct))
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$(eval $(call KernelPackage,ath10k-ct-smallbuffers))
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35
package/kernel/ath10k-ct/patches/010-mac80211_backport.patch
Normal file
35
package/kernel/ath10k-ct/patches/010-mac80211_backport.patch
Normal file
@@ -0,0 +1,35 @@
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--- a/ath10k-6.7/mac.c
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+++ b/ath10k-6.7/mac.c
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@@ -2304,8 +2304,8 @@ static void ath10k_mac_vif_ap_csa_count_
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if (!arvif->is_up)
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return;
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- if (!ieee80211_beacon_cntdwn_is_complete(vif)) {
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- ieee80211_beacon_update_cntdwn(vif);
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+ if (!ieee80211_beacon_cntdwn_is_complete(vif, 0)) {
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+ ieee80211_beacon_update_cntdwn(vif, 0);
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ret = ath10k_mac_setup_bcn_tmpl(arvif);
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if (ret)
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@@ -2317,7 +2317,7 @@ static void ath10k_mac_vif_ap_csa_count_
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ath10k_warn(ar, "failed to update prb tmpl during csa: %d\n",
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ret);
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} else {
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- ieee80211_csa_finish(vif);
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+ ieee80211_csa_finish(vif, 0);
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}
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}
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--- a/ath10k-6.7/wmi.c
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+++ b/ath10k-6.7/wmi.c
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@@ -4292,8 +4292,8 @@ void ath10k_wmi_event_host_swba(struct a
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* actual channel switch is done
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*/
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if (arvif->vif->bss_conf.csa_active &&
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- ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
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- ieee80211_csa_finish(arvif->vif);
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+ ieee80211_beacon_cntdwn_is_complete(arvif->vif, 0)) {
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+ ieee80211_csa_finish(arvif->vif, 0);
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continue;
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}
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@@ -0,0 +1,60 @@
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From 630df9786fdaeb78c21f1e28c9b70ac83a1b482c Mon Sep 17 00:00:00 2001
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From: Vincent Tremblay <vincent@vtremblay.dev>
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Date: Sat, 31 Dec 2022 09:24:00 -0500
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Subject: [PATCH] ath10k: read qcom,coexist-support as a u32
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Read qcom,coexist-support as a u32 instead of a u8
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When we set the property to <1> in the DT (as specified in the doc),
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"of_property_read_u8" read 0 instead of 1. This is because of the data format.
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By default <1> is written with 32 bits.
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The problem is that the driver is trying to read a u8.
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The difference can be visualized using hexdump in a running device:
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Default 32 bits output:
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=======================
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0000000 0000 0100
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0000004
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8 bits output:
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==============
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0000000 0001
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0000001
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By changing "of_property_read_u8" by "of_property_read_u32", the driver
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is aligned with the documentation and is able to read the value without
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modifying the DT.
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The other solution would be to force the value in the DT to be saved as
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an 8 bits value (qcom,coexist-support = /bits/ 8 <1>),
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which is against the doc and less intuitive.
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Validation:
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===========
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The patch was tested on a real device and we can see in the debug logs
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that the feature is properly initialized:
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[ 109.102097] ath10k_ahb a000000.wifi: boot coex_support 1 coex_gpio_pin 52
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Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
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--- a/ath10k-6.7/core.c
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+++ b/ath10k-6.7/core.c
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@@ -2869,14 +2869,14 @@ done:
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static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
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{
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struct device_node *node;
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- u8 coex_support = 0;
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+ u32 coex_support = 0;
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int ret;
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node = ar->dev->of_node;
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if (!node)
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goto out;
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- ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
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+ ret = of_property_read_u32(node, "qcom,coexist-support", &coex_support);
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if (ret) {
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ar->coex_support = true;
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goto out;
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@@ -0,0 +1,616 @@
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From 8e1debd82466a3fe711784ab37e6b54e56011267 Mon Sep 17 00:00:00 2001
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From: Sebastian Gottschall <s.gottschall@dd-wrt.com>
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Date: Mon, 13 May 2024 17:22:25 +0300
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Subject: [PATCH] wifi: ath10k: add LED and GPIO controlling support for
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various chipsets
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Adds LED and GPIO Control support for 988x, 9887, 9888, 99x0, 9984
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based chipsets with on chipset connected led's using WMI Firmware API.
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The LED device will get available named as "ath10k-phyX" at sysfs and
|
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can be controlled with various triggers.
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Adds also debugfs interface for gpio control.
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|
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Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
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Reviewed-by: Steve deRosier <derosier@cal-sierra.com>
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[kvalo: major reorg and cleanup]
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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[ansuel: rebase and small cleanup]
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
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Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
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Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
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Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
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---
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ath10k-6.7/Kconfig | 6 ++
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ath10k-6.7/Makefile | 1 +
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ath10k-6.7/core.c | 32 ++++++++
|
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ath10k-6.7/core.h | 8 ++
|
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ath10k-6.7/hw.h | 1 +
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ath10k-6.7/leds.c | 90 +++++++++++++++++++++++
|
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ath10k-6.7/leds.h | 34 +++++++++
|
||||
ath10k-6.7/mac.c | 1 +
|
||||
ath10k-6.7/wmi-ops.h | 32 ++++++++
|
||||
ath10k-6.7/wmi-tlv.c | 2 +
|
||||
ath10k-6.7/wmi.c | 54 ++++++++++++++
|
||||
ath10k-6.7/wmi.h | 35 +++++++++
|
||||
12 files changed, 296 insertions(+)
|
||||
create mode 100644 ath10k-6.7/leds.c
|
||||
create mode 100644 ath10k-6.7/leds.h
|
||||
|
||||
--- a/ath10k-6.7/Kconfig
|
||||
+++ b/ath10k-6.7/Kconfig
|
||||
@@ -67,6 +67,12 @@ config ATH10K_DEBUGFS
|
||||
|
||||
If unsure, say Y to make it easier to debug problems.
|
||||
|
||||
+config ATH10K_LEDS
|
||||
+ bool
|
||||
+ depends on ATH10K
|
||||
+ depends on LEDS_CLASS=y || LEDS_CLASS=MAC80211
|
||||
+ default y
|
||||
+
|
||||
config ATH10K_SPECTRAL
|
||||
bool "Atheros ath10k spectral scan support"
|
||||
depends on ATH10K_DEBUGFS
|
||||
--- a/ath10k-6.7/Makefile
|
||||
+++ b/ath10k-6.7/Makefile
|
||||
@@ -20,6 +20,7 @@ ath10k_core-$(CONFIG_ATH10K_SPECTRAL) +=
|
||||
ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
|
||||
ath10k_core-$(CONFIG_ATH10K_TRACING) += trace.o
|
||||
ath10k_core-$(CONFIG_THERMAL) += thermal.o
|
||||
+ath10k_core-$(CONFIG_ATH10K_LEDS) += leds.o
|
||||
ath10k_core-$(CONFIG_MAC80211_DEBUGFS) += debugfs_sta.o
|
||||
ath10k_core-$(CONFIG_PM) += wow.o
|
||||
ath10k_core-$(CONFIG_ATH10K_CE) += ce.o
|
||||
--- a/ath10k-6.7/core.c
|
||||
+++ b/ath10k-6.7/core.c
|
||||
@@ -28,6 +28,7 @@
|
||||
#include "testmode.h"
|
||||
#include "wmi-ops.h"
|
||||
#include "coredump.h"
|
||||
+#include "leds.h"
|
||||
|
||||
/* Disable ath10k-ct DBGLOG output by default */
|
||||
unsigned int ath10k_debug_mask = ATH10K_DBG_NO_DBGLOG;
|
||||
@@ -80,6 +81,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca988x hw2.0",
|
||||
.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 1,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
@@ -120,6 +122,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca988x hw2.0 ubiquiti",
|
||||
.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 0,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
@@ -161,6 +164,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9887 hw1.0",
|
||||
.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 1,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
@@ -202,6 +206,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca6174 hw3.2 sdio",
|
||||
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 19,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -238,6 +243,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca6164 hw2.1",
|
||||
.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -278,6 +284,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca6174 hw2.1",
|
||||
.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -318,6 +325,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca6174 hw3.0",
|
||||
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -358,6 +366,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca6174 hw3.2",
|
||||
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -402,6 +411,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca99x0 hw2.0",
|
||||
.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 17,
|
||||
.otp_exe_param = 0x00000700,
|
||||
.continuous_frag_desc = true,
|
||||
.cck_rate_map_rev2 = true,
|
||||
@@ -448,6 +458,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9984/qca9994 hw1.0",
|
||||
.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 17,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
|
||||
.otp_exe_param = 0x00000700,
|
||||
.continuous_frag_desc = true,
|
||||
@@ -501,6 +512,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9888 hw2.0",
|
||||
.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 17,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
|
||||
.otp_exe_param = 0x00000700,
|
||||
.continuous_frag_desc = true,
|
||||
@@ -551,6 +563,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9377 hw1.0",
|
||||
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -591,6 +604,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9377 hw1.1",
|
||||
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 6,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -633,6 +647,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca9377 hw1.1 sdio",
|
||||
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 19,
|
||||
+ .led_pin = 0,
|
||||
.otp_exe_param = 0,
|
||||
.channel_counters_freq_hz = 88000,
|
||||
.max_probe_resp_desc_thres = 0,
|
||||
@@ -666,6 +681,7 @@ static const struct ath10k_hw_params ath
|
||||
.name = "qca4019 hw1.0",
|
||||
.patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
|
||||
.uart_pin = 7,
|
||||
+ .led_pin = 0,
|
||||
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
|
||||
.otp_exe_param = 0x0010000,
|
||||
.continuous_frag_desc = true,
|
||||
@@ -711,6 +727,7 @@ static const struct ath10k_hw_params ath
|
||||
.dev_id = 0,
|
||||
.bus = ATH10K_BUS_SNOC,
|
||||
.name = "wcn3990 hw1.0",
|
||||
+ .led_pin = 0,
|
||||
.continuous_frag_desc = true,
|
||||
.tx_chain_mask = 0x7,
|
||||
.rx_chain_mask = 0x7,
|
||||
@@ -4071,6 +4088,10 @@ int ath10k_core_start(struct ath10k *ar,
|
||||
ath10k_wmi_check_apply_board_power_ctl_table(ar);
|
||||
}
|
||||
|
||||
+ status = ath10k_leds_start(ar);
|
||||
+ if (status)
|
||||
+ goto err_hif_stop;
|
||||
+
|
||||
return 0;
|
||||
|
||||
err_hif_stop:
|
||||
@@ -4332,9 +4353,18 @@ static void ath10k_core_register_work(st
|
||||
goto err_spectral_destroy;
|
||||
}
|
||||
|
||||
+ status = ath10k_leds_register(ar);
|
||||
+ if (status) {
|
||||
+ ath10k_err(ar, "could not register leds: %d\n",
|
||||
+ status);
|
||||
+ goto err_thermal_unregister;
|
||||
+ }
|
||||
+
|
||||
set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
|
||||
return;
|
||||
|
||||
+err_thermal_unregister:
|
||||
+ ath10k_thermal_unregister(ar);
|
||||
err_spectral_destroy:
|
||||
ath10k_spectral_destroy(ar);
|
||||
err_debug_destroy:
|
||||
@@ -4394,6 +4424,8 @@ void ath10k_core_unregister(struct ath10
|
||||
if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
|
||||
return;
|
||||
|
||||
+ ath10k_leds_unregister(ar);
|
||||
+
|
||||
ath10k_thermal_unregister(ar);
|
||||
/* Stop spectral before unregistering from mac80211 to remove the
|
||||
* relayfs debugfs file cleanly. Otherwise the parent debugfs tree
|
||||
--- a/ath10k-6.7/core.h
|
||||
+++ b/ath10k-6.7/core.h
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/pci.h>
|
||||
#include <linux/uuid.h>
|
||||
#include <linux/time.h>
|
||||
+#include <linux/leds.h>
|
||||
|
||||
#include "htt.h"
|
||||
#include "htc.h"
|
||||
@@ -1589,6 +1590,13 @@ struct ath10k {
|
||||
} testmode;
|
||||
|
||||
struct {
|
||||
+ struct gpio_led wifi_led;
|
||||
+ struct led_classdev cdev;
|
||||
+ char label[48];
|
||||
+ u32 gpio_state_pin;
|
||||
+ } leds;
|
||||
+
|
||||
+ struct {
|
||||
/* protected by data_lock */
|
||||
u32 rx_crc_err_drop;
|
||||
u32 fw_crash_counter;
|
||||
--- a/ath10k-6.7/hw.h
|
||||
+++ b/ath10k-6.7/hw.h
|
||||
@@ -523,6 +523,7 @@ struct ath10k_hw_params {
|
||||
const char *name;
|
||||
u32 patch_load_addr;
|
||||
int uart_pin;
|
||||
+ int led_pin;
|
||||
u32 otp_exe_param;
|
||||
|
||||
/* Type of hw cycle counter wraparound logic, for more info
|
||||
--- /dev/null
|
||||
+++ b/ath10k-6.7/leds.c
|
||||
@@ -0,0 +1,90 @@
|
||||
+// SPDX-License-Identifier: ISC
|
||||
+/*
|
||||
+ * Copyright (c) 2005-2011 Atheros Communications Inc.
|
||||
+ * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
|
||||
+ * Copyright (c) 2018 Sebastian Gottschall <s.gottschall@dd-wrt.com>
|
||||
+ * Copyright (c) 2018 The Linux Foundation. All rights reserved.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/leds.h>
|
||||
+
|
||||
+#include "core.h"
|
||||
+#include "wmi.h"
|
||||
+#include "wmi-ops.h"
|
||||
+
|
||||
+#include "leds.h"
|
||||
+
|
||||
+static int ath10k_leds_set_brightness_blocking(struct led_classdev *led_cdev,
|
||||
+ enum led_brightness brightness)
|
||||
+{
|
||||
+ struct ath10k *ar = container_of(led_cdev, struct ath10k,
|
||||
+ leds.cdev);
|
||||
+ struct gpio_led *led = &ar->leds.wifi_led;
|
||||
+
|
||||
+ mutex_lock(&ar->conf_mutex);
|
||||
+
|
||||
+ if (ar->state != ATH10K_STATE_ON)
|
||||
+ goto out;
|
||||
+
|
||||
+ ar->leds.gpio_state_pin = (brightness != LED_OFF) ^ led->active_low;
|
||||
+ ath10k_wmi_gpio_output(ar, led->gpio, ar->leds.gpio_state_pin);
|
||||
+
|
||||
+out:
|
||||
+ mutex_unlock(&ar->conf_mutex);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int ath10k_leds_start(struct ath10k *ar)
|
||||
+{
|
||||
+ if (ar->hw_params.led_pin == 0)
|
||||
+ /* leds not supported */
|
||||
+ return 0;
|
||||
+
|
||||
+ /* under some circumstances, the gpio pin gets reconfigured
|
||||
+ * to default state by the firmware, so we need to
|
||||
+ * reconfigure it this behaviour has only ben seen on
|
||||
+ * QCA9984 and QCA99XX devices so far
|
||||
+ */
|
||||
+ ath10k_wmi_gpio_config(ar, ar->hw_params.led_pin, 0,
|
||||
+ WMI_GPIO_PULL_NONE, WMI_GPIO_INTTYPE_DISABLE);
|
||||
+ ath10k_wmi_gpio_output(ar, ar->hw_params.led_pin, 1);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int ath10k_leds_register(struct ath10k *ar)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ if (ar->hw_params.led_pin == 0)
|
||||
+ /* leds not supported */
|
||||
+ return 0;
|
||||
+
|
||||
+ snprintf(ar->leds.label, sizeof(ar->leds.label), "ath10k-%s",
|
||||
+ wiphy_name(ar->hw->wiphy));
|
||||
+ ar->leds.wifi_led.active_low = 1;
|
||||
+ ar->leds.wifi_led.gpio = ar->hw_params.led_pin;
|
||||
+ ar->leds.wifi_led.name = ar->leds.label;
|
||||
+ ar->leds.wifi_led.default_state = LEDS_GPIO_DEFSTATE_KEEP;
|
||||
+
|
||||
+ ar->leds.cdev.name = ar->leds.label;
|
||||
+ ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
|
||||
+ ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
|
||||
+
|
||||
+ ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void ath10k_leds_unregister(struct ath10k *ar)
|
||||
+{
|
||||
+ if (ar->hw_params.led_pin == 0)
|
||||
+ /* leds not supported */
|
||||
+ return;
|
||||
+
|
||||
+ led_classdev_unregister(&ar->leds.cdev);
|
||||
+}
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/ath10k-6.7/leds.h
|
||||
@@ -0,0 +1,34 @@
|
||||
+/* SPDX-License-Identifier: ISC */
|
||||
+/*
|
||||
+ * Copyright (c) 2005-2011 Atheros Communications Inc.
|
||||
+ * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
|
||||
+ * Copyright (c) 2018 Sebastian Gottschall <s.gottschall@dd-wrt.com>
|
||||
+ * Copyright (c) 2018 The Linux Foundation. All rights reserved.
|
||||
+ */
|
||||
+
|
||||
+#ifndef _LEDS_H_
|
||||
+#define _LEDS_H_
|
||||
+
|
||||
+#include "core.h"
|
||||
+
|
||||
+#ifdef CONFIG_ATH10K_LEDS
|
||||
+void ath10k_leds_unregister(struct ath10k *ar);
|
||||
+int ath10k_leds_start(struct ath10k *ar);
|
||||
+int ath10k_leds_register(struct ath10k *ar);
|
||||
+#else
|
||||
+static inline void ath10k_leds_unregister(struct ath10k *ar)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
+static inline int ath10k_leds_start(struct ath10k *ar)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static inline int ath10k_leds_register(struct ath10k *ar)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+#endif
|
||||
+#endif /* _LEDS_H_ */
|
||||
--- a/ath10k-6.7/mac.c
|
||||
+++ b/ath10k-6.7/mac.c
|
||||
@@ -25,6 +25,7 @@
|
||||
#include "wmi-tlv.h"
|
||||
#include "wmi-ops.h"
|
||||
#include "wow.h"
|
||||
+#include "leds.h"
|
||||
|
||||
/*********/
|
||||
/* Rates */
|
||||
--- a/ath10k-6.7/wmi-ops.h
|
||||
+++ b/ath10k-6.7/wmi-ops.h
|
||||
@@ -228,7 +228,10 @@ struct wmi_ops {
|
||||
const struct wmi_bb_timing_cfg_arg *arg);
|
||||
struct sk_buff *(*gen_per_peer_per_tid_cfg)(struct ath10k *ar,
|
||||
const struct wmi_per_peer_per_tid_cfg_arg *arg);
|
||||
+ struct sk_buff *(*gen_gpio_config)(struct ath10k *ar, u32 gpio_num,
|
||||
+ u32 input, u32 pull_type, u32 intr_mode);
|
||||
|
||||
+ struct sk_buff *(*gen_gpio_output)(struct ath10k *ar, u32 gpio_num, u32 set);
|
||||
};
|
||||
|
||||
int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
|
||||
@@ -1147,6 +1150,35 @@ ath10k_wmi_force_fw_hang(struct ath10k *
|
||||
return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
|
||||
}
|
||||
|
||||
+static inline int ath10k_wmi_gpio_config(struct ath10k *ar, u32 gpio_num,
|
||||
+ u32 input, u32 pull_type, u32 intr_mode)
|
||||
+{
|
||||
+ struct sk_buff *skb;
|
||||
+
|
||||
+ if (!ar->wmi.ops->gen_gpio_config)
|
||||
+ return -EOPNOTSUPP;
|
||||
+
|
||||
+ skb = ar->wmi.ops->gen_gpio_config(ar, gpio_num, input, pull_type, intr_mode);
|
||||
+ if (IS_ERR(skb))
|
||||
+ return PTR_ERR(skb);
|
||||
+
|
||||
+ return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_config_cmdid);
|
||||
+}
|
||||
+
|
||||
+static inline int ath10k_wmi_gpio_output(struct ath10k *ar, u32 gpio_num, u32 set)
|
||||
+{
|
||||
+ struct sk_buff *skb;
|
||||
+
|
||||
+ if (!ar->wmi.ops->gen_gpio_config)
|
||||
+ return -EOPNOTSUPP;
|
||||
+
|
||||
+ skb = ar->wmi.ops->gen_gpio_output(ar, gpio_num, set);
|
||||
+ if (IS_ERR(skb))
|
||||
+ return PTR_ERR(skb);
|
||||
+
|
||||
+ return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->gpio_output_cmdid);
|
||||
+}
|
||||
+
|
||||
static inline int
|
||||
ath10k_wmi_dbglog_cfg(struct ath10k *ar, u64 module_enable, u32 log_level)
|
||||
{
|
||||
--- a/ath10k-6.7/wmi-tlv.c
|
||||
+++ b/ath10k-6.7/wmi-tlv.c
|
||||
@@ -4601,6 +4601,8 @@ static const struct wmi_ops wmi_tlv_ops
|
||||
.gen_echo = ath10k_wmi_tlv_op_gen_echo,
|
||||
.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
|
||||
.gen_vdev_spectral_enable = ath10k_wmi_tlv_op_gen_vdev_spectral_enable,
|
||||
+ /* .gen_gpio_config not implemented */
|
||||
+ /* .gen_gpio_output not implemented */
|
||||
};
|
||||
|
||||
static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
|
||||
--- a/ath10k-6.7/wmi.c
|
||||
+++ b/ath10k-6.7/wmi.c
|
||||
@@ -8446,6 +8446,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
|
||||
return skb;
|
||||
}
|
||||
|
||||
+static struct sk_buff *ath10k_wmi_op_gen_gpio_config(struct ath10k *ar,
|
||||
+ u32 gpio_num, u32 input,
|
||||
+ u32 pull_type, u32 intr_mode)
|
||||
+{
|
||||
+ struct wmi_gpio_config_cmd *cmd;
|
||||
+ struct sk_buff *skb;
|
||||
+
|
||||
+ skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
|
||||
+ if (!skb)
|
||||
+ return ERR_PTR(-ENOMEM);
|
||||
+
|
||||
+ cmd = (struct wmi_gpio_config_cmd *)skb->data;
|
||||
+ cmd->pull_type = __cpu_to_le32(pull_type);
|
||||
+ cmd->gpio_num = __cpu_to_le32(gpio_num);
|
||||
+ cmd->input = __cpu_to_le32(input);
|
||||
+ cmd->intr_mode = __cpu_to_le32(intr_mode);
|
||||
+
|
||||
+ ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_config gpio_num 0x%08x input 0x%08x pull_type 0x%08x intr_mode 0x%08x\n",
|
||||
+ gpio_num, input, pull_type, intr_mode);
|
||||
+
|
||||
+ return skb;
|
||||
+}
|
||||
+
|
||||
+static struct sk_buff *ath10k_wmi_op_gen_gpio_output(struct ath10k *ar,
|
||||
+ u32 gpio_num, u32 set)
|
||||
+{
|
||||
+ struct wmi_gpio_output_cmd *cmd;
|
||||
+ struct sk_buff *skb;
|
||||
+
|
||||
+ skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
|
||||
+ if (!skb)
|
||||
+ return ERR_PTR(-ENOMEM);
|
||||
+
|
||||
+ cmd = (struct wmi_gpio_output_cmd *)skb->data;
|
||||
+ cmd->gpio_num = __cpu_to_le32(gpio_num);
|
||||
+ cmd->set = __cpu_to_le32(set);
|
||||
+
|
||||
+ ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_output gpio_num 0x%08x set 0x%08x\n",
|
||||
+ gpio_num, set);
|
||||
+
|
||||
+ return skb;
|
||||
+}
|
||||
+
|
||||
static struct sk_buff *
|
||||
ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
|
||||
enum wmi_sta_ps_mode psmode)
|
||||
@@ -10255,6 +10298,9 @@ static const struct wmi_ops wmi_ops = {
|
||||
.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
|
||||
.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
|
||||
.gen_echo = ath10k_wmi_op_gen_echo,
|
||||
+ .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
|
||||
+ .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
|
||||
+
|
||||
/* .gen_bcn_tmpl not implemented */
|
||||
/* .gen_prb_tmpl not implemented */
|
||||
/* .gen_p2p_go_bcn_ie not implemented */
|
||||
@@ -10325,6 +10371,8 @@ static const struct wmi_ops wmi_10_1_ops
|
||||
.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
|
||||
.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
|
||||
.gen_echo = ath10k_wmi_op_gen_echo,
|
||||
+ .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
|
||||
+ .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
|
||||
/* .gen_bcn_tmpl not implemented */
|
||||
/* .gen_prb_tmpl not implemented */
|
||||
/* .gen_p2p_go_bcn_ie not implemented */
|
||||
@@ -10404,6 +10452,8 @@ static const struct wmi_ops wmi_10_2_ops
|
||||
.gen_delba_send = ath10k_wmi_op_gen_delba_send,
|
||||
.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
|
||||
.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
|
||||
+ .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
|
||||
+ .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
|
||||
/* .gen_pdev_enable_adaptive_cca not implemented */
|
||||
};
|
||||
|
||||
@@ -10475,6 +10525,8 @@ static const struct wmi_ops wmi_10_2_4_o
|
||||
ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
|
||||
.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
|
||||
.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
|
||||
+ .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
|
||||
+ .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
|
||||
/* .gen_bcn_tmpl not implemented */
|
||||
/* .gen_prb_tmpl not implemented */
|
||||
/* .gen_p2p_go_bcn_ie not implemented */
|
||||
@@ -10557,6 +10609,8 @@ static const struct wmi_ops wmi_10_4_ops
|
||||
.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
|
||||
.gen_echo = ath10k_wmi_op_gen_echo,
|
||||
.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
|
||||
+ .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
|
||||
+ .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
|
||||
};
|
||||
|
||||
int ath10k_wmi_attach(struct ath10k *ar)
|
||||
--- a/ath10k-6.7/wmi.h
|
||||
+++ b/ath10k-6.7/wmi.h
|
||||
@@ -3133,6 +3133,41 @@ enum wmi_10_4_feature_mask {
|
||||
|
||||
};
|
||||
|
||||
+/* WMI_GPIO_CONFIG_CMDID */
|
||||
+enum {
|
||||
+ WMI_GPIO_PULL_NONE,
|
||||
+ WMI_GPIO_PULL_UP,
|
||||
+ WMI_GPIO_PULL_DOWN,
|
||||
+};
|
||||
+
|
||||
+enum {
|
||||
+ WMI_GPIO_INTTYPE_DISABLE,
|
||||
+ WMI_GPIO_INTTYPE_RISING_EDGE,
|
||||
+ WMI_GPIO_INTTYPE_FALLING_EDGE,
|
||||
+ WMI_GPIO_INTTYPE_BOTH_EDGE,
|
||||
+ WMI_GPIO_INTTYPE_LEVEL_LOW,
|
||||
+ WMI_GPIO_INTTYPE_LEVEL_HIGH
|
||||
+};
|
||||
+
|
||||
+/* WMI_GPIO_CONFIG_CMDID */
|
||||
+struct wmi_gpio_config_cmd {
|
||||
+ __le32 gpio_num; /* GPIO number to be setup */
|
||||
+ __le32 input; /* 0 - Output/ 1 - Input */
|
||||
+ __le32 pull_type; /* Pull type defined above */
|
||||
+ __le32 intr_mode; /* Interrupt mode defined above (Input) */
|
||||
+} __packed;
|
||||
+
|
||||
+/* WMI_GPIO_OUTPUT_CMDID */
|
||||
+struct wmi_gpio_output_cmd {
|
||||
+ __le32 gpio_num; /* GPIO number to be setup */
|
||||
+ __le32 set; /* Set the GPIO pin*/
|
||||
+} __packed;
|
||||
+
|
||||
+/* WMI_GPIO_INPUT_EVENTID */
|
||||
+struct wmi_gpio_input_event {
|
||||
+ __le32 gpio_num; /* GPIO number which changed state */
|
||||
+} __packed;
|
||||
+
|
||||
struct wmi_ext_resource_config_10_4_cmd {
|
||||
/* contains enum wmi_host_platform_type */
|
||||
__le32 host_platform_config;
|
||||
@@ -0,0 +1,51 @@
|
||||
From 79c9d7aabae1d1da9eea97d83b61e1517a8a2221 Mon Sep 17 00:00:00 2001
|
||||
From: Mathias Kresin <dev@kresin.me>
|
||||
Date: Fri, 22 Jun 2018 18:59:44 +0200
|
||||
Subject: [PATCH] ath10k: use tpt LED trigger by default
|
||||
|
||||
Use the tpt LED trigger for each created phy led. Ths way LEDs attached
|
||||
to the ath10k GPIO pins are indicating the phy status and blink on
|
||||
traffic.
|
||||
|
||||
Signed-off-by: Mathias Kresin <dev@kresin.me>
|
||||
---
|
||||
ath10k-6.7/core.h | 4 ++++
|
||||
ath10k-6.7/leds.c | 4 +---
|
||||
ath10k-6.7/mac.c | 2 +-
|
||||
3 files changed, 6 insertions(+), 4 deletions(-)
|
||||
|
||||
--- a/ath10k-6.7/core.h
|
||||
+++ b/ath10k-6.7/core.h
|
||||
@@ -1704,6 +1704,10 @@ struct ath10k {
|
||||
u8 csi_data[4096];
|
||||
u16 csi_data_len;
|
||||
|
||||
+#ifdef CPTCFG_MAC80211_LEDS
|
||||
+ const char *led_default_trigger;
|
||||
+#endif
|
||||
+
|
||||
/* must be last */
|
||||
u8 drv_priv[] __aligned(sizeof(void *));
|
||||
};
|
||||
--- a/ath10k-6.7/leds.c
|
||||
+++ b/ath10k-6.7/leds.c
|
||||
@@ -70,7 +70,7 @@ int ath10k_leds_register(struct ath10k *
|
||||
|
||||
ar->leds.cdev.name = ar->leds.label;
|
||||
ar->leds.cdev.brightness_set_blocking = ath10k_leds_set_brightness_blocking;
|
||||
- ar->leds.cdev.default_trigger = ar->leds.wifi_led.default_trigger;
|
||||
+ ar->leds.cdev.default_trigger = ar->led_default_trigger;
|
||||
|
||||
ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
|
||||
if (ret)
|
||||
--- a/ath10k-6.7/mac.c
|
||||
+++ b/ath10k-6.7/mac.c
|
||||
@@ -11622,7 +11622,7 @@ int ath10k_mac_register(struct ath10k *a
|
||||
ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
|
||||
|
||||
#ifdef CPTCFG_MAC80211_LEDS
|
||||
- ieee80211_create_tpt_led_trigger(ar->hw,
|
||||
+ ar->led_default_trigger = ieee80211_create_tpt_led_trigger(ar->hw,
|
||||
IEEE80211_TPT_LEDTRIG_FL_RADIO, ath10k_tpt_blink,
|
||||
ARRAY_SIZE(ath10k_tpt_blink));
|
||||
#endif
|
||||
@@ -0,0 +1,11 @@
|
||||
--- a/ath10k-6.7/wmi.h
|
||||
+++ b/ath10k-6.7/wmi.h
|
||||
@@ -6341,7 +6341,7 @@ struct qca9880_set_ctl_table_cmd {
|
||||
__le32 ctl_len; /* in bytes. This may be ignored in firmware,
|
||||
* make sure ctl_info data is sizeof(qca9880_power_ctl) */
|
||||
/** ctl array (len adjusted to number of words) */
|
||||
- __le32 ctl_info[1]; /* data would be the qca9880_power_ctl table above */
|
||||
+ __le32 ctl_info[]; /* data would be the qca9880_power_ctl table above */
|
||||
};
|
||||
|
||||
/* Used by: WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID */
|
||||
@@ -0,0 +1,14 @@
|
||||
--- a/ath10k-6.7/htt.h
|
||||
+++ b/ath10k-6.7/htt.h
|
||||
@@ -237,7 +237,11 @@ enum htt_rx_ring_flags {
|
||||
};
|
||||
|
||||
#define HTT_RX_RING_SIZE_MIN 128
|
||||
+#ifndef CONFIG_ATH10K_SMALLBUFFERS
|
||||
#define HTT_RX_RING_SIZE_MAX 2048
|
||||
+#else
|
||||
+#define HTT_RX_RING_SIZE_MAX 512
|
||||
+#endif
|
||||
#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
|
||||
#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
|
||||
#define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
|
||||
@@ -0,0 +1,50 @@
|
||||
--- a/ath10k-6.7/pci.c
|
||||
+++ b/ath10k-6.7/pci.c
|
||||
@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
|
||||
.flags = CE_ATTR_FLAGS,
|
||||
.src_nentries = 0,
|
||||
.src_sz_max = 2048,
|
||||
+#ifndef CONFIG_ATH10K_SMALLBUFFERS
|
||||
.dest_nentries = 512,
|
||||
+#else
|
||||
+ .dest_nentries = 128,
|
||||
+#endif
|
||||
.recv_cb = ath10k_pci_htt_htc_rx_cb,
|
||||
},
|
||||
|
||||
@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
|
||||
.flags = CE_ATTR_FLAGS,
|
||||
.src_nentries = 0,
|
||||
.src_sz_max = 2048,
|
||||
+#ifndef CONFIG_ATH10K_SMALLBUFFERS
|
||||
.dest_nentries = 128,
|
||||
+#else
|
||||
+ .dest_nentries = 64,
|
||||
+#endif
|
||||
.recv_cb = ath10k_pci_htc_rx_cb,
|
||||
},
|
||||
|
||||
@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
|
||||
.flags = CE_ATTR_FLAGS,
|
||||
.src_nentries = 0,
|
||||
.src_sz_max = 512,
|
||||
+#ifndef CONFIG_ATH10K_SMALLBUFFERS
|
||||
.dest_nentries = 512,
|
||||
+#else
|
||||
+ .dest_nentries = 128,
|
||||
+#endif
|
||||
.recv_cb = ath10k_pci_htt_rx_cb,
|
||||
},
|
||||
|
||||
@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
|
||||
.flags = CE_ATTR_FLAGS,
|
||||
.src_nentries = 0,
|
||||
.src_sz_max = 2048,
|
||||
+#ifndef CONFIG_ATH10K_SMALLBUFFERS
|
||||
.dest_nentries = 128,
|
||||
+#else
|
||||
+ .dest_nentries = 96,
|
||||
+#endif
|
||||
.recv_cb = ath10k_pci_pktlog_rx_cb,
|
||||
},
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
From f7d6edafe4358e3880a26775cfde4cd5c71ba063 Mon Sep 17 00:00:00 2001
|
||||
From: David Bauer <mail@david-bauer.net>
|
||||
Date: Wed, 5 Jul 2023 01:30:29 +0200
|
||||
Subject: [PATCH] ath10k: always use mac80211 loss detection
|
||||
|
||||
ath10k does not report excessive loss in case of broken block-ack
|
||||
sessions. The loss is communicated to the host-os, but ath10k does not
|
||||
trigger a low-ack events by itself.
|
||||
|
||||
The mac80211 framework for loss detection however detects this
|
||||
circumstance well in case of ath10k. So use it regardless of ath10k's
|
||||
own loss detection mechanism.
|
||||
|
||||
Signed-off-by: David Bauer <mail@david-bauer.net>
|
||||
---
|
||||
ath10k-6.7/mac.c | 1 -
|
||||
1 file changed, 1 deletion(-)
|
||||
|
||||
--- a/ath10k-6.7/mac.c
|
||||
+++ b/ath10k-6.7/mac.c
|
||||
@@ -11311,7 +11311,6 @@ int ath10k_mac_register(struct ath10k *a
|
||||
ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
|
||||
ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
|
||||
ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);
|
||||
- ieee80211_hw_set(ar->hw, REPORTS_LOW_ACK);
|
||||
|
||||
if (!test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags))
|
||||
ieee80211_hw_set(ar->hw, SW_CRYPTO_CONTROL);
|
||||
185
package/kernel/bcm27xx-gpu-fw/Makefile
Normal file
185
package/kernel/bcm27xx-gpu-fw/Makefile
Normal file
@@ -0,0 +1,185 @@
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=bcm27xx-gpu-fw
|
||||
PKG_VERSION:=2024-04-24
|
||||
PKG_RELEASE:=969420b4121b522ab33c5001074cc4c2547dafaf
|
||||
|
||||
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_RELEASE)
|
||||
|
||||
PKG_FLAGS:=nonshared
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
RPI_FIRMWARE_URL:=@GITHUB/raspberrypi/firmware/$(PKG_RELEASE)/boot/
|
||||
RPI_FIRMWARE_FILE:=rpi-firmware-$(PKG_RELEASE)
|
||||
|
||||
define Download/LICENCE_broadcom
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-LICENCE.broadcom
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=LICENCE.broadcom
|
||||
HASH:=c7283ff51f863d93a275c66e3b4cb08021a5dd4d8c1e7acc47d872fbe52d3d6b
|
||||
endef
|
||||
$(eval $(call Download,LICENCE_broadcom))
|
||||
|
||||
define Download/bootcode_bin
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-bootcode.bin
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=bootcode.bin
|
||||
HASH:=af603ebd97e7b692c30195563f7b25656eb05d57838cf1a715ebb470d1614ce4
|
||||
endef
|
||||
$(eval $(call Download,bootcode_bin))
|
||||
|
||||
define Download/fixup_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup.dat
|
||||
HASH:=94ae3ff8363a6a2832f173241597b6500cf67044d34155a1251fe58671dd6ce7
|
||||
endef
|
||||
$(eval $(call Download,fixup_dat))
|
||||
|
||||
define Download/fixup_cd_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup_cd.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup_cd.dat
|
||||
HASH:=2d7c19e46780ef29867f8ed200a94bb77a7982f5bc41219afe864d2303ba3084
|
||||
endef
|
||||
$(eval $(call Download,fixup_cd_dat))
|
||||
|
||||
define Download/fixup_x_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup_x.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup_x.dat
|
||||
HASH:=692393562d0650f7d1891ba0143ad0500ccf07129947d386d56350e7ca204d16
|
||||
endef
|
||||
$(eval $(call Download,fixup_x_dat))
|
||||
|
||||
define Download/fixup4_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup4.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup4.dat
|
||||
HASH:=63a4a8f356e2b8ed2850d68b9adf21008ef1dfa7743b22ddc26987e4d3171302
|
||||
endef
|
||||
$(eval $(call Download,fixup4_dat))
|
||||
|
||||
define Download/fixup4cd_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup4cd.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup4cd.dat
|
||||
HASH:=2d7c19e46780ef29867f8ed200a94bb77a7982f5bc41219afe864d2303ba3084
|
||||
endef
|
||||
$(eval $(call Download,fixup4cd_dat))
|
||||
|
||||
define Download/fixup4x_dat
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-fixup4x.dat
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=fixup4x.dat
|
||||
HASH:=41328f6587c0cd47ae7fa7edab4bf62730dda54caf52ffaa3bfb24ff93b8348b
|
||||
endef
|
||||
$(eval $(call Download,fixup4x_dat))
|
||||
|
||||
define Download/start_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start.elf
|
||||
HASH:=8637fb847ff62f69fbb8b98b1beff685b47cf4095580e830724f6a27fb20fee0
|
||||
endef
|
||||
$(eval $(call Download,start_elf))
|
||||
|
||||
define Download/start_cd_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start_cd.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start_cd.elf
|
||||
HASH:=6832f57236f6c453cd72eac1f0ab53e265037fb75fc41301448fedb8d505f2b3
|
||||
endef
|
||||
$(eval $(call Download,start_cd_elf))
|
||||
|
||||
define Download/start_x_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start_x.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start_x.elf
|
||||
HASH:=6f72a3fda8cbdacb340676e18a8468b9edd89458173b5ecf3c12b00c147dce40
|
||||
endef
|
||||
$(eval $(call Download,start_x_elf))
|
||||
|
||||
define Download/start4_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start4.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start4.elf
|
||||
HASH:=badf4cd8822d1b85ad56ddb9e32e9b4220c88099c8cc0c3e70ae77190571c8ef
|
||||
endef
|
||||
$(eval $(call Download,start4_elf))
|
||||
|
||||
define Download/start4cd_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start4cd.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start4cd.elf
|
||||
HASH:=7d3f13c8412c6b0efdbd3b53439776f3552621cc28ee887caaac539fb063ad8a
|
||||
endef
|
||||
$(eval $(call Download,start4cd_elf))
|
||||
|
||||
define Download/start4x_elf
|
||||
FILE:=$(RPI_FIRMWARE_FILE)-start4x.elf
|
||||
URL:=$(RPI_FIRMWARE_URL)
|
||||
URL_FILE:=start4x.elf
|
||||
HASH:=c30fbdfedad7180245ff567ccdea953fc1816d0da3ff4701b15071c6f8b47a89
|
||||
endef
|
||||
$(eval $(call Download,start4x_elf))
|
||||
|
||||
define Package/bcm27xx-gpu-fw
|
||||
SECTION:=boot
|
||||
CATEGORY:=Boot Loaders
|
||||
DEPENDS:=@TARGET_bcm27xx
|
||||
TITLE:=bcm27xx-gpu-fw
|
||||
DEFAULT:=y if TARGET_bcm27xx
|
||||
endef
|
||||
|
||||
define Package/bcm27xx-gpu-fw/description
|
||||
GPU and kernel boot firmware for bcm27xx.
|
||||
endef
|
||||
|
||||
define Build/Prepare
|
||||
rm -rf $(PKG_BUILD_DIR)
|
||||
mkdir -p $(PKG_BUILD_DIR)
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-LICENCE.broadcom $(PKG_BUILD_DIR)/LICENCE.broadcom
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-bootcode.bin $(PKG_BUILD_DIR)/bootcode.bin
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup.dat $(PKG_BUILD_DIR)/fixup.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_cd.dat $(PKG_BUILD_DIR)/fixup_cd.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_x.dat $(PKG_BUILD_DIR)/fixup_x.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4.dat $(PKG_BUILD_DIR)/fixup4.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4cd.dat $(PKG_BUILD_DIR)/fixup4cd.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4x.dat $(PKG_BUILD_DIR)/fixup4x.dat
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start.elf $(PKG_BUILD_DIR)/start.elf
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_cd.elf $(PKG_BUILD_DIR)/start_cd.elf
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_x.elf $(PKG_BUILD_DIR)/start_x.elf
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4.elf $(PKG_BUILD_DIR)/start4.elf
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4cd.elf $(PKG_BUILD_DIR)/start4cd.elf
|
||||
$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4x.elf $(PKG_BUILD_DIR)/start4x.elf
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
true
|
||||
endef
|
||||
|
||||
define Package/bcm27xx-gpu-fw/install
|
||||
true
|
||||
endef
|
||||
|
||||
define Build/InstallDev
|
||||
$(CP) $(PKG_BUILD_DIR)/bootcode.bin $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/LICENCE.broadcom $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start_cd.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start_x.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start4.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start4cd.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/start4x.elf $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup.dat $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup_cd.dat $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup_x.dat $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup4.dat $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup4cd.dat $(KERNEL_BUILD_DIR)
|
||||
$(CP) $(PKG_BUILD_DIR)/fixup4x.dat $(KERNEL_BUILD_DIR)
|
||||
endef
|
||||
|
||||
$(eval $(call BuildPackage,bcm27xx-gpu-fw))
|
||||
43
package/kernel/bcm63xx-cfe/Makefile
Normal file
43
package/kernel/bcm63xx-cfe/Makefile
Normal file
@@ -0,0 +1,43 @@
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=bcm63xx-cfe
|
||||
PKG_RELEASE:=1
|
||||
|
||||
PKG_SOURCE_URL:=https://github.com/openwrt/bcm63xx-cfe.git
|
||||
PKG_SOURCE_PROTO:=git
|
||||
PKG_SOURCE_DATE:=2024-06-25
|
||||
PKG_SOURCE_VERSION:=6519bd2dde3535cafeea43157755f4dbef2f90c5
|
||||
PKG_MIRROR_HASH:=db4da580b7a611a2b4ddd4ff812e5f8ddfd9694b6f5fd8246a341e61967c00ef
|
||||
|
||||
PKG_FLAGS:=nonshared
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define Package/bcm63xx-cfe
|
||||
SECTION:=boot
|
||||
CATEGORY:=Boot Loaders
|
||||
DEPENDS:=@(TARGET_bcm4908||TARGET_bcm63xx||TARGET_bmips)
|
||||
TITLE:=bcm63xx-cfe
|
||||
DEFAULT:=y
|
||||
endef
|
||||
|
||||
define Package/bcm63xx-cfe/description
|
||||
CFE RAM binaries for bcm63xx.
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
true
|
||||
endef
|
||||
|
||||
define Package/bcm63xx-cfe/install
|
||||
true
|
||||
endef
|
||||
|
||||
define Build/InstallDev
|
||||
rm -rf $(KERNEL_BUILD_DIR)/$(PKG_NAME)
|
||||
mkdir -p $(KERNEL_BUILD_DIR)/$(PKG_NAME)
|
||||
$(CP) -r $(PKG_BUILD_DIR)/* $(KERNEL_BUILD_DIR)/$(PKG_NAME)
|
||||
endef
|
||||
|
||||
$(eval $(call BuildPackage,bcm63xx-cfe))
|
||||
113
package/kernel/bpf-headers/Makefile
Normal file
113
package/kernel/bpf-headers/Makefile
Normal file
@@ -0,0 +1,113 @@
|
||||
#
|
||||
# Copyright (C) 2006-2009 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
include $(TOPDIR)/rules.mk
|
||||
|
||||
override QUILT:=
|
||||
override HOST_QUILT:=
|
||||
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
|
||||
PKG_NAME:=linux
|
||||
PKG_PATCHVER:=5.15
|
||||
# Manually include kernel version and hash from kernel details file
|
||||
include $(INCLUDE_DIR)/kernel-$(PKG_PATCHVER)
|
||||
|
||||
PKG_VERSION:=$(PKG_PATCHVER)$(strip $(LINUX_VERSION-$(PKG_PATCHVER)))
|
||||
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
|
||||
PKG_SOURCE_URL:=@KERNEL/linux/kernel/v$(word 1,$(subst ., ,$(PKG_PATCHVER))).x
|
||||
PKG_HASH:=$(LINUX_KERNEL_HASH-$(strip $(PKG_VERSION)))
|
||||
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/bpf-headers/$(PKG_NAME)-$(PKG_VERSION)
|
||||
|
||||
GENERIC_PLATFORM_DIR := $(CURDIR)/../../../target/linux/generic
|
||||
GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
|
||||
GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
|
||||
GENERIC_HACK_DIR := $(GENERIC_PLATFORM_DIR)/hack$(if $(wildcard $(GENERIC_PLATFORM_DIR)/hack-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
|
||||
GENERIC_FILES_DIR := $(foreach dir,$(wildcard $(GENERIC_PLATFORM_DIR)/files $(GENERIC_PLATFORM_DIR)/files-$(PKG_PATCHVER)),"$(dir)")
|
||||
PATCH_DIR := $(CURDIR)/patches
|
||||
FILES_DIR :=
|
||||
|
||||
REAL_LINUX_DIR := $(LINUX_DIR)
|
||||
LINUX_DIR := $(PKG_BUILD_DIR)
|
||||
|
||||
include $(INCLUDE_DIR)/bpf.mk
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define Package/bpf-headers
|
||||
SECTION:=kernel
|
||||
CATEGORY:=Kernel modules
|
||||
TITLE:=eBPF kernel headers
|
||||
BUILDONLY:=1
|
||||
HIDDEN:=1
|
||||
endef
|
||||
|
||||
PKG_CONFIG_PATH:=
|
||||
|
||||
export HOST_EXTRACFLAGS=-I$(STAGING_DIR_HOST)/include
|
||||
|
||||
KERNEL_MAKE := \
|
||||
$(MAKE) -C $(PKG_BUILD_DIR) \
|
||||
ARCH=$(BPF_KARCH) \
|
||||
CROSS_COMPILE=$(BPF_ARCH)-linux- \
|
||||
LLVM=1 CC="$(CLANG)" LD="$(TARGET_CROSS)ld" \
|
||||
HOSTCC="$(HOSTCC)" \
|
||||
HOSTCXX="$(HOSTCXX)" \
|
||||
KBUILD_HOSTLDLIBS="-L$(STAGING_DIR_HOST)/lib" \
|
||||
CONFIG_SHELL="$(BASH)" \
|
||||
INSTALL_HDR_PATH="$(PKG_BUILD_DIR)/user_headers"
|
||||
|
||||
define Build/Patch
|
||||
$(Kernel/Patch/Default)
|
||||
endef
|
||||
|
||||
BPF_DOC = $(PKG_BUILD_DIR)/scripts/bpf_doc.py
|
||||
|
||||
define Build/Configure/64
|
||||
echo 'CONFIG_CPU_MIPS64_R2=y' >> $(PKG_BUILD_DIR)/.config
|
||||
echo 'CONFIG_64BIT=y' >> $(PKG_BUILD_DIR)/.config
|
||||
endef
|
||||
|
||||
define Build/Configure
|
||||
grep -vE 'CONFIG_(CPU_.*ENDIAN|HZ)' $(PKG_BUILD_DIR)/arch/mips/configs/generic_defconfig > $(PKG_BUILD_DIR)/.config
|
||||
echo 'CONFIG_CPU_$(if $(CONFIG_BIG_ENDIAN),BIG,LITTLE)_ENDIAN=y' >> $(PKG_BUILD_DIR)/.config
|
||||
$(if $(CONFIG_ARCH_64BIT),$(Build/Configure/64))
|
||||
grep CONFIG_HZ $(REAL_LINUX_DIR)/.config >> $(PKG_BUILD_DIR)/.config
|
||||
yes '' | $(KERNEL_MAKE) oldconfig
|
||||
grep 'CONFIG_HZ=' $(REAL_LINUX_DIR)/.config | \
|
||||
cut -d= -f2 | \
|
||||
bc -q $(LINUX_DIR)/kernel/time/timeconst.bc \
|
||||
> $(LINUX_DIR)/include/generated/timeconst.h
|
||||
$(BPF_DOC) --header \
|
||||
--file $(LINUX_DIR)/tools/include/uapi/linux/bpf.h \
|
||||
> $(PKG_BUILD_DIR)/tools/lib/bpf/bpf_helper_defs.h
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
$(KERNEL_MAKE) archprepare headers_install
|
||||
endef
|
||||
|
||||
define Build/InstallDev
|
||||
mkdir -p $(1)/bpf-headers/arch $(1)/bpf-headers/tools
|
||||
$(CP) \
|
||||
$(PKG_BUILD_DIR)/arch/$(BPF_KARCH) \
|
||||
$(1)/bpf-headers/arch/
|
||||
$(CP) \
|
||||
$(PKG_BUILD_DIR)/tools/lib \
|
||||
$(PKG_BUILD_DIR)/tools/testing \
|
||||
$(1)/bpf-headers/tools/
|
||||
$(CP) \
|
||||
$(PKG_BUILD_DIR)/include \
|
||||
$(PKG_BUILD_DIR)/samples \
|
||||
$(PKG_BUILD_DIR)/scripts \
|
||||
$(PKG_BUILD_DIR)/user_headers \
|
||||
$(1)/bpf-headers
|
||||
$(CP) \
|
||||
$(CURDIR)/files/stdarg.h \
|
||||
$(1)/bpf-headers/include
|
||||
endef
|
||||
|
||||
$(eval $(call BuildPackage,bpf-headers))
|
||||
19
package/kernel/bpf-headers/files/stdarg.h
Normal file
19
package/kernel/bpf-headers/files/stdarg.h
Normal file
@@ -0,0 +1,19 @@
|
||||
#ifndef _STDARG_H
|
||||
#define _STDARG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef __builtin_va_list va_list;
|
||||
|
||||
#define va_start(v,l) __builtin_va_start(v,l)
|
||||
#define va_end(v) __builtin_va_end(v)
|
||||
#define va_arg(v,l) __builtin_va_arg(v,l)
|
||||
#define va_copy(d,s) __builtin_va_copy(d,s)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
20
package/kernel/bpf-headers/patches/100-support_hz_300.patch
Normal file
20
package/kernel/bpf-headers/patches/100-support_hz_300.patch
Normal file
@@ -0,0 +1,20 @@
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -2988,6 +2988,9 @@ choice
|
||||
config HZ_256
|
||||
bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
|
||||
|
||||
+ config HZ_300
|
||||
+ bool "300 HZ" if SYS_SUPPORTS_ARBIT_HZ
|
||||
+
|
||||
config HZ_1000
|
||||
bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
|
||||
|
||||
@@ -3039,6 +3042,7 @@ config HZ
|
||||
default 128 if HZ_128
|
||||
default 250 if HZ_250
|
||||
default 256 if HZ_256
|
||||
+ default 300 if HZ_300
|
||||
default 1000 if HZ_1000
|
||||
default 1024 if HZ_1024
|
||||
|
||||
@@ -0,0 +1,30 @@
|
||||
From 7ed95633bff19950069c348b94c9c13164a57a2a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||
Date: Wed, 18 Jan 2023 20:20:39 +0100
|
||||
Subject: [PATCH] linux/netlink: drop NL_SET_ERR_MSG for kernel modules
|
||||
|
||||
We don't need NL_SET_ERR_MSG_MOD for bpf modules and we can drop it to
|
||||
solve missing KBUILD_MODNAME define.
|
||||
|
||||
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||
---
|
||||
include/linux/netlink.h | 3 ---
|
||||
1 file changed, 3 deletions(-)
|
||||
|
||||
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
|
||||
index 61b1c7f..93561fb 100644
|
||||
--- a/include/linux/netlink.h
|
||||
+++ b/include/linux/netlink.h
|
||||
@@ -98,9 +98,6 @@ struct netlink_ext_ack {
|
||||
__extack->_msg = __msg; \
|
||||
} while (0)
|
||||
|
||||
-#define NL_SET_ERR_MSG_MOD(extack, msg) \
|
||||
- NL_SET_ERR_MSG((extack), KBUILD_MODNAME ": " msg)
|
||||
-
|
||||
#define NL_SET_BAD_ATTR_POLICY(extack, attr, pol) do { \
|
||||
if ((extack)) { \
|
||||
(extack)->bad_attr = (attr); \
|
||||
--
|
||||
2.38.1
|
||||
|
||||
@@ -0,0 +1,44 @@
|
||||
From 6e7cd9c0abffea55e39a4160949bc6fba972d161 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||
Date: Thu, 19 Jan 2023 13:37:46 +0100
|
||||
Subject: [PATCH] net/flow_offload: use NL_SET_ERR_MSG instead of
|
||||
NL_SET_ERR_MSG_MOD
|
||||
|
||||
Use NL_SET_ERR_MSG instead of NL_SET_ERR_MSG_MOD for bpf modules as
|
||||
kernel modules are not supported.
|
||||
|
||||
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||
---
|
||||
include/net/flow_offload.h | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/include/net/flow_offload.h b/include/net/flow_offload.h
|
||||
index 7a2b022..f17c485 100644
|
||||
--- a/include/net/flow_offload.h
|
||||
+++ b/include/net/flow_offload.h
|
||||
@@ -321,7 +321,7 @@ flow_action_mixed_hw_stats_check(const struct flow_action *action,
|
||||
|
||||
flow_action_for_each(i, action_entry, action) {
|
||||
if (i && action_entry->hw_stats != last_hw_stats) {
|
||||
- NL_SET_ERR_MSG_MOD(extack, "Mixing HW stats types for actions is not supported");
|
||||
+ NL_SET_ERR_MSG(extack, "Mixing HW stats types for actions is not supported");
|
||||
return false;
|
||||
}
|
||||
last_hw_stats = action_entry->hw_stats;
|
||||
@@ -356,11 +356,11 @@ __flow_action_hw_stats_check(const struct flow_action *action,
|
||||
|
||||
if (!check_allow_bit &&
|
||||
~action_entry->hw_stats & FLOW_ACTION_HW_STATS_ANY) {
|
||||
- NL_SET_ERR_MSG_MOD(extack, "Driver supports only default HW stats type \"any\"");
|
||||
+ NL_SET_ERR_MSG(extack, "Driver supports only default HW stats type \"any\"");
|
||||
return false;
|
||||
} else if (check_allow_bit &&
|
||||
!(action_entry->hw_stats & BIT(allow_bit))) {
|
||||
- NL_SET_ERR_MSG_MOD(extack, "Driver does not support selected HW stats type");
|
||||
+ NL_SET_ERR_MSG(extack, "Driver does not support selected HW stats type");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
--
|
||||
2.38.1
|
||||
|
||||
14
package/kernel/bpf-headers/src/include/generated/bounds.h
Normal file
14
package/kernel/bpf-headers/src/include/generated/bounds.h
Normal file
@@ -0,0 +1,14 @@
|
||||
#ifndef __LINUX_BOUNDS_H__
|
||||
#define __LINUX_BOUNDS_H__
|
||||
/*
|
||||
* DO NOT MODIFY.
|
||||
*
|
||||
* This file was generated by Kbuild
|
||||
*/
|
||||
|
||||
#define NR_PAGEFLAGS 23 /* __NR_PAGEFLAGS */
|
||||
#define MAX_NR_ZONES 4 /* __MAX_NR_ZONES */
|
||||
#define NR_CPUS_BITS 1 /* ilog2(CONFIG_NR_CPUS) */
|
||||
#define SPINLOCK_SIZE 64 /* sizeof(spinlock_t) */
|
||||
|
||||
#endif
|
||||
35
package/kernel/button-hotplug/Makefile
Normal file
35
package/kernel/button-hotplug/Makefile
Normal file
@@ -0,0 +1,35 @@
|
||||
#
|
||||
# Copyright (C) 2008-2010 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=button-hotplug
|
||||
PKG_RELEASE:=3
|
||||
PKG_LICENSE:=GPL-2.0
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/button-hotplug
|
||||
SUBMENU:=Other modules
|
||||
TITLE:=Button Hotplug driver
|
||||
DEPENDS:=+kmod-input-core
|
||||
FILES:=$(PKG_BUILD_DIR)/button-hotplug.ko
|
||||
AUTOLOAD:=$(call AutoLoad,30,button-hotplug,1)
|
||||
KCONFIG:=
|
||||
endef
|
||||
|
||||
define KernelPackage/button-hotplug/description
|
||||
Kernel module to generate button uevent-s from input subsystem events.
|
||||
If your device uses GPIO buttons, see gpio-button-hotplug.
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,button-hotplug))
|
||||
1
package/kernel/button-hotplug/src/Makefile
Normal file
1
package/kernel/button-hotplug/src/Makefile
Normal file
@@ -0,0 +1 @@
|
||||
obj-m := button-hotplug.o
|
||||
344
package/kernel/button-hotplug/src/button-hotplug.c
Normal file
344
package/kernel/button-hotplug/src/button-hotplug.c
Normal file
@@ -0,0 +1,344 @@
|
||||
/*
|
||||
* Button Hotplug driver
|
||||
*
|
||||
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* Based on the diag.c - GPIO interface driver for Broadcom boards
|
||||
* Copyright (C) 2006 Mike Baker <mbm@openwrt.org>,
|
||||
* Copyright (C) 2006-2007 Felix Fietkau <nbd@nbd.name>
|
||||
* Copyright (C) 2008 Andy Boyett <agb@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/kmod.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netlink.h>
|
||||
#include <linux/kobject.h>
|
||||
|
||||
#define DRV_NAME "button-hotplug"
|
||||
#define DRV_VERSION "0.4.1"
|
||||
#define DRV_DESC "Button Hotplug driver"
|
||||
|
||||
#define BH_SKB_SIZE 2048
|
||||
|
||||
#define PFX DRV_NAME ": "
|
||||
|
||||
#undef BH_DEBUG
|
||||
|
||||
#ifdef BH_DEBUG
|
||||
#define BH_DBG(fmt, args...) printk(KERN_DEBUG "%s: " fmt, DRV_NAME, ##args )
|
||||
#else
|
||||
#define BH_DBG(fmt, args...) do {} while (0)
|
||||
#endif
|
||||
|
||||
#define BH_ERR(fmt, args...) printk(KERN_ERR "%s: " fmt, DRV_NAME, ##args )
|
||||
|
||||
#ifndef BIT_MASK
|
||||
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
|
||||
#endif
|
||||
|
||||
struct bh_priv {
|
||||
unsigned long *seen;
|
||||
struct input_handle handle;
|
||||
};
|
||||
|
||||
struct bh_event {
|
||||
const char *name;
|
||||
char *action;
|
||||
unsigned long seen;
|
||||
|
||||
struct sk_buff *skb;
|
||||
struct work_struct work;
|
||||
};
|
||||
|
||||
struct bh_map {
|
||||
unsigned int code;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
extern u64 uevent_next_seqnum(void);
|
||||
|
||||
#define BH_MAP(_code, _name) \
|
||||
{ \
|
||||
.code = (_code), \
|
||||
.name = (_name), \
|
||||
}
|
||||
|
||||
static struct bh_map button_map[] = {
|
||||
BH_MAP(BTN_0, "BTN_0"),
|
||||
BH_MAP(BTN_1, "BTN_1"),
|
||||
BH_MAP(BTN_2, "BTN_2"),
|
||||
BH_MAP(BTN_3, "BTN_3"),
|
||||
BH_MAP(BTN_4, "BTN_4"),
|
||||
BH_MAP(BTN_5, "BTN_5"),
|
||||
BH_MAP(BTN_6, "BTN_6"),
|
||||
BH_MAP(BTN_7, "BTN_7"),
|
||||
BH_MAP(BTN_8, "BTN_8"),
|
||||
BH_MAP(BTN_9, "BTN_9"),
|
||||
BH_MAP(KEY_RESTART, "reset"),
|
||||
BH_MAP(KEY_POWER, "power"),
|
||||
BH_MAP(KEY_POWER2, "reboot"),
|
||||
BH_MAP(KEY_RFKILL, "rfkill"),
|
||||
BH_MAP(KEY_WPS_BUTTON, "wps"),
|
||||
BH_MAP(KEY_WIMAX, "wwan"),
|
||||
};
|
||||
|
||||
/* -------------------------------------------------------------------------*/
|
||||
|
||||
static int bh_event_add_var(struct bh_event *event, int argv,
|
||||
const char *format, ...)
|
||||
{
|
||||
static char buf[128];
|
||||
char *s;
|
||||
va_list args;
|
||||
int len;
|
||||
|
||||
if (argv)
|
||||
return 0;
|
||||
|
||||
va_start(args, format);
|
||||
len = vsnprintf(buf, sizeof(buf), format, args);
|
||||
va_end(args);
|
||||
|
||||
if (len >= sizeof(buf)) {
|
||||
BH_ERR("buffer size too small\n");
|
||||
WARN_ON(1);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
s = skb_put(event->skb, len + 1);
|
||||
strcpy(s, buf);
|
||||
|
||||
BH_DBG("added variable '%s'\n", s);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int button_hotplug_fill_event(struct bh_event *event)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "HOME=%s", "/");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "PATH=%s",
|
||||
"/sbin:/bin:/usr/sbin:/usr/bin");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SUBSYSTEM=%s", "button");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "ACTION=%s", event->action);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "BUTTON=%s", event->name);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SEEN=%ld", event->seen);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SEQNUM=%llu", uevent_next_seqnum());
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void button_hotplug_work(struct work_struct *work)
|
||||
{
|
||||
struct bh_event *event = container_of(work, struct bh_event, work);
|
||||
int ret = 0;
|
||||
|
||||
event->skb = alloc_skb(BH_SKB_SIZE, GFP_KERNEL);
|
||||
if (!event->skb)
|
||||
goto out_free_event;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "%s@", event->action);
|
||||
if (ret)
|
||||
goto out_free_skb;
|
||||
|
||||
ret = button_hotplug_fill_event(event);
|
||||
if (ret)
|
||||
goto out_free_skb;
|
||||
|
||||
NETLINK_CB(event->skb).dst_group = 1;
|
||||
broadcast_uevent(event->skb, 0, 1, GFP_KERNEL);
|
||||
|
||||
out_free_skb:
|
||||
if (ret) {
|
||||
BH_ERR("work error %d\n", ret);
|
||||
kfree_skb(event->skb);
|
||||
}
|
||||
out_free_event:
|
||||
kfree(event);
|
||||
}
|
||||
|
||||
static int button_hotplug_create_event(const char *name, unsigned long seen,
|
||||
int pressed)
|
||||
{
|
||||
struct bh_event *event;
|
||||
|
||||
BH_DBG("create event, name=%s, seen=%lu, pressed=%d\n",
|
||||
name, seen, pressed);
|
||||
|
||||
event = kzalloc(sizeof(*event), GFP_KERNEL);
|
||||
if (!event)
|
||||
return -ENOMEM;
|
||||
|
||||
event->name = name;
|
||||
event->seen = seen;
|
||||
event->action = pressed ? "pressed" : "released";
|
||||
|
||||
INIT_WORK(&event->work, (void *)(void *)button_hotplug_work);
|
||||
schedule_work(&event->work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------*/
|
||||
|
||||
static int button_get_index(unsigned int code)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(button_map); i++)
|
||||
if (button_map[i].code == code)
|
||||
return i;
|
||||
|
||||
return -1;
|
||||
}
|
||||
static void button_hotplug_event(struct input_handle *handle,
|
||||
unsigned int type, unsigned int code, int value)
|
||||
{
|
||||
struct bh_priv *priv = handle->private;
|
||||
unsigned long seen = jiffies;
|
||||
int btn;
|
||||
|
||||
BH_DBG("event type=%u, code=%u, value=%d\n", type, code, value);
|
||||
|
||||
if (type != EV_KEY)
|
||||
return;
|
||||
|
||||
btn = button_get_index(code);
|
||||
if (btn < 0)
|
||||
return;
|
||||
|
||||
button_hotplug_create_event(button_map[btn].name,
|
||||
(seen - priv->seen[btn]) / HZ, value);
|
||||
priv->seen[btn] = seen;
|
||||
}
|
||||
|
||||
static int button_hotplug_connect(struct input_handler *handler,
|
||||
struct input_dev *dev, const struct input_device_id *id)
|
||||
{
|
||||
struct bh_priv *priv;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(button_map); i++)
|
||||
if (test_bit(button_map[i].code, dev->keybit))
|
||||
break;
|
||||
|
||||
if (i == ARRAY_SIZE(button_map))
|
||||
return -ENODEV;
|
||||
|
||||
priv = kzalloc(sizeof(*priv) +
|
||||
(sizeof(unsigned long) * ARRAY_SIZE(button_map)),
|
||||
GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->seen = (unsigned long *) &priv[1];
|
||||
priv->handle.private = priv;
|
||||
priv->handle.dev = dev;
|
||||
priv->handle.handler = handler;
|
||||
priv->handle.name = DRV_NAME;
|
||||
|
||||
ret = input_register_handle(&priv->handle);
|
||||
if (ret)
|
||||
goto err_free_priv;
|
||||
|
||||
ret = input_open_device(&priv->handle);
|
||||
if (ret)
|
||||
goto err_unregister_handle;
|
||||
|
||||
BH_DBG("connected to %s\n", dev->name);
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister_handle:
|
||||
input_unregister_handle(&priv->handle);
|
||||
|
||||
err_free_priv:
|
||||
kfree(priv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void button_hotplug_disconnect(struct input_handle *handle)
|
||||
{
|
||||
struct bh_priv *priv = handle->private;
|
||||
|
||||
input_close_device(handle);
|
||||
input_unregister_handle(handle);
|
||||
|
||||
kfree(priv);
|
||||
}
|
||||
|
||||
static const struct input_device_id button_hotplug_ids[] = {
|
||||
{
|
||||
.flags = INPUT_DEVICE_ID_MATCH_EVBIT,
|
||||
.evbit = { BIT_MASK(EV_KEY) },
|
||||
},
|
||||
{
|
||||
/* Terminating entry */
|
||||
},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(input, button_hotplug_ids);
|
||||
|
||||
static struct input_handler button_hotplug_handler = {
|
||||
.event = button_hotplug_event,
|
||||
.connect = button_hotplug_connect,
|
||||
.disconnect = button_hotplug_disconnect,
|
||||
.name = DRV_NAME,
|
||||
.id_table = button_hotplug_ids,
|
||||
};
|
||||
|
||||
/* -------------------------------------------------------------------------*/
|
||||
|
||||
static int __init button_hotplug_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
|
||||
ret = input_register_handler(&button_hotplug_handler);
|
||||
if (ret)
|
||||
BH_ERR("unable to register input handler\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
module_init(button_hotplug_init);
|
||||
|
||||
static void __exit button_hotplug_exit(void)
|
||||
{
|
||||
input_unregister_handler(&button_hotplug_handler);
|
||||
}
|
||||
module_exit(button_hotplug_exit);
|
||||
|
||||
MODULE_DESCRIPTION(DRV_DESC);
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
||||
57
package/kernel/cryptodev-linux/Makefile
Normal file
57
package/kernel/cryptodev-linux/Makefile
Normal file
@@ -0,0 +1,57 @@
|
||||
#
|
||||
# Copyright (C) 2014 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
# $Id$
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=cryptodev-linux
|
||||
PKG_VERSION:=1.13
|
||||
PKG_RELEASE:=1
|
||||
|
||||
PKG_SOURCE_URL:=https://codeload.github.com/$(PKG_NAME)/$(PKG_NAME)/tar.gz/$(PKG_NAME)-$(PKG_VERSION)?
|
||||
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
|
||||
PKG_HASH:=33b7915c46eb39a37110e88c681423c0dd0df25d784b6e1475ac3196367f0db5
|
||||
PKG_LICENSE:=GPL-2.0
|
||||
PKG_LICENSE_FILES:=COPYING
|
||||
|
||||
PKG_MAINTAINER:=Ansuel Smith <ansuelsmth@gmail.com>
|
||||
|
||||
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_NAME)-$(PKG_VERSION)
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/cryptodev
|
||||
SUBMENU:=Cryptographic API modules
|
||||
TITLE:=Driver for cryptographic acceleration
|
||||
URL:=http://cryptodev-linux.org/
|
||||
DEPENDS:=+kmod-crypto-authenc +kmod-crypto-hash
|
||||
FILES:=$(PKG_BUILD_DIR)/cryptodev.$(LINUX_KMOD_SUFFIX)
|
||||
AUTOLOAD:=$(call AutoLoad,50,cryptodev)
|
||||
MODPARAMS.cryptodev:=cryptodev_verbosity=-1
|
||||
endef
|
||||
|
||||
define KernelPackage/cryptodev/description
|
||||
This is a driver for that allows to use the Linux kernel supported
|
||||
hardware ciphers by user-space applications.
|
||||
endef
|
||||
|
||||
define Build/Configure
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
$(MAKE) -C $(PKG_BUILD_DIR) \
|
||||
$(KERNEL_MAKE_FLAGS) \
|
||||
KERNEL_DIR="$(LINUX_DIR)"
|
||||
endef
|
||||
|
||||
define Build/InstallDev
|
||||
$(INSTALL_DIR) $(STAGING_DIR)/usr/include/crypto
|
||||
$(CP) $(PKG_BUILD_DIR)/crypto/cryptodev.h $(STAGING_DIR)/usr/include/crypto/
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,cryptodev))
|
||||
@@ -0,0 +1,39 @@
|
||||
From 99ae2a39ddc3f89c66d9f09783b591c0f2dbf2e9 Mon Sep 17 00:00:00 2001
|
||||
From: Gaurav Jain <gaurav.jain@nxp.com>
|
||||
Date: Wed, 28 Jun 2023 12:44:32 +0530
|
||||
Subject: [PATCH] cryptodev_verbosity: Fix build for Linux 6.4
|
||||
|
||||
register_sysctl_table api is removed in kernel.
|
||||
migrate to the new api register_sysctl.
|
||||
|
||||
child is also removed in linux 6.4 ctl_table struct.
|
||||
|
||||
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
|
||||
---
|
||||
ioctl.c | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
--- a/ioctl.c
|
||||
+++ b/ioctl.c
|
||||
@@ -1246,7 +1246,9 @@ static struct ctl_table verbosity_ctl_ro
|
||||
{
|
||||
.procname = "ioctl",
|
||||
.mode = 0555,
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
.child = verbosity_ctl_dir,
|
||||
+#endif
|
||||
},
|
||||
{},
|
||||
};
|
||||
@@ -1267,7 +1269,11 @@ static int __init init_cryptodev(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
verbosity_sysctl_header = register_sysctl_table(verbosity_ctl_root);
|
||||
+#else
|
||||
+ verbosity_sysctl_header = register_sysctl(verbosity_ctl_root->procname, verbosity_ctl_dir);
|
||||
+#endif
|
||||
|
||||
pr_info(PFX "driver %s loaded.\n", VERSION);
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
From 592017c3a910a3905b1925aee88c4674e9a596b7 Mon Sep 17 00:00:00 2001
|
||||
From: Gaurav Jain <gaurav.jain@nxp.com>
|
||||
Date: Tue, 30 May 2023 17:09:42 +0530
|
||||
Subject: [PATCH] zero copy: Fix build for Linux 6.4
|
||||
|
||||
get_user_pages_remote api prototype is changed in kernel.
|
||||
struct vm_area_struct **vmas argument is removed.
|
||||
Migrate to the new API.
|
||||
|
||||
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
|
||||
---
|
||||
zc.c | 6 +++++-
|
||||
1 file changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/zc.c
|
||||
+++ b/zc.c
|
||||
@@ -80,10 +80,14 @@ int __get_userbuf(uint8_t __user *addr,
|
||||
ret = get_user_pages_remote(task, mm,
|
||||
(unsigned long)addr, pgcount, write ? FOLL_WRITE : 0,
|
||||
pg, NULL, NULL);
|
||||
-#else
|
||||
+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
ret = get_user_pages_remote(mm,
|
||||
(unsigned long)addr, pgcount, write ? FOLL_WRITE : 0,
|
||||
pg, NULL, NULL);
|
||||
+#else
|
||||
+ ret = get_user_pages_remote(mm,
|
||||
+ (unsigned long)addr, pgcount, write ? FOLL_WRITE : 0,
|
||||
+ pg, NULL);
|
||||
#endif
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0))
|
||||
up_read(&mm->mmap_sem);
|
||||
@@ -0,0 +1,56 @@
|
||||
From bb8bc7cf60d2c0b097c8b3b0e807f805b577a53f Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Joan=20Bruguera=20Mic=C3=B3?= <joanbrugueram@gmail.com>
|
||||
Date: Mon, 3 Jul 2023 00:46:02 +0000
|
||||
Subject: [PATCH] Move recent Linux version #ifdefs from v6.4 to v6.5
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The latest commits, meant to fix the build on Linux 6.4, are actually
|
||||
fixing the build for API changes introduced in the merge window of the
|
||||
yet-unreleased Linux 6.5, and actually break the build for Linux 6.4.
|
||||
|
||||
In particular, the upstream commits introducing the API changes are the
|
||||
following, which are *not* included in the Linux v6.4 tag:
|
||||
* https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=19c4e618a1bc3d0cad1f04c857be8076cb05bbb2
|
||||
* https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ca5e863233e8f6acd1792fd85d6bc2729a1b2c10
|
||||
|
||||
Change to #ifdef's to v6.5, where they will most likely be included.
|
||||
|
||||
Signed-off-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
|
||||
---
|
||||
ioctl.c | 4 ++--
|
||||
zc.c | 2 +-
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/ioctl.c
|
||||
+++ b/ioctl.c
|
||||
@@ -1246,7 +1246,7 @@ static struct ctl_table verbosity_ctl_ro
|
||||
{
|
||||
.procname = "ioctl",
|
||||
.mode = 0555,
|
||||
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 5, 0))
|
||||
.child = verbosity_ctl_dir,
|
||||
#endif
|
||||
},
|
||||
@@ -1269,7 +1269,7 @@ static int __init init_cryptodev(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 5, 0))
|
||||
verbosity_sysctl_header = register_sysctl_table(verbosity_ctl_root);
|
||||
#else
|
||||
verbosity_sysctl_header = register_sysctl(verbosity_ctl_root->procname, verbosity_ctl_dir);
|
||||
--- a/zc.c
|
||||
+++ b/zc.c
|
||||
@@ -80,7 +80,7 @@ int __get_userbuf(uint8_t __user *addr,
|
||||
ret = get_user_pages_remote(task, mm,
|
||||
(unsigned long)addr, pgcount, write ? FOLL_WRITE : 0,
|
||||
pg, NULL, NULL);
|
||||
-#elif (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0))
|
||||
+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(6, 5, 0))
|
||||
ret = get_user_pages_remote(mm,
|
||||
(unsigned long)addr, pgcount, write ? FOLL_WRITE : 0,
|
||||
pg, NULL, NULL);
|
||||
@@ -0,0 +1,33 @@
|
||||
From 5e7121e45ff283d30097da381fd7e97c4bb61364 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Joan=20Bruguera=20Mic=C3=B3?= <joanbrugueram@gmail.com>
|
||||
Date: Sun, 10 Dec 2023 13:57:55 +0000
|
||||
Subject: [PATCH] Fix build for Linux 6.7-rc1
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Since Linux 6.7-rc1, no ahash algorithms set a nonzero alignmask,
|
||||
and therefore `crypto_ahash_alignmask` has been removed.
|
||||
|
||||
See also: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0f8660c82b79af595b056f6b9f4f227edeb88574
|
||||
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c626910f3f1bbce6ad18bc613d895d2a089ed95e
|
||||
|
||||
Signed-off-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
|
||||
---
|
||||
cryptlib.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/cryptlib.c
|
||||
+++ b/cryptlib.c
|
||||
@@ -381,7 +381,11 @@ int cryptodev_hash_init(struct hash_data
|
||||
}
|
||||
|
||||
hdata->digestsize = crypto_ahash_digestsize(hdata->async.s);
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 7, 0))
|
||||
hdata->alignmask = crypto_ahash_alignmask(hdata->async.s);
|
||||
+#else
|
||||
+ hdata->alignmask = 0;
|
||||
+#endif
|
||||
|
||||
init_completion(&hdata->async.result.completion);
|
||||
|
||||
@@ -0,0 +1,642 @@
|
||||
From 5f84cb93eef9f8a8ff7f49d593893f252744d0fe Mon Sep 17 00:00:00 2001
|
||||
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
|
||||
Date: Wed, 26 Aug 2015 18:28:08 +0300
|
||||
Subject: [PATCH] scripts/dtc: Update to version with overlays
|
||||
|
||||
Update to mainline dtc with overlay support
|
||||
|
||||
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
|
||||
---
|
||||
checks.c | 20 +++++-
|
||||
dtc-lexer.l | 5 ++
|
||||
dtc-parser.y | 54 ++++++++++++++--
|
||||
dtc.c | 83 ++++++++++++++++++++++--
|
||||
dtc.h | 13 +++-
|
||||
livetree.c | 202 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
treesource.c | 3 +
|
||||
util.c | 2 +-
|
||||
8 files changed, 367 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/checks.c b/checks.c
|
||||
index 3bf0fa4..af25c2b 100644
|
||||
--- a/checks.c
|
||||
+++ b/checks.c
|
||||
@@ -465,8 +465,12 @@ static void fixup_phandle_references(struct check *c, struct node *dt,
|
||||
|
||||
refnode = get_node_by_ref(dt, m->ref);
|
||||
if (! refnode) {
|
||||
- FAIL(c, "Reference to non-existent node or label \"%s\"\n",
|
||||
- m->ref);
|
||||
+ if (!source_is_plugin)
|
||||
+ FAIL(c, "Reference to non-existent node or "
|
||||
+ "label \"%s\"\n", m->ref);
|
||||
+ else /* mark the entry as unresolved */
|
||||
+ *((cell_t *)(prop->val.val + m->offset)) =
|
||||
+ cpu_to_fdt32(0xffffffff);
|
||||
continue;
|
||||
}
|
||||
|
||||
@@ -559,7 +563,7 @@ static void check_reg_format(struct check *c, struct node *dt,
|
||||
size_cells = node_size_cells(node->parent);
|
||||
entrylen = (addr_cells + size_cells) * sizeof(cell_t);
|
||||
|
||||
- if ((prop->val.len % entrylen) != 0)
|
||||
+ if (!entrylen || (prop->val.len % entrylen) != 0)
|
||||
FAIL(c, "\"reg\" property in %s has invalid length (%d bytes) "
|
||||
"(#address-cells == %d, #size-cells == %d)",
|
||||
node->fullpath, prop->val.len, addr_cells, size_cells);
|
||||
@@ -651,6 +655,15 @@ static void check_obsolete_chosen_interrupt_controller(struct check *c,
|
||||
}
|
||||
TREE_WARNING(obsolete_chosen_interrupt_controller, NULL);
|
||||
|
||||
+static void check_deprecated_plugin_syntax(struct check *c,
|
||||
+ struct node *dt)
|
||||
+{
|
||||
+ if (deprecated_plugin_syntax_warning)
|
||||
+ FAIL(c, "Use '/dts-v1/ /plugin/'; syntax. /dts-v1/; /plugin/; "
|
||||
+ "is going to be removed in next versions");
|
||||
+}
|
||||
+TREE_WARNING(deprecated_plugin_syntax, NULL);
|
||||
+
|
||||
static struct check *check_table[] = {
|
||||
&duplicate_node_names, &duplicate_property_names,
|
||||
&node_name_chars, &node_name_format, &property_name_chars,
|
||||
@@ -668,6 +681,7 @@ static struct check *check_table[] = {
|
||||
|
||||
&avoid_default_addr_size,
|
||||
&obsolete_chosen_interrupt_controller,
|
||||
+ &deprecated_plugin_syntax,
|
||||
|
||||
&always_fail,
|
||||
};
|
||||
diff --git a/dtc-lexer.l b/dtc-lexer.l
|
||||
index 0ee1caf..dd44ba2 100644
|
||||
--- a/dtc-lexer.l
|
||||
+++ b/dtc-lexer.l
|
||||
@@ -113,6 +113,11 @@ static void lexical_error(const char *fmt, ...);
|
||||
return DT_V1;
|
||||
}
|
||||
|
||||
+<*>"/plugin/" {
|
||||
+ DPRINT("Keyword: /plugin/\n");
|
||||
+ return DT_PLUGIN;
|
||||
+ }
|
||||
+
|
||||
<*>"/memreserve/" {
|
||||
DPRINT("Keyword: /memreserve/\n");
|
||||
BEGIN_DEFAULT();
|
||||
diff --git a/dtc-parser.y b/dtc-parser.y
|
||||
index ea57e0a..7d9652d 100644
|
||||
--- a/dtc-parser.y
|
||||
+++ b/dtc-parser.y
|
||||
@@ -19,6 +19,7 @@
|
||||
*/
|
||||
%{
|
||||
#include <stdio.h>
|
||||
+#include <inttypes.h>
|
||||
|
||||
#include "dtc.h"
|
||||
#include "srcpos.h"
|
||||
@@ -52,9 +53,11 @@ extern bool treesource_error;
|
||||
struct node *nodelist;
|
||||
struct reserve_info *re;
|
||||
uint64_t integer;
|
||||
+ bool is_plugin;
|
||||
}
|
||||
|
||||
%token DT_V1
|
||||
+%token DT_PLUGIN
|
||||
%token DT_MEMRESERVE
|
||||
%token DT_LSHIFT DT_RSHIFT DT_LE DT_GE DT_EQ DT_NE DT_AND DT_OR
|
||||
%token DT_BITS
|
||||
@@ -71,6 +74,7 @@ extern bool treesource_error;
|
||||
|
||||
%type <data> propdata
|
||||
%type <data> propdataprefix
|
||||
+%type <is_plugin> plugindecl
|
||||
%type <re> memreserve
|
||||
%type <re> memreserves
|
||||
%type <array> arrayprefix
|
||||
@@ -101,10 +105,39 @@ extern bool treesource_error;
|
||||
%%
|
||||
|
||||
sourcefile:
|
||||
- DT_V1 ';' memreserves devicetree
|
||||
+ basesource
|
||||
+ | pluginsource
|
||||
+ ;
|
||||
+
|
||||
+basesource:
|
||||
+ DT_V1 ';' plugindecl memreserves devicetree
|
||||
+ {
|
||||
+ source_is_plugin = $3;
|
||||
+ if (source_is_plugin)
|
||||
+ deprecated_plugin_syntax_warning = true;
|
||||
+ the_boot_info = build_boot_info($4, $5,
|
||||
+ guess_boot_cpuid($5));
|
||||
+ }
|
||||
+ ;
|
||||
+
|
||||
+plugindecl:
|
||||
+ /* empty */
|
||||
+ {
|
||||
+ $$ = false;
|
||||
+ }
|
||||
+ | DT_PLUGIN ';'
|
||||
+ {
|
||||
+ $$ = true;
|
||||
+ }
|
||||
+ ;
|
||||
+
|
||||
+pluginsource:
|
||||
+ DT_V1 DT_PLUGIN ';' memreserves devicetree
|
||||
{
|
||||
- the_boot_info = build_boot_info($3, $4,
|
||||
- guess_boot_cpuid($4));
|
||||
+ source_is_plugin = true;
|
||||
+ deprecated_plugin_syntax_warning = false;
|
||||
+ the_boot_info = build_boot_info($4, $5,
|
||||
+ guess_boot_cpuid($5));
|
||||
}
|
||||
;
|
||||
|
||||
@@ -144,10 +177,14 @@ devicetree:
|
||||
{
|
||||
struct node *target = get_node_by_ref($1, $2);
|
||||
|
||||
- if (target)
|
||||
+ if (target) {
|
||||
merge_nodes(target, $3);
|
||||
- else
|
||||
- ERROR(&@2, "Label or path %s not found", $2);
|
||||
+ } else {
|
||||
+ if (symbol_fixup_support)
|
||||
+ add_orphan_node($1, $3, $2);
|
||||
+ else
|
||||
+ ERROR(&@2, "Label or path %s not found", $2);
|
||||
+ }
|
||||
$$ = $1;
|
||||
}
|
||||
| devicetree DT_DEL_NODE DT_REF ';'
|
||||
@@ -162,6 +199,11 @@ devicetree:
|
||||
|
||||
$$ = $1;
|
||||
}
|
||||
+ | /* empty */
|
||||
+ {
|
||||
+ /* build empty node */
|
||||
+ $$ = name_node(build_node(NULL, NULL), "");
|
||||
+ }
|
||||
;
|
||||
|
||||
nodedef:
|
||||
diff --git a/dtc.c b/dtc.c
|
||||
index 8c4add6..ee37be9 100644
|
||||
--- a/dtc.c
|
||||
+++ b/dtc.c
|
||||
@@ -18,6 +18,8 @@
|
||||
* USA
|
||||
*/
|
||||
|
||||
+#include <sys/stat.h>
|
||||
+
|
||||
#include "dtc.h"
|
||||
#include "srcpos.h"
|
||||
|
||||
@@ -29,6 +31,8 @@ int reservenum; /* Number of memory reservation slots */
|
||||
int minsize; /* Minimum blob size */
|
||||
int padsize; /* Additional padding to blob */
|
||||
int phandle_format = PHANDLE_BOTH; /* Use linux,phandle or phandle properties */
|
||||
+int symbol_fixup_support;
|
||||
+int auto_label_aliases;
|
||||
|
||||
static void fill_fullpaths(struct node *tree, const char *prefix)
|
||||
{
|
||||
@@ -51,7 +55,7 @@ static void fill_fullpaths(struct node *tree, const char *prefix)
|
||||
#define FDT_VERSION(version) _FDT_VERSION(version)
|
||||
#define _FDT_VERSION(version) #version
|
||||
static const char usage_synopsis[] = "dtc [options] <input file>";
|
||||
-static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:fb:i:H:sW:E:hv";
|
||||
+static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:fb:i:H:sW:E:@Ahv";
|
||||
static struct option const usage_long_opts[] = {
|
||||
{"quiet", no_argument, NULL, 'q'},
|
||||
{"in-format", a_argument, NULL, 'I'},
|
||||
@@ -69,6 +73,8 @@ static struct option const usage_long_opts[] = {
|
||||
{"phandle", a_argument, NULL, 'H'},
|
||||
{"warning", a_argument, NULL, 'W'},
|
||||
{"error", a_argument, NULL, 'E'},
|
||||
+ {"symbols", no_argument, NULL, '@'},
|
||||
+ {"auto-alias", no_argument, NULL, 'A'},
|
||||
{"help", no_argument, NULL, 'h'},
|
||||
{"version", no_argument, NULL, 'v'},
|
||||
{NULL, no_argument, NULL, 0x0},
|
||||
@@ -99,16 +105,63 @@ static const char * const usage_opts_help[] = {
|
||||
"\t\tboth - Both \"linux,phandle\" and \"phandle\" properties",
|
||||
"\n\tEnable/disable warnings (prefix with \"no-\")",
|
||||
"\n\tEnable/disable errors (prefix with \"no-\")",
|
||||
+ "\n\tEnable symbols/fixup support",
|
||||
+ "\n\tEnable auto-alias of labels",
|
||||
"\n\tPrint this help and exit",
|
||||
"\n\tPrint version and exit",
|
||||
NULL,
|
||||
};
|
||||
|
||||
+static const char *guess_type_by_name(const char *fname, const char *fallback)
|
||||
+{
|
||||
+ const char *s;
|
||||
+
|
||||
+ s = strrchr(fname, '.');
|
||||
+ if (s == NULL)
|
||||
+ return fallback;
|
||||
+ if (!strcasecmp(s, ".dts"))
|
||||
+ return "dts";
|
||||
+ if (!strcasecmp(s, ".dtb"))
|
||||
+ return "dtb";
|
||||
+ return fallback;
|
||||
+}
|
||||
+
|
||||
+static const char *guess_input_format(const char *fname, const char *fallback)
|
||||
+{
|
||||
+ struct stat statbuf;
|
||||
+ uint32_t magic;
|
||||
+ FILE *f;
|
||||
+
|
||||
+ if (stat(fname, &statbuf) != 0)
|
||||
+ return fallback;
|
||||
+
|
||||
+ if (S_ISDIR(statbuf.st_mode))
|
||||
+ return "fs";
|
||||
+
|
||||
+ if (!S_ISREG(statbuf.st_mode))
|
||||
+ return fallback;
|
||||
+
|
||||
+ f = fopen(fname, "r");
|
||||
+ if (f == NULL)
|
||||
+ return fallback;
|
||||
+ if (fread(&magic, 4, 1, f) != 1) {
|
||||
+ fclose(f);
|
||||
+ return fallback;
|
||||
+ }
|
||||
+ fclose(f);
|
||||
+
|
||||
+ magic = fdt32_to_cpu(magic);
|
||||
+ if (magic == FDT_MAGIC)
|
||||
+ return "dtb";
|
||||
+
|
||||
+ return guess_type_by_name(fname, fallback);
|
||||
+}
|
||||
+
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
struct boot_info *bi;
|
||||
- const char *inform = "dts";
|
||||
- const char *outform = "dts";
|
||||
+ const char *inform = NULL;
|
||||
+ const char *outform = NULL;
|
||||
const char *outname = "-";
|
||||
const char *depname = NULL;
|
||||
bool force = false, sort = false;
|
||||
@@ -186,7 +239,12 @@ int main(int argc, char *argv[])
|
||||
case 'E':
|
||||
parse_checks_option(false, true, optarg);
|
||||
break;
|
||||
-
|
||||
+ case '@':
|
||||
+ symbol_fixup_support = 1;
|
||||
+ break;
|
||||
+ case 'A':
|
||||
+ auto_label_aliases = 1;
|
||||
+ break;
|
||||
case 'h':
|
||||
usage(NULL);
|
||||
default:
|
||||
@@ -213,6 +271,17 @@ int main(int argc, char *argv[])
|
||||
fprintf(depfile, "%s:", outname);
|
||||
}
|
||||
|
||||
+ if (inform == NULL)
|
||||
+ inform = guess_input_format(arg, "dts");
|
||||
+ if (outform == NULL) {
|
||||
+ outform = guess_type_by_name(outname, NULL);
|
||||
+ if (outform == NULL) {
|
||||
+ if (streq(inform, "dts"))
|
||||
+ outform = "dtb";
|
||||
+ else
|
||||
+ outform = "dts";
|
||||
+ }
|
||||
+ }
|
||||
if (streq(inform, "dts"))
|
||||
bi = dt_from_source(arg);
|
||||
else if (streq(inform, "fs"))
|
||||
@@ -236,6 +305,12 @@ int main(int argc, char *argv[])
|
||||
if (sort)
|
||||
sort_tree(bi);
|
||||
|
||||
+ if (symbol_fixup_support || auto_label_aliases)
|
||||
+ generate_label_node(bi->dt, bi->dt);
|
||||
+
|
||||
+ if (symbol_fixup_support)
|
||||
+ generate_fixups_node(bi->dt, bi->dt);
|
||||
+
|
||||
if (streq(outname, "-")) {
|
||||
outf = stdout;
|
||||
} else {
|
||||
diff --git a/dtc.h b/dtc.h
|
||||
index 56212c8..d025111 100644
|
||||
--- a/dtc.h
|
||||
+++ b/dtc.h
|
||||
@@ -20,7 +20,7 @@
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
|
||||
* USA
|
||||
*/
|
||||
-
|
||||
+#define _GNU_SOURCE
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
@@ -54,6 +54,14 @@ extern int reservenum; /* Number of memory reservation slots */
|
||||
extern int minsize; /* Minimum blob size */
|
||||
extern int padsize; /* Additional padding to blob */
|
||||
extern int phandle_format; /* Use linux,phandle or phandle properties */
|
||||
+extern int symbol_fixup_support;/* enable symbols & fixup support */
|
||||
+extern int auto_label_aliases; /* auto generate labels -> aliases */
|
||||
+
|
||||
+/*
|
||||
+ * Tree source globals
|
||||
+ */
|
||||
+extern bool source_is_plugin;
|
||||
+extern bool deprecated_plugin_syntax_warning;
|
||||
|
||||
#define PHANDLE_LEGACY 0x1
|
||||
#define PHANDLE_EPAPR 0x2
|
||||
@@ -194,6 +202,7 @@ struct node *build_node_delete(void);
|
||||
struct node *name_node(struct node *node, char *name);
|
||||
struct node *chain_node(struct node *first, struct node *list);
|
||||
struct node *merge_nodes(struct node *old_node, struct node *new_node);
|
||||
+void add_orphan_node(struct node *old_node, struct node *new_node, char *ref);
|
||||
|
||||
void add_property(struct node *node, struct property *prop);
|
||||
void delete_property_by_name(struct node *node, char *name);
|
||||
@@ -244,6 +253,8 @@ struct boot_info {
|
||||
struct boot_info *build_boot_info(struct reserve_info *reservelist,
|
||||
struct node *tree, uint32_t boot_cpuid_phys);
|
||||
void sort_tree(struct boot_info *bi);
|
||||
+void generate_label_node(struct node *node, struct node *dt);
|
||||
+void generate_fixups_node(struct node *node, struct node *dt);
|
||||
|
||||
/* Checks */
|
||||
|
||||
diff --git a/livetree.c b/livetree.c
|
||||
index e229b84..1ef9fc4 100644
|
||||
--- a/livetree.c
|
||||
+++ b/livetree.c
|
||||
@@ -216,6 +216,34 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node)
|
||||
return old_node;
|
||||
}
|
||||
|
||||
+void add_orphan_node(struct node *dt, struct node *new_node, char *ref)
|
||||
+{
|
||||
+ static unsigned int next_orphan_fragment = 0;
|
||||
+ struct node *ovl = xmalloc(sizeof(*ovl));
|
||||
+ struct property *p;
|
||||
+ struct data d = empty_data;
|
||||
+ char *name;
|
||||
+ int ret;
|
||||
+
|
||||
+ memset(ovl, 0, sizeof(*ovl));
|
||||
+
|
||||
+ d = data_add_marker(d, REF_PHANDLE, ref);
|
||||
+ d = data_append_integer(d, 0xffffffff, 32);
|
||||
+
|
||||
+ p = build_property("target", d);
|
||||
+ add_property(ovl, p);
|
||||
+
|
||||
+ ret = asprintf(&name, "fragment@%u",
|
||||
+ next_orphan_fragment++);
|
||||
+ if (ret == -1)
|
||||
+ die("asprintf() failed\n");
|
||||
+ name_node(ovl, name);
|
||||
+ name_node(new_node, "__overlay__");
|
||||
+
|
||||
+ add_child(dt, ovl);
|
||||
+ add_child(ovl, new_node);
|
||||
+}
|
||||
+
|
||||
struct node *chain_node(struct node *first, struct node *list)
|
||||
{
|
||||
assert(first->next_sibling == NULL);
|
||||
@@ -709,3 +737,177 @@ void sort_tree(struct boot_info *bi)
|
||||
sort_reserve_entries(bi);
|
||||
sort_node(bi->dt);
|
||||
}
|
||||
+
|
||||
+void generate_label_node(struct node *node, struct node *dt)
|
||||
+{
|
||||
+ struct node *c, *an;
|
||||
+ struct property *p;
|
||||
+ struct label *l;
|
||||
+ int has_label;
|
||||
+ char *gen_node_name;
|
||||
+
|
||||
+ if (auto_label_aliases)
|
||||
+ gen_node_name = "aliases";
|
||||
+ else
|
||||
+ gen_node_name = "__symbols__";
|
||||
+
|
||||
+ /* Make sure the label isn't already there */
|
||||
+ has_label = 0;
|
||||
+ for_each_label(node->labels, l) {
|
||||
+ has_label = 1;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ if (has_label) {
|
||||
+
|
||||
+ /* an is the aliases/__symbols__ node */
|
||||
+ an = get_subnode(dt, gen_node_name);
|
||||
+ /* if no node exists, create it */
|
||||
+ if (!an) {
|
||||
+ an = build_node(NULL, NULL);
|
||||
+ name_node(an, gen_node_name);
|
||||
+ add_child(dt, an);
|
||||
+ }
|
||||
+
|
||||
+ /* now add the label in the node */
|
||||
+ for_each_label(node->labels, l) {
|
||||
+ /* check whether the label already exists */
|
||||
+ p = get_property(an, l->label);
|
||||
+ if (p) {
|
||||
+ fprintf(stderr, "WARNING: label %s already"
|
||||
+ " exists in /%s", l->label,
|
||||
+ gen_node_name);
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ /* insert it */
|
||||
+ p = build_property(l->label,
|
||||
+ data_copy_escape_string(node->fullpath,
|
||||
+ strlen(node->fullpath)));
|
||||
+ add_property(an, p);
|
||||
+ }
|
||||
+
|
||||
+ /* force allocation of a phandle for this node */
|
||||
+ if (symbol_fixup_support)
|
||||
+ (void)get_node_phandle(dt, node);
|
||||
+ }
|
||||
+
|
||||
+ for_each_child(node, c)
|
||||
+ generate_label_node(c, dt);
|
||||
+}
|
||||
+
|
||||
+static void add_fixup_entry(struct node *dt, struct node *node,
|
||||
+ struct property *prop, struct marker *m)
|
||||
+{
|
||||
+ struct node *fn; /* local fixup node */
|
||||
+ struct property *p;
|
||||
+ char *fixups_name = "__fixups__";
|
||||
+ struct data d;
|
||||
+ char *entry;
|
||||
+ int ret;
|
||||
+
|
||||
+ /* fn is the node we're putting entries in */
|
||||
+ fn = get_subnode(dt, fixups_name);
|
||||
+ /* if no node exists, create it */
|
||||
+ if (!fn) {
|
||||
+ fn = build_node(NULL, NULL);
|
||||
+ name_node(fn, fixups_name);
|
||||
+ add_child(dt, fn);
|
||||
+ }
|
||||
+
|
||||
+ ret = asprintf(&entry, "%s:%s:%u",
|
||||
+ node->fullpath, prop->name, m->offset);
|
||||
+ if (ret == -1)
|
||||
+ die("asprintf() failed\n");
|
||||
+
|
||||
+ p = get_property(fn, m->ref);
|
||||
+ d = data_append_data(p ? p->val : empty_data, entry, strlen(entry) + 1);
|
||||
+ if (!p)
|
||||
+ add_property(fn, build_property(m->ref, d));
|
||||
+ else
|
||||
+ p->val = d;
|
||||
+}
|
||||
+
|
||||
+static void add_local_fixup_entry(struct node *dt, struct node *node,
|
||||
+ struct property *prop, struct marker *m,
|
||||
+ struct node *refnode)
|
||||
+{
|
||||
+ struct node *lfn, *wn, *nwn; /* local fixup node, walk node, new */
|
||||
+ struct property *p;
|
||||
+ struct data d;
|
||||
+ char *local_fixups_name = "__local_fixups__";
|
||||
+ char *s, *e, *comp;
|
||||
+ int len;
|
||||
+
|
||||
+ /* fn is the node we're putting entries in */
|
||||
+ lfn = get_subnode(dt, local_fixups_name);
|
||||
+ /* if no node exists, create it */
|
||||
+ if (!lfn) {
|
||||
+ lfn = build_node(NULL, NULL);
|
||||
+ name_node(lfn, local_fixups_name);
|
||||
+ add_child(dt, lfn);
|
||||
+ }
|
||||
+
|
||||
+ /* walk the path components creating nodes if they don't exist */
|
||||
+ comp = NULL;
|
||||
+ /* start skipping the first / */
|
||||
+ s = node->fullpath + 1;
|
||||
+ wn = lfn;
|
||||
+ while (*s) {
|
||||
+ /* retrieve path component */
|
||||
+ e = strchr(s, '/');
|
||||
+ if (e == NULL)
|
||||
+ e = s + strlen(s);
|
||||
+ len = e - s;
|
||||
+ comp = xrealloc(comp, len + 1);
|
||||
+ memcpy(comp, s, len);
|
||||
+ comp[len] = '\0';
|
||||
+
|
||||
+ /* if no node exists, create it */
|
||||
+ nwn = get_subnode(wn, comp);
|
||||
+ if (!nwn) {
|
||||
+ nwn = build_node(NULL, NULL);
|
||||
+ name_node(nwn, strdup(comp));
|
||||
+ add_child(wn, nwn);
|
||||
+ }
|
||||
+ wn = nwn;
|
||||
+
|
||||
+ /* last path component */
|
||||
+ if (!*e)
|
||||
+ break;
|
||||
+
|
||||
+ /* next path component */
|
||||
+ s = e + 1;
|
||||
+ }
|
||||
+ free(comp);
|
||||
+
|
||||
+ p = get_property(wn, prop->name);
|
||||
+ d = data_append_cell(p ? p->val : empty_data, (cell_t)m->offset);
|
||||
+ if (!p)
|
||||
+ add_property(wn, build_property(prop->name, d));
|
||||
+ else
|
||||
+ p->val = d;
|
||||
+}
|
||||
+
|
||||
+void generate_fixups_node(struct node *node, struct node *dt)
|
||||
+{
|
||||
+ struct node *c;
|
||||
+ struct property *prop;
|
||||
+ struct marker *m;
|
||||
+ struct node *refnode;
|
||||
+
|
||||
+ for_each_property(node, prop) {
|
||||
+ m = prop->val.markers;
|
||||
+ for_each_marker_of_type(m, REF_PHANDLE) {
|
||||
+ refnode = get_node_by_ref(dt, m->ref);
|
||||
+ if (!refnode)
|
||||
+ add_fixup_entry(dt, node, prop, m);
|
||||
+ else
|
||||
+ add_local_fixup_entry(dt, node, prop, m,
|
||||
+ refnode);
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ for_each_child(node, c)
|
||||
+ generate_fixups_node(c, dt);
|
||||
+}
|
||||
diff --git a/treesource.c b/treesource.c
|
||||
index a55d1d1..e1d6657 100644
|
||||
--- a/treesource.c
|
||||
+++ b/treesource.c
|
||||
@@ -28,6 +28,9 @@ extern YYLTYPE yylloc;
|
||||
struct boot_info *the_boot_info;
|
||||
bool treesource_error;
|
||||
|
||||
+bool source_is_plugin;
|
||||
+bool deprecated_plugin_syntax_warning;
|
||||
+
|
||||
struct boot_info *dt_from_source(const char *fname)
|
||||
{
|
||||
the_boot_info = NULL;
|
||||
diff --git a/util.c b/util.c
|
||||
index 9d65226..cbb945b 100644
|
||||
--- a/util.c
|
||||
+++ b/util.c
|
||||
@@ -349,7 +349,6 @@ int utilfdt_decode_type(const char *fmt, int *type, int *size)
|
||||
void utilfdt_print_data(const char *data, int len)
|
||||
{
|
||||
int i;
|
||||
- const char *p = data;
|
||||
const char *s;
|
||||
|
||||
/* no data, don't print */
|
||||
@@ -376,6 +375,7 @@ void utilfdt_print_data(const char *data, int len)
|
||||
i < (len - 1) ? " " : "");
|
||||
printf(">");
|
||||
} else {
|
||||
+ const unsigned char *p = (const unsigned char *)data;
|
||||
printf(" = [");
|
||||
for (i = 0; i < len; i++)
|
||||
printf("%02x%s", *p++, i < len - 1 ? " " : "");
|
||||
--
|
||||
2.7.0
|
||||
|
||||
39
package/kernel/gpio-button-hotplug/Makefile
Normal file
39
package/kernel/gpio-button-hotplug/Makefile
Normal file
@@ -0,0 +1,39 @@
|
||||
#
|
||||
# Copyright (C) 2008-2012 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=gpio-button-hotplug
|
||||
PKG_RELEASE:=3
|
||||
PKG_LICENSE:=GPL-2.0
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/gpio-button-hotplug
|
||||
SUBMENU:=GPIO support
|
||||
TITLE:=Simple GPIO Button Hotplug driver
|
||||
FILES:=$(PKG_BUILD_DIR)/gpio-button-hotplug.ko
|
||||
AUTOLOAD:=$(call AutoLoad,30,gpio-button-hotplug,1)
|
||||
KCONFIG:=
|
||||
endef
|
||||
|
||||
define KernelPackage/gpio-button-hotplug/description
|
||||
This is a replacement for the following in-kernel drivers:
|
||||
1) gpio_keys (KEYBOARD_GPIO)
|
||||
2) gpio_keys_polled (KEYBOARD_GPIO_POLLED)
|
||||
|
||||
Instead of generating input events (like in-kernel drivers do) it generates
|
||||
uevent-s and broadcasts them. This allows disabling input subsystem which is
|
||||
an overkill for OpenWrt simple needs.
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,gpio-button-hotplug))
|
||||
1
package/kernel/gpio-button-hotplug/src/Makefile
Normal file
1
package/kernel/gpio-button-hotplug/src/Makefile
Normal file
@@ -0,0 +1 @@
|
||||
obj-m += gpio-button-hotplug.o
|
||||
739
package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
Normal file
739
package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
Normal file
@@ -0,0 +1,739 @@
|
||||
/*
|
||||
* GPIO Button Hotplug driver
|
||||
*
|
||||
* Copyright (C) 2012 Felix Fietkau <nbd@nbd.name>
|
||||
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* Based on the diag.c - GPIO interface driver for Broadcom boards
|
||||
* Copyright (C) 2006 Mike Baker <mbm@openwrt.org>,
|
||||
* Copyright (C) 2006-2007 Felix Fietkau <nbd@nbd.name>
|
||||
* Copyright (C) 2008 Andy Boyett <agb@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/kmod.h>
|
||||
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netlink.h>
|
||||
#include <linux/kobject.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
|
||||
#define BH_SKB_SIZE 2048
|
||||
|
||||
#define DRV_NAME "gpio-keys"
|
||||
#define PFX DRV_NAME ": "
|
||||
|
||||
struct bh_event {
|
||||
const char *name;
|
||||
unsigned int type;
|
||||
char *action;
|
||||
unsigned long seen;
|
||||
|
||||
struct sk_buff *skb;
|
||||
struct work_struct work;
|
||||
};
|
||||
|
||||
struct bh_map {
|
||||
unsigned int code;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
struct gpio_keys_button_data {
|
||||
struct delayed_work work;
|
||||
unsigned long seen;
|
||||
int map_entry;
|
||||
int last_state;
|
||||
int count;
|
||||
int threshold;
|
||||
int can_sleep;
|
||||
int irq;
|
||||
unsigned int software_debounce;
|
||||
struct gpio_desc *gpiod;
|
||||
const struct gpio_keys_button *b;
|
||||
};
|
||||
|
||||
extern u64 uevent_next_seqnum(void);
|
||||
|
||||
#define BH_MAP(_code, _name) \
|
||||
{ \
|
||||
.code = (_code), \
|
||||
.name = (_name), \
|
||||
}
|
||||
|
||||
static struct bh_map button_map[] = {
|
||||
BH_MAP(BTN_0, "BTN_0"),
|
||||
BH_MAP(BTN_1, "BTN_1"),
|
||||
BH_MAP(BTN_2, "BTN_2"),
|
||||
BH_MAP(BTN_3, "BTN_3"),
|
||||
BH_MAP(BTN_4, "BTN_4"),
|
||||
BH_MAP(BTN_5, "BTN_5"),
|
||||
BH_MAP(BTN_6, "BTN_6"),
|
||||
BH_MAP(BTN_7, "BTN_7"),
|
||||
BH_MAP(BTN_8, "BTN_8"),
|
||||
BH_MAP(BTN_9, "BTN_9"),
|
||||
BH_MAP(KEY_BRIGHTNESS_ZERO, "brightness_zero"),
|
||||
BH_MAP(KEY_CONFIG, "config"),
|
||||
BH_MAP(KEY_COPY, "copy"),
|
||||
BH_MAP(KEY_EJECTCD, "eject"),
|
||||
BH_MAP(KEY_HELP, "help"),
|
||||
BH_MAP(KEY_LIGHTS_TOGGLE, "lights_toggle"),
|
||||
BH_MAP(KEY_PHONE, "phone"),
|
||||
BH_MAP(KEY_POWER, "power"),
|
||||
BH_MAP(KEY_POWER2, "reboot"),
|
||||
BH_MAP(KEY_RESTART, "reset"),
|
||||
BH_MAP(KEY_RFKILL, "rfkill"),
|
||||
BH_MAP(KEY_VIDEO, "video"),
|
||||
BH_MAP(KEY_VOLUMEDOWN, "volume_down"),
|
||||
BH_MAP(KEY_VOLUMEUP, "volume_up"),
|
||||
BH_MAP(KEY_WIMAX, "wwan"),
|
||||
BH_MAP(KEY_WLAN, "wlan"),
|
||||
BH_MAP(KEY_WPS_BUTTON, "wps"),
|
||||
};
|
||||
|
||||
/* -------------------------------------------------------------------------*/
|
||||
|
||||
static __printf(3, 4)
|
||||
int bh_event_add_var(struct bh_event *event, int argv, const char *format, ...)
|
||||
{
|
||||
char buf[128];
|
||||
char *s;
|
||||
va_list args;
|
||||
int len;
|
||||
|
||||
if (argv)
|
||||
return 0;
|
||||
|
||||
va_start(args, format);
|
||||
len = vsnprintf(buf, sizeof(buf), format, args);
|
||||
va_end(args);
|
||||
|
||||
if (len >= sizeof(buf)) {
|
||||
WARN(1, "buffer size too small");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
s = skb_put(event->skb, len + 1);
|
||||
strcpy(s, buf);
|
||||
|
||||
pr_debug(PFX "added variable '%s'\n", s);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int button_hotplug_fill_event(struct bh_event *event)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "HOME=%s", "/");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "PATH=%s",
|
||||
"/sbin:/bin:/usr/sbin:/usr/bin");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SUBSYSTEM=%s", "button");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "ACTION=%s", event->action);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "BUTTON=%s", event->name);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (event->type == EV_SW) {
|
||||
ret = bh_event_add_var(event, 0, "TYPE=%s", "switch");
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SEEN=%ld", event->seen);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "SEQNUM=%llu", uevent_next_seqnum());
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void button_hotplug_work(struct work_struct *work)
|
||||
{
|
||||
struct bh_event *event = container_of(work, struct bh_event, work);
|
||||
int ret = 0;
|
||||
|
||||
event->skb = alloc_skb(BH_SKB_SIZE, GFP_KERNEL);
|
||||
if (!event->skb)
|
||||
goto out_free_event;
|
||||
|
||||
ret = bh_event_add_var(event, 0, "%s@", event->action);
|
||||
if (ret)
|
||||
goto out_free_skb;
|
||||
|
||||
ret = button_hotplug_fill_event(event);
|
||||
if (ret)
|
||||
goto out_free_skb;
|
||||
|
||||
NETLINK_CB(event->skb).dst_group = 1;
|
||||
broadcast_uevent(event->skb, 0, 1, GFP_KERNEL);
|
||||
|
||||
out_free_skb:
|
||||
if (ret) {
|
||||
pr_err(PFX "work error %d\n", ret);
|
||||
kfree_skb(event->skb);
|
||||
}
|
||||
out_free_event:
|
||||
kfree(event);
|
||||
}
|
||||
|
||||
static int button_hotplug_create_event(const char *name, unsigned int type,
|
||||
unsigned long seen, int pressed)
|
||||
{
|
||||
struct bh_event *event;
|
||||
|
||||
pr_debug(PFX "create event, name=%s, seen=%lu, pressed=%d\n",
|
||||
name, seen, pressed);
|
||||
|
||||
event = kzalloc(sizeof(*event), GFP_KERNEL);
|
||||
if (!event)
|
||||
return -ENOMEM;
|
||||
|
||||
event->name = name;
|
||||
event->type = type;
|
||||
event->seen = seen;
|
||||
event->action = pressed ? "pressed" : "released";
|
||||
|
||||
INIT_WORK(&event->work, (void *)(void *)button_hotplug_work);
|
||||
schedule_work(&event->work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------*/
|
||||
|
||||
static int button_get_index(unsigned int code)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(button_map); i++)
|
||||
if (button_map[i].code == code)
|
||||
return i;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int gpio_button_get_value(struct gpio_keys_button_data *bdata)
|
||||
{
|
||||
int val;
|
||||
|
||||
if (bdata->can_sleep)
|
||||
val = !!gpiod_get_value_cansleep(bdata->gpiod);
|
||||
else
|
||||
val = !!gpiod_get_value(bdata->gpiod);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static void gpio_keys_handle_button(struct gpio_keys_button_data *bdata)
|
||||
{
|
||||
unsigned int type = bdata->b->type ?: EV_KEY;
|
||||
int state = gpio_button_get_value(bdata);
|
||||
unsigned long seen = jiffies;
|
||||
|
||||
pr_debug(PFX "event type=%u, code=%u, pressed=%d\n",
|
||||
type, bdata->b->code, state);
|
||||
|
||||
/* is this the initialization state? */
|
||||
if (bdata->last_state == -1) {
|
||||
/*
|
||||
* Don't advertise unpressed buttons on initialization.
|
||||
* Just save their state and continue otherwise this
|
||||
* can cause OpenWrt to enter failsafe.
|
||||
*/
|
||||
if (type == EV_KEY && state == 0)
|
||||
goto set_state;
|
||||
/*
|
||||
* But we are very interested in pressed buttons and
|
||||
* initial switch state. These will be reported to
|
||||
* userland.
|
||||
*/
|
||||
} else if (bdata->last_state == state) {
|
||||
/* reset asserted counter (only relevant for polled keys) */
|
||||
bdata->count = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
if (bdata->count < bdata->threshold) {
|
||||
bdata->count++;
|
||||
return;
|
||||
}
|
||||
|
||||
if (bdata->seen == 0)
|
||||
bdata->seen = seen;
|
||||
|
||||
button_hotplug_create_event(button_map[bdata->map_entry].name, type,
|
||||
(seen - bdata->seen) / HZ, state);
|
||||
bdata->seen = seen;
|
||||
|
||||
set_state:
|
||||
bdata->last_state = state;
|
||||
bdata->count = 0;
|
||||
}
|
||||
|
||||
struct gpio_keys_button_dev {
|
||||
int polled;
|
||||
struct delayed_work work;
|
||||
|
||||
struct device *dev;
|
||||
struct gpio_keys_platform_data *pdata;
|
||||
struct gpio_keys_button_data data[0];
|
||||
};
|
||||
|
||||
static void gpio_keys_polled_queue_work(struct gpio_keys_button_dev *bdev)
|
||||
{
|
||||
struct gpio_keys_platform_data *pdata = bdev->pdata;
|
||||
unsigned long delay = msecs_to_jiffies(pdata->poll_interval);
|
||||
|
||||
if (delay >= HZ)
|
||||
delay = round_jiffies_relative(delay);
|
||||
schedule_delayed_work(&bdev->work, delay);
|
||||
}
|
||||
|
||||
static void gpio_keys_polled_poll(struct work_struct *work)
|
||||
{
|
||||
struct gpio_keys_button_dev *bdev =
|
||||
container_of(work, struct gpio_keys_button_dev, work.work);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < bdev->pdata->nbuttons; i++) {
|
||||
struct gpio_keys_button_data *bdata = &bdev->data[i];
|
||||
|
||||
if (bdata->gpiod)
|
||||
gpio_keys_handle_button(bdata);
|
||||
}
|
||||
gpio_keys_polled_queue_work(bdev);
|
||||
}
|
||||
|
||||
static void gpio_keys_polled_close(struct gpio_keys_button_dev *bdev)
|
||||
{
|
||||
struct gpio_keys_platform_data *pdata = bdev->pdata;
|
||||
|
||||
cancel_delayed_work_sync(&bdev->work);
|
||||
|
||||
if (pdata->disable)
|
||||
pdata->disable(bdev->dev);
|
||||
}
|
||||
|
||||
static void gpio_keys_irq_work_func(struct work_struct *work)
|
||||
{
|
||||
struct gpio_keys_button_data *bdata = container_of(work,
|
||||
struct gpio_keys_button_data, work.work);
|
||||
|
||||
gpio_keys_handle_button(bdata);
|
||||
}
|
||||
|
||||
static irqreturn_t button_handle_irq(int irq, void *_bdata)
|
||||
{
|
||||
struct gpio_keys_button_data *bdata =
|
||||
(struct gpio_keys_button_data *) _bdata;
|
||||
|
||||
mod_delayed_work(system_wq, &bdata->work,
|
||||
msecs_to_jiffies(bdata->software_debounce));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static struct gpio_keys_platform_data *
|
||||
gpio_keys_get_devtree_pdata(struct device *dev)
|
||||
{
|
||||
struct device_node *node, *pp;
|
||||
struct gpio_keys_platform_data *pdata;
|
||||
struct gpio_keys_button *button;
|
||||
int nbuttons;
|
||||
int i = 0;
|
||||
|
||||
node = dev->of_node;
|
||||
if (!node)
|
||||
return NULL;
|
||||
|
||||
nbuttons = of_get_child_count(node);
|
||||
if (nbuttons == 0)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
pdata = devm_kzalloc(dev, sizeof(*pdata) + nbuttons * (sizeof *button),
|
||||
GFP_KERNEL);
|
||||
if (!pdata)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
|
||||
pdata->nbuttons = nbuttons;
|
||||
|
||||
pdata->rep = !!of_get_property(node, "autorepeat", NULL);
|
||||
of_property_read_u32(node, "poll-interval", &pdata->poll_interval);
|
||||
|
||||
for_each_child_of_node(node, pp) {
|
||||
button = (struct gpio_keys_button *)(&pdata->buttons[i++]);
|
||||
|
||||
if (of_property_read_u32(pp, "linux,code", &button->code)) {
|
||||
dev_err(dev, "Button node '%s' without keycode\n",
|
||||
pp->full_name);
|
||||
of_node_put(pp);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
button->desc = of_get_property(pp, "label", NULL);
|
||||
|
||||
if (of_property_read_u32(pp, "linux,input-type", &button->type))
|
||||
button->type = EV_KEY;
|
||||
|
||||
button->wakeup = !!of_get_property(pp, "gpio-key,wakeup", NULL);
|
||||
|
||||
if (of_property_read_u32(pp, "debounce-interval",
|
||||
&button->debounce_interval))
|
||||
button->debounce_interval = 5;
|
||||
|
||||
button->irq = irq_of_parse_and_map(pp, 0);
|
||||
button->gpio = -ENOENT; /* mark this as device-tree */
|
||||
}
|
||||
|
||||
return pdata;
|
||||
}
|
||||
|
||||
static struct of_device_id gpio_keys_of_match[] = {
|
||||
{ .compatible = "gpio-keys", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, gpio_keys_of_match);
|
||||
|
||||
static struct of_device_id gpio_keys_polled_of_match[] = {
|
||||
{ .compatible = "gpio-keys-polled", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, gpio_keys_polled_of_match);
|
||||
|
||||
#else
|
||||
|
||||
static inline struct gpio_keys_platform_data *
|
||||
gpio_keys_get_devtree_pdata(struct device *dev)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int gpio_keys_button_probe(struct platform_device *pdev,
|
||||
struct gpio_keys_button_dev **_bdev, int polled)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct gpio_keys_platform_data *pdata = dev_get_platdata(dev);
|
||||
struct gpio_keys_button_dev *bdev;
|
||||
struct gpio_keys_button *buttons;
|
||||
struct device_node *prev = NULL;
|
||||
int error = 0;
|
||||
int i;
|
||||
|
||||
if (!pdata) {
|
||||
pdata = gpio_keys_get_devtree_pdata(dev);
|
||||
if (IS_ERR(pdata))
|
||||
return PTR_ERR(pdata);
|
||||
if (!pdata) {
|
||||
dev_err(dev, "missing platform data\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
if (polled && !pdata->poll_interval) {
|
||||
dev_err(dev, "missing poll_interval value\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
buttons = devm_kzalloc(dev, pdata->nbuttons * sizeof(struct gpio_keys_button),
|
||||
GFP_KERNEL);
|
||||
if (!buttons) {
|
||||
dev_err(dev, "no memory for button data\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
memcpy(buttons, pdata->buttons, pdata->nbuttons * sizeof(struct gpio_keys_button));
|
||||
|
||||
bdev = devm_kzalloc(dev, sizeof(struct gpio_keys_button_dev) +
|
||||
pdata->nbuttons * sizeof(struct gpio_keys_button_data),
|
||||
GFP_KERNEL);
|
||||
if (!bdev) {
|
||||
dev_err(dev, "no memory for private data\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
bdev->polled = polled;
|
||||
|
||||
for (i = 0; i < pdata->nbuttons; i++) {
|
||||
struct gpio_keys_button *button = &buttons[i];
|
||||
struct gpio_keys_button_data *bdata = &bdev->data[i];
|
||||
const char *desc = button->desc ? button->desc : DRV_NAME;
|
||||
|
||||
if (button->wakeup) {
|
||||
dev_err(dev, "does not support wakeup\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
bdata->map_entry = button_get_index(button->code);
|
||||
if (bdata->map_entry < 0) {
|
||||
dev_err(dev, "does not support key code:%u\n",
|
||||
button->code);
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!(button->type == 0 || button->type == EV_KEY ||
|
||||
button->type == EV_SW)) {
|
||||
dev_err(dev, "only supports buttons or switches\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (button->irq) {
|
||||
dev_err(dev, "skipping button %s (only gpio buttons supported)\n",
|
||||
button->desc);
|
||||
bdata->b = &pdata->buttons[i];
|
||||
continue;
|
||||
}
|
||||
|
||||
if (gpio_is_valid(button->gpio)) {
|
||||
/* legacy platform data... but is it the lookup table? */
|
||||
bdata->gpiod = devm_gpiod_get_index(dev, desc, i,
|
||||
GPIOD_IN);
|
||||
if (IS_ERR(bdata->gpiod)) {
|
||||
/* or the legacy (button->gpio is good) way? */
|
||||
error = devm_gpio_request_one(dev,
|
||||
button->gpio, GPIOF_IN | (
|
||||
button->active_low ? GPIOF_ACTIVE_LOW :
|
||||
0), desc);
|
||||
if (error) {
|
||||
if (error != -EPROBE_DEFER) {
|
||||
dev_err(dev, "unable to claim gpio %d, err=%d\n",
|
||||
button->gpio, error);
|
||||
}
|
||||
goto out;
|
||||
}
|
||||
|
||||
bdata->gpiod = gpio_to_desc(button->gpio);
|
||||
}
|
||||
} else {
|
||||
/* Device-tree */
|
||||
struct device_node *child =
|
||||
of_get_next_child(dev->of_node, prev);
|
||||
|
||||
bdata->gpiod = devm_fwnode_gpiod_get(dev,
|
||||
of_fwnode_handle(child), NULL, GPIOD_IN,
|
||||
desc);
|
||||
|
||||
prev = child;
|
||||
}
|
||||
|
||||
if (IS_ERR_OR_NULL(bdata->gpiod)) {
|
||||
error = IS_ERR(bdata->gpiod) ? PTR_ERR(bdata->gpiod) :
|
||||
-EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
bdata->can_sleep = gpiod_cansleep(bdata->gpiod);
|
||||
bdata->last_state = -1; /* Unknown state on boot */
|
||||
|
||||
if (bdev->polled) {
|
||||
bdata->threshold = DIV_ROUND_UP(button->debounce_interval,
|
||||
pdata->poll_interval);
|
||||
} else {
|
||||
/* bdata->threshold = 0; already initialized */
|
||||
|
||||
if (button->debounce_interval) {
|
||||
error = gpiod_set_debounce(bdata->gpiod,
|
||||
button->debounce_interval * 1000);
|
||||
/*
|
||||
* use timer if gpiolib doesn't provide
|
||||
* debounce.
|
||||
*/
|
||||
if (error < 0) {
|
||||
bdata->software_debounce =
|
||||
button->debounce_interval;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bdata->b = &pdata->buttons[i];
|
||||
}
|
||||
|
||||
bdev->dev = &pdev->dev;
|
||||
bdev->pdata = pdata;
|
||||
platform_set_drvdata(pdev, bdev);
|
||||
|
||||
*_bdev = bdev;
|
||||
error = 0;
|
||||
|
||||
out:
|
||||
of_node_put(prev);
|
||||
return error;
|
||||
}
|
||||
|
||||
static int gpio_keys_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct gpio_keys_platform_data *pdata;
|
||||
struct gpio_keys_button_dev *bdev;
|
||||
int ret, i;
|
||||
|
||||
ret = gpio_keys_button_probe(pdev, &bdev, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pdata = bdev->pdata;
|
||||
for (i = 0; i < pdata->nbuttons; i++) {
|
||||
const struct gpio_keys_button *button = &pdata->buttons[i];
|
||||
struct gpio_keys_button_data *bdata = &bdev->data[i];
|
||||
unsigned long irqflags = IRQF_ONESHOT;
|
||||
|
||||
INIT_DELAYED_WORK(&bdata->work, gpio_keys_irq_work_func);
|
||||
|
||||
if (!button->irq) {
|
||||
bdata->irq = gpiod_to_irq(bdata->gpiod);
|
||||
if (bdata->irq < 0) {
|
||||
dev_err(&pdev->dev, "failed to get irq for gpio:%d\n",
|
||||
button->gpio);
|
||||
continue;
|
||||
}
|
||||
|
||||
irqflags |= IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
|
||||
} else {
|
||||
bdata->irq = button->irq;
|
||||
}
|
||||
|
||||
schedule_delayed_work(&bdata->work,
|
||||
msecs_to_jiffies(bdata->software_debounce));
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev,
|
||||
bdata->irq, NULL, button_handle_irq,
|
||||
irqflags, dev_name(&pdev->dev), bdata);
|
||||
if (ret < 0) {
|
||||
bdata->irq = 0;
|
||||
dev_err(&pdev->dev, "failed to request irq:%d for gpio:%d\n",
|
||||
bdata->irq, button->gpio);
|
||||
continue;
|
||||
} else {
|
||||
dev_dbg(&pdev->dev, "gpio:%d has irq:%d\n",
|
||||
button->gpio, bdata->irq);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int gpio_keys_polled_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct gpio_keys_platform_data *pdata;
|
||||
struct gpio_keys_button_dev *bdev;
|
||||
int ret;
|
||||
|
||||
ret = gpio_keys_button_probe(pdev, &bdev, 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
INIT_DELAYED_WORK(&bdev->work, gpio_keys_polled_poll);
|
||||
|
||||
pdata = bdev->pdata;
|
||||
if (pdata->enable)
|
||||
pdata->enable(bdev->dev);
|
||||
|
||||
gpio_keys_polled_queue_work(bdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void gpio_keys_irq_close(struct gpio_keys_button_dev *bdev)
|
||||
{
|
||||
struct gpio_keys_platform_data *pdata = bdev->pdata;
|
||||
size_t i;
|
||||
|
||||
for (i = 0; i < pdata->nbuttons; i++) {
|
||||
struct gpio_keys_button_data *bdata = &bdev->data[i];
|
||||
|
||||
disable_irq(bdata->irq);
|
||||
cancel_delayed_work_sync(&bdata->work);
|
||||
}
|
||||
}
|
||||
|
||||
static int gpio_keys_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct gpio_keys_button_dev *bdev = platform_get_drvdata(pdev);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
if (bdev->polled)
|
||||
gpio_keys_polled_close(bdev);
|
||||
else
|
||||
gpio_keys_irq_close(bdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver gpio_keys_driver = {
|
||||
.probe = gpio_keys_probe,
|
||||
.remove = gpio_keys_remove,
|
||||
.driver = {
|
||||
.name = "gpio-keys",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(gpio_keys_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_driver gpio_keys_polled_driver = {
|
||||
.probe = gpio_keys_polled_probe,
|
||||
.remove = gpio_keys_remove,
|
||||
.driver = {
|
||||
.name = "gpio-keys-polled",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(gpio_keys_polled_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
static int __init gpio_button_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = platform_driver_register(&gpio_keys_driver);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&gpio_keys_polled_driver);
|
||||
if (ret)
|
||||
platform_driver_unregister(&gpio_keys_driver);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit gpio_button_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&gpio_keys_driver);
|
||||
platform_driver_unregister(&gpio_keys_polled_driver);
|
||||
}
|
||||
|
||||
module_init(gpio_button_init);
|
||||
module_exit(gpio_button_exit);
|
||||
|
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
|
||||
MODULE_AUTHOR("Felix Fietkau <nbd@nbd.name>");
|
||||
MODULE_DESCRIPTION("Polled GPIO Buttons hotplug driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
47
package/kernel/gpio-nct5104d/Makefile
Normal file
47
package/kernel/gpio-nct5104d/Makefile
Normal file
@@ -0,0 +1,47 @@
|
||||
#
|
||||
# Copyright (C) 2017 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=gpio-nct5104d
|
||||
PKG_RELEASE:=1
|
||||
|
||||
PKG_MAINTAINER:=Florian Eckert <Eckert.Florian@googlemail.com>
|
||||
PKG_LICENSE:=GPL-2.0
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/gpio-nct5104d
|
||||
SUBMENU:=GPIO support
|
||||
TITLE:= GPIO nct5104d support
|
||||
DEPENDS:= @GPIO_SUPPORT @TARGET_x86
|
||||
FILES:=$(PKG_BUILD_DIR)/gpio-nct5104d.ko
|
||||
AUTOLOAD:=$(call AutoLoad,30,gpio-nct5104d,1)
|
||||
KCONFIG:=
|
||||
endef
|
||||
|
||||
define KernelPackage/gpio-nct5104d/description
|
||||
Support for GPIO functionality of NCT5104D super I/O chip.
|
||||
endef
|
||||
|
||||
EXTRA_KCONFIG:= \
|
||||
CONFIG_GPIO_NCT5104D=m
|
||||
|
||||
EXTRA_CFLAGS:= \
|
||||
$(patsubst CONFIG_%, -DCONFIG_%=1, $(patsubst %=m,%,$(filter %=m,$(EXTRA_KCONFIG)))) \
|
||||
$(patsubst CONFIG_%, -DCONFIG_%=1, $(patsubst %=y,%,$(filter %=y,$(EXTRA_KCONFIG)))) \
|
||||
|
||||
define Build/Compile
|
||||
$(KERNEL_MAKE) \
|
||||
M="$(PKG_BUILD_DIR)" \
|
||||
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
|
||||
$(EXTRA_KCONFIG) \
|
||||
modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,gpio-nct5104d))
|
||||
5
package/kernel/gpio-nct5104d/src/Kconfig
Normal file
5
package/kernel/gpio-nct5104d/src/Kconfig
Normal file
@@ -0,0 +1,5 @@
|
||||
config GPIO_NCT5104D
|
||||
tristate "NCT5104D GPIO support"
|
||||
depends on GENERIC_GPIO
|
||||
help
|
||||
Say yes here to support GPIO functionality of NCT5104D super I/O chip
|
||||
1
package/kernel/gpio-nct5104d/src/Makefile
Normal file
1
package/kernel/gpio-nct5104d/src/Makefile
Normal file
@@ -0,0 +1 @@
|
||||
obj-${CONFIG_GPIO_NCT5104D} += gpio-nct5104d.o
|
||||
438
package/kernel/gpio-nct5104d/src/gpio-nct5104d.c
Normal file
438
package/kernel/gpio-nct5104d/src/gpio-nct5104d.c
Normal file
@@ -0,0 +1,438 @@
|
||||
/*
|
||||
* GPIO driver for NCT5104D
|
||||
*
|
||||
* Author: Tasanakorn Phaipool <tasanakorn@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/dmi.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#define DRVNAME "gpio-nct5104d"
|
||||
|
||||
/*
|
||||
* Super-I/O registers
|
||||
*/
|
||||
#define SIO_LDSEL 0x07 /* Logical device select */
|
||||
#define SIO_CHIPID 0x20 /* Chaip ID (2 bytes) */
|
||||
#define SIO_GPIO_ENABLE 0x30 /* GPIO enable */
|
||||
#define SIO_GPIO1_MODE 0xE0 /* GPIO1 Mode OpenDrain/Push-Pull */
|
||||
#define SIO_GPIO2_MODE 0xE1 /* GPIO2 Mode OpenDrain/Push-Pull */
|
||||
|
||||
#define SIO_LD_GPIO 0x07 /* GPIO logical device */
|
||||
#define SIO_LD_GPIO_MODE 0x0F /* GPIO mode control device */
|
||||
#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
|
||||
#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
|
||||
|
||||
#define SIO_NCT5104D_ID 0x1061 /* Chip ID */
|
||||
#define SIO_PCENGINES_APU_NCT5104D_ID1 0xc452 /* Chip ID */
|
||||
#define SIO_PCENGINES_APU_NCT5104D_ID2 0xc453 /* Chip ID */
|
||||
|
||||
enum chips { nct5104d };
|
||||
|
||||
static const char * const nct5104d_names[] = {
|
||||
"nct5104d"
|
||||
};
|
||||
|
||||
struct nct5104d_sio {
|
||||
int addr;
|
||||
enum chips type;
|
||||
};
|
||||
|
||||
struct nct5104d_gpio_bank {
|
||||
struct gpio_chip chip;
|
||||
unsigned int regbase;
|
||||
struct nct5104d_gpio_data *data;
|
||||
};
|
||||
|
||||
struct nct5104d_gpio_data {
|
||||
struct nct5104d_sio *sio;
|
||||
int nr_bank;
|
||||
struct nct5104d_gpio_bank *bank;
|
||||
};
|
||||
|
||||
/*
|
||||
* Super-I/O functions.
|
||||
*/
|
||||
|
||||
static inline int superio_inb(int base, int reg)
|
||||
{
|
||||
outb(reg, base);
|
||||
return inb(base + 1);
|
||||
}
|
||||
|
||||
static int superio_inw(int base, int reg)
|
||||
{
|
||||
int val;
|
||||
|
||||
outb(reg++, base);
|
||||
val = inb(base + 1) << 8;
|
||||
outb(reg, base);
|
||||
val |= inb(base + 1);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static inline void superio_outb(int base, int reg, int val)
|
||||
{
|
||||
outb(reg, base);
|
||||
outb(val, base + 1);
|
||||
}
|
||||
|
||||
static inline int superio_enter(int base)
|
||||
{
|
||||
/* Don't step on other drivers' I/O space by accident. */
|
||||
if (!request_muxed_region(base, 2, DRVNAME)) {
|
||||
pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
/* According to the datasheet the key must be send twice. */
|
||||
outb(SIO_UNLOCK_KEY, base);
|
||||
outb(SIO_UNLOCK_KEY, base);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void superio_select(int base, int ld)
|
||||
{
|
||||
outb(SIO_LDSEL, base);
|
||||
outb(ld, base + 1);
|
||||
}
|
||||
|
||||
static inline void superio_exit(int base)
|
||||
{
|
||||
outb(SIO_LOCK_KEY, base);
|
||||
release_region(base, 2);
|
||||
}
|
||||
|
||||
/*
|
||||
* GPIO chip.
|
||||
*/
|
||||
|
||||
static int nct5104d_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
|
||||
static int nct5104d_gpio_get(struct gpio_chip *chip, unsigned offset);
|
||||
static int nct5104d_gpio_direction_out(struct gpio_chip *chip,
|
||||
unsigned offset, int value);
|
||||
static void nct5104d_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
|
||||
|
||||
#define NCT5104D_GPIO_BANK(_base, _ngpio, _regbase) \
|
||||
{ \
|
||||
.chip = { \
|
||||
.label = DRVNAME, \
|
||||
.owner = THIS_MODULE, \
|
||||
.direction_input = nct5104d_gpio_direction_in, \
|
||||
.get = nct5104d_gpio_get, \
|
||||
.direction_output = nct5104d_gpio_direction_out, \
|
||||
.set = nct5104d_gpio_set, \
|
||||
.base = _base, \
|
||||
.ngpio = _ngpio, \
|
||||
.can_sleep = true, \
|
||||
}, \
|
||||
.regbase = _regbase, \
|
||||
}
|
||||
|
||||
#define gpio_dir(base) (base + 0)
|
||||
#define gpio_data(base) (base + 1)
|
||||
|
||||
static struct nct5104d_gpio_bank nct5104d_gpio_bank[] = {
|
||||
NCT5104D_GPIO_BANK(0 , 8, 0xE0),
|
||||
NCT5104D_GPIO_BANK(10, 8, 0xE4)
|
||||
};
|
||||
|
||||
static int nct5104d_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
int err;
|
||||
struct nct5104d_gpio_bank *bank =
|
||||
container_of(chip, struct nct5104d_gpio_bank, chip);
|
||||
struct nct5104d_sio *sio = bank->data->sio;
|
||||
u8 dir;
|
||||
|
||||
err = superio_enter(sio->addr);
|
||||
if (err)
|
||||
return err;
|
||||
superio_select(sio->addr, SIO_LD_GPIO);
|
||||
|
||||
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
||||
dir |= (1 << offset);
|
||||
superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
|
||||
|
||||
superio_exit(sio->addr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nct5104d_gpio_get(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
int err;
|
||||
struct nct5104d_gpio_bank *bank =
|
||||
container_of(chip, struct nct5104d_gpio_bank, chip);
|
||||
struct nct5104d_sio *sio = bank->data->sio;
|
||||
u8 data;
|
||||
|
||||
err = superio_enter(sio->addr);
|
||||
if (err)
|
||||
return err;
|
||||
superio_select(sio->addr, SIO_LD_GPIO);
|
||||
|
||||
data = superio_inb(sio->addr, gpio_data(bank->regbase));
|
||||
|
||||
superio_exit(sio->addr);
|
||||
|
||||
return !!(data & 1 << offset);
|
||||
}
|
||||
|
||||
static int nct5104d_gpio_direction_out(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
{
|
||||
int err;
|
||||
struct nct5104d_gpio_bank *bank =
|
||||
container_of(chip, struct nct5104d_gpio_bank, chip);
|
||||
struct nct5104d_sio *sio = bank->data->sio;
|
||||
u8 dir, data_out;
|
||||
|
||||
err = superio_enter(sio->addr);
|
||||
if (err)
|
||||
return err;
|
||||
superio_select(sio->addr, SIO_LD_GPIO);
|
||||
|
||||
data_out = superio_inb(sio->addr, gpio_data(bank->regbase));
|
||||
if (value)
|
||||
data_out |= (1 << offset);
|
||||
else
|
||||
data_out &= ~(1 << offset);
|
||||
superio_outb(sio->addr, gpio_data(bank->regbase), data_out);
|
||||
|
||||
dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
|
||||
dir &= ~(1 << offset);
|
||||
superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
|
||||
|
||||
superio_exit(sio->addr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void nct5104d_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||
{
|
||||
int err;
|
||||
struct nct5104d_gpio_bank *bank =
|
||||
container_of(chip, struct nct5104d_gpio_bank, chip);
|
||||
struct nct5104d_sio *sio = bank->data->sio;
|
||||
u8 data_out;
|
||||
|
||||
err = superio_enter(sio->addr);
|
||||
if (err)
|
||||
return;
|
||||
superio_select(sio->addr, SIO_LD_GPIO);
|
||||
|
||||
data_out = superio_inb(sio->addr, gpio_data(bank->regbase));
|
||||
if (value)
|
||||
data_out |= (1 << offset);
|
||||
else
|
||||
data_out &= ~(1 << offset);
|
||||
superio_outb(sio->addr, gpio_data(bank->regbase), data_out);
|
||||
|
||||
superio_exit(sio->addr);
|
||||
}
|
||||
|
||||
/*
|
||||
* Platform device and driver.
|
||||
*/
|
||||
|
||||
static int nct5104d_gpio_probe(struct platform_device *pdev)
|
||||
{
|
||||
int err;
|
||||
int i;
|
||||
struct nct5104d_sio *sio = pdev->dev.platform_data;
|
||||
struct nct5104d_gpio_data *data;
|
||||
|
||||
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
switch (sio->type) {
|
||||
case nct5104d:
|
||||
data->nr_bank = ARRAY_SIZE(nct5104d_gpio_bank);
|
||||
data->bank = nct5104d_gpio_bank;
|
||||
break;
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
data->sio = sio;
|
||||
|
||||
platform_set_drvdata(pdev, data);
|
||||
|
||||
/* For each GPIO bank, register a GPIO chip. */
|
||||
for (i = 0; i < data->nr_bank; i++) {
|
||||
struct nct5104d_gpio_bank *bank = &data->bank[i];
|
||||
|
||||
bank->chip.parent = &pdev->dev;
|
||||
bank->data = data;
|
||||
|
||||
err = gpiochip_add(&bank->chip);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev,
|
||||
"Failed to register gpiochip %d: %d\n",
|
||||
i, err);
|
||||
goto err_gpiochip;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_gpiochip:
|
||||
for (i = i - 1; i >= 0; i--) {
|
||||
struct nct5104d_gpio_bank *bank = &data->bank[i];
|
||||
|
||||
gpiochip_remove (&bank->chip);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int nct5104d_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
int i;
|
||||
struct nct5104d_gpio_data *data = platform_get_drvdata(pdev);
|
||||
|
||||
for (i = 0; i < data->nr_bank; i++) {
|
||||
struct nct5104d_gpio_bank *bank = &data->bank[i];
|
||||
|
||||
gpiochip_remove (&bank->chip);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init nct5104d_find(int addr, struct nct5104d_sio *sio)
|
||||
{
|
||||
int err;
|
||||
u16 devid;
|
||||
u8 gpio_cfg;
|
||||
|
||||
err = superio_enter(addr);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = -ENODEV;
|
||||
|
||||
devid = superio_inw(addr, SIO_CHIPID);
|
||||
switch (devid) {
|
||||
case SIO_NCT5104D_ID:
|
||||
case SIO_PCENGINES_APU_NCT5104D_ID1:
|
||||
case SIO_PCENGINES_APU_NCT5104D_ID2:
|
||||
sio->type = nct5104d;
|
||||
/* enable GPIO0 and GPIO1 */
|
||||
superio_select(addr, SIO_LD_GPIO);
|
||||
gpio_cfg = superio_inb(addr, SIO_GPIO_ENABLE);
|
||||
gpio_cfg |= 0x03;
|
||||
superio_outb(addr, SIO_GPIO_ENABLE, gpio_cfg);
|
||||
break;
|
||||
default:
|
||||
pr_info(DRVNAME ": Unsupported device 0x%04x\n", devid);
|
||||
goto err;
|
||||
}
|
||||
sio->addr = addr;
|
||||
err = 0;
|
||||
|
||||
pr_info(DRVNAME ": Found %s at %#x chip id 0x%04x\n",
|
||||
nct5104d_names[sio->type],
|
||||
(unsigned int) addr,
|
||||
(int) superio_inw(addr, SIO_CHIPID));
|
||||
|
||||
superio_select(sio->addr, SIO_LD_GPIO_MODE);
|
||||
superio_outb(sio->addr, SIO_GPIO1_MODE, 0x0);
|
||||
superio_outb(sio->addr, SIO_GPIO2_MODE, 0x0);
|
||||
|
||||
err:
|
||||
superio_exit(addr);
|
||||
return err;
|
||||
}
|
||||
|
||||
static struct platform_device *nct5104d_gpio_pdev;
|
||||
|
||||
static int __init
|
||||
nct5104d_gpio_device_add(const struct nct5104d_sio *sio)
|
||||
{
|
||||
int err;
|
||||
|
||||
nct5104d_gpio_pdev = platform_device_alloc(DRVNAME, -1);
|
||||
if (!nct5104d_gpio_pdev)
|
||||
pr_err(DRVNAME ": Error platform_device_alloc\n");
|
||||
if (!nct5104d_gpio_pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
err = platform_device_add_data(nct5104d_gpio_pdev,
|
||||
sio, sizeof(*sio));
|
||||
if (err) {
|
||||
pr_err(DRVNAME "Platform data allocation failed\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
err = platform_device_add(nct5104d_gpio_pdev);
|
||||
if (err) {
|
||||
pr_err(DRVNAME "Device addition failed\n");
|
||||
goto err;
|
||||
}
|
||||
pr_info(DRVNAME ": Device added\n");
|
||||
return 0;
|
||||
|
||||
err:
|
||||
platform_device_put(nct5104d_gpio_pdev);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
static struct platform_driver nct5104d_gpio_driver = {
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = DRVNAME,
|
||||
},
|
||||
.probe = nct5104d_gpio_probe,
|
||||
.remove = nct5104d_gpio_remove,
|
||||
};
|
||||
|
||||
static int __init nct5104d_gpio_init(void)
|
||||
{
|
||||
int err;
|
||||
struct nct5104d_sio sio;
|
||||
|
||||
if (nct5104d_find(0x2e, &sio) &&
|
||||
nct5104d_find(0x4e, &sio))
|
||||
return -ENODEV;
|
||||
|
||||
err = platform_driver_register(&nct5104d_gpio_driver);
|
||||
if (!err) {
|
||||
pr_info(DRVNAME ": platform_driver_register\n");
|
||||
err = nct5104d_gpio_device_add(&sio);
|
||||
if (err)
|
||||
platform_driver_unregister(&nct5104d_gpio_driver);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
subsys_initcall(nct5104d_gpio_init);
|
||||
|
||||
static void __exit nct5104d_gpio_exit(void)
|
||||
{
|
||||
platform_device_unregister(nct5104d_gpio_pdev);
|
||||
platform_driver_unregister(&nct5104d_gpio_driver);
|
||||
}
|
||||
module_exit(nct5104d_gpio_exit);
|
||||
|
||||
MODULE_DESCRIPTION("GPIO driver for Super-I/O chips NCT5104D");
|
||||
MODULE_AUTHOR("Tasanakorn Phaipool <tasanakorn@gmail.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
57
package/kernel/lantiq/ltq-adsl-fw/Makefile
Normal file
57
package/kernel/lantiq/ltq-adsl-fw/Makefile
Normal file
@@ -0,0 +1,57 @@
|
||||
#
|
||||
# Copyright (C) 2011 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
|
||||
PKG_NAME:=ltq-adsl-fw
|
||||
PKG_VERSION:=0.1
|
||||
PKG_RELEASE:=1
|
||||
|
||||
PKG_BUILD_DIR:=$(BUILD_DIR)/ltq-dsl-fw-$(PKG_VERSION)
|
||||
PKG_SOURCE:=ltq-dsl-fw-$(PKG_VERSION).tar.bz2
|
||||
PKG_SOURCE_URL:=https://sources.openwrt.org/
|
||||
PKG_HASH:=28676d41c4b76e5bf7a2c5eae106a61fb96b93eabc0cb71120575fff9997269f
|
||||
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
|
||||
|
||||
PKG_FLAGS:=nonshared
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define Package/kmod-ltq-adsl-fw-template
|
||||
TITLE+=Firmware Annex-$(1) $(2)
|
||||
SECTION:=sys
|
||||
CATEGORY:=Kernel modules
|
||||
SUBMENU:=Network Devices
|
||||
VARIANT:= $(2)-fw-$(1)
|
||||
SOC:=$(2)
|
||||
ANNEX:=$(1)
|
||||
URL:=http://www.lantiq.com/
|
||||
DEPENDS:=@$(3) +kmod-ltq-adsl-$(2)
|
||||
endef
|
||||
|
||||
Package/kmod-ltq-adsl-danube-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
|
||||
Package/kmod-ltq-adsl-danube-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
|
||||
Package/kmod-ltq-adsl-ar9-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,ar9,TARGET_lantiq_xway)
|
||||
Package/kmod-ltq-adsl-ar9-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,ar9,TARGET_lantiq_xway)
|
||||
Package/kmod-ltq-adsl-ase-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,ase,TARGET_lantiq_ase)
|
||||
Package/kmod-ltq-adsl-ase-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,ase,TARGET_lantiq_ase)
|
||||
|
||||
define Build/Compile
|
||||
endef
|
||||
|
||||
define Package/kmod-ltq-adsl-$(BUILD_VARIANT)/install
|
||||
$(INSTALL_DIR) $(1)/lib/firmware/
|
||||
$(CP) $(PKG_BUILD_DIR)/ltq-dsl-fw-$(ANNEX)-$(SOC).bin $(1)/lib/firmware/
|
||||
ln -s /lib/firmware/ltq-dsl-fw-$(ANNEX)-$(SOC).bin $(1)/lib/firmware/adsl.bin
|
||||
endef
|
||||
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-danube-fw-a))
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-danube-fw-b))
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-ase-fw-a))
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-ase-fw-b))
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-ar9-fw-a))
|
||||
$(eval $(call BuildPackage,kmod-ltq-adsl-ar9-fw-b))
|
||||
44
package/kernel/lantiq/ltq-adsl-mei/Makefile
Normal file
44
package/kernel/lantiq/ltq-adsl-mei/Makefile
Normal file
@@ -0,0 +1,44 @@
|
||||
# Copyright (C) 2012 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=ltq-adsl-mei
|
||||
PKG_RELEASE:=1
|
||||
|
||||
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
|
||||
PKG_CHECK_FORMAT_SECURITY:=0
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/ltq-adsl-mei-template
|
||||
SECTION:=sys
|
||||
CATEGORY:=Kernel modules
|
||||
SUBMENU:=Network Devices
|
||||
TITLE:=mei driver for $(1)
|
||||
URL:=http://www.lantiq.com/
|
||||
VARIANT:=$(1)
|
||||
DEPENDS:=@$(2)
|
||||
FILES:=$(PKG_BUILD_DIR)/drv_mei_cpe.ko
|
||||
AUTOLOAD:=$(call AutoLoad,50,drv_mei_cpe)
|
||||
endef
|
||||
|
||||
KernelPackage/ltq-adsl-danube-mei=$(call KernelPackage/ltq-adsl-mei-template,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
|
||||
KernelPackage/ltq-adsl-ar9-mei=$(call KernelPackage/ltq-adsl-mei-template,ar9,TARGET_lantiq_xway)
|
||||
KernelPackage/ltq-adsl-ase-mei=$(call KernelPackage/ltq-adsl-mei-template,ase,TARGET_lantiq_ase)
|
||||
|
||||
define Build/Configure
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
cd $(LINUX_DIR); \
|
||||
ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \
|
||||
$(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR)/ V=1 modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ltq-adsl-danube-mei))
|
||||
$(eval $(call KernelPackage,ltq-adsl-ase-mei))
|
||||
$(eval $(call KernelPackage,ltq-adsl-ar9-mei))
|
||||
13
package/kernel/lantiq/ltq-adsl-mei/src/Makefile
Normal file
13
package/kernel/lantiq/ltq-adsl-mei/src/Makefile
Normal file
@@ -0,0 +1,13 @@
|
||||
ifeq ($(BUILD_VARIANT),danube)
|
||||
CFLAGS_MODULE = -DCONFIG_DANUBE -DCONFIG_IFXMIPS_DSL_CPE_MEI
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),ase)
|
||||
CFLAGS_MODULE = -DCONFIG_AMAZON_SE -DCONFIG_IFXMIPS_DSL_CPE_MEI
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),ar9)
|
||||
CFLAGS_MODULE = -DCONFIG_AR9 -DCONFIG_IFXMIPS_DSL_CPE_MEI
|
||||
endif
|
||||
|
||||
obj-m = drv_mei_cpe.o
|
||||
2842
package/kernel/lantiq/ltq-adsl-mei/src/drv_mei_cpe.c
Normal file
2842
package/kernel/lantiq/ltq-adsl-mei/src/drv_mei_cpe.c
Normal file
File diff suppressed because it is too large
Load Diff
723
package/kernel/lantiq/ltq-adsl-mei/src/ifxmips_mei_interface.h
Normal file
723
package/kernel/lantiq/ltq-adsl-mei/src/ifxmips_mei_interface.h
Normal file
@@ -0,0 +1,723 @@
|
||||
/******************************************************************************
|
||||
|
||||
Copyright (c) 2009
|
||||
Infineon Technologies AG
|
||||
Am Campeon 1-12; 81726 Munich, Germany
|
||||
|
||||
For licensing information, see the file 'LICENSE' in the root folder of
|
||||
this software module.
|
||||
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef IFXMIPS_MEI_H
|
||||
#define IFXMIPS_MEI_H
|
||||
|
||||
//#define CONFIG_AMAZON_SE 1
|
||||
//#define CONFIG_DANUBE 1
|
||||
//#define CONFIG_AR9 1
|
||||
|
||||
#if !defined(CONFIG_DANUBE) && !defined(CONFIG_AMAZON_SE) && !defined(CONFIG_AR9) && !defined(CONFIG_VR9)
|
||||
#error Platform undefined!!!
|
||||
#endif
|
||||
|
||||
#ifdef IFX_MEI_BSP
|
||||
/** This is the character datatype. */
|
||||
typedef char DSL_char_t;
|
||||
/** This is the unsigned 8-bit datatype. */
|
||||
typedef unsigned char DSL_uint8_t;
|
||||
/** This is the signed 8-bit datatype. */
|
||||
typedef signed char DSL_int8_t;
|
||||
/** This is the unsigned 16-bit datatype. */
|
||||
typedef unsigned short DSL_uint16_t;
|
||||
/** This is the signed 16-bit datatype. */
|
||||
typedef signed short DSL_int16_t;
|
||||
/** This is the unsigned 32-bit datatype. */
|
||||
typedef unsigned long DSL_uint32_t;
|
||||
/** This is the signed 32-bit datatype. */
|
||||
typedef signed long DSL_int32_t;
|
||||
/** This is the float datatype. */
|
||||
typedef float DSL_float_t;
|
||||
/** This is the void datatype. */
|
||||
typedef void DSL_void_t;
|
||||
/** integer type, width is depending on processor arch */
|
||||
typedef int DSL_int_t;
|
||||
/** unsigned integer type, width is depending on processor arch */
|
||||
typedef unsigned int DSL_uint_t;
|
||||
typedef struct file DSL_DRV_file_t;
|
||||
typedef struct inode DSL_DRV_inode_t;
|
||||
|
||||
/**
|
||||
* Defines all possible CMV groups
|
||||
* */
|
||||
typedef enum {
|
||||
DSL_CMV_GROUP_CNTL = 1,
|
||||
DSL_CMV_GROUP_STAT = 2,
|
||||
DSL_CMV_GROUP_INFO = 3,
|
||||
DSL_CMV_GROUP_TEST = 4,
|
||||
DSL_CMV_GROUP_OPTN = 5,
|
||||
DSL_CMV_GROUP_RATE = 6,
|
||||
DSL_CMV_GROUP_PLAM = 7,
|
||||
DSL_CMV_GROUP_CNFG = 8
|
||||
} DSL_CmvGroup_t;
|
||||
/**
|
||||
* Defines all opcode types
|
||||
* */
|
||||
typedef enum {
|
||||
H2D_CMV_READ = 0x00,
|
||||
H2D_CMV_WRITE = 0x04,
|
||||
H2D_CMV_INDICATE_REPLY = 0x10,
|
||||
H2D_ERROR_OPCODE_UNKNOWN =0x20,
|
||||
H2D_ERROR_CMV_UNKNOWN =0x30,
|
||||
|
||||
D2H_CMV_READ_REPLY =0x01,
|
||||
D2H_CMV_WRITE_REPLY = 0x05,
|
||||
D2H_CMV_INDICATE = 0x11,
|
||||
D2H_ERROR_OPCODE_UNKNOWN = 0x21,
|
||||
D2H_ERROR_CMV_UNKNOWN = 0x31,
|
||||
D2H_ERROR_CMV_READ_NOT_AVAILABLE = 0x41,
|
||||
D2H_ERROR_CMV_WRITE_ONLY = 0x51,
|
||||
D2H_ERROR_CMV_READ_ONLY = 0x61,
|
||||
|
||||
H2D_DEBUG_READ_DM = 0x02,
|
||||
H2D_DEBUG_READ_PM = 0x06,
|
||||
H2D_DEBUG_WRITE_DM = 0x0a,
|
||||
H2D_DEBUG_WRITE_PM = 0x0e,
|
||||
|
||||
D2H_DEBUG_READ_DM_REPLY = 0x03,
|
||||
D2H_DEBUG_READ_FM_REPLY = 0x07,
|
||||
D2H_DEBUG_WRITE_DM_REPLY = 0x0b,
|
||||
D2H_DEBUG_WRITE_FM_REPLY = 0x0f,
|
||||
D2H_ERROR_ADDR_UNKNOWN = 0x33,
|
||||
|
||||
D2H_AUTONOMOUS_MODEM_READY_MSG = 0xf1
|
||||
} DSL_CmvOpcode_t;
|
||||
|
||||
/* mutex macros */
|
||||
#define MEI_MUTEX_INIT(id,flag) \
|
||||
sema_init(&id,flag)
|
||||
#define MEI_MUTEX_LOCK(id) \
|
||||
down_interruptible(&id)
|
||||
#define MEI_MUTEX_UNLOCK(id) \
|
||||
up(&id)
|
||||
#define MEI_WAIT(ms) \
|
||||
{\
|
||||
set_current_state(TASK_INTERRUPTIBLE);\
|
||||
schedule_timeout(ms);\
|
||||
}
|
||||
#define MEI_INIT_WAKELIST(name,queue) \
|
||||
init_waitqueue_head(&queue)
|
||||
|
||||
static inline long
|
||||
ugly_hack_sleep_on_timeout(wait_queue_head_t *q, long timeout)
|
||||
{
|
||||
unsigned long flags;
|
||||
wait_queue_entry_t wait;
|
||||
|
||||
init_waitqueue_entry(&wait, current);
|
||||
|
||||
__set_current_state(TASK_INTERRUPTIBLE);
|
||||
spin_lock_irqsave(&q->lock, flags);
|
||||
__add_wait_queue(q, &wait);
|
||||
spin_unlock(&q->lock);
|
||||
|
||||
timeout = schedule_timeout(timeout);
|
||||
|
||||
spin_lock_irq(&q->lock);
|
||||
__remove_wait_queue(q, &wait);
|
||||
spin_unlock_irqrestore(&q->lock, flags);
|
||||
|
||||
return timeout;
|
||||
}
|
||||
|
||||
/* wait for an event, timeout is measured in ms */
|
||||
#define MEI_WAIT_EVENT_TIMEOUT(ev,timeout)\
|
||||
ugly_hack_sleep_on_timeout(&ev, timeout * HZ / 1000)
|
||||
#define MEI_WAKEUP_EVENT(ev)\
|
||||
wake_up_interruptible(&ev)
|
||||
#endif /* IFX_MEI_BSP */
|
||||
|
||||
/*** Register address offsets, relative to MEI_SPACE_ADDRESS ***/
|
||||
#define ME_DX_DATA (0x0000)
|
||||
#define ME_VERSION (0x0004)
|
||||
#define ME_ARC_GP_STAT (0x0008)
|
||||
#define ME_DX_STAT (0x000C)
|
||||
#define ME_DX_AD (0x0010)
|
||||
#define ME_DX_MWS (0x0014)
|
||||
#define ME_ME2ARC_INT (0x0018)
|
||||
#define ME_ARC2ME_STAT (0x001C)
|
||||
#define ME_ARC2ME_MASK (0x0020)
|
||||
#define ME_DBG_WR_AD (0x0024)
|
||||
#define ME_DBG_RD_AD (0x0028)
|
||||
#define ME_DBG_DATA (0x002C)
|
||||
#define ME_DBG_DECODE (0x0030)
|
||||
#define ME_CONFIG (0x0034)
|
||||
#define ME_RST_CTRL (0x0038)
|
||||
#define ME_DBG_MASTER (0x003C)
|
||||
#define ME_CLK_CTRL (0x0040)
|
||||
#define ME_BIST_CTRL (0x0044)
|
||||
#define ME_BIST_STAT (0x0048)
|
||||
#define ME_XDATA_BASE_SH (0x004c)
|
||||
#define ME_XDATA_BASE (0x0050)
|
||||
#define ME_XMEM_BAR_BASE (0x0054)
|
||||
#define ME_XMEM_BAR0 (0x0054)
|
||||
#define ME_XMEM_BAR1 (0x0058)
|
||||
#define ME_XMEM_BAR2 (0x005C)
|
||||
#define ME_XMEM_BAR3 (0x0060)
|
||||
#define ME_XMEM_BAR4 (0x0064)
|
||||
#define ME_XMEM_BAR5 (0x0068)
|
||||
#define ME_XMEM_BAR6 (0x006C)
|
||||
#define ME_XMEM_BAR7 (0x0070)
|
||||
#define ME_XMEM_BAR8 (0x0074)
|
||||
#define ME_XMEM_BAR9 (0x0078)
|
||||
#define ME_XMEM_BAR10 (0x007C)
|
||||
#define ME_XMEM_BAR11 (0x0080)
|
||||
#define ME_XMEM_BAR12 (0x0084)
|
||||
#define ME_XMEM_BAR13 (0x0088)
|
||||
#define ME_XMEM_BAR14 (0x008C)
|
||||
#define ME_XMEM_BAR15 (0x0090)
|
||||
#define ME_XMEM_BAR16 (0x0094)
|
||||
|
||||
#define WHILE_DELAY 20000
|
||||
/*
|
||||
** Define where in ME Processor's memory map the Stratify chip lives
|
||||
*/
|
||||
|
||||
#define MAXSWAPSIZE (8 * 1024) //8k *(32bits)
|
||||
|
||||
// Mailboxes
|
||||
#define MSG_LENGTH 16 // x16 bits
|
||||
#define YES_REPLY 1
|
||||
#define NO_REPLY 0
|
||||
|
||||
#define CMV_TIMEOUT 1000 //jiffies
|
||||
|
||||
// Block size per BAR
|
||||
#define SDRAM_SEGMENT_SIZE (64*1024)
|
||||
// Number of Bar registers
|
||||
#define MAX_BAR_REGISTERS (17)
|
||||
|
||||
#define XDATA_REGISTER (15)
|
||||
|
||||
// ARC register addresss
|
||||
#define ARC_STATUS 0x0
|
||||
#define ARC_LP_START 0x2
|
||||
#define ARC_LP_END 0x3
|
||||
#define ARC_DEBUG 0x5
|
||||
#define ARC_INT_MASK 0x10A
|
||||
|
||||
#define IRAM0_BASE (0x00000)
|
||||
#define IRAM1_BASE (0x04000)
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#define BRAM_BASE (0x0A000)
|
||||
#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9)
|
||||
#define BRAM_BASE (0x08000)
|
||||
#endif
|
||||
#define XRAM_BASE (0x18000)
|
||||
#define YRAM_BASE (0x1A000)
|
||||
#define EXT_MEM_BASE (0x80000)
|
||||
#define ARC_GPIO_CTRL (0xC030)
|
||||
#define ARC_GPIO_DATA (0xC034)
|
||||
|
||||
#define IRAM0_SIZE (16*1024)
|
||||
#define IRAM1_SIZE (16*1024)
|
||||
#define BRAM_SIZE (12*1024)
|
||||
#define XRAM_SIZE (8*1024)
|
||||
#define YRAM_SIZE (8*1024)
|
||||
#define EXT_MEM_SIZE (1536*1024)
|
||||
|
||||
#define ADSL_BASE (0x20000)
|
||||
#define CRI_BASE (ADSL_BASE + 0x11F00)
|
||||
#define CRI_CCR0 (CRI_BASE + 0x00)
|
||||
#define CRI_RST (CRI_BASE + 0x04*4)
|
||||
#define ADSL_DILV_BASE (ADSL_BASE+0x20000)
|
||||
|
||||
//
|
||||
#define IRAM0_ADDR_BIT_MASK 0xFFF
|
||||
#define IRAM1_ADDR_BIT_MASK 0xFFF
|
||||
#define BRAM_ADDR_BIT_MASK 0xFFF
|
||||
#define RX_DILV_ADDR_BIT_MASK 0x1FFF
|
||||
|
||||
/*** Bit definitions ***/
|
||||
#define ARC_AUX_HALT (1 << 25)
|
||||
#define ARC_DEBUG_HALT (1 << 1)
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
#define BIT0 (1<<0)
|
||||
#define BIT1 (1<<1)
|
||||
#define BIT2 (1<<2)
|
||||
#define BIT3 (1<<3)
|
||||
#define BIT4 (1<<4)
|
||||
#define BIT5 (1<<5)
|
||||
#define BIT6 (1<<6)
|
||||
#define BIT7 (1<<7)
|
||||
#define BIT8 (1<<8)
|
||||
#define BIT9 (1<<9)
|
||||
#define BIT10 (1<<10)
|
||||
#define BIT11 (1<<11)
|
||||
#define BIT12 (1<<12)
|
||||
#define BIT13 (1<<13)
|
||||
#define BIT14 (1<<14)
|
||||
#define BIT15 (1<<15)
|
||||
#define BIT16 (1<<16)
|
||||
#define BIT17 (1<<17)
|
||||
#define BIT18 (1<<18)
|
||||
#define BIT19 (1<<19)
|
||||
#define BIT20 (1<<20)
|
||||
#define BIT21 (1<<21)
|
||||
#define BIT22 (1<<22)
|
||||
#define BIT23 (1<<23)
|
||||
#define BIT24 (1<<24)
|
||||
#define BIT25 (1<<25)
|
||||
#define BIT26 (1<<26)
|
||||
#define BIT27 (1<<27)
|
||||
#define BIT28 (1<<28)
|
||||
#define BIT29 (1<<29)
|
||||
#define BIT30 (1<<30)
|
||||
#define BIT31 (1<<31)
|
||||
|
||||
// CRI_CCR0 Register definitions
|
||||
#define CLK_2M_MODE_ENABLE BIT6
|
||||
#define ACL_CLK_MODE_ENABLE BIT4
|
||||
#define FDF_CLK_MODE_ENABLE BIT2
|
||||
#define STM_CLK_MODE_ENABLE BIT0
|
||||
|
||||
// CRI_RST Register definitions
|
||||
#define FDF_SRST BIT3
|
||||
#define MTE_SRST BIT2
|
||||
#define FCI_SRST BIT1
|
||||
#define AAI_SRST BIT0
|
||||
|
||||
// MEI_TO_ARC_INTERRUPT Register definitions
|
||||
#define MEI_TO_ARC_INT1 BIT3
|
||||
#define MEI_TO_ARC_INT0 BIT2
|
||||
#define MEI_TO_ARC_CS_DONE BIT1 //need to check
|
||||
#define MEI_TO_ARC_MSGAV BIT0
|
||||
|
||||
// ARC_TO_MEI_INTERRUPT Register definitions
|
||||
#define ARC_TO_MEI_INT1 BIT8
|
||||
#define ARC_TO_MEI_INT0 BIT7
|
||||
#define ARC_TO_MEI_CS_REQ BIT6
|
||||
#define ARC_TO_MEI_DBG_DONE BIT5
|
||||
#define ARC_TO_MEI_MSGACK BIT4
|
||||
#define ARC_TO_MEI_NO_ACCESS BIT3
|
||||
#define ARC_TO_MEI_CHECK_AAITX BIT2
|
||||
#define ARC_TO_MEI_CHECK_AAIRX BIT1
|
||||
#define ARC_TO_MEI_MSGAV BIT0
|
||||
|
||||
// ARC_TO_MEI_INTERRUPT_MASK Register definitions
|
||||
#define GP_INT1_EN BIT8
|
||||
#define GP_INT0_EN BIT7
|
||||
#define CS_REQ_EN BIT6
|
||||
#define DBG_DONE_EN BIT5
|
||||
#define MSGACK_EN BIT4
|
||||
#define NO_ACC_EN BIT3
|
||||
#define AAITX_EN BIT2
|
||||
#define AAIRX_EN BIT1
|
||||
#define MSGAV_EN BIT0
|
||||
|
||||
#define MEI_SOFT_RESET BIT0
|
||||
|
||||
#define HOST_MSTR BIT0
|
||||
|
||||
#define JTAG_MASTER_MODE 0x0
|
||||
#define MEI_MASTER_MODE HOST_MSTR
|
||||
|
||||
// MEI_DEBUG_DECODE Register definitions
|
||||
#define MEI_DEBUG_DEC_MASK (0x3)
|
||||
#define MEI_DEBUG_DEC_AUX_MASK (0x0)
|
||||
#define ME_DBG_DECODE_DMP1_MASK (0x1)
|
||||
#define MEI_DEBUG_DEC_DMP2_MASK (0x2)
|
||||
#define MEI_DEBUG_DEC_CORE_MASK (0x3)
|
||||
|
||||
#define AUX_STATUS (0x0)
|
||||
#define AUX_ARC_GPIO_CTRL (0x10C)
|
||||
#define AUX_ARC_GPIO_DATA (0x10D)
|
||||
// ARC_TO_MEI_MAILBOX[11] is a special location used to indicate
|
||||
// page swap requests.
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#define OMBOX_BASE 0xDF80
|
||||
#define ARC_TO_MEI_MAILBOX 0xDFA0
|
||||
#define IMBOX_BASE 0xDFC0
|
||||
#define MEI_TO_ARC_MAILBOX 0xDFD0
|
||||
#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9)
|
||||
#define OMBOX_BASE 0xAF80
|
||||
#define ARC_TO_MEI_MAILBOX 0xAFA0
|
||||
#define IMBOX_BASE 0xAFC0
|
||||
#define MEI_TO_ARC_MAILBOX 0xAFD0
|
||||
#endif
|
||||
|
||||
#define MEI_TO_ARC_MAILBOXR (MEI_TO_ARC_MAILBOX + 0x2C)
|
||||
#define ARC_MEI_MAILBOXR (ARC_TO_MEI_MAILBOX + 0x2C)
|
||||
#define OMBOX1 (OMBOX_BASE+0x4)
|
||||
|
||||
// Codeswap request messages are indicated by setting BIT31
|
||||
#define OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK (0x80000000)
|
||||
|
||||
// Clear Eoc messages received are indicated by setting BIT17
|
||||
#define OMB_CLEAREOC_INTERRUPT_CODE (0x00020000)
|
||||
#define OMB_REBOOT_INTERRUPT_CODE (1 << 18)
|
||||
|
||||
/*
|
||||
** Swap page header
|
||||
*/
|
||||
// Page must be loaded at boot time if size field has BIT31 set
|
||||
#define BOOT_FLAG (BIT31)
|
||||
#define BOOT_FLAG_MASK ~BOOT_FLAG
|
||||
|
||||
#define FREE_RELOAD 1
|
||||
#define FREE_SHOWTIME 2
|
||||
#define FREE_ALL 3
|
||||
|
||||
// marcos
|
||||
#define IFX_MEI_WRITE_REGISTER_L(data,addr) *((volatile u32*)(addr)) = (u32)(data)
|
||||
#define IFX_MEI_READ_REGISTER_L(addr) (*((volatile u32*)(addr)))
|
||||
#define SET_BIT(reg, mask) reg |= (mask)
|
||||
#define CLEAR_BIT(reg, mask) reg &= (~mask)
|
||||
#define CLEAR_BITS(reg, mask) CLEAR_BIT(reg, mask)
|
||||
//#define SET_BITS(reg, mask) SET_BIT(reg, mask)
|
||||
#define SET_BITFIELD(reg, mask, off, val) {reg &= (~mask); reg |= (val << off);}
|
||||
|
||||
#define ALIGN_SIZE ( 1L<<10 ) //1K size align
|
||||
#define MEM_ALIGN(addr) (((addr) + ALIGN_SIZE - 1) & ~ (ALIGN_SIZE -1) )
|
||||
|
||||
// swap marco
|
||||
#define MEI_HALF_WORD_SWAP(data) {data = ((data & 0xffff)<<16) + ((data & 0xffff0000)>>16);}
|
||||
#define MEI_BYTE_SWAP(data) {data = ((data & 0xff)<<24) + ((data & 0xff00)<<8)+ ((data & 0xff0000)>>8)+ ((data & 0xff000000)>>24);}
|
||||
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
typedef struct reg_entry
|
||||
{
|
||||
int *flag;
|
||||
char name[30]; /* big enough to hold names */
|
||||
char description[100]; /* big enough to hold description */
|
||||
unsigned short low_ino;
|
||||
} reg_entry_t;
|
||||
#endif
|
||||
// Swap page header describes size in 32-bit words, load location, and image offset
|
||||
// for program and/or data segments
|
||||
typedef struct _arc_swp_page_hdr {
|
||||
u32 p_offset; //Offset bytes of progseg from beginning of image
|
||||
u32 p_dest; //Destination addr of progseg on processor
|
||||
u32 p_size; //Size in 32-bitwords of program segment
|
||||
u32 d_offset; //Offset bytes of dataseg from beginning of image
|
||||
u32 d_dest; //Destination addr of dataseg on processor
|
||||
u32 d_size; //Size in 32-bitwords of data segment
|
||||
} ARC_SWP_PAGE_HDR;
|
||||
|
||||
/*
|
||||
** Swap image header
|
||||
*/
|
||||
#define GET_PROG 0 // Flag used for program mem segment
|
||||
#define GET_DATA 1 // Flag used for data mem segment
|
||||
|
||||
// Image header contains size of image, checksum for image, and count of
|
||||
// page headers. Following that are 'count' page headers followed by
|
||||
// the code and/or data segments to be loaded
|
||||
typedef struct _arc_img_hdr {
|
||||
u32 size; // Size of binary image in bytes
|
||||
u32 checksum; // Checksum for image
|
||||
u32 count; // Count of swp pages in image
|
||||
ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy
|
||||
} ARC_IMG_HDR;
|
||||
|
||||
typedef struct smmu_mem_info {
|
||||
int type;
|
||||
int boot;
|
||||
unsigned long nCopy;
|
||||
unsigned long size;
|
||||
unsigned char *address;
|
||||
unsigned char *org_address;
|
||||
} smmu_mem_info_t;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
typedef struct ifx_mei_device_private {
|
||||
int modem_ready;
|
||||
int arcmsgav;
|
||||
int cmv_reply;
|
||||
int cmv_waiting;
|
||||
// Mei to ARC CMV count, reply count, ARC Indicator count
|
||||
int modem_ready_cnt;
|
||||
int cmv_count;
|
||||
int reply_count;
|
||||
unsigned long image_size;
|
||||
int nBar;
|
||||
u16 Recent_indicator[MSG_LENGTH];
|
||||
|
||||
u16 CMV_RxMsg[MSG_LENGTH] __attribute__ ((aligned (4)));
|
||||
|
||||
smmu_mem_info_t adsl_mem_info[MAX_BAR_REGISTERS];
|
||||
ARC_IMG_HDR *img_hdr;
|
||||
// to wait for arc cmv reply, sleep on wait_queue_arcmsgav;
|
||||
wait_queue_head_t wait_queue_arcmsgav;
|
||||
wait_queue_head_t wait_queue_modemready;
|
||||
struct semaphore mei_cmv_sema;
|
||||
} ifx_mei_device_private_t;
|
||||
#endif
|
||||
typedef struct winhost_message {
|
||||
union {
|
||||
u16 RxMessage[MSG_LENGTH] __attribute__ ((aligned (4)));
|
||||
u16 TxMessage[MSG_LENGTH] __attribute__ ((aligned (4)));
|
||||
} msg;
|
||||
} DSL_DEV_WinHost_Message_t;
|
||||
/********************************************************************************************************
|
||||
* DSL CPE API Driver Stack Interface Definitions
|
||||
* *****************************************************************************************************/
|
||||
/** IOCTL codes for bsp driver */
|
||||
#define DSL_IOC_MEI_BSP_MAGIC 's'
|
||||
|
||||
#define DSL_FIO_BSP_DSL_START _IO (DSL_IOC_MEI_BSP_MAGIC, 0)
|
||||
#define DSL_FIO_BSP_RUN _IO (DSL_IOC_MEI_BSP_MAGIC, 1)
|
||||
#define DSL_FIO_BSP_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 2)
|
||||
#define DSL_FIO_BSP_RESET _IO (DSL_IOC_MEI_BSP_MAGIC, 3)
|
||||
#define DSL_FIO_BSP_REBOOT _IO (DSL_IOC_MEI_BSP_MAGIC, 4)
|
||||
#define DSL_FIO_BSP_HALT _IO (DSL_IOC_MEI_BSP_MAGIC, 5)
|
||||
#define DSL_FIO_BSP_BOOTDOWNLOAD _IO (DSL_IOC_MEI_BSP_MAGIC, 6)
|
||||
#define DSL_FIO_BSP_JTAG_ENABLE _IO (DSL_IOC_MEI_BSP_MAGIC, 7)
|
||||
#define DSL_FIO_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 8)
|
||||
#define DSL_FIO_ARC_MUX_TEST _IO (DSL_IOC_MEI_BSP_MAGIC, 9)
|
||||
#define DSL_FIO_BSP_REMOTE _IOW (DSL_IOC_MEI_BSP_MAGIC, 10, u32)
|
||||
#define DSL_FIO_BSP_GET_BASE_ADDRESS _IOR (DSL_IOC_MEI_BSP_MAGIC, 11, u32)
|
||||
#define DSL_FIO_BSP_IS_MODEM_READY _IOR (DSL_IOC_MEI_BSP_MAGIC, 12, u32)
|
||||
#define DSL_FIO_BSP_GET_VERSION _IOR (DSL_IOC_MEI_BSP_MAGIC, 13, DSL_DEV_Version_t)
|
||||
#define DSL_FIO_BSP_CMV_WINHOST _IOWR(DSL_IOC_MEI_BSP_MAGIC, 14, DSL_DEV_WinHost_Message_t)
|
||||
#define DSL_FIO_BSP_CMV_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 15, DSL_DEV_MeiReg_t)
|
||||
#define DSL_FIO_BSP_CMV_WRITE _IOW (DSL_IOC_MEI_BSP_MAGIC, 16, DSL_DEV_MeiReg_t)
|
||||
#define DSL_FIO_BSP_DEBUG_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 17, DSL_DEV_MeiDebug_t)
|
||||
#define DSL_FIO_BSP_DEBUG_WRITE _IOWR(DSL_IOC_MEI_BSP_MAGIC, 18, DSL_DEV_MeiDebug_t)
|
||||
#define DSL_FIO_BSP_GET_CHIP_INFO _IOR (DSL_IOC_MEI_BSP_MAGIC, 19, DSL_DEV_HwVersion_t)
|
||||
|
||||
#define DSL_DEV_MEIDEBUG_BUFFER_SIZES 512
|
||||
|
||||
typedef struct DSL_DEV_MeiDebug
|
||||
{
|
||||
DSL_uint32_t iAddress;
|
||||
DSL_uint32_t iCount;
|
||||
DSL_uint32_t buffer[DSL_DEV_MEIDEBUG_BUFFER_SIZES];
|
||||
} DSL_DEV_MeiDebug_t; /* meidebug */
|
||||
|
||||
/**
|
||||
* Structure is used for debug access only.
|
||||
* Refer to configure option INCLUDE_ADSL_WINHOST_DEBUG */
|
||||
typedef struct struct_meireg
|
||||
{
|
||||
/*
|
||||
* Specifies that address for debug access */
|
||||
unsigned long iAddress;
|
||||
/*
|
||||
* Specifies the pointer to the data that has to be written or returns a
|
||||
* pointer to the data that has been read out*/
|
||||
unsigned long iData;
|
||||
} DSL_DEV_MeiReg_t; /* meireg */
|
||||
|
||||
typedef struct DSL_DEV_Device
|
||||
{
|
||||
DSL_int_t nInUse; /* modem state, update by bsp driver, */
|
||||
DSL_void_t *pPriv;
|
||||
DSL_uint32_t base_address; /* mei base address */
|
||||
DSL_int_t nIrq[3]; /* irq number */
|
||||
#define IFX_DFEIR 0
|
||||
#define IFX_DYING_GASP 1
|
||||
#define IFX_USB_OC 2
|
||||
DSL_DEV_MeiDebug_t lop_debugwr; /* dying gasp */
|
||||
struct module *owner;
|
||||
} DSL_DEV_Device_t; /* ifx_adsl_device_t */
|
||||
|
||||
#define DSL_DEV_PRIVATE(dev) ((ifx_mei_device_private_t*)(dev->pPriv))
|
||||
|
||||
typedef struct DSL_DEV_Version /* ifx_adsl_bsp_version */
|
||||
{
|
||||
unsigned long major;
|
||||
unsigned long minor;
|
||||
unsigned long revision;
|
||||
} DSL_DEV_Version_t; /* ifx_adsl_bsp_version_t */
|
||||
|
||||
typedef struct DSL_DEV_ChipInfo
|
||||
{
|
||||
unsigned long major;
|
||||
unsigned long minor;
|
||||
} DSL_DEV_HwVersion_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
DSL_uint8_t dummy;
|
||||
} DSL_DEV_DeviceConfig_t;
|
||||
|
||||
/** error code definitions */
|
||||
typedef enum DSL_DEV_MeiError
|
||||
{
|
||||
DSL_DEV_MEI_ERR_SUCCESS = 0,
|
||||
DSL_DEV_MEI_ERR_FAILURE = -1,
|
||||
DSL_DEV_MEI_ERR_MAILBOX_FULL = -2,
|
||||
DSL_DEV_MEI_ERR_MAILBOX_EMPTY = -3,
|
||||
DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT = -4
|
||||
} DSL_DEV_MeiError_t; /* MEI_ERROR */
|
||||
|
||||
typedef enum {
|
||||
DSL_BSP_MEMORY_READ=0,
|
||||
DSL_BSP_MEMORY_WRITE,
|
||||
} DSL_BSP_MemoryAccessType_t; /* ifx_adsl_memory_access_type_t */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DSL_LED_LINK_ID=0,
|
||||
DSL_LED_DATA_ID
|
||||
} DSL_DEV_LedId_t; /* ifx_adsl_led_id_t */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DSL_LED_LINK_TYPE=0,
|
||||
DSL_LED_DATA_TYPE
|
||||
} DSL_DEV_LedType_t; /* ifx_adsl_led_type_t */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DSL_LED_HD_CPU=0,
|
||||
DSL_LED_HD_FW
|
||||
} DSL_DEV_LedHandler_t; /* ifx_adsl_led_handler_t */
|
||||
|
||||
typedef enum {
|
||||
DSL_LED_ON=0,
|
||||
DSL_LED_OFF,
|
||||
DSL_LED_FLASH,
|
||||
} DSL_DEV_LedMode_t; /* ifx_adsl_led_mode_t */
|
||||
|
||||
typedef enum {
|
||||
DSL_CPU_HALT=0,
|
||||
DSL_CPU_RUN,
|
||||
DSL_CPU_RESET,
|
||||
} DSL_DEV_CpuMode_t; /* ifx_adsl_cpu_mode_t */
|
||||
|
||||
#if 0
|
||||
typedef enum {
|
||||
DSL_BSP_EVENT_DYING_GASP = 0,
|
||||
DSL_BSP_EVENT_CEOC_IRQ,
|
||||
} DSL_BSP_Event_id_t; /* ifx_adsl_event_id_t */
|
||||
|
||||
typedef union DSL_BSP_CB_Param
|
||||
{
|
||||
DSL_uint32_t nIrqMessage;
|
||||
} DSL_BSP_CB_Param_t; /* ifx_adsl_cbparam_t */
|
||||
|
||||
typedef struct DSL_BSP_CB_Event
|
||||
{
|
||||
DSL_BSP_Event_id_t nID;
|
||||
DSL_DEV_Device_t *pDev;
|
||||
DSL_BSP_CB_Param_t *pParam;
|
||||
} DSL_BSP_CB_Event_t; /* ifx_adsl_cb_event_t */
|
||||
#endif
|
||||
|
||||
/* external functions (from the BSP Driver) */
|
||||
extern DSL_DEV_Device_t* DSL_BSP_DriverHandleGet(int, int);
|
||||
extern DSL_int_t DSL_BSP_DriverHandleDelete(DSL_DEV_Device_t *);
|
||||
extern DSL_DEV_MeiError_t DSL_BSP_FWDownload(DSL_DEV_Device_t *, const DSL_char_t *, DSL_uint32_t, DSL_int32_t *, DSL_int32_t *);
|
||||
extern int DSL_BSP_KernelIoctls(DSL_DEV_Device_t *, unsigned int, unsigned long);
|
||||
extern DSL_DEV_MeiError_t DSL_BSP_SendCMV(DSL_DEV_Device_t *, DSL_uint16_t *, DSL_int_t, DSL_uint16_t *);
|
||||
extern DSL_DEV_MeiError_t DSL_BSP_AdslLedInit(DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedType_t, DSL_DEV_LedHandler_t);
|
||||
extern DSL_DEV_MeiError_t DSL_BSP_Showtime(DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t);
|
||||
extern int DSL_BSP_ATMLedCBRegister( int (*ifx_adsl_ledcallback)(void));
|
||||
extern DSL_DEV_MeiError_t DSL_BSP_MemoryDebugAccess(DSL_DEV_Device_t *, DSL_BSP_MemoryAccessType_t, DSL_uint32_t, DSL_uint32_t *, DSL_uint32_t);
|
||||
extern volatile DSL_DEV_Device_t *adsl_dev;
|
||||
|
||||
/**
|
||||
* Dummy structure by now to show mechanism of extended data that will be
|
||||
* provided within event callback itself.
|
||||
* */
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* Dummy value */
|
||||
DSL_uint32_t nDummy1;
|
||||
} DSL_BSP_CB_Event1DataDummy_t;
|
||||
|
||||
/**
|
||||
* Dummy structure by now to show mechanism of extended data that will be
|
||||
* provided within event callback itself.
|
||||
* */
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* Dummy value */
|
||||
DSL_uint32_t nDummy2;
|
||||
} DSL_BSP_CB_Event2DataDummy_t;
|
||||
|
||||
/**
|
||||
* encapsulate all data structures that are necessary for status event
|
||||
* callbacks.
|
||||
* */
|
||||
typedef union
|
||||
{
|
||||
DSL_BSP_CB_Event1DataDummy_t dataEvent1;
|
||||
DSL_BSP_CB_Event2DataDummy_t dataEvent2;
|
||||
} DSL_BSP_CB_DATA_Union_t;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/**
|
||||
* Informs the upper layer driver (DSL CPE API) about a reboot request from the
|
||||
* firmware.
|
||||
* \note This event does NOT include any additional data.
|
||||
* More detailed information upon reboot reason has to be requested from
|
||||
* upper layer software via CMV (INFO 109) if necessary. */
|
||||
DSL_BSP_CB_FIRST = 0,
|
||||
DSL_BSP_CB_DYING_GASP,
|
||||
DSL_BSP_CB_CEOC_IRQ,
|
||||
DSL_BSP_CB_FIRMWARE_REBOOT,
|
||||
/**
|
||||
* Delimiter only */
|
||||
DSL_BSP_CB_LAST
|
||||
} DSL_BSP_CB_Type_t;
|
||||
|
||||
/**
|
||||
* Specifies the common event type that has to be used for registering and
|
||||
* signalling of interrupts/autonomous status events from MEI BSP Driver.
|
||||
*
|
||||
* \param pDev
|
||||
* Context pointer from MEI BSP Driver.
|
||||
*
|
||||
* \param IFX_ADSL_BSP_CallbackType_t
|
||||
* Specifies the event callback type (reason of callback). Regrading to the
|
||||
* setting of this value the data which is included in the following union
|
||||
* might have different meanings.
|
||||
* Please refer to the description of the union to get information about the
|
||||
* meaning of the included data.
|
||||
*
|
||||
* \param pData
|
||||
* Data according to \ref DSL_BSP_CB_DATA_Union_t.
|
||||
* If this pointer is NULL there is no additional data available.
|
||||
*
|
||||
* \return depending on event
|
||||
*/
|
||||
typedef int (*DSL_BSP_EventCallback_t)
|
||||
(
|
||||
DSL_DEV_Device_t *pDev,
|
||||
DSL_BSP_CB_Type_t nCallbackType,
|
||||
DSL_BSP_CB_DATA_Union_t *pData
|
||||
);
|
||||
|
||||
typedef struct {
|
||||
DSL_BSP_EventCallback_t function;
|
||||
DSL_BSP_CB_Type_t event;
|
||||
DSL_BSP_CB_DATA_Union_t *pData;
|
||||
} DSL_BSP_EventCallBack_t;
|
||||
|
||||
extern int DSL_BSP_EventCBRegister(DSL_BSP_EventCallBack_t *);
|
||||
extern int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *);
|
||||
|
||||
/** Modem states */
|
||||
#define DSL_DEV_STAT_InitState 0x0000
|
||||
#define DSL_DEV_STAT_ReadyState 0x0001
|
||||
#define DSL_DEV_STAT_FailState 0x0002
|
||||
#define DSL_DEV_STAT_IdleState 0x0003
|
||||
#define DSL_DEV_STAT_QuietState 0x0004
|
||||
#define DSL_DEV_STAT_GhsState 0x0005
|
||||
#define DSL_DEV_STAT_FullInitState 0x0006
|
||||
#define DSL_DEV_STAT_ShowTimeState 0x0007
|
||||
#define DSL_DEV_STAT_FastRetrainState 0x0008
|
||||
#define DSL_DEV_STAT_LoopDiagMode 0x0009
|
||||
#define DSL_DEV_STAT_ShortInit 0x000A /* Bis short initialization */
|
||||
|
||||
#define DSL_DEV_STAT_CODESWAP_COMPLETE 0x0002
|
||||
|
||||
#endif //IFXMIPS_MEI_H
|
||||
5
package/kernel/lantiq/ltq-adsl/Config.in
Normal file
5
package/kernel/lantiq/ltq-adsl/Config.in
Normal file
@@ -0,0 +1,5 @@
|
||||
config LANTIQ_ADSL_DEBUG
|
||||
bool "verbose debugging"
|
||||
depends on PACKAGE_kmod-ltq-adsl
|
||||
help
|
||||
Say Y, if you need ltq-adsl to display debug messages.
|
||||
95
package/kernel/lantiq/ltq-adsl/Makefile
Normal file
95
package/kernel/lantiq/ltq-adsl/Makefile
Normal file
@@ -0,0 +1,95 @@
|
||||
#
|
||||
# Copyright (C) 2011 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=ltq-adsl
|
||||
PKG_VERSION:=3.24.4.4
|
||||
PKG_RELEASE:=4
|
||||
PKG_SOURCE:=drv_dsl_cpe_api_danube-$(PKG_VERSION).tar.gz
|
||||
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-dsl-$(BUILD_VARIANT)/drv_dsl_cpe_api-$(PKG_VERSION)
|
||||
PKG_SOURCE_URL:=@OPENWRT
|
||||
PKG_HASH:=eb2ed59715d3bf4e8a1460bbbe2f1660039e0a9f9d72afb1b2b16590094eb33c
|
||||
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
|
||||
|
||||
PKG_CHECK_FORMAT_SECURITY:=0
|
||||
PKG_FIXUP:=autoreconf
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/ltq-adsl-template
|
||||
SECTION:=sys
|
||||
CATEGORY:=Kernel modules
|
||||
SUBMENU:=Network Devices
|
||||
TITLE:=adsl driver for $(1)
|
||||
URL:=http://www.lantiq.com/
|
||||
VARIANT:=$(1)
|
||||
DEPENDS:=@$(2) +kmod-ltq-adsl-$(1)-mei
|
||||
FILES:=$(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.ko
|
||||
AUTOLOAD:=$(call AutoLoad,51,drv_dsl_cpe_api)
|
||||
endef
|
||||
|
||||
KernelPackage/ltq-adsl-danube=$(call KernelPackage/ltq-adsl-template,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
|
||||
KernelPackage/ltq-adsl-ar9=$(call KernelPackage/ltq-adsl-template,ar9,TARGET_lantiq_xway)
|
||||
KernelPackage/ltq-adsl-ase=$(call KernelPackage/ltq-adsl-template,ase,TARGET_lantiq_ase)
|
||||
|
||||
define KernelPackage/ltq-adsl/config
|
||||
source "$(SOURCE)/Config.in"
|
||||
endef
|
||||
|
||||
IFX_DSL_MAX_DEVICE=1
|
||||
IFX_DSL_LINES_PER_DEVICE=1
|
||||
IFX_DSL_CHANNELS_PER_LINE=1
|
||||
|
||||
MAKE_FLAGS += \
|
||||
$(KERNEL_MAKE_FLAGS)
|
||||
|
||||
CONFIGURE_ARGS += --enable-kernel-include="$(LINUX_DIR)/include" \
|
||||
--with-max-device="$(IFX_DSL_MAX_DEVICE)" \
|
||||
--with-lines-per-device="$(IFX_DSL_LINES_PER_DEVICE)" \
|
||||
--with-channels-per-line="$(IFX_DSL_CHANNELS_PER_LINE)" \
|
||||
--disable-dsl-delt-static \
|
||||
--disable-adsl-led \
|
||||
--enable-dsl-ceoc \
|
||||
--enable-dsl-pm \
|
||||
--enable-dsl-pm-total \
|
||||
--enable-dsl-pm-history \
|
||||
--enable-dsl-pm-showtime \
|
||||
--enable-dsl-pm-channel-counters \
|
||||
--enable-dsl-pm-datapath-counters \
|
||||
--enable-dsl-pm-line-counters \
|
||||
--enable-dsl-pm-channel-thresholds \
|
||||
--enable-dsl-pm-datapath-thresholds \
|
||||
--enable-dsl-pm-line-thresholds \
|
||||
--enable-dsl-pm-optional-parameters \
|
||||
--enable-linux-26 \
|
||||
--enable-kernelbuild="$(LINUX_DIR)" \
|
||||
ARCH=$(LINUX_KARCH)
|
||||
|
||||
CONFIG_TAG_danube:=DANUBE
|
||||
CONFIG_TAG_ase:=AMAZON_SE
|
||||
CONFIG_TAG_ar9:=AR9
|
||||
CONFIGURE_ARGS += --enable-add-drv-cflags="-DMODULE -DCONFIG_$(CONFIG_TAG_$(BUILD_VARIANT))"
|
||||
|
||||
CONFIGURE_ARGS += --enable-danube
|
||||
|
||||
ifeq ($(CONFIG_LANTIQ_ADSL_DEBUG),y)
|
||||
CONFIGURE_ARGS += \
|
||||
--enable-debug=yes \
|
||||
--enable-debug-prints=yes
|
||||
EXTRA_CFLAGS += -DDEBUG
|
||||
endif
|
||||
|
||||
define Build/InstallDev
|
||||
$(INSTALL_DIR) $(1)/usr/include/adsl
|
||||
$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_*.h $(1)/usr/include/adsl/
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ltq-adsl-danube))
|
||||
$(eval $(call KernelPackage,ltq-adsl-ase))
|
||||
$(eval $(call KernelPackage,ltq-adsl-ar9))
|
||||
@@ -0,0 +1,32 @@
|
||||
--- a/src/Makefile.am
|
||||
+++ b/src/Makefile.am
|
||||
@@ -253,10 +253,7 @@ else
|
||||
drv_dsl_cpe_api_common_mod_cflags =
|
||||
endif
|
||||
|
||||
-drv_dsl_cpe_api_common_cflags = -DLINUX -D__LINUX__ -D__KERNEL__ -DEXPORT_SYMTAB \
|
||||
- -pipe -Wall -Wformat -Wimplicit -Wunused -Wswitch -Wcomment -Winline \
|
||||
- -Wuninitialized -Wparentheses -Wsign-compare -Wreturn-type \
|
||||
- -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common
|
||||
+drv_dsl_cpe_api_common_cflags = -DLINUX -D__LINUX__ -D__KERNEL__ -DEXPORT_SYMTAB
|
||||
|
||||
if DSL_DBG_MAX_LEVEL_SET
|
||||
drv_dsl_cpe_api_common_cflags += -DDSL_DBG_MAX_LEVEL=$(DSL_DBG_MAX_LEVEL_PRE)
|
||||
@@ -266,7 +263,7 @@ endif
|
||||
drv_dsl_cpe_api_target_cflags = $(ADD_DRV_CFLAGS)
|
||||
|
||||
# compile cflags
|
||||
-drv_dsl_cpe_api_compile_cflags = $(EXTRA_DRV_CFLAGS)
|
||||
+drv_dsl_cpe_api_compile_cflags =
|
||||
|
||||
if !KERNEL_2_6
|
||||
# the headerfile of linux kernels 2.6.x contain to much arithmetic
|
||||
@@ -314,7 +311,7 @@ drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SO
|
||||
@echo -e "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild
|
||||
@echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild
|
||||
@echo -e "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild
|
||||
- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild
|
||||
+ @echo -e "EXTRA_CFLAGS := -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild
|
||||
$(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules
|
||||
|
||||
clean-generic:
|
||||
1061
package/kernel/lantiq/ltq-adsl/patches/100-dsl_compat.patch
Normal file
1061
package/kernel/lantiq/ltq-adsl/patches/100-dsl_compat.patch
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,11 @@
|
||||
--- a/src/device/drv_dsl_cpe_device_danube.c
|
||||
+++ b/src/device/drv_dsl_cpe_device_danube.c
|
||||
@@ -4069,7 +4069,7 @@ static DSL_Error_t DSL_DRV_DANUBE_XTUSys
|
||||
|
||||
DSL_CTX_WRITE(pContext, nErrCode, xtseCurr, xtseCurr);
|
||||
|
||||
- for (nRetry = 0; nRetry < 20; nRetry++)
|
||||
+ for (nRetry = 0; nRetry < 20 && bStatusUpdated == DSL_FALSE; nRetry++)
|
||||
{
|
||||
/* Get STAT1 info*/
|
||||
nErrCode = DSL_DRV_DANUBE_CmvRead(pContext, DSL_CMV_GROUP_STAT,
|
||||
71
package/kernel/lantiq/ltq-adsl/patches/120-platform.patch
Normal file
71
package/kernel/lantiq/ltq-adsl/patches/120-platform.patch
Normal file
@@ -0,0 +1,71 @@
|
||||
--- a/src/common/drv_dsl_cpe_os_linux.c
|
||||
+++ b/src/common/drv_dsl_cpe_os_linux.c
|
||||
@@ -11,7 +11,7 @@
|
||||
#ifdef __LINUX__
|
||||
|
||||
#define DSL_INTERN
|
||||
-#include <linux/device.h>
|
||||
+#include <linux/of_platform.h>
|
||||
|
||||
#include "drv_dsl_cpe_api.h"
|
||||
#include "drv_dsl_cpe_api_ioctl.h"
|
||||
@@ -1070,7 +1070,7 @@ static void DSL_DRV_DebugInit(void)
|
||||
#endif
|
||||
|
||||
/* Entry point of driver */
|
||||
-int __init DSL_ModuleInit(void)
|
||||
+static int __devinit ltq_adsl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct class *dsl_class;
|
||||
DSL_int_t i;
|
||||
@@ -1128,7 +1128,7 @@ int __init DSL_ModuleInit(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-void __exit DSL_ModuleCleanup(void)
|
||||
+static int __devexit ltq_adsl_remove(struct platform_device *pdev)
|
||||
{
|
||||
printk("Module will be unloaded"DSL_DRV_CRLF);
|
||||
|
||||
@@ -1143,7 +1143,7 @@ void __exit DSL_ModuleCleanup(void)
|
||||
(DSL_uint8_t**)&g_BndFpgaBase);
|
||||
#endif /* defined(INCLUDE_DSL_CPE_API_VINAX) && defined(INCLUDE_DSL_BONDING)*/
|
||||
|
||||
- return;
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
#ifndef _lint
|
||||
@@ -1159,8 +1159,30 @@ module_param(debug_level, byte, 0);
|
||||
MODULE_PARM_DESC(debug_level, "set to get more (1) or fewer (4) debug outputs");
|
||||
#endif /* #ifndef DSL_DEBUG_DISABLE*/
|
||||
|
||||
-module_init(DSL_ModuleInit);
|
||||
-module_exit(DSL_ModuleCleanup);
|
||||
+static const struct of_device_id ltq_adsl_match[] = {
|
||||
+#ifdef CONFIG_DANUBE
|
||||
+ { .compatible = "lantiq,adsl-danube"},
|
||||
+#elif defined CONFIG_AMAZON_SE
|
||||
+ { .compatible = "lantiq,adsl-ase"},
|
||||
+#elif defined CONFIG_AR9
|
||||
+ { .compatible = "lantiq,adsl-arx100"},
|
||||
+#endif
|
||||
+ {},
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ltq_adsl_match);
|
||||
+
|
||||
+static struct platform_driver ltq_adsl_driver = {
|
||||
+ .probe = ltq_adsl_probe,
|
||||
+ .remove = __devexit_p(ltq_adsl_remove),
|
||||
+ .driver = {
|
||||
+ .name = "adsl",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .of_match_table = ltq_adsl_match,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(ltq_adsl_driver);
|
||||
+
|
||||
#endif /* #ifndef _lint*/
|
||||
|
||||
//EXPORT_SYMBOL(DSL_ModuleInit);
|
||||
137
package/kernel/lantiq/ltq-adsl/patches/130-linux3.8.patch
Normal file
137
package/kernel/lantiq/ltq-adsl/patches/130-linux3.8.patch
Normal file
@@ -0,0 +1,137 @@
|
||||
--- a/src/common/drv_dsl_cpe_os_linux.c
|
||||
+++ b/src/common/drv_dsl_cpe_os_linux.c
|
||||
@@ -11,6 +11,7 @@
|
||||
#ifdef __LINUX__
|
||||
|
||||
#define DSL_INTERN
|
||||
+#include <linux/kthread.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include "drv_dsl_cpe_api.h"
|
||||
@@ -39,7 +40,7 @@ static DSL_ssize_t DSL_DRV_Write(DSL_DRV
|
||||
static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, DSL_DRV_file_t * pFile,
|
||||
DSL_uint_t nCommand, unsigned long nArg);
|
||||
#else
|
||||
-static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_file_t * pFile,
|
||||
+static long DSL_DRV_Ioctls(DSL_DRV_file_t * pFile,
|
||||
DSL_uint_t nCommand, unsigned long nArg);
|
||||
#endif
|
||||
static int DSL_DRV_Open(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil);
|
||||
@@ -183,7 +184,7 @@ static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_
|
||||
DSL_uint_t nCommand,
|
||||
unsigned long nArg)
|
||||
#else
|
||||
-static DSL_int_t DSL_DRV_Ioctls(
|
||||
+static long DSL_DRV_Ioctls(
|
||||
DSL_DRV_file_t * pFile,
|
||||
DSL_uint_t nCommand,
|
||||
unsigned long nArg)
|
||||
@@ -520,9 +521,9 @@ DSL_void_t* DSL_IoctlMemCpyTo(
|
||||
- IFX_SUCCESS on success
|
||||
- IFX_ERROR on error
|
||||
*/
|
||||
-DSL_DRV_STATIC DSL_int32_t DSL_DRV_KernelThreadStartup(
|
||||
- DSL_DRV_ThreadCtrl_t *pThrCntrl)
|
||||
+static int DSL_DRV_KernelThreadStartup(void *data)
|
||||
{
|
||||
+ DSL_DRV_ThreadCtrl_t *pThrCntrl = (DSL_DRV_ThreadCtrl_t*) data;
|
||||
DSL_int32_t retVal = -1;
|
||||
#ifndef _lint
|
||||
|
||||
@@ -545,30 +546,6 @@ DSL_DRV_STATIC DSL_int32_t DSL_DRV_Kerne
|
||||
(DSL_NULL, "ENTER - Kernel Thread Startup <%s>" DSL_DRV_CRLF,
|
||||
pThrCntrl->thrParams.pName));
|
||||
|
||||
- /* do LINUX specific setup */
|
||||
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
|
||||
- daemonize();
|
||||
- reparent_to_init();
|
||||
-
|
||||
- /* lock the kernel. A new kernel thread starts without
|
||||
- the big kernel lock, regardless of the lock state
|
||||
- of the creator (the lock level is *not* inheritated)
|
||||
- */
|
||||
- lock_kernel();
|
||||
-
|
||||
- /* Don't care about any signals. */
|
||||
- siginitsetinv(¤t->blocked, 0);
|
||||
-
|
||||
- /* set name of this process */
|
||||
- strcpy(kthread->comm, pThrCntrl->thrParams.pName);
|
||||
-
|
||||
- /* let others run */
|
||||
- unlock_kernel();
|
||||
-#else
|
||||
- daemonize(pThrCntrl->thrParams.pName);
|
||||
-
|
||||
-#endif
|
||||
-
|
||||
/*DSL_DRV_ThreadPriorityModify(pThrCntrl->nPriority);*/
|
||||
|
||||
pThrCntrl->thrParams.bRunning = 1;
|
||||
@@ -638,9 +615,7 @@ DSL_int32_t DSL_DRV_ThreadInit(
|
||||
init_completion(&pThrCntrl->thrCompletion);
|
||||
|
||||
/* start kernel thread via the wrapper function */
|
||||
- pThrCntrl->pid = kernel_thread( (DSL_DRV_KERNEL_THREAD_StartRoutine)DSL_DRV_KernelThreadStartup,
|
||||
- (void *)pThrCntrl,
|
||||
- DSL_DRV_DRV_THREAD_OPTIONS);
|
||||
+ pThrCntrl->pid = kthread_run(DSL_DRV_KernelThreadStartup, (void *)pThrCntrl, pThrCntrl->thrParams.pName);
|
||||
|
||||
pThrCntrl->bValid = DSL_TRUE;
|
||||
|
||||
@@ -1070,12 +1045,12 @@ static void DSL_DRV_DebugInit(void)
|
||||
#endif
|
||||
|
||||
/* Entry point of driver */
|
||||
-static int __devinit ltq_adsl_probe(struct platform_device *pdev)
|
||||
+static int ltq_adsl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct class *dsl_class;
|
||||
DSL_int_t i;
|
||||
|
||||
- printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF,
|
||||
+ printk("Infineon CPE API Driver version: %s" DSL_DRV_CRLF,
|
||||
&(dsl_cpe_api_version[4]));
|
||||
|
||||
DSL_DRV_MemSet( ifxDevices, 0, sizeof(DSL_devCtx_t) * DSL_DRV_MAX_DEVICE_NUMBER );
|
||||
@@ -1128,7 +1103,7 @@ static int __devinit ltq_adsl_probe(stru
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int __devexit ltq_adsl_remove(struct platform_device *pdev)
|
||||
+static int ltq_adsl_remove(struct platform_device *pdev)
|
||||
{
|
||||
printk("Module will be unloaded"DSL_DRV_CRLF);
|
||||
|
||||
@@ -1173,7 +1148,7 @@ MODULE_DEVICE_TABLE(of, ltq_adsl_match);
|
||||
|
||||
static struct platform_driver ltq_adsl_driver = {
|
||||
.probe = ltq_adsl_probe,
|
||||
- .remove = __devexit_p(ltq_adsl_remove),
|
||||
+ .remove = ltq_adsl_remove,
|
||||
.driver = {
|
||||
.name = "adsl",
|
||||
.owner = THIS_MODULE,
|
||||
--- a/src/include/drv_dsl_cpe_os_lint_map.h
|
||||
+++ b/src/include/drv_dsl_cpe_os_lint_map.h
|
||||
@@ -247,7 +247,7 @@ typedef struct
|
||||
DSL_DRV_ThreadFunction_t pThrFct;
|
||||
|
||||
/** Kernel thread process ID */
|
||||
- DSL_int32_t pid;
|
||||
+ struct task_struct *pid;
|
||||
|
||||
/** requested kernel thread priority */
|
||||
DSL_int32_t nPriority;
|
||||
--- a/src/include/drv_dsl_cpe_os_linux.h
|
||||
+++ b/src/include/drv_dsl_cpe_os_linux.h
|
||||
@@ -288,7 +288,7 @@ typedef struct
|
||||
DSL_DRV_ThreadFunction_t pThrFct;
|
||||
|
||||
/** Kernel thread process ID */
|
||||
- DSL_int32_t pid;
|
||||
+ struct task_struct *pid;
|
||||
|
||||
/** requested kernel thread priority */
|
||||
DSL_int32_t nPriority;
|
||||
30
package/kernel/lantiq/ltq-adsl/patches/140-linux_3.18.patch
Normal file
30
package/kernel/lantiq/ltq-adsl/patches/140-linux_3.18.patch
Normal file
@@ -0,0 +1,30 @@
|
||||
--- a/src/include/drv_dsl_cpe_os_linux.h
|
||||
+++ b/src/include/drv_dsl_cpe_os_linux.h
|
||||
@@ -214,12 +214,25 @@ static inline int dsl_mutex_lock(struct
|
||||
#define DSL_DRV_MUTEX_LOCK(id) down_interruptible(&(id))
|
||||
#define DSL_DRV_MUTEX_UNLOCK(id) up(&(id))
|
||||
#endif
|
||||
+
|
||||
+static inline long
|
||||
+ugly_hack_sleep_on_timeout(wait_queue_head_t *q, long timeout)
|
||||
+{
|
||||
+ DEFINE_WAIT(wait);
|
||||
+
|
||||
+ prepare_to_wait(q, &wait, TASK_INTERRUPTIBLE);
|
||||
+ timeout = schedule_timeout(timeout);
|
||||
+ finish_wait(q, &wait);
|
||||
+
|
||||
+ return timeout;
|
||||
+}
|
||||
+
|
||||
#define DSL_DRV_INIT_WAKELIST(name,queue) init_waitqueue_head(&(queue))
|
||||
#define DSL_DRV_WAKEUP_WAKELIST(queue) wake_up_interruptible(&(queue))
|
||||
#define DSL_DRV_INIT_EVENT(name,ev) init_waitqueue_head(&(ev))
|
||||
/* wait for an event, timeout is measured in ms */
|
||||
-#define DSL_DRV_WAIT_EVENT_TIMEOUT(ev,t) interruptible_sleep_on_timeout(&(ev), (t) * HZ / 1000)
|
||||
-#define DSL_DRV_WAIT_EVENT(ev) interruptible_sleep_on(&(ev))
|
||||
+#define DSL_DRV_WAIT_EVENT_TIMEOUT(ev,t) ugly_hack_sleep_on_timeout(&(ev), (t) * HZ / 1000)
|
||||
+#define DSL_DRV_WAIT_EVENT(ev) ugly_hack_sleep_on_timeout(&(ev), MAX_SCHEDULE_TIMEOUT)
|
||||
#define DSL_DRV_WAKEUP_EVENT(ev) wake_up_interruptible(&(ev))
|
||||
#define DSL_DRV_TimeMSecGet() DSL_DRV_ElapsedTimeMSecGet(0)
|
||||
#define DSL_WAIT(ms) msleep(ms)
|
||||
14
package/kernel/lantiq/ltq-adsl/patches/150-linux_5.9.patch
Normal file
14
package/kernel/lantiq/ltq-adsl/patches/150-linux_5.9.patch
Normal file
@@ -0,0 +1,14 @@
|
||||
--- a/src/common/drv_dsl_cpe_os_linux.c
|
||||
+++ b/src/common/drv_dsl_cpe_os_linux.c
|
||||
@@ -417,7 +417,11 @@ int DSL_DRV_ErrorToOS(DSL_Error_t nError
|
||||
DSL_void_t* DSL_DRV_VMalloc(
|
||||
DSL_DRV_size_t nSize)
|
||||
{
|
||||
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,9,0)
|
||||
return __vmalloc((unsigned long)nSize, GFP_KERNEL, PAGE_KERNEL);
|
||||
+#else
|
||||
+ return __vmalloc((unsigned long)nSize, GFP_KERNEL);
|
||||
+#endif
|
||||
/* return vmalloc(nSize);*/
|
||||
}
|
||||
|
||||
@@ -0,0 +1,122 @@
|
||||
--- a/src/include/drv_dsl_cpe_pm_core.h
|
||||
+++ b/src/include/drv_dsl_cpe_pm_core.h
|
||||
@@ -1525,9 +1525,9 @@ typedef struct
|
||||
DSL_boolean_t bShowtimeProcessingStart;
|
||||
/** Showtime reached flag*/
|
||||
DSL_boolean_t bShowtimeInvTrigger;
|
||||
- /** Current Showtime synchronization time to be used, (msec) */
|
||||
+ /** Current Showtime synchronization time to be used, (sec) */
|
||||
DSL_uint32_t nCurrShowtimeTime;
|
||||
- /** Showtime synchronization time to be used, (msec) */
|
||||
+ /** Showtime synchronization time to be used, (sec) */
|
||||
DSL_uint32_t nElapsedShowtimeTime;
|
||||
/** Actual Line state*/
|
||||
DSL_LineStateValue_t nLineState;
|
||||
--- a/src/pm/drv_dsl_cpe_api_pm.c
|
||||
+++ b/src/pm/drv_dsl_cpe_api_pm.c
|
||||
@@ -1445,7 +1445,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersTo
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
|
||||
|
||||
@@ -1501,7 +1501,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersEx
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL_EXT(pCounters->nChannel);
|
||||
|
||||
@@ -2418,7 +2418,7 @@ DSL_Error_t DSL_DRV_PM_DataPathCountersT
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
|
||||
|
||||
@@ -3190,7 +3190,7 @@ DSL_Error_t DSL_DRV_PM_DataPathFailureCo
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_FAILURE_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
|
||||
|
||||
@@ -3950,7 +3950,7 @@ DSL_Error_t DSL_DRV_PM_LineSecCountersTo
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pLineCounters = DSL_DRV_PM_PTR_LINE_SEC_COUNTERS_TOTAL(pCounters->nDirection);
|
||||
|
||||
@@ -4602,7 +4602,7 @@ DSL_Error_t DSL_DRV_PM_LineInitCountersT
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pLinitCounters = DSL_DRV_PM_PTR_LINE_INIT_COUNTERS_TOTAL();
|
||||
|
||||
@@ -5131,7 +5131,7 @@ DSL_Error_t DSL_DRV_PM_LineEventShowtime
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pLfCounters = DSL_DRV_PM_PTR_LINE_EVENT_SHOWTIME_COUNTERS_TOTAL(pCounters->nDirection);
|
||||
|
||||
@@ -5670,7 +5670,7 @@ DSL_Error_t DSL_DRV_PM_ReTxCountersTotal
|
||||
}
|
||||
|
||||
/* Fill Total Counters elapsed time*/
|
||||
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
|
||||
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
|
||||
|
||||
pReTxCounters = DSL_DRV_PM_PTR_RETX_COUNTERS_TOTAL(pCounters->nDirection);
|
||||
|
||||
--- a/src/pm/drv_dsl_cpe_pm_core.c
|
||||
+++ b/src/pm/drv_dsl_cpe_pm_core.c
|
||||
@@ -61,6 +61,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
|
||||
{
|
||||
DSL_Error_t nErrCode = DSL_SUCCESS;
|
||||
DSL_uint32_t msecTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE,
|
||||
+ secTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE/DSL_PM_MSEC,
|
||||
nCurrMsTime = 0;
|
||||
#ifdef INCLUDE_DSL_CPE_PM_HISTORY
|
||||
DSL_uint32_t nCurrSysTime = 0, nPrevElapsedTime = 0;
|
||||
@@ -100,10 +101,13 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
|
||||
{
|
||||
/* Get elapsed time [msec] since the last entry*/
|
||||
msecTimeFrame = nCurrMsTime - DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck;
|
||||
+
|
||||
+ /* Get elapsed time [sec] since the last entry*/
|
||||
+ secTimeFrame = (nCurrMsTime/DSL_PM_MSEC) - (DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck/DSL_PM_MSEC);
|
||||
}
|
||||
|
||||
/* Get Total Elapsed Time Since the PM module startup*/
|
||||
- DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += msecTimeFrame;
|
||||
+ DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += secTimeFrame;
|
||||
|
||||
/* Set last time check to the current time*/
|
||||
DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck = nCurrMsTime;
|
||||
@@ -141,7 +145,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
|
||||
else
|
||||
{
|
||||
/* Update current showtime elapsed time*/
|
||||
- DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += (msecTimeFrame/DSL_PM_MSEC);
|
||||
+ DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += secTimeFrame;
|
||||
DSL_DRV_PM_CONTEXT(pContext)->nElapsedShowtimeTime =
|
||||
DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime;
|
||||
}
|
||||
@@ -0,0 +1,36 @@
|
||||
--- a/src/pm/drv_dsl_cpe_pm_core.c
|
||||
+++ b/src/pm/drv_dsl_cpe_pm_core.c
|
||||
@@ -2274,16 +2274,18 @@ DSL_Error_t DSL_DRV_PM_CountersReset(
|
||||
}
|
||||
#endif /* #ifdef INCLUDE_DSL_CPE_PM_HISTORY*/
|
||||
|
||||
- if (ResetType == DSL_PM_RESET_HISTORY)
|
||||
- break;
|
||||
+ if (ResetType == DSL_PM_RESET_HISTORY)
|
||||
+ break;
|
||||
|
||||
+ fallthrough;
|
||||
case DSL_PM_RESET_TOTAL:
|
||||
#ifdef INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS
|
||||
memset(EpData.pRecTotal, 0x0, EpData.nEpRecElementSize);
|
||||
#endif /* #ifdef INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS*/
|
||||
- if (ResetType == DSL_PM_RESET_TOTAL)
|
||||
- break;
|
||||
+ if (ResetType == DSL_PM_RESET_TOTAL)
|
||||
+ break;
|
||||
|
||||
+ fallthrough;
|
||||
case DSL_PM_RESET_HISTORY_SHOWTIME:
|
||||
#ifdef INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS
|
||||
nErrCode = DSL_DRV_PM_HistoryDelete(pContext, EpData.pHistShowtime );
|
||||
--- a/src/device/drv_dsl_cpe_device_danube.c
|
||||
+++ b/src/device/drv_dsl_cpe_device_danube.c
|
||||
@@ -3193,7 +3193,7 @@ DSL_Error_t DSL_DRV_DEV_AutobootHandleTr
|
||||
DSL_DEV_NUM(pContext)));
|
||||
}
|
||||
#endif /* INCLUDE_DSL_DELT*/
|
||||
- /* Pass through */
|
||||
+ fallthrough ;
|
||||
case DSL_LINESTATE_IDLE:
|
||||
#if defined(INCLUDE_DSL_PM) && defined(INCLUDE_DSL_CPE_PM_LINE_COUNTERS)
|
||||
if ( (pContext->bGotFullInit == DSL_TRUE) &&
|
||||
@@ -0,0 +1,65 @@
|
||||
--- a/src/g997/drv_dsl_cpe_api_g997_danube.c
|
||||
+++ b/src/g997/drv_dsl_cpe_api_g997_danube.c
|
||||
@@ -1984,41 +1984,53 @@ DSL_Error_t DSL_DRV_DEV_G997_DeltHlogGet
|
||||
{
|
||||
if (nDirection == DSL_DOWNSTREAM)
|
||||
{
|
||||
- DSL_G997_DeltHlogData_t HlogData;
|
||||
+ DSL_G997_DeltHlogData_t *HlogData;
|
||||
|
||||
- memset(&HlogData, 0x0, sizeof(DSL_G997_DeltHlogData_t));
|
||||
+ HlogData = kzalloc(sizeof(*HlogData), GFP_KERNEL);
|
||||
+ if (!HlogData)
|
||||
+ {
|
||||
+ DSL_DEBUG(DSL_DBG_ERR,
|
||||
+ (pContext, "DSL[%02d]: ERROR - Alloc HlogData failed!"DSL_DRV_CRLF,
|
||||
+ DSL_DEV_NUM(pContext)));
|
||||
+ return DSL_ERR_MEMORY;
|
||||
+ }
|
||||
+
|
||||
+ memset(HlogData, 0x0, sizeof(DSL_G997_DeltHlogData_t));
|
||||
|
||||
/* Get SHOWTIME Hlog values*/
|
||||
nErrCode = DSL_DRV_DANUBE_G997_DeltHlogGet(
|
||||
- pContext, nDirection, &HlogData);
|
||||
+ pContext, nDirection, HlogData);
|
||||
if (nErrCode != DSL_SUCCESS)
|
||||
{
|
||||
DSL_DEBUG(DSL_DBG_ERR,
|
||||
(pContext, "DSL[%02d]: ERROR - Showtime Hlog get failed!"DSL_DRV_CRLF,
|
||||
DSL_DEV_NUM(pContext)));
|
||||
+ kfree(HlogData);
|
||||
return nErrCode;
|
||||
}
|
||||
|
||||
/* if actual group size != 1, values should be spread */
|
||||
- if (HlogData.nGroupSize != 1)
|
||||
+ if (HlogData->nGroupSize != 1)
|
||||
{
|
||||
nErrCode = DSL_DRV_DANUBE_G997_DeltValuesSpread(
|
||||
- 0x1, HlogData.nGroupSize, HlogData.deltHlog.nNumData,
|
||||
- HlogData.deltHlog.nNSCData, pData->deltHlog.nNSCData);
|
||||
+ 0x1, HlogData->nGroupSize, HlogData->deltHlog.nNumData,
|
||||
+ HlogData->deltHlog.nNSCData, pData->deltHlog.nNSCData);
|
||||
|
||||
if (nErrCode == DSL_SUCCESS)
|
||||
{
|
||||
pData->deltHlog.nNumData =
|
||||
- (DSL_uint16_t)(HlogData.deltHlog.nNumData * HlogData.nGroupSize);
|
||||
+ (DSL_uint16_t)(HlogData->deltHlog.nNumData * HlogData->nGroupSize);
|
||||
pData->nGroupSize = 1;
|
||||
- pData->nMeasurementTime = HlogData.nMeasurementTime;
|
||||
+ pData->nMeasurementTime = HlogData->nMeasurementTime;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* No spread needed, copy data*/
|
||||
- memcpy(pData, &HlogData, sizeof(DSL_G997_DeltHlogData_t));
|
||||
+ memcpy(pData, HlogData, sizeof(DSL_G997_DeltHlogData_t));
|
||||
}
|
||||
+
|
||||
+ kfree(HlogData);
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/src/g997/drv_dsl_cpe_api_g997_danube.c
|
||||
+++ b/src/g997/drv_dsl_cpe_api_g997_danube.c
|
||||
@@ -2524,6 +2524,7 @@ DSL_Error_t DSL_DRV_DEV_G997_PowerManage
|
||||
else
|
||||
{
|
||||
/* read L3 request failure reason */
|
||||
+ DSL_uint8_t nErrCodeL3;
|
||||
nErrCode = DSL_DRV_DANUBE_CmvRead(pContext, DSL_CMV_GROUP_STAT,
|
||||
DSL_CMV_ADDRESS_STAT_L3_FAILURE_REASON, 0, 1, &nVal);
|
||||
DSL_DEBUG(DSL_DBG_MSG,
|
||||
@@ -2537,11 +2538,13 @@ DSL_Error_t DSL_DRV_DEV_G997_PowerManage
|
||||
nErrCode = DSL_ERR_MSG_EXCHANGE;
|
||||
break;
|
||||
}
|
||||
- if (((nVal >> 4) & 0x15) == 0x5)
|
||||
+
|
||||
+ nErrCodeL3 = (nVal >> 4) & 0x15;
|
||||
+ if (nErrCodeL3 == 0x5)
|
||||
{
|
||||
nErrCode = DSL_ERR_L3_NOT_IN_L0;
|
||||
}
|
||||
- else if (((nVal >> 4) & 0x15) == 0x9)
|
||||
+ else if (nErrCodeL3 == 0x9)
|
||||
{
|
||||
nErrCode = DSL_ERR_L3_TIMED_OUT;
|
||||
}
|
||||
14
package/kernel/lantiq/ltq-adsl/patches/400-kernel-6.1.patch
Normal file
14
package/kernel/lantiq/ltq-adsl/patches/400-kernel-6.1.patch
Normal file
@@ -0,0 +1,14 @@
|
||||
--- a/src/common/drv_dsl_cpe_os_linux.c
|
||||
+++ b/src/common/drv_dsl_cpe_os_linux.c
|
||||
@@ -556,7 +556,11 @@ static int DSL_DRV_KernelThreadStartup(v
|
||||
retVal = pThrCntrl->pThrFct(&pThrCntrl->thrParams);
|
||||
pThrCntrl->thrParams.bRunning = 0;
|
||||
|
||||
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,17,0))
|
||||
complete_and_exit(&pThrCntrl->thrCompletion, (long)retVal);
|
||||
+#else
|
||||
+ kthread_complete_and_exit(&pThrCntrl->thrCompletion, (long)retVal);
|
||||
+#endif
|
||||
|
||||
DSL_DEBUG( DSL_DBG_MSG,
|
||||
(DSL_NULL, "EXIT - Kernel Thread Startup <%s>" DSL_DRV_CRLF,
|
||||
20
package/kernel/lantiq/ltq-adsl/patches/410-kernel-6.6.patch
Normal file
20
package/kernel/lantiq/ltq-adsl/patches/410-kernel-6.6.patch
Normal file
@@ -0,0 +1,20 @@
|
||||
--- a/src/pm/drv_dsl_cpe_api_pm_danube.c
|
||||
+++ b/src/pm/drv_dsl_cpe_api_pm_danube.c
|
||||
@@ -182,7 +182,7 @@ DSL_Error_t DSL_DRV_PM_DEV_ChannelCounte
|
||||
}
|
||||
else
|
||||
{
|
||||
- if (DSL_DRV_DANUBE_ActLatencyGet(pContext, nChannel, nDirection, &nLPath) >= DSL_SUCCESS)
|
||||
+ if (DSL_DRV_DANUBE_ActLatencyGet(pContext, nChannel, (DSL_AccessDir_t)nDirection, &nLPath) >= DSL_SUCCESS)
|
||||
{
|
||||
if (nLPath == DSL_LATENCY_IP_LP0) nIdx = 0;
|
||||
else nIdx = 1;
|
||||
@@ -345,7 +345,7 @@ DSL_Error_t DSL_DRV_PM_DEV_ChannelCounte
|
||||
|
||||
if ((!bAdsl1) && (DSL_CHANNELS_PER_LINE > 1))
|
||||
{
|
||||
- if (DSL_DRV_DANUBE_ActLatencyGet(pContext, nChannel, nDirection, &nLPath) >= DSL_SUCCESS)
|
||||
+ if (DSL_DRV_DANUBE_ActLatencyGet(pContext, nChannel, (DSL_AccessDir_t)nDirection, &nLPath) >= DSL_SUCCESS)
|
||||
{
|
||||
if (nLPath == DSL_LATENCY_IP_LP0) nIdx = 0;
|
||||
else nIdx = 1;
|
||||
50
package/kernel/lantiq/ltq-atm/Makefile
Normal file
50
package/kernel/lantiq/ltq-atm/Makefile
Normal file
@@ -0,0 +1,50 @@
|
||||
# Copyright (C) 2012 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=ltq-atm
|
||||
PKG_RELEASE:=3
|
||||
|
||||
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
|
||||
PKG_LICENSE:=GPL-2.0+
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/ltq-atm-template
|
||||
SECTION:=sys
|
||||
CATEGORY:=Kernel modules
|
||||
SUBMENU:=Network Devices
|
||||
TITLE:=atm driver for $(1)
|
||||
URL:=http://www.lantiq.com/
|
||||
VARIANT:=$(1)
|
||||
DEPENDS:=@$(2) +kmod-atm +br2684ctl
|
||||
ifeq ($(1),vr9)
|
||||
DEPENDS+= +PACKAGE_kmod-ltq-atm-$(1):kmod-ltq-vdsl-vr9-mei
|
||||
else
|
||||
DEPENDS+= +PACKAGE_kmod-ltq-atm-$(1):kmod-ltq-adsl-$(1)-mei
|
||||
endif
|
||||
FILES:=$(PKG_BUILD_DIR)/ltq_atm_$(1).ko
|
||||
endef
|
||||
|
||||
KernelPackage/ltq-atm-danube=$(call KernelPackage/ltq-atm-template,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
|
||||
KernelPackage/ltq-atm-ar9=$(call KernelPackage/ltq-atm-template,ar9,TARGET_lantiq_xway)
|
||||
KernelPackage/ltq-atm-ase=$(call KernelPackage/ltq-atm-template,ase,TARGET_lantiq_ase)
|
||||
KernelPackage/ltq-atm-vr9=$(call KernelPackage/ltq-atm-template,vr9,TARGET_lantiq_xrx200)
|
||||
|
||||
define Build/Configure
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
cd $(LINUX_DIR); \
|
||||
ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \
|
||||
$(MAKE) $(KERNEL_MAKE_FLAGS) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR) V=1 modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ltq-atm-danube))
|
||||
$(eval $(call KernelPackage,ltq-atm-ase))
|
||||
$(eval $(call KernelPackage,ltq-atm-ar9))
|
||||
$(eval $(call KernelPackage,ltq-atm-vr9))
|
||||
@@ -0,0 +1,12 @@
|
||||
--- a/ltq_atm.c
|
||||
+++ b/ltq_atm.c
|
||||
@@ -338,7 +338,8 @@ static int ppe_ioctl(struct atm_dev *dev
|
||||
break;
|
||||
|
||||
case PPE_ATM_MIB_VCC: /* VCC related MIB */
|
||||
- copy_from_user(&mib_vcc, arg, sizeof(mib_vcc));
|
||||
+ if (copy_from_user(&mib_vcc, arg, sizeof(mib_vcc)))
|
||||
+ return -EFAULT;
|
||||
conn = find_vpivci(mib_vcc.vpi, mib_vcc.vci);
|
||||
if (conn >= 0) {
|
||||
mib_vcc.mib_vcc.aal5VccCrcErrors = g_atm_priv_data.conn[conn].aal5_vcc_crc_err;
|
||||
23
package/kernel/lantiq/ltq-atm/src/Makefile
Normal file
23
package/kernel/lantiq/ltq-atm/src/Makefile
Normal file
@@ -0,0 +1,23 @@
|
||||
ifeq ($(BUILD_VARIANT),danube)
|
||||
CFLAGS_MODULE = -DCONFIG_DANUBE
|
||||
obj-m = ltq_atm_danube.o
|
||||
ltq_atm_danube-objs = ltq_atm.o ifxmips_atm_danube.o
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),ase)
|
||||
CFLAGS_MODULE = -DCONFIG_AMAZON_SE
|
||||
obj-m = ltq_atm_ase.o
|
||||
ltq_atm_ase-objs = ltq_atm.o ifxmips_atm_amazon_se.o
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),ar9)
|
||||
CFLAGS_MODULE = -DCONFIG_AR9
|
||||
obj-m = ltq_atm_ar9.o
|
||||
ltq_atm_ar9-objs = ltq_atm.o ifxmips_atm_ar9.o
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),vr9)
|
||||
CFLAGS_MODULE = -DCONFIG_VR9
|
||||
obj-m = ltq_atm_vr9.o
|
||||
ltq_atm_vr9-objs = ltq_atm.o ifxmips_atm_vr9.o
|
||||
endif
|
||||
334
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_amazon_se.c
Normal file
334
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_amazon_se.c
Normal file
@@ -0,0 +1,334 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_amazon_se.c
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM
|
||||
**
|
||||
** DATE : 7 Jul 2009
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM driver common source file (core functions)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 07 JUL 2009 Xu Liang Init Version
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Head File
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Common Head File
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/delay.h>
|
||||
|
||||
/*
|
||||
* Chip Specific Head File
|
||||
*/
|
||||
#include "ifxmips_atm_core.h"
|
||||
#include "ifxmips_atm_fw_amazon_se.h"
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Definition
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* EMA Settings
|
||||
*/
|
||||
#define EMA_CMD_BUF_LEN 0x0040
|
||||
#define EMA_CMD_BASE_ADDR (0x00001580 << 2)
|
||||
#define EMA_DATA_BUF_LEN 0x0100
|
||||
#define EMA_DATA_BASE_ADDR (0x00000B00 << 2)
|
||||
#define EMA_WRITE_BURST 0x2
|
||||
#define EMA_READ_BURST 0x2
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Declaration
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Hardware Init/Uninit Functions
|
||||
*/
|
||||
static inline void init_pmu(void);
|
||||
static inline void uninit_pmu(void);
|
||||
static inline void reset_ppe(struct platform_device *pdev);
|
||||
static inline void init_ema(void);
|
||||
static inline void init_mailbox(void);
|
||||
static inline void init_atm_tc(void);
|
||||
static inline void clear_share_buffer(void);
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Local Variable
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Local Function
|
||||
* ####################################
|
||||
*/
|
||||
#define IFX_PMU_MODULE_PPE_SLL01 BIT(19)
|
||||
#define IFX_PMU_MODULE_PPE_TC BIT(21)
|
||||
#define IFX_PMU_MODULE_PPE_EMA BIT(22)
|
||||
#define IFX_PMU_MODULE_PPE_QSB BIT(18)
|
||||
#define IFX_PMU_MODULE_TPE BIT(13)
|
||||
#define IFX_PMU_MODULE_DSL_DFE BIT(9)
|
||||
|
||||
static inline void init_pmu(void)
|
||||
{
|
||||
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
|
||||
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
//PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
|
||||
DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
|
||||
ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
|
||||
IFX_PMU_MODULE_PPE_TC |
|
||||
IFX_PMU_MODULE_PPE_EMA |
|
||||
IFX_PMU_MODULE_TPE |
|
||||
IFX_PMU_MODULE_DSL_DFE);
|
||||
}
|
||||
|
||||
static inline void uninit_pmu(void)
|
||||
{
|
||||
/*PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
//PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
|
||||
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/
|
||||
}
|
||||
|
||||
static inline void reset_ppe(struct platform_device *pdev)
|
||||
{
|
||||
#if 0 //MODULE
|
||||
unsigned int etop_cfg;
|
||||
unsigned int etop_mdio_cfg;
|
||||
unsigned int etop_ig_plen_ctrl;
|
||||
unsigned int enet_mac_cfg;
|
||||
|
||||
etop_cfg = *IFX_PP32_ETOP_CFG;
|
||||
etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG;
|
||||
etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL;
|
||||
enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG;
|
||||
|
||||
*IFX_PP32_ETOP_CFG = (*IFX_PP32_ETOP_CFG & ~0x03C0) | 0x0001;
|
||||
|
||||
// reset PPE
|
||||
ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM);
|
||||
|
||||
*IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg;
|
||||
*IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl;
|
||||
*IFX_PP32_ENET_MAC_CFG = enet_mac_cfg;
|
||||
*IFX_PP32_ETOP_CFG = etop_cfg;
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void init_ema(void)
|
||||
{
|
||||
IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
|
||||
IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
|
||||
IFX_REG_W32(0x000000FF, EMA_IER);
|
||||
IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
|
||||
}
|
||||
|
||||
static inline void init_mailbox(void)
|
||||
{
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
|
||||
}
|
||||
|
||||
static inline void init_atm_tc(void)
|
||||
{
|
||||
IFX_REG_W32(0x0000, DREG_AT_CTRL);
|
||||
IFX_REG_W32(0x0000, DREG_AR_CTRL);
|
||||
IFX_REG_W32(0x0, DREG_AT_IDLE0);
|
||||
IFX_REG_W32(0x0, DREG_AT_IDLE1);
|
||||
IFX_REG_W32(0x0, DREG_AR_IDLE0);
|
||||
IFX_REG_W32(0x0, DREG_AR_IDLE1);
|
||||
IFX_REG_W32(0x40, RFBI_CFG);
|
||||
IFX_REG_W32(0x0700, SFSM_DBA0);
|
||||
IFX_REG_W32(0x0818, SFSM_DBA1);
|
||||
IFX_REG_W32(0x0930, SFSM_CBA0);
|
||||
IFX_REG_W32(0x0944, SFSM_CBA1);
|
||||
IFX_REG_W32(0x14014, SFSM_CFG0);
|
||||
IFX_REG_W32(0x14014, SFSM_CFG1);
|
||||
IFX_REG_W32(0x0958, FFSM_DBA0);
|
||||
IFX_REG_W32(0x09AC, FFSM_DBA1);
|
||||
IFX_REG_W32(0x10006, FFSM_CFG0);
|
||||
IFX_REG_W32(0x10006, FFSM_CFG1);
|
||||
IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0);
|
||||
IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1);
|
||||
}
|
||||
|
||||
static inline void clear_share_buffer(void)
|
||||
{
|
||||
volatile u32 *p = SB_RAM0_ADDR(0);
|
||||
unsigned int i;
|
||||
|
||||
for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN; i++ )
|
||||
IFX_REG_W32(0, p++);
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Download PPE firmware binary code.
|
||||
* Input:
|
||||
* src --- u32 *, binary code buffer
|
||||
* dword_len --- unsigned int, binary code length in DWORD (32-bit)
|
||||
* Output:
|
||||
* int --- 0: Success
|
||||
* else: Error Code
|
||||
*/
|
||||
static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
|
||||
{
|
||||
volatile u32 *dest;
|
||||
|
||||
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|
||||
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
|
||||
return -1;
|
||||
|
||||
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
|
||||
IFX_REG_W32(0x00, CDM_CFG);
|
||||
else
|
||||
IFX_REG_W32(0x04, CDM_CFG);
|
||||
|
||||
/* copy code */
|
||||
dest = CDM_CODE_MEMORY(0, 0);
|
||||
while ( code_dword_len-- > 0 )
|
||||
IFX_REG_W32(*code_src++, dest++);
|
||||
|
||||
/* copy data */
|
||||
dest = CDM_DATA_MEMORY(0, 0);
|
||||
while ( data_dword_len-- > 0 )
|
||||
IFX_REG_W32(*data_src++, dest++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Global Function
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
extern void ase_fw_ver(unsigned int *major, unsigned int *minor)
|
||||
{
|
||||
ASSERT(major != NULL, "pointer is NULL");
|
||||
ASSERT(minor != NULL, "pointer is NULL");
|
||||
|
||||
*major = FW_VER_ID->major;
|
||||
*minor = FW_VER_ID->minor;
|
||||
}
|
||||
|
||||
void ase_init(struct platform_device *pdev)
|
||||
{
|
||||
init_pmu();
|
||||
|
||||
reset_ppe(pdev);
|
||||
|
||||
init_ema();
|
||||
|
||||
init_mailbox();
|
||||
|
||||
init_atm_tc();
|
||||
|
||||
clear_share_buffer();
|
||||
}
|
||||
|
||||
void ase_shutdown(void)
|
||||
{
|
||||
uninit_pmu();
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Initialize and start up PP32.
|
||||
* Input:
|
||||
* none
|
||||
* Output:
|
||||
* int --- 0: Success
|
||||
* else: Error Code
|
||||
*/
|
||||
int ase_start(int pp32)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* download firmware */
|
||||
ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
|
||||
if ( ret != 0 )
|
||||
return ret;
|
||||
|
||||
/* run PP32 */
|
||||
IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL);
|
||||
|
||||
/* idle for a while to let PP32 init itself */
|
||||
udelay(10);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Halt PP32.
|
||||
* Input:
|
||||
* none
|
||||
* Output:
|
||||
* none
|
||||
*/
|
||||
void ase_stop(int pp32)
|
||||
{
|
||||
/* halt PP32 */
|
||||
IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL);
|
||||
}
|
||||
|
||||
struct ltq_atm_ops ase_ops = {
|
||||
.init = ase_init,
|
||||
.shutdown = ase_shutdown,
|
||||
.start = ase_start,
|
||||
.stop = ase_stop,
|
||||
.fw_ver = ase_fw_ver,
|
||||
};
|
||||
|
||||
245
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ar9.c
Normal file
245
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ar9.c
Normal file
@@ -0,0 +1,245 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ar9.c
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM
|
||||
**
|
||||
** DATE : 7 Jul 2009
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM driver common source file (core functions)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 07 JUL 2009 Xu Liang Init Version
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Head File
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Common Head File
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/delay.h>
|
||||
|
||||
/*
|
||||
* Chip Specific Head File
|
||||
*/
|
||||
#include "ifxmips_atm_core.h"
|
||||
|
||||
#include "ifxmips_atm_fw_ar9.h"
|
||||
#include "ifxmips_atm_fw_regs_ar9.h"
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Definition
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* EMA Settings
|
||||
*/
|
||||
#define EMA_CMD_BUF_LEN 0x0040
|
||||
#define EMA_CMD_BASE_ADDR (0x00003B80 << 2)
|
||||
#define EMA_DATA_BUF_LEN 0x0100
|
||||
#define EMA_DATA_BASE_ADDR (0x00003C00 << 2)
|
||||
#define EMA_WRITE_BURST 0x2
|
||||
#define EMA_READ_BURST 0x2
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Declaration
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Hardware Init/Uninit Functions
|
||||
*/
|
||||
static inline void init_pmu(void);
|
||||
static inline void uninit_pmu(void);
|
||||
static inline void reset_ppe(struct platform_device *pdev);
|
||||
static inline void init_ema(void);
|
||||
static inline void init_mailbox(void);
|
||||
static inline void clear_share_buffer(void);
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Local Variable
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Local Function
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
#define IFX_PMU_MODULE_PPE_SLL01 BIT(19)
|
||||
#define IFX_PMU_MODULE_PPE_TC BIT(21)
|
||||
#define IFX_PMU_MODULE_PPE_EMA BIT(22)
|
||||
#define IFX_PMU_MODULE_PPE_QSB BIT(18)
|
||||
#define IFX_PMU_MODULE_TPE BIT(13)
|
||||
#define IFX_PMU_MODULE_DSL_DFE BIT(9)
|
||||
|
||||
static inline void init_pmu(void)
|
||||
{
|
||||
ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
|
||||
IFX_PMU_MODULE_PPE_TC |
|
||||
IFX_PMU_MODULE_PPE_EMA |
|
||||
IFX_PMU_MODULE_PPE_QSB |
|
||||
IFX_PMU_MODULE_TPE |
|
||||
IFX_PMU_MODULE_DSL_DFE);
|
||||
}
|
||||
|
||||
static inline void uninit_pmu(void)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void reset_ppe(struct platform_device *pdev)
|
||||
{
|
||||
#ifdef MODULE
|
||||
// reset PPE
|
||||
// ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void init_ema(void)
|
||||
{
|
||||
IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
|
||||
IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
|
||||
IFX_REG_W32(0x000000FF, EMA_IER);
|
||||
IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
|
||||
}
|
||||
|
||||
static inline void init_mailbox(void)
|
||||
{
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
|
||||
}
|
||||
|
||||
static inline void clear_share_buffer(void)
|
||||
{
|
||||
volatile u32 *p = SB_RAM0_ADDR(0);
|
||||
unsigned int i;
|
||||
|
||||
for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ )
|
||||
IFX_REG_W32(0, p++);
|
||||
}
|
||||
|
||||
static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
|
||||
{
|
||||
volatile u32 *dest;
|
||||
|
||||
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|
||||
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
|
||||
return -1;
|
||||
|
||||
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
|
||||
IFX_REG_W32(0x00, CDM_CFG);
|
||||
else
|
||||
IFX_REG_W32(0x04, CDM_CFG);
|
||||
|
||||
/* copy code */
|
||||
dest = CDM_CODE_MEMORY(0, 0);
|
||||
while ( code_dword_len-- > 0 )
|
||||
IFX_REG_W32(*code_src++, dest++);
|
||||
|
||||
/* copy data */
|
||||
dest = CDM_DATA_MEMORY(0, 0);
|
||||
while ( data_dword_len-- > 0 )
|
||||
IFX_REG_W32(*data_src++, dest++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ar9_fw_ver(unsigned int *major, unsigned int *minor)
|
||||
{
|
||||
ASSERT(major != NULL, "pointer is NULL");
|
||||
ASSERT(minor != NULL, "pointer is NULL");
|
||||
|
||||
*major = FW_VER_ID->major;
|
||||
*minor = FW_VER_ID->minor;
|
||||
}
|
||||
|
||||
void ar9_init(struct platform_device *pdev)
|
||||
{
|
||||
init_pmu();
|
||||
reset_ppe(pdev);
|
||||
init_ema();
|
||||
init_mailbox();
|
||||
clear_share_buffer();
|
||||
}
|
||||
|
||||
void ar9_shutdown(void)
|
||||
{
|
||||
ltq_pmu_disable(IFX_PMU_MODULE_PPE_SLL01 |
|
||||
IFX_PMU_MODULE_PPE_TC |
|
||||
IFX_PMU_MODULE_PPE_EMA |
|
||||
IFX_PMU_MODULE_PPE_QSB |
|
||||
IFX_PMU_MODULE_TPE |
|
||||
IFX_PMU_MODULE_DSL_DFE);
|
||||
}
|
||||
|
||||
int ar9_start(int pp32)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pp32_download_code(ar9_fw_bin, sizeof(ar9_fw_bin) / sizeof(*ar9_fw_bin),
|
||||
ar9_fw_data, sizeof(ar9_fw_data) / sizeof(*ar9_fw_data));
|
||||
if ( ret != 0 )
|
||||
return ret;
|
||||
|
||||
IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0));
|
||||
|
||||
udelay(10);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ar9_stop(int pp32)
|
||||
{
|
||||
IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0));
|
||||
}
|
||||
|
||||
struct ltq_atm_ops ar9_ops = {
|
||||
.init = ar9_init,
|
||||
.shutdown = ar9_shutdown,
|
||||
.start = ar9_start,
|
||||
.stop = ar9_stop,
|
||||
.fw_ver = ar9_fw_ver,
|
||||
};
|
||||
|
||||
|
||||
247
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h
Normal file
247
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h
Normal file
@@ -0,0 +1,247 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_core.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM
|
||||
**
|
||||
** DATE : 7 Jul 2009
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM driver header file (core functions)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 17 JUN 2009 Xu Liang Init Version
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef IFXMIPS_ATM_CORE_H
|
||||
#define IFXMIPS_ATM_CORE_H
|
||||
|
||||
|
||||
#define CONFIG_IFXMIPS_DSL_CPE_MEI
|
||||
#define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r))
|
||||
#define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r))
|
||||
#define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
|
||||
#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
|
||||
|
||||
struct ltq_atm_ops {
|
||||
void (*init)(struct platform_device *pdev);
|
||||
void (*shutdown)(void);
|
||||
|
||||
int (*start)(int pp32);
|
||||
void (*stop)(int pp32);
|
||||
|
||||
void (*fw_ver)(unsigned int *major, unsigned int *minor);
|
||||
};
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <lantiq_atm.h>
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Definition
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Compile Options
|
||||
*/
|
||||
|
||||
#define ENABLE_DEBUG 1
|
||||
|
||||
#define ENABLE_ASSERT 1
|
||||
|
||||
#define INLINE
|
||||
|
||||
#define DEBUG_DUMP_SKB 1
|
||||
|
||||
#define DEBUG_QOS 1
|
||||
|
||||
#define DISABLE_QOS_WORKAROUND 0
|
||||
|
||||
#define ENABLE_DBG_PROC 1
|
||||
|
||||
#define ENABLE_FW_PROC 1
|
||||
|
||||
#ifdef CONFIG_IFX_ATM_TASKLET
|
||||
#define ENABLE_TASKLET 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IFX_ATM_RETX
|
||||
#define ENABLE_ATM_RETX 1
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_DSL_MEI_CPE_DRV) && !defined(CONFIG_IFXMIPS_DSL_CPE_MEI)
|
||||
#define CONFIG_IFXMIPS_DSL_CPE_MEI 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Debug/Assert/Error Message
|
||||
*/
|
||||
|
||||
#define ifx_atm_dbg_enable 1
|
||||
|
||||
#define DBG_ENABLE_MASK_ERR (1 << 0)
|
||||
#define DBG_ENABLE_MASK_DEBUG_PRINT (1 << 1)
|
||||
#define DBG_ENABLE_MASK_ASSERT (1 << 2)
|
||||
#define DBG_ENABLE_MASK_DUMP_SKB_RX (1 << 8)
|
||||
#define DBG_ENABLE_MASK_DUMP_SKB_TX (1 << 9)
|
||||
#define DBG_ENABLE_MASK_DUMP_QOS (1 << 10)
|
||||
#define DBG_ENABLE_MASK_DUMP_INIT (1 << 11)
|
||||
#define DBG_ENABLE_MASK_MAC_SWAP (1 << 12)
|
||||
#define DBG_ENABLE_MASK_ALL (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP)
|
||||
|
||||
#if defined(ENABLE_ASSERT) && ENABLE_ASSERT
|
||||
#define ASSERT(cond, format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
|
||||
#else
|
||||
#define ASSERT(cond, format, arg...)
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* Constants
|
||||
*/
|
||||
#define DEFAULT_TX_LINK_RATE 3200 // in cells
|
||||
|
||||
/*
|
||||
* ATM Port, QSB Queue, DMA RX/TX Channel Parameters
|
||||
*/
|
||||
#define ATM_PORT_NUMBER 2
|
||||
#define MAX_QUEUE_NUMBER 16
|
||||
#define OAM_RX_QUEUE 15
|
||||
#define QSB_RESERVE_TX_QUEUE 0
|
||||
#define FIRST_QSB_QID 1
|
||||
#define MAX_PVC_NUMBER (MAX_QUEUE_NUMBER - FIRST_QSB_QID)
|
||||
#define MAX_RX_DMA_CHANNEL_NUMBER 8
|
||||
#define MAX_TX_DMA_CHANNEL_NUMBER 16
|
||||
#define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT
|
||||
#define DESC_ALIGNMENT 8
|
||||
#define DEFAULT_RX_HUNT_BITTH 4
|
||||
|
||||
/*
|
||||
* RX DMA Channel Allocation
|
||||
*/
|
||||
#define RX_DMA_CH_OAM 0
|
||||
#define RX_DMA_CH_AAL 1
|
||||
#define RX_DMA_CH_TOTAL 2
|
||||
#define RX_DMA_CH_OAM_DESC_LEN 32
|
||||
#define RX_DMA_CH_OAM_BUF_SIZE ((CELL_SIZE + 14) & ~15)
|
||||
#define RX_DMA_CH_AAL_BUF_SIZE (2048 - 48)
|
||||
|
||||
/*
|
||||
* OAM Constants
|
||||
*/
|
||||
#define OAM_HTU_ENTRY_NUMBER 3
|
||||
#define OAM_F4_SEG_HTU_ENTRY 0
|
||||
#define OAM_F4_TOT_HTU_ENTRY 1
|
||||
#define OAM_F5_HTU_ENTRY 2
|
||||
#define OAM_F4_CELL_ID 0
|
||||
#define OAM_F5_CELL_ID 15
|
||||
#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
|
||||
#undef OAM_HTU_ENTRY_NUMBER
|
||||
#define OAM_HTU_ENTRY_NUMBER 4
|
||||
#define OAM_ARQ_HTU_ENTRY 3
|
||||
#endif
|
||||
|
||||
/*
|
||||
* RX Frame Definitions
|
||||
*/
|
||||
#define MAX_RX_PACKET_ALIGN_BYTES 3
|
||||
#define MAX_RX_PACKET_PADDING_BYTES 3
|
||||
#define RX_INBAND_TRAILER_LENGTH 8
|
||||
#define MAX_RX_FRAME_EXTRA_BYTES (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES)
|
||||
|
||||
/*
|
||||
* TX Frame Definitions
|
||||
*/
|
||||
#define MAX_TX_HEADER_ALIGN_BYTES 12
|
||||
#define MAX_TX_PACKET_ALIGN_BYTES 3
|
||||
#define MAX_TX_PACKET_PADDING_BYTES 3
|
||||
#define TX_INBAND_HEADER_LENGTH 8
|
||||
#define MAX_TX_FRAME_EXTRA_BYTES (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES)
|
||||
|
||||
#define CELL_SIZE ATM_AAL0_SDU
|
||||
|
||||
#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
|
||||
#define RETX_PLAYOUT_BUFFER_ORDER 6
|
||||
#define RETX_PLAYOUT_BUFFER_SIZE (PAGE_SIZE * (1 << RETX_PLAYOUT_BUFFER_ORDER))
|
||||
#define RETX_PLAYOUT_FW_BUFF_SIZE (RETX_PLAYOUT_BUFFER_SIZE / (32 * 56 /* cell size */))
|
||||
#define RETX_POLLING_INTERVAL (HZ / 100 > 0 ? HZ / 100 : 1)
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
unsigned int h;
|
||||
unsigned int l;
|
||||
} ppe_u64_t;
|
||||
|
||||
struct port {
|
||||
unsigned int tx_max_cell_rate;
|
||||
unsigned int tx_current_cell_rate;
|
||||
|
||||
struct atm_dev *dev;
|
||||
};
|
||||
|
||||
struct connection {
|
||||
struct atm_vcc *vcc;
|
||||
|
||||
volatile struct tx_descriptor *tx_desc;
|
||||
unsigned int tx_desc_pos;
|
||||
struct sk_buff **tx_skb;
|
||||
spinlock_t lock;
|
||||
|
||||
unsigned int aal5_vcc_crc_err; /* number of packets with CRC error */
|
||||
unsigned int aal5_vcc_oversize_sdu; /* number of packets with oversize error */
|
||||
|
||||
unsigned int port;
|
||||
};
|
||||
|
||||
struct atm_priv_data {
|
||||
unsigned long conn_table;
|
||||
struct connection conn[MAX_PVC_NUMBER];
|
||||
|
||||
volatile struct rx_descriptor *aal_desc;
|
||||
unsigned int aal_desc_pos;
|
||||
|
||||
volatile struct rx_descriptor *oam_desc;
|
||||
unsigned char *oam_buf;
|
||||
unsigned int oam_desc_pos;
|
||||
|
||||
struct port port[ATM_PORT_NUMBER];
|
||||
|
||||
unsigned int wrx_pdu; /* successfully received AAL5 packet */
|
||||
unsigned int wrx_drop_pdu; /* AAL5 packet dropped by driver on RX */
|
||||
unsigned int wtx_pdu; /* successfully transmitted AAL5 packet */
|
||||
unsigned int wtx_err_pdu; /* error AAL5 packet */
|
||||
unsigned int wtx_drop_pdu; /* AAL5 packet dropped by driver on TX */
|
||||
|
||||
unsigned int wrx_oam; /* successfully received OAM cell */
|
||||
unsigned int wrx_drop_oam; /* OAM cell dropped by driver on RX */
|
||||
unsigned int wtx_oam; /* successfully transmitted OAM cell */
|
||||
unsigned int wtx_err_oam; /* error during transmiting OAM cell */
|
||||
unsigned int wtx_drop_oam; /* OAM cell dropped by driver on TX */
|
||||
|
||||
ppe_u64_t wrx_total_byte;
|
||||
ppe_u64_t wtx_total_byte;
|
||||
unsigned int prev_wrx_total_byte;
|
||||
unsigned int prev_wtx_total_byte;
|
||||
|
||||
void *aal_desc_base;
|
||||
void *oam_desc_base;
|
||||
void *oam_buf_base;
|
||||
void *tx_desc_base;
|
||||
void *tx_skb_base;
|
||||
|
||||
int irq;
|
||||
};
|
||||
|
||||
#include "ifxmips_atm_ppe_common.h"
|
||||
#include "ifxmips_atm_fw_regs_common.h"
|
||||
|
||||
#endif
|
||||
232
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_danube.c
Normal file
232
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_danube.c
Normal file
@@ -0,0 +1,232 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_danube.c
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM
|
||||
**
|
||||
** DATE : 7 Jul 2009
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM driver common source file (core functions)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 07 JUL 2009 Xu Liang Init Version
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Head File
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Common Head File
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
/*
|
||||
* Chip Specific Head File
|
||||
*/
|
||||
#include "ifxmips_atm_core.h"
|
||||
|
||||
#ifdef CONFIG_DANUBE
|
||||
|
||||
#include "ifxmips_atm_fw_danube.h"
|
||||
#include "ifxmips_atm_fw_regs_danube.h"
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
||||
#define EMA_CMD_BUF_LEN 0x0040
|
||||
#define EMA_CMD_BASE_ADDR (0x00001580 << 2)
|
||||
#define EMA_DATA_BUF_LEN 0x0100
|
||||
#define EMA_DATA_BASE_ADDR (0x00001900 << 2)
|
||||
#define EMA_WRITE_BURST 0x2
|
||||
#define EMA_READ_BURST 0x2
|
||||
|
||||
static inline void reset_ppe(struct platform_device *pdev);
|
||||
|
||||
#define IFX_PMU_MODULE_PPE_SLL01 BIT(19)
|
||||
#define IFX_PMU_MODULE_PPE_TC BIT(21)
|
||||
#define IFX_PMU_MODULE_PPE_EMA BIT(22)
|
||||
#define IFX_PMU_MODULE_PPE_QSB BIT(18)
|
||||
#define IFX_PMU_MODULE_TPE BIT(13)
|
||||
#define IFX_PMU_MODULE_DSL_DFE BIT(9)
|
||||
|
||||
static inline void reset_ppe(struct platform_device *pdev)
|
||||
{
|
||||
/*#ifdef MODULE
|
||||
unsigned int etop_cfg;
|
||||
unsigned int etop_mdio_cfg;
|
||||
unsigned int etop_ig_plen_ctrl;
|
||||
unsigned int enet_mac_cfg;
|
||||
|
||||
etop_cfg = *IFX_PP32_ETOP_CFG;
|
||||
etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG;
|
||||
etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL;
|
||||
enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG;
|
||||
|
||||
*IFX_PP32_ETOP_CFG &= ~0x03C0;
|
||||
|
||||
// reset PPE
|
||||
ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM);
|
||||
|
||||
*IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg;
|
||||
*IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl;
|
||||
*IFX_PP32_ENET_MAC_CFG = enet_mac_cfg;
|
||||
*IFX_PP32_ETOP_CFG = etop_cfg;
|
||||
#endif*/
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Download PPE firmware binary code.
|
||||
* Input:
|
||||
* src --- u32 *, binary code buffer
|
||||
* dword_len --- unsigned int, binary code length in DWORD (32-bit)
|
||||
* Output:
|
||||
* int --- 0: Success
|
||||
* else: Error Code
|
||||
*/
|
||||
static inline int danube_pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
|
||||
{
|
||||
volatile u32 *dest;
|
||||
|
||||
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|
||||
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
|
||||
return -1;
|
||||
|
||||
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
|
||||
IFX_REG_W32(0x00, CDM_CFG);
|
||||
else
|
||||
IFX_REG_W32(0x04, CDM_CFG);
|
||||
|
||||
/* copy code */
|
||||
dest = CDM_CODE_MEMORY(0, 0);
|
||||
while ( code_dword_len-- > 0 )
|
||||
IFX_REG_W32(*code_src++, dest++);
|
||||
|
||||
/* copy data */
|
||||
dest = CDM_DATA_MEMORY(0, 0);
|
||||
while ( data_dword_len-- > 0 )
|
||||
IFX_REG_W32(*data_src++, dest++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void danube_fw_ver(unsigned int *major, unsigned int *minor)
|
||||
{
|
||||
ASSERT(major != NULL, "pointer is NULL");
|
||||
ASSERT(minor != NULL, "pointer is NULL");
|
||||
|
||||
*major = FW_VER_ID->major;
|
||||
*minor = FW_VER_ID->minor;
|
||||
}
|
||||
|
||||
static void danube_init(struct platform_device *pdev)
|
||||
{
|
||||
volatile u32 *p = SB_RAM0_ADDR(0);
|
||||
unsigned int i;
|
||||
|
||||
ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
|
||||
IFX_PMU_MODULE_PPE_TC |
|
||||
IFX_PMU_MODULE_PPE_EMA |
|
||||
IFX_PMU_MODULE_PPE_QSB |
|
||||
IFX_PMU_MODULE_TPE |
|
||||
IFX_PMU_MODULE_DSL_DFE);
|
||||
|
||||
reset_ppe(pdev);
|
||||
|
||||
/* init ema */
|
||||
IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
|
||||
IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
|
||||
IFX_REG_W32(0x000000FF, EMA_IER);
|
||||
IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
|
||||
|
||||
/* init mailbox */
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
|
||||
|
||||
/* init atm tc */
|
||||
IFX_REG_W32(0x0000, DREG_AT_CTRL);
|
||||
IFX_REG_W32(0x0000, DREG_AR_CTRL);
|
||||
IFX_REG_W32(0x0, DREG_AT_IDLE0);
|
||||
IFX_REG_W32(0x0, DREG_AT_IDLE1);
|
||||
IFX_REG_W32(0x0, DREG_AR_IDLE0);
|
||||
IFX_REG_W32(0x0, DREG_AR_IDLE1);
|
||||
IFX_REG_W32(0x40, RFBI_CFG);
|
||||
IFX_REG_W32(0x1600, SFSM_DBA0);
|
||||
IFX_REG_W32(0x1718, SFSM_DBA1);
|
||||
IFX_REG_W32(0x1830, SFSM_CBA0);
|
||||
IFX_REG_W32(0x1844, SFSM_CBA1);
|
||||
IFX_REG_W32(0x14014, SFSM_CFG0);
|
||||
IFX_REG_W32(0x14014, SFSM_CFG1);
|
||||
IFX_REG_W32(0x1858, FFSM_DBA0);
|
||||
IFX_REG_W32(0x18AC, FFSM_DBA1);
|
||||
IFX_REG_W32(0x10006, FFSM_CFG0);
|
||||
IFX_REG_W32(0x10006, FFSM_CFG1);
|
||||
IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0);
|
||||
IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1);
|
||||
|
||||
for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
|
||||
IFX_REG_W32(0, p++);
|
||||
}
|
||||
|
||||
static void danube_shutdown(void)
|
||||
{
|
||||
}
|
||||
|
||||
int danube_start(int pp32)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* download firmware */
|
||||
ret = danube_pp32_download_code(
|
||||
danube_fw_bin, sizeof(danube_fw_bin) / sizeof(*danube_fw_bin),
|
||||
danube_fw_data, sizeof(danube_fw_data) / sizeof(*danube_fw_data));
|
||||
if ( ret != 0 )
|
||||
return ret;
|
||||
|
||||
/* run PP32 */
|
||||
IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL);
|
||||
|
||||
/* idle for a while to let PP32 init itself */
|
||||
udelay(10);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void danube_stop(int pp32)
|
||||
{
|
||||
IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL);
|
||||
}
|
||||
|
||||
struct ltq_atm_ops danube_ops = {
|
||||
.init = danube_init,
|
||||
.shutdown = danube_shutdown,
|
||||
.start = danube_start,
|
||||
.stop = danube_stop,
|
||||
.fw_ver = danube_fw_ver,
|
||||
};
|
||||
|
||||
#endif
|
||||
457
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_amazon_se.h
Normal file
457
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_amazon_se.h
Normal file
@@ -0,0 +1,457 @@
|
||||
#ifndef IFXMIPS_ATM_FW_AMAZON_SE_H
|
||||
#define IFXMIPS_ATM_FW_AMAZON_SE_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_amazon_se.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 16
|
||||
|
||||
|
||||
static unsigned int firmware_binary_code[] = {
|
||||
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004cc8, 0xc2000000, 0xda0800f9, 0x80004330,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x800042e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x800055a8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x800041e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc0400000, 0xc0004840, 0xc88400f8, 0x80004988, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc0400002, 0xc0004840, 0xc88400f8, 0x80004908, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc3c00004, 0xdbc800f9, 0xc10c0002, 0xd90c00f8, 0x8000fee0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc10e0002, 0xd90c00f8, 0xc0004808, 0xc84000f8, 0x80004938, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc3e1fffe, 0x597dfffe, 0x593dfe14, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xc3c00000, 0xdbc800f9, 0xc1400008, 0xc1900000, 0x71588000,
|
||||
0x14100100, 0xc140000a, 0xc1900002, 0x71588000, 0x14100100, 0xc140000c, 0xc1900004, 0x71588000,
|
||||
0x14100100, 0xc1400004, 0xc1900006, 0x71588000, 0x14100100, 0xc1400006, 0xc1900008, 0x71588000,
|
||||
0x14100100, 0xc140000e, 0xc190000a, 0x71588000, 0x14100100, 0xc1400000, 0xc190000c, 0x71588000,
|
||||
0x14100100, 0xc1400002, 0xc190000e, 0x71588000, 0x14100100, 0xc0400000, 0xc11c0000, 0xc000082c,
|
||||
0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0400002, 0xc11c0000, 0xc000082c, 0xcd05ce00,
|
||||
0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0000824, 0x00000000, 0xcbc000f9, 0xcb8000f9, 0xcb4000f9,
|
||||
0xcb0000f8, 0xc0004878, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f9, 0x5b744000, 0xcf4000f9,
|
||||
0x5b304000, 0xcf0000f8, 0xc0000a10, 0x00000000, 0xcbc000f9, 0xcb8000f8, 0xc0004874, 0x5bfc4000,
|
||||
0xcfc000f9, 0x5bb84000, 0xcf8000f8, 0xc30001fe, 0xc000140a, 0xcf0000f8, 0xc3000000, 0x7f018000,
|
||||
0xc000042e, 0xcf0000f8, 0xc000040e, 0xcf0000f8, 0xc3c1fffe, 0xc000490e, 0xcfc00078, 0xc000492c,
|
||||
0xcfc00078, 0xc0004924, 0xcfc00038, 0xc0004912, 0xcfc00038, 0xc0004966, 0xcfc00038, 0xc0004968,
|
||||
0xcfc00078, 0xc000496a, 0xcfc00078, 0xc3c1fffe, 0xc00049a0, 0xcfc000f8, 0xc3c00000, 0xc2800020,
|
||||
0xc3000000, 0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0x5838000a, 0xcf0000f8,
|
||||
0x5bfc0002, 0xb7e8ffc8, 0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47bdc000, 0x5bb84c80,
|
||||
0xc3400000, 0x58380004, 0xcb420078, 0x00000000, 0x58380008, 0xcf400078, 0x5bfc0002, 0xb7e8ffb0,
|
||||
0x00000000, 0xc3c00000, 0xc2800020, 0xc348001e, 0xc3000000, 0x7f018000, 0x6ff8a000, 0x6fd44000,
|
||||
0x4795c000, 0x47bdc000, 0x5bb85e00, 0x58380008, 0xcf408418, 0x5838000a, 0xcf0000f8, 0x5bfc0002,
|
||||
0xb7e8ffb0, 0x00000000, 0x00000000, 0xc3e06242, 0x5bfc0020, 0xc0004802, 0xcfc000f8, 0xc161fffe,
|
||||
0x5955fffe, 0x14140000, 0x00000000, 0xc1000000, 0xd91c00f8, 0xc3e01002, 0x5bfd88c0, 0xc3a00f88,
|
||||
0x5bb839a2, 0x99005fa8, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0xc3c00000, 0xdf7f0038, 0xa7ccfff0,
|
||||
0xc3800000, 0xc00048c0, 0xcb818078, 0xc0001408, 0xcfc000f8, 0xc10e0002, 0xd90c00f8, 0x5d3802a6,
|
||||
0xc1000002, 0xd91c1f02, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xa9fe0270, 0xc3c00000,
|
||||
0xddfc00f0, 0x5d3c0000, 0x84000100, 0xc0000c04, 0xcb8000f8, 0xc11c0002, 0x00000000, 0x7391c000,
|
||||
0xcf8000f8, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3203002, 0x5b3188c4, 0xc2e00f88,
|
||||
0x5aec100e, 0x99005fa8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xc3800000, 0xc3400080, 0xdf780038,
|
||||
0xb7b4ffea, 0xc3205002, 0x5b3188c8, 0xc2e00f90, 0x5aec180c, 0x99005fa8, 0xdb1800f8, 0xdad800f9,
|
||||
0x00000000, 0x80000128, 0xc00048cc, 0xca8000f8, 0x00000000, 0xc1000006, 0x76914000, 0x840000fa,
|
||||
0x00000000, 0xa6800070, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3202002, 0x5b31c8c6,
|
||||
0xc2e00f88, 0x5aec100e, 0x99005fa8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xa6820068, 0xc3800000,
|
||||
0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3204002, 0x5b31c8ca, 0xc2e00f90, 0x5aec180c, 0x99005fa8,
|
||||
0xdb1800f8, 0xdad800f9, 0x00000000, 0xc00048cc, 0xc2800000, 0xce8000f8, 0xc3a00140, 0x5bfc0002,
|
||||
0x47bc8000, 0xc1000000, 0xc53c00fe, 0xdbdc00f0, 0x80000530, 0x00000000, 0x80002130, 0x00000000,
|
||||
0x8000fd70, 0xc0004958, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0004848,
|
||||
0xcb8400f8, 0xc000495c, 0xcac400f8, 0xc0004844, 0xc88400f8, 0x47ad0000, 0x8400ff82, 0xc000487c,
|
||||
0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc0001624, 0xcb0400f8, 0xa63c007a,
|
||||
0x00000000, 0x00000000, 0xa71eff22, 0x00000000, 0xc0000824, 0xca8400f8, 0x6ca08000, 0x6ca42000,
|
||||
0x46250000, 0x42290000, 0xc35e0002, 0xc6340060, 0xc0001624, 0xcf440078, 0xc2000000, 0xc161fffe,
|
||||
0x5955fffe, 0x14140000, 0x00000000, 0xc0004844, 0xc88400f8, 0xc000082c, 0xca040038, 0x00000000,
|
||||
0x00000000, 0x58880002, 0xb6080018, 0x00000000, 0xc0800000, 0xc0004844, 0xcc840038, 0x5aec0002,
|
||||
0xc000495c, 0xcec400f8, 0x5e6c0006, 0x84000060, 0xc0004848, 0xcb8400f8, 0xc0000838, 0xc2500002,
|
||||
0xce450800, 0x5fb80002, 0xc0004848, 0xcf8400f8, 0x5eec0002, 0xc000495c, 0xcec400f8, 0x00000000,
|
||||
0xc121fffe, 0x5911fe14, 0x14100000, 0x8000fd98, 0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002,
|
||||
0x787c2000, 0xcc4000f8, 0xc0004960, 0xcac400f8, 0x00000000, 0x00000000, 0x5eec0000, 0x8400010a,
|
||||
0x00000000, 0xb6fc0050, 0xc0001600, 0xca0400f8, 0x00000000, 0x00000000, 0xa61e00d2, 0x6fe90000,
|
||||
0xc0000a28, 0xce850800, 0xc2c00000, 0xc2800004, 0xb6e800a0, 0xc0001604, 0xca8400f8, 0xc0004960,
|
||||
0xcec400f8, 0xa69efcc2, 0x00000000, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00002, 0xc0001600,
|
||||
0xca0400f8, 0x00000000, 0x00000000, 0xa61e002a, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00000,
|
||||
0xc0001604, 0xca8400f8, 0xc0004960, 0xcec400f8, 0xa69efc2a, 0xc2400000, 0xc0000a14, 0xca440028,
|
||||
0x00000000, 0x00000000, 0x466d2000, 0xa4400020, 0xc2800000, 0xdfeb0029, 0x80000010, 0xdfea0029,
|
||||
0xb668f932, 0x00000000, 0xc00048a0, 0xcb0400f8, 0xc0000a10, 0xca8400f8, 0x6f208000, 0x6f242000,
|
||||
0x46250000, 0x42a10000, 0xc2400000, 0xc0000a14, 0xca440028, 0xc35e0002, 0xc6340060, 0xc0001604,
|
||||
0xcf440078, 0x5b300002, 0xb6700018, 0x5aec0002, 0xc3000000, 0xc00048a0, 0xcf0400f8, 0xc0004960,
|
||||
0xcec400f8, 0x8000f868, 0xc0004918, 0xd28000f8, 0xc2000000, 0xdf600038, 0x5e600080, 0x84000272,
|
||||
0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000480a, 0xca0000f8, 0xc0004912,
|
||||
0xca4000f8, 0xc0004924, 0xca8000f8, 0xc0004966, 0xcac000f8, 0x00000000, 0xc121fffe, 0x5911fe14,
|
||||
0x14100000, 0x76250000, 0x76290000, 0x762d0000, 0x840001ca, 0xc0004918, 0xca4000f8, 0xc28001fe,
|
||||
0x76290000, 0x5a640002, 0x6a254010, 0x5ee80000, 0x8400001a, 0x6aa54000, 0x80000010, 0xc62800f8,
|
||||
0x62818008, 0xc0004918, 0xcf0000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0004966,
|
||||
0xca4000f8, 0xc2000002, 0x6a310000, 0x7e010000, 0x76612000, 0xce4000f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x6f346000, 0x4771a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800078,
|
||||
0xc2c00000, 0x58340000, 0xcac000d8, 0xc2400000, 0x5834000a, 0xca420078, 0x6ea82000, 0x42e9e000,
|
||||
0x6f2ca000, 0x42e56000, 0x5aec1400, 0xc3990040, 0xc7381c18, 0xc6f80060, 0x99005fa8, 0xdb9800f8,
|
||||
0xdbd800f9, 0x00000000, 0xdea000f8, 0x46310000, 0x8400fd80, 0xc0004958, 0xc84000f8, 0x00000000,
|
||||
0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0004848, 0xcb8400f8, 0xc0004844, 0xc88400f8, 0x5fb80000,
|
||||
0x8400f7f2, 0xc0001a1c, 0xca0000f8, 0xc2400002, 0x6a452000, 0x76250000, 0x8400f7c2, 0xc000487c,
|
||||
0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc42400f8, 0x00000000, 0xa63c17da,
|
||||
0x00000000, 0xc0004878, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000, 0x40100000, 0xca0000f8,
|
||||
0xc42400f8, 0x00000000, 0xc0004934, 0xce0000f8, 0xc2800002, 0xc4681c08, 0xc62821d0, 0xc2600010,
|
||||
0x5a652440, 0xc0004800, 0xcb4000f8, 0xc2200400, 0x5a202400, 0xc7601040, 0xc0001220, 0xce8000f8,
|
||||
0xc0001200, 0xce4000f8, 0xc0001202, 0xce0000f8, 0xc0001240, 0xcb4000f8, 0x00000000, 0x00000000,
|
||||
0xa754ffe0, 0xc2000000, 0xc7600040, 0xa7520042, 0x00000000, 0x00000000, 0x99006720, 0xc0004822,
|
||||
0xc94000f8, 0xc1800002, 0x80001680, 0x58206480, 0xc2000000, 0xca000018, 0xc2400000, 0xca414000,
|
||||
0xc2800000, 0xca812000, 0xc2c00000, 0xcac20018, 0xc0004938, 0xce0000f8, 0xc0004920, 0xce4000f8,
|
||||
0xc0004916, 0xce8000f8, 0xc0004922, 0xcec000f8, 0xa6400540, 0x00000000, 0xc0004938, 0xcbc000f8,
|
||||
0x00000000, 0xc3800000, 0x6ff48000, 0x6fd44000, 0x4355a000, 0x5b744a00, 0x58340000, 0xcb802010,
|
||||
0x00000000, 0xc2000000, 0x6fb46000, 0x4779a000, 0x5b744c80, 0x5834000c, 0xca000020, 0xc000491a,
|
||||
0xcf8000f8, 0x5e200000, 0x8400046a, 0xc2000000, 0xdf610048, 0x5e6001e8, 0x8800ffe8, 0xc2000002,
|
||||
0xc2400466, 0xc2a00000, 0x5aa80000, 0xc0001006, 0xce0000f8, 0xc0001008, 0xce4000f8, 0xc000100a,
|
||||
0xce8000f8, 0x990059e8, 0xc1a0fffe, 0xc0000824, 0xc9840060, 0xc0004934, 0xca4000f8, 0xc2000000,
|
||||
0xc2800002, 0x99005a28, 0xda9800f8, 0xc61400f8, 0xc65800f8, 0xc161fffe, 0x5955fffe, 0x14140000,
|
||||
0x00000000, 0x99005b10, 0xc000491a, 0xc94000f8, 0x00000000, 0x00000000, 0xc121fffe, 0x5911fe14,
|
||||
0x14100000, 0xc0004922, 0xca001118, 0xc3c00000, 0xc3800000, 0xc0004930, 0xce023118, 0xc0004932,
|
||||
0xcbc000d8, 0xc2800000, 0xc000491e, 0xcfc000f8, 0xc0004862, 0xca800060, 0xc3a0001a, 0x5bb94000,
|
||||
0xc6b80060, 0xc000491c, 0xcf8000f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xa8e2ffe8, 0xc2000000, 0xc1220002, 0xd90c00f8, 0xdf600038, 0x5e600080,
|
||||
0x8400fff2, 0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000, 0x00000000, 0x99005fa8,
|
||||
0xda1800f8, 0xda5800f9, 0x00000000, 0xc2000000, 0xdf610048, 0x5e6001fe, 0x8800ffe8, 0xc0004916,
|
||||
0xca8000f8, 0xc2c00000, 0xdfec0048, 0xc2400000, 0x466d2000, 0x8400004a, 0x5ea80000, 0x8400003a,
|
||||
0xc2600002, 0x99006720, 0xc000482e, 0xc94000f8, 0xc1800002, 0x80000030, 0xc2600000, 0x99006720,
|
||||
0xc000482c, 0xc94000f8, 0xc1800002, 0xc2000068, 0xc6240078, 0xc0004930, 0xce400080, 0xc000491a,
|
||||
0xc98000f8, 0xc0004862, 0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x99005e08, 0xd95800f8,
|
||||
0xd99800f9, 0xd9d400f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xdf600038,
|
||||
0x5e600080, 0x8400ffea, 0x00000000, 0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000,
|
||||
0x00000000, 0x99005fa8, 0xda1800f8, 0xda5800f9, 0x00000000, 0x800010e8, 0x00000000, 0x99006720,
|
||||
0xc000482a, 0xc94000f8, 0xc1800002, 0x800010b8, 0xc0004938, 0xcbc000f8, 0x00000000, 0x00000000,
|
||||
0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0x58380008, 0xca0000f8, 0x00000000, 0x00000000,
|
||||
0xa6000382, 0x00000000, 0xc0004938, 0xcbc000f8, 0xc3000000, 0x00000000, 0x6ff88000, 0x6fd44000,
|
||||
0x4395c000, 0x5bb84a00, 0x58380000, 0xcb002010, 0xc2000000, 0x58380008, 0xca020078, 0x5838000c,
|
||||
0xcac000f8, 0x5838000e, 0xca4000f8, 0xc000491a, 0xcf0000f8, 0xc0004930, 0xcec000f8, 0xc000493c,
|
||||
0xce0000f8, 0xc0004932, 0xce4000f8, 0x5e200000, 0x84000120, 0xc2800000, 0xa6fe00ba, 0x6f206000,
|
||||
0x46310000, 0x5a204c80, 0x5820000c, 0xca800020, 0x00000000, 0x00000000, 0x5ea80000, 0x840001f2,
|
||||
0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005b10, 0xc000491a, 0xc94000f8,
|
||||
0x00000000, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc0004930, 0xcac000f8, 0xc0004932,
|
||||
0xca4000f8, 0xc7ec1118, 0xc0004930, 0xcec000f8, 0x5838000c, 0xcec000f8, 0x58000002, 0xce4000f8,
|
||||
0xc0004934, 0xca0000f8, 0xc2400002, 0x6e642000, 0x6e642000, 0x76612000, 0x8400002a, 0xc2400002,
|
||||
0x6e684000, 0x58380008, 0xce804200, 0xa6000020, 0x6e682000, 0x58380008, 0xce802100, 0xc2400002,
|
||||
0x6e642000, 0x76612000, 0x840000ea, 0x58380008, 0xca0000f8, 0xc2800000, 0xc2400000, 0xa60200c0,
|
||||
0xdba800f8, 0x6f386000, 0x47b1c000, 0x5bb84c80, 0x58380004, 0xca400078, 0x58380002, 0xca800078,
|
||||
0x00000000, 0xdeb800f8, 0x46a54000, 0x88000060, 0x00000000, 0xc0004824, 0xca0000f8, 0xc2400002,
|
||||
0x6e640000, 0x5a200002, 0xce0000f8, 0x58380008, 0xce400000, 0x80000018, 0x00000000, 0x80000048,
|
||||
0xc0004934, 0xca0000f8, 0x00000000, 0x00000000, 0xa6020c6a, 0x00000000, 0x00000000, 0x80000c98,
|
||||
0xc2800000, 0xc2000200, 0xc240001a, 0xdf690048, 0x46294000, 0x46a54000, 0x8800ffd2, 0xc2000006,
|
||||
0xc2600982, 0x5a643b6e, 0x5838000a, 0xca8000f8, 0xc0001006, 0xce0000f8, 0xc0001008, 0xce4000f8,
|
||||
0xc000100a, 0xce8000f8, 0x990059e8, 0xc1a0fffe, 0xc0000824, 0xc9840060, 0xc2000000, 0xc0004930,
|
||||
0xca02e008, 0x58380026, 0xca4000f8, 0x00000000, 0xc2800000, 0x99005a28, 0xda9800f8, 0xc61400f8,
|
||||
0xc65800f8, 0xc0004934, 0xca0000f8, 0x00000000, 0x00000000, 0xa6020022, 0x00000000, 0x00000000,
|
||||
0x80000318, 0xc0004938, 0xcbc000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000,
|
||||
0x40100000, 0xca0000f8, 0xc42400f8, 0x00000000, 0x58240018, 0xca0000f8, 0x6ff88000, 0x6fd44000,
|
||||
0x4395c000, 0x5bb84a00, 0xc3000000, 0xc3400002, 0xc2c00000, 0xc62c0078, 0xc6270038, 0xc0004940,
|
||||
0xce400038, 0xc6260038, 0xc0004942, 0xce400038, 0xc000493c, 0xca0000f8, 0x5eec0000, 0x8400018a,
|
||||
0x5a6c0010, 0x46254000, 0x88000190, 0x5a600052, 0x46e54000, 0x88000178, 0x58380006, 0xca8000f8,
|
||||
0xc0004940, 0xca0000f8, 0xc2400000, 0xc6a70038, 0x7e412000, 0x76612000, 0xc2000000, 0xc6a10038,
|
||||
0x46250000, 0x84000138, 0xc0004942, 0xca0000f8, 0xc2400000, 0xc6a60038, 0x7e412000, 0x76612000,
|
||||
0xc2000000, 0xc6a00038, 0x58380002, 0xca8000f8, 0x46250000, 0x840000e8, 0xc2400000, 0xc6a60078,
|
||||
0x466d0000, 0x880000da, 0xc2400000, 0xc6a40078, 0x58380008, 0xca8000f8, 0x46e50000, 0x880000ba,
|
||||
0x00000000, 0xa6820018, 0x00000000, 0xc7700b00, 0xa6840098, 0x00000000, 0xc7700a00, 0x80000080,
|
||||
0xc7700200, 0xc000493c, 0xcac000f8, 0x80000060, 0xc7700300, 0xc000493c, 0xcac000f8, 0x80000040,
|
||||
0xc7700900, 0x80000030, 0xc7700800, 0x80000020, 0xc7700700, 0x80000010, 0xc7700500, 0xc0004944,
|
||||
0xcf0000f8, 0xc000493e, 0xcec000f8, 0xc0004938, 0xca4000f8, 0xc000493c, 0xcb8000f8, 0xc000493e,
|
||||
0xcb4000f8, 0xc3000000, 0x6e608000, 0x6e544000, 0x42150000, 0x5a204a00, 0x5aa00008, 0x58200004,
|
||||
0xcb000078, 0xc0004934, 0xca0000f8, 0xc2400000, 0xc0004930, 0xca42e008, 0xc3c00018, 0xa6020098,
|
||||
0x00000000, 0x43656000, 0x47ad0000, 0x88000050, 0x46f96000, 0x6ee04010, 0x5be00004, 0xc2000000,
|
||||
0xc6e00008, 0x5e200000, 0x84000042, 0x5bfc0002, 0x80000030, 0xc3c00004, 0x5a2c0008, 0x47a10000,
|
||||
0x88000012, 0x5fb80008, 0x6fe04000, 0x42390000, 0x47212000, 0x88000068, 0xc2400000, 0xc0004930,
|
||||
0xca42e008, 0xc2060002, 0xc68000f8, 0xce006300, 0x6fe04000, 0x4721c000, 0x5f700010, 0x4765a000,
|
||||
0xc2000000, 0xc6340008, 0xc25a000a, 0xc000491a, 0xca401c18, 0xc2800000, 0xc0004932, 0xca8000d8,
|
||||
0xc0004862, 0xca400060, 0x6fa04010, 0x42290000, 0xc000491e, 0xce0000f8, 0xc7e41048, 0xc000491c,
|
||||
0xce4000f8, 0x6fe04000, 0x43a1c000, 0xc000493c, 0xcf8000f8, 0xc000493e, 0xcf4000f8, 0xc000493a,
|
||||
0xcfc000f8, 0x80000008, 0x00000000, 0x00000000, 0x00000000, 0xc2000000, 0xdce000f8, 0xa622ffd8,
|
||||
0xc1220002, 0xd90c00f8, 0xc0004938, 0xcbc000f8, 0xc0004944, 0xcb4000f8, 0xc0004862, 0xcb0000f8,
|
||||
0xc0004934, 0xca0000f8, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0xa6020268, 0xc2400000,
|
||||
0x58380008, 0xca406000, 0xdfe800f8, 0xc2218e08, 0x5a21baf6, 0x46a14000, 0x84000022, 0xc2080002,
|
||||
0x7361a000, 0x80000058, 0x5e640000, 0x84000022, 0xc20c0002, 0x7361a000, 0x80000030, 0xc2000000,
|
||||
0xc760e710, 0xc7604218, 0x5e200000, 0x84000272, 0xc2200002, 0xc0004930, 0xce021000, 0x99006720,
|
||||
0xc0004828, 0xc94000f8, 0xc1800002, 0x58380000, 0xca0000f8, 0x00000000, 0x00000000, 0xa6000132,
|
||||
0xc0004940, 0xca8000f8, 0xc0004942, 0xca4000f8, 0xc7600078, 0xc6a01838, 0xc6601038, 0xc000493a,
|
||||
0xca4000f8, 0xc0004934, 0xca8000f8, 0xc0005600, 0x40300000, 0x40240000, 0x5c000004, 0x5ec05800,
|
||||
0x88000012, 0x5c000200, 0xce0000f8, 0x58000002, 0x5ec05800, 0x88000012, 0x5c000200, 0xce8000f8,
|
||||
0xc000493e, 0xca0000f8, 0xc2400000, 0x5838000c, 0xce4000f8, 0x99006720, 0xc0004830, 0xc94000f8,
|
||||
0xc61800f8, 0xc0004930, 0xc6100078, 0xcd000078, 0x800000a8, 0xc2400002, 0x58380008, 0xce400000,
|
||||
0xc0004944, 0xcf4000f8, 0x80000278, 0xc000493c, 0xca4000f8, 0xdfe800f8, 0x5a300018, 0xc0005600,
|
||||
0x40200000, 0xca0000f8, 0x58380008, 0xc6501078, 0xcd021078, 0x5838000a, 0xce8000f8, 0x58380026,
|
||||
0xce0000f8, 0xc0004944, 0xcf4000f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0x80000038,
|
||||
0x00000000, 0x99006720, 0xc0004826, 0xc94000f8, 0xc1800002, 0x8000fdd8, 0xc2000000, 0xc2400080,
|
||||
0xdf600038, 0xb624ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x99005fa8, 0xda5800f8,
|
||||
0xda9800f9, 0x00000000, 0xc0004934, 0xca0000f8, 0x00000000, 0xc2800000, 0xa6020160, 0xc2400004,
|
||||
0xc2000200, 0xdf690048, 0x46294000, 0x46a54000, 0x8800ffda, 0x00000000, 0xc000491a, 0xc98000f8,
|
||||
0xc0004862, 0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x99005e08, 0xd95800f8, 0xd99800f9,
|
||||
0xd9d400f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xc2400080, 0xdf600038,
|
||||
0xb624ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x99005fa8, 0xda5800f8, 0xda9800f9,
|
||||
0x00000000, 0x58380008, 0xca4000f8, 0xc2000000, 0xce000018, 0xc2a1fffe, 0x5aa9fffe, 0xce021078,
|
||||
0x5838000a, 0xce8000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0000838, 0xc2500002,
|
||||
0xce450800, 0xc0004848, 0xcb8400f8, 0xc2000000, 0xc000082c, 0xca040028, 0x5fb80002, 0xc0004848,
|
||||
0xcf8400f8, 0x58880002, 0xb6080018, 0x00000000, 0xc0800000, 0xc0004844, 0xcc8400f8, 0x00000000,
|
||||
0xc121fffe, 0x5911fe14, 0x14100000, 0x8000ded8, 0xc2000000, 0xdf600038, 0x5e200080, 0x8400026a,
|
||||
0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000480c, 0xca0000f8, 0xc0004910,
|
||||
0xca4000f8, 0xc000492c, 0xca8000f8, 0xc0004968, 0xcac000f8, 0x00000000, 0xc121fffe, 0x5911fe14,
|
||||
0x14100000, 0x76250000, 0x76290000, 0x76e16000, 0x840001c2, 0xc0004926, 0xca4000f8, 0xc201fffe,
|
||||
0x76e16000, 0x5a640002, 0x6ae50010, 0x5f200000, 0x8400001a, 0x6a250000, 0x80000010, 0xc6e000f8,
|
||||
0x62014008, 0xc0004926, 0xce8000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0004968,
|
||||
0xca4000f8, 0xc2000002, 0x6a290000, 0x7e010000, 0x76612000, 0xce4000f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x6eb4a000, 0x6e944000, 0x4755a000, 0x4769a000, 0x5b745e00, 0x58340002,
|
||||
0xc2000000, 0xca0000d8, 0x5834002e, 0xc2400000, 0xca400078, 0x6eb0a000, 0x6ebc4000, 0x473d8000,
|
||||
0x47298000, 0x5b301e2e, 0x5b300004, 0x6e642000, 0x4225e000, 0xc39a8024, 0xc7380060, 0xc6b81c18,
|
||||
0x99005fa8, 0xdb9800f8, 0xdbd800f9, 0x00000000, 0xc2000000, 0xdf600038, 0x5e200080, 0x84000352,
|
||||
0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca0000f8, 0xc00049a0,
|
||||
0xca8000f8, 0xc000492a, 0xca4000f8, 0xc000496a, 0xcb0000f8, 0xc0004956, 0xcac000f8, 0x00000000,
|
||||
0xc121fffe, 0x5911fe14, 0x14100000, 0x77218000, 0x77258000, 0x77298000, 0x8400029a, 0xc201fffe,
|
||||
0x77218000, 0x5aec0002, 0x6b2d0010, 0x5ea00000, 0x8400001a, 0x6a2d0000, 0x80000010, 0xc72000f8,
|
||||
0x62016008, 0xc0004956, 0xcec000f8, 0x6ef4a000, 0x6ed44000, 0x4755a000, 0x476da000, 0x5b745e00,
|
||||
0x58340000, 0xc9c000f8, 0xc00049a0, 0xca0000f8, 0xc3000000, 0xc5f04018, 0xc2400000, 0xc5e50038,
|
||||
0x7e412000, 0x76250000, 0xce0000f8, 0xc0004980, 0x40300000, 0xcec000f8, 0xc161fffe, 0x5955fffe,
|
||||
0x14140000, 0x00000000, 0xc000496a, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000,
|
||||
0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ef4a000, 0x6ed44000, 0x4755a000,
|
||||
0x476da000, 0x5b745e00, 0x5834000e, 0xc2000000, 0xca0000d8, 0x58340008, 0xc2400000, 0xca420078,
|
||||
0x5834000c, 0xc2800000, 0xca832010, 0x6e644010, 0x42250000, 0x4229e000, 0xc39a8008, 0x58340008,
|
||||
0xcb809018, 0x58340008, 0xc2800000, 0xca810010, 0x6ee0a000, 0x6ee44000, 0x46250000, 0x462d0000,
|
||||
0x5a200008, 0x5a201e08, 0x42290000, 0xc6380060, 0xc6f81c18, 0x99005fa8, 0xdb9800f8, 0xdbd800f9,
|
||||
0x00000000, 0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0001a1c,
|
||||
0xca0000f8, 0xc2400008, 0x6a452000, 0x76250000, 0x84000ec2, 0xc0000a28, 0xc3800000, 0xcb840028,
|
||||
0xc0000a14, 0xc3400000, 0xcb440028, 0xc0004880, 0xcb0400f8, 0xb7b40072, 0x58041802, 0xcac000f8,
|
||||
0xa7000078, 0x00000000, 0x00000000, 0xa6c8d598, 0xc1000000, 0xc6d00018, 0xc0004980, 0x40100000,
|
||||
0xca8000f8, 0x80000070, 0x00000000, 0x00000000, 0x00000000, 0x8000d548, 0x00000000, 0xc2800000,
|
||||
0xc7282018, 0xc000490e, 0xca4000f8, 0x6be9e000, 0x00000000, 0x767d2000, 0x8400d500, 0x6ea0a000,
|
||||
0x6e944000, 0x46150000, 0x46290000, 0x5a205e00, 0x5820000c, 0xca0000f8, 0xc0004946, 0xce8000f8,
|
||||
0xa62203a8, 0x00000000, 0xc2200060, 0xc0004948, 0xce000008, 0xce021038, 0xc240000a, 0xc000494a,
|
||||
0xce4000f8, 0xc2b60002, 0xc0004964, 0xce837b00, 0x99006278, 0xc00048a0, 0xc88400f8, 0x00000000,
|
||||
0xc0004946, 0xcbc000f8, 0x00000000, 0x00000000, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000,
|
||||
0x5bb85e00, 0x99006038, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0x99005d80, 0xc000491c, 0xc1400000,
|
||||
0xc9420048, 0xc000491c, 0x99006230, 0xc94000f9, 0xc98000f8, 0x00000000, 0x99005fa8, 0xd95800f8,
|
||||
0xd99800f9, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005c70, 0xdbd800f8,
|
||||
0xdb9800f9, 0xc7d800f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ff8a000, 0x6fd44000,
|
||||
0x4795c000, 0x47bdc000, 0x5bb85e00, 0x58380010, 0xca0000f8, 0xc0004874, 0xc80400f8, 0x6c908000,
|
||||
0x45088000, 0x45088000, 0x40100000, 0xca4000f8, 0xc43400f8, 0x00000000, 0xc74000f8, 0xce0000f8,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000,
|
||||
0x72692000, 0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x99006720, 0xc0004836,
|
||||
0xc94000f8, 0xc1800002, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0x58380000,
|
||||
0xc90000f8, 0xc00049a0, 0xca0000f8, 0xc2800000, 0xc5290038, 0x72290000, 0xce0000f8, 0xc1220002,
|
||||
0xd90c00f8, 0xc2000000, 0xc0000a14, 0xca040028, 0xc0000a28, 0xc2500002, 0xce450800, 0x58880002,
|
||||
0xb6080018, 0xc00048a0, 0xc0800000, 0xcc8400f8, 0x8000d110, 0xc0004946, 0xcbc000f8, 0xc161fffe,
|
||||
0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000, 0x72692000,
|
||||
0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ff8a000, 0x6fd44000, 0x4795c000,
|
||||
0x47bdc000, 0x5bb85e00, 0x58380008, 0xca0000f8, 0x5838000c, 0xca4000f8, 0xc3400000, 0xc6340000,
|
||||
0xc000494e, 0xcf4000f8, 0xc2800000, 0xc62a0078, 0xc3000000, 0xc6308018, 0x6f304000, 0x43298000,
|
||||
0xc000493c, 0xcf0000f8, 0xc2c00000, 0xc66c0078, 0xc0004950, 0xcec000f8, 0xc2800000, 0xc66ae020,
|
||||
0xc0004954, 0xce8000f8, 0x5f740000, 0x840001a0, 0x5e300028, 0x46e12000, 0x8400016a, 0x46e12000,
|
||||
0x88000132, 0x5e300018, 0x46e12000, 0x8800002a, 0x46e12000, 0x84000042, 0x00000000, 0x800000c0,
|
||||
0x00000000, 0x990063b8, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0xc3400002, 0xc000494e, 0xcf4000f8,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000,
|
||||
0x7e814000, 0x76692000, 0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc2200060,
|
||||
0xc0004948, 0xce021038, 0xc2000000, 0xc000494c, 0xce0000f8, 0x80000080, 0x00000000, 0x990063b8,
|
||||
0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0x990065b8, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0xc2200058,
|
||||
0xc0004948, 0xce021038, 0xc2000002, 0xc000494c, 0xce0000f8, 0xc2000006, 0xc0001006, 0xce0000f8,
|
||||
0x5838000a, 0xca4000f8, 0xc2200982, 0x5a203b6e, 0xc0001008, 0xce0000f8, 0xc000100a, 0xce4000f8,
|
||||
0xc0004954, 0xca8000f8, 0xc200000c, 0xc000494a, 0xce0000f8, 0xc0004948, 0xce800008, 0xc2b60000,
|
||||
0xc0004964, 0xce8000f8, 0x99006278, 0xc00048a0, 0xc88400f8, 0x00000000, 0xc0004946, 0xcbc000f8,
|
||||
0xc000494c, 0xca0000f8, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000, 0x5bb85e00, 0x5e200000,
|
||||
0x840000fa, 0x00000000, 0x99006038, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0x99005d80, 0xc000491c,
|
||||
0xc1400000, 0xc9420048, 0xc000491c, 0x99006230, 0xc94000f9, 0xc98000f8, 0x00000000, 0x99005fa8,
|
||||
0xd95800f8, 0xd99800f9, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005c70,
|
||||
0xdbd800f8, 0xdb9800f9, 0xc7d800f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc000493c,
|
||||
0xca8000f8, 0xc000494e, 0xcac000f8, 0xc3000018, 0xc3400006, 0x5e200000, 0x8400002a, 0xc2800000,
|
||||
0xc2c00000, 0xc300001e, 0xc3400000, 0xc6ac1078, 0xc72c0418, 0xc76c0810, 0x58380010, 0xca8000f8,
|
||||
0x58380008, 0xcec000f8, 0xc6280100, 0xc0004874, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000,
|
||||
0x40100000, 0xcb0000f8, 0xc43400f8, 0x00000000, 0xc74000f8, 0xce8000f8, 0xc0004952, 0xce8000f8,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc000494c, 0xca0000f8, 0xc0004950,
|
||||
0xcac000f8, 0x5e200000, 0x8400006a, 0xdfe800f8, 0x7e814000, 0x5834001a, 0xce8000f8, 0x99006720,
|
||||
0xc0004834, 0xc94000f8, 0xc1800002, 0x99006720, 0xc0004838, 0xc94000f8, 0xc6d800f8, 0xc1220002,
|
||||
0xd90c00f8, 0x5e200000, 0x84000040, 0x5838002c, 0xcb0000f8, 0xdfe800f8, 0x00000000, 0x58380014,
|
||||
0xcf0000f8, 0x80000058, 0xc2a1fffe, 0x5aa9fffe, 0x58380000, 0xc90000f8, 0xc00049a0, 0xcb0000f8,
|
||||
0xc2c00000, 0xc52d0038, 0x732d8000, 0xcf0000f8, 0x5838000a, 0xce8000f8, 0xc3000000, 0xc0000a14,
|
||||
0xcb040028, 0xc2d00002, 0xc0000a28, 0xcec50800, 0xc000494e, 0xca8000f8, 0x58880002, 0xb4b00018,
|
||||
0xc00048a0, 0xc0800000, 0xcc8400f8, 0x5ea80000, 0x8400017a, 0x5e200000, 0x84000168, 0xc000493c,
|
||||
0xca8000f8, 0x00000000, 0x00000000, 0x5aa80060, 0xce8000f8, 0x990063b8, 0xdbd800f8, 0xdb9800f9,
|
||||
0xc78000f8, 0x990065b8, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0x58380000, 0xcac000f8, 0x00000000,
|
||||
0xc2000000, 0xc6e04018, 0xc0004952, 0xcac000f8, 0x58380000, 0xca8000f8, 0xc30c0002, 0xc6300018,
|
||||
0xa6800098, 0x00000000, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0001800,
|
||||
0xca0000f8, 0x00000000, 0x00000000, 0xa60cffea, 0xc6f00500, 0xc6b0c400, 0xcf0000f8, 0x00000000,
|
||||
0xc121fffe, 0x5911fe14, 0x14100000, 0x8000c758, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x8000c6f0, 0xdcbc00f9, 0x5ffc0000, 0x84000052, 0xc3800002, 0xdb8800f9, 0x5ffc0004, 0x8400bf4a,
|
||||
0xc3800000, 0xdb8800f9, 0xc3ce0002, 0xc0000800, 0xcfc0e700, 0xc3e1fffe, 0x597dfffe, 0x593dfe14,
|
||||
0x94000001, 0x00000000, 0x00000000, 0x00000000, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000,
|
||||
0x40080000, 0xcbc000f8, 0xc43800f8, 0x00000000, 0xc000480e, 0xca0000f8, 0xc0004858, 0xcb4400f8,
|
||||
0x00000000, 0x00000000, 0x47610000, 0x880000b0, 0x00000000, 0xa7c00048, 0xc0004854, 0xc1000002,
|
||||
0xcd0400f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x800000d8, 0x00000000, 0xa7d20138, 0x00000000,
|
||||
0xc7e14040, 0xc2400000, 0xc6246028, 0xc200006a, 0x46250000, 0xc6240030, 0xc0000810, 0xce440030,
|
||||
0x8000ff70, 0xc2000000, 0xc0000808, 0xca040010, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x5a200002,
|
||||
0x5e600010, 0x84000010, 0xc2000000, 0xc0000808, 0xce040010, 0xc3400000, 0x80000028, 0xc1200002,
|
||||
0xc0000818, 0xcd061000, 0x5b740002, 0xc0004858, 0xcf4400f8, 0x990059c0, 0xc0004848, 0xc94400f8,
|
||||
0xc1800000, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0x80000600, 0x5b740002, 0xc0004858, 0xcf4400f8,
|
||||
0xc78000f8, 0xc13c0002, 0xcd03de00, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c, 0xc9840028,
|
||||
0x59540002, 0xc0004848, 0xcd4400f8, 0x58880002, 0xb4980580, 0x00000000, 0xc0800000, 0x80000568,
|
||||
0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xcbc000f8, 0xc42800f8, 0x00000000,
|
||||
0xa7c00130, 0xc000484c, 0xca0400f8, 0xc2400000, 0xc0001aec, 0xca440018, 0x5a200002, 0xc000484c,
|
||||
0xce0400f8, 0xb624008a, 0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc0004848, 0xc94400f8, 0xc1800000,
|
||||
0xc000082c, 0xc9840028, 0x59540002, 0xc0004848, 0xcd4400f8, 0x58880002, 0xb4980470, 0x00000000,
|
||||
0xc0800000, 0x80000458, 0xc0004854, 0xc1000004, 0xcd0400f8, 0xc0000820, 0xc2000002, 0xce0400f8,
|
||||
0xc2000000, 0xc000484c, 0xce0400f8, 0xc0004858, 0xce0400f8, 0x8000ff28, 0xc0004854, 0xc1000000,
|
||||
0xcd0400f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x990059c0, 0xc0004848, 0xc94400f8, 0xc1800000,
|
||||
0xc1200000, 0xc0000818, 0xcd061000, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc2000000, 0xc000484c,
|
||||
0xce0400f8, 0x80000358, 0xc0001ac0, 0xcb8400f8, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000,
|
||||
0x40080000, 0xcbc000f8, 0xc42800f8, 0x00000000, 0x00000000, 0xc68000f8, 0xc13c0000, 0xcd03de00,
|
||||
0xa780024a, 0x00000000, 0x00000000, 0xa7c0020a, 0x00000000, 0xc0001b00, 0xc2060006, 0xce046308,
|
||||
0xa7e801c2, 0x00000000, 0xc0004850, 0xca0400f8, 0xc2400000, 0xc0001aec, 0xca448018, 0x5a200002,
|
||||
0xc0004850, 0xce0400f8, 0xb62400aa, 0x00000000, 0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc0001acc,
|
||||
0xc2000002, 0xce040000, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c, 0xc9840028, 0x59540002,
|
||||
0xc0004848, 0xcd4400f8, 0x58880002, 0xb49801c8, 0x00000000, 0xc0800000, 0x800001b0, 0xc0004854,
|
||||
0xc1000000, 0xcd0400f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x990059c0, 0xc0004848, 0xc94400f8,
|
||||
0xc1800000, 0xc2000000, 0xc0000820, 0xce0400f8, 0xc1200000, 0xc0000818, 0xcd061000, 0xc11c0002,
|
||||
0xc000082c, 0xcd05ce00, 0xc0004850, 0xce0400f8, 0xc2000002, 0xc0001acc, 0xce040008, 0x800000e8,
|
||||
0xc2000002, 0xc0004850, 0xce0400f8, 0x8000fe88, 0xc2000000, 0xc0004850, 0xce0400f8, 0xa7e60032,
|
||||
0x00000000, 0xc2000002, 0xc0001b00, 0xce040000, 0x8000fe70, 0x00000000, 0xa7860052, 0x00000000,
|
||||
0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc2020002, 0xc7e2a540, 0xc0001b00, 0xce0400f8, 0x8000fe18,
|
||||
0xc2040002, 0xc0001b00, 0xce044200, 0x8000fdf8, 0xc2c80002, 0x6ac56000, 0xdacc00f8, 0xc0004854,
|
||||
0xcb4400f8, 0xc0004848, 0xcb8400f8, 0xc0000838, 0xc3c00000, 0xcbc40028, 0x5ef40004, 0x84000022,
|
||||
0xc3000000, 0xc0001acc, 0xcf042100, 0x47f98000, 0x8400002a, 0x47f98000, 0x88000030, 0xc1006e8c,
|
||||
0x8000b380, 0xc0004840, 0xcc8400f8, 0x8000f6b0, 0xc0001ac0, 0xcac400f8, 0xc0004854, 0xcb4400f8,
|
||||
0xa6c0fbd2, 0x00000000, 0x5ef40000, 0x8400f70a, 0x5ef40002, 0x8400f99a, 0x5ef40004, 0x8400fb9a,
|
||||
0xc1006ce8, 0x8000b2f8, 0x00000000, 0xc0800000, 0xdf4b0038, 0xc0004900, 0xcb8000f8, 0xc2000000,
|
||||
0xc000490a, 0xa78000d0, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff46000,
|
||||
0x477da000, 0x5b744c80, 0xc2400000, 0x58340004, 0xca400078, 0xc0004900, 0xce000000, 0x5a640002,
|
||||
0x58340004, 0xc6500078, 0xcd000078, 0xc0004914, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000,
|
||||
0xce4000f8, 0xc0000408, 0xce0000f8, 0xa78200d8, 0xc0004908, 0xcbc000f8, 0xc1000000, 0xd90000f9,
|
||||
0xc1000002, 0xd90c00f8, 0x6ff4a000, 0x6fd44000, 0x4755a000, 0x477da000, 0x5b745e00, 0xc2800000,
|
||||
0x58340006, 0xca800078, 0xc2000000, 0xc0004900, 0xce002100, 0x5ea80002, 0x58340006, 0xc6900078,
|
||||
0xcd000078, 0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408, 0xce0000f8, 0xdca800f9, 0x5ea80000,
|
||||
0x8400b168, 0x00000000, 0xa4800230, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc00018, 0xc3400000,
|
||||
0xc2400000, 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0x58380008, 0xcb400078, 0x58380006, 0xca400078,
|
||||
0x5f740002, 0x58380008, 0xc7500078, 0xcd000078, 0xc2000000, 0x58380004, 0xca020078, 0xc3000000,
|
||||
0x5838000c, 0xcb000020, 0x5a640002, 0x46610000, 0x84000010, 0xc2400000, 0x58380006, 0xc6500078,
|
||||
0xcd000078, 0xc2000000, 0x5838000a, 0xca020078, 0x5b300002, 0x5838000c, 0xc7100020, 0xcd000020,
|
||||
0xc2420020, 0x5a200004, 0x46252000, 0x84000010, 0xc2000000, 0x5838000a, 0xc6101078, 0xcd021078,
|
||||
0xc0004966, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0x5f740000, 0x84000040,
|
||||
0xc0004912, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x5f300020,
|
||||
0x84000040, 0xc0004924, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8,
|
||||
0xa4820070, 0xc2400000, 0xc000140e, 0xca408018, 0xc2000002, 0xc0004900, 0xce000000, 0xc000490a,
|
||||
0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004, 0xd90000f9, 0xa4840270, 0x00000000,
|
||||
0xc3c00000, 0xc000140e, 0xcbc10018, 0xc2800000, 0xc2000000, 0x6ff8a000, 0x6fd44000, 0x4795c000,
|
||||
0x47bdc000, 0x5bb85e00, 0x5838002e, 0xca800078, 0x58380006, 0xca020078, 0xc3400000, 0x5838002e,
|
||||
0xcb420078, 0x5aa80002, 0x46a10000, 0x84000010, 0xc2800000, 0x5838002e, 0xc6900078, 0xcd000078,
|
||||
0x5f740002, 0x5838002e, 0xc7501078, 0xcd021078, 0xc0004968, 0xca4000f8, 0xc2000002, 0x6a3d0000,
|
||||
0x72612000, 0xce4000f8, 0xc000492a, 0xca8000f8, 0x5e740000, 0x84000040, 0xc0004910, 0xca0000f8,
|
||||
0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x6abd4010, 0xa68000ba, 0x00000000,
|
||||
0x58380032, 0xca0000f8, 0x58000002, 0xca4000f8, 0x5838000c, 0x00000000, 0xce0000f9, 0xce4000f8,
|
||||
0xc000492a, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0xc000492c, 0xca0000f8,
|
||||
0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0x80000040, 0xc000492c, 0xca0000f8, 0xc2c00002,
|
||||
0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4880148, 0xc2c00000, 0xc000140e, 0xcac20018,
|
||||
0xc000490e, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc000496a,
|
||||
0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0x6ef0a000, 0x6ed44000, 0x47158000,
|
||||
0x472d8000, 0x5b305e00, 0x58300000, 0xca0000f8, 0x00000000, 0xc2400002, 0x76612000, 0x84000072,
|
||||
0x58300000, 0xca4000f8, 0xc2800000, 0x00000000, 0xc6684018, 0xc24c0002, 0xc6a40018, 0xc624c400,
|
||||
0x58300010, 0xca400500, 0x00000000, 0xc0001800, 0xce4000f8, 0xa4860070, 0xc2400000, 0xc000140e,
|
||||
0xca418018, 0xc2020002, 0xc0004900, 0xce002100, 0xc0004908, 0xce4000f8, 0xc1000000, 0xd90000f9,
|
||||
0xd8400078, 0xc1000004, 0xd90000f9, 0xa48c00e8, 0xc2400000, 0xc000140e, 0xca430018, 0x00000000,
|
||||
0x00000000, 0x5d240002, 0x84000058, 0xc00048c4, 0xca0000f8, 0xc00048c6, 0xc1040002, 0x72110000,
|
||||
0xce0000f8, 0xc1000002, 0xc00048cc, 0xcd000000, 0x80000060, 0x5d240004, 0x84000050, 0xc00048c8,
|
||||
0xca0000f8, 0xc00048ca, 0xc1160002, 0x72110000, 0xce0000f8, 0xc1020002, 0xc00048cc, 0xcd002100,
|
||||
0xc0001408, 0xcc8000f8, 0xc10e0002, 0xd90c00f8, 0x8000ecc8, 0xdfbc00f9, 0xc000496e, 0x990066c8,
|
||||
0xc94000f8, 0xc7d800f8, 0x00000000, 0xc57000f8, 0x5ef00020, 0x88000148, 0x6f346000, 0x4771a000,
|
||||
0x5b744c80, 0x58340008, 0xc2400000, 0xca400078, 0x00000000, 0xc2000000, 0x5a640002, 0xce400078,
|
||||
0x58340004, 0xca000078, 0x00000000, 0x00000000, 0x5e200002, 0xce000078, 0xc0004912, 0xca8000f8,
|
||||
0xc2400002, 0x6a712000, 0x72a54000, 0xce8000f8, 0x5e200000, 0x84000052, 0xc000480a, 0xca0000f8,
|
||||
0xc0000408, 0xca8000f8, 0x76250000, 0x00000000, 0x72a14000, 0xce8000f8, 0x80000038, 0xc0004914,
|
||||
0xca0000f8, 0x7e412000, 0x00000000, 0x76250000, 0xce0000f8, 0x800000d0, 0x6ef4a000, 0x6ed44000,
|
||||
0x4755a000, 0x476da000, 0x5b745e00, 0x5834002e, 0xc2400000, 0xca420078, 0x00000000, 0xc2000000,
|
||||
0x5a640002, 0xc6501078, 0xcd021078, 0x58340006, 0xca000078, 0x00000000, 0x00000000, 0x5a200002,
|
||||
0xce000078, 0xc0004910, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0xc2000002,
|
||||
0x6a310000, 0xc000042a, 0xce0000f8, 0xc1040002, 0xd90c00f8, 0x00000000, 0x8000ea38, 0x00000000,
|
||||
0xc4980928, 0x9d000000, 0xc5580028, 0xc0000838, 0xcd8400f8, 0xc1440200, 0xc1c01600, 0xc55c1070,
|
||||
0xc000100e, 0x9d000000, 0xcd8000f8, 0xc000100c, 0xcdc000f8, 0xc0004862, 0xc9c000f8, 0x00000000,
|
||||
0x00000000, 0xd9d800f9, 0xc0005600, 0x401c0000, 0x5dc05800, 0x88000012, 0x5c000200, 0xcd8000f8,
|
||||
0xc1f0000a, 0x715ca000, 0xdd9800f8, 0xdd9c00f9, 0x41d8e000, 0xc5d40260, 0xc0001010, 0xcd4000f8,
|
||||
0x6c9c8000, 0x45c8e000, 0x45c8e000, 0x59dc0004, 0xc1601260, 0xc5d40260, 0x9d000000, 0xc0001012,
|
||||
0xcd4000f8, 0x00000000, 0x00000000, 0xd95800f8, 0x6d586000, 0x4594c000, 0x59984c80, 0xd99800f9,
|
||||
0x5818000a, 0xc1800000, 0xc9800078, 0xc0005400, 0x6d5ca000, 0x401c0000, 0x40180000, 0xc94000f8,
|
||||
0x58000002, 0x00000000, 0xc9c000f8, 0xc0004930, 0xcd4000f8, 0xc0004932, 0xcdc000f8, 0x59980004,
|
||||
0xc1c20020, 0xb59c0018, 0x00000000, 0xc1800000, 0xdd9c00f9, 0x581c000a, 0xcd800078, 0x581c000c,
|
||||
0xc1800000, 0xc9800020, 0xc1c00002, 0xdd9400f8, 0x69d4e000, 0x5d980002, 0xcd800020, 0xc0004924,
|
||||
0xc98000f8, 0x00000000, 0x9d000000, 0x00000000, 0x719cc000, 0xcd8000f8, 0xc000492a, 0xc94000f8,
|
||||
0xc1c00002, 0x69d8e000, 0x7dc0c000, 0x7558a000, 0xcd4000f8, 0xc000492c, 0xc94000f8, 0xdd8000f9,
|
||||
0x58000032, 0x755ca000, 0x84000090, 0xc94000f9, 0xc98000f8, 0xdd8000f9, 0x5800000c, 0x00000000,
|
||||
0xcd4000f9, 0xcd8000f8, 0xc000492c, 0xc94000f8, 0xc000492a, 0xc98000f8, 0x715ca000, 0xc000492c,
|
||||
0xcd4000f8, 0x719cc000, 0xc000492a, 0xcd8000f8, 0x9d000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc0004862, 0xc98000f8, 0x00000000, 0xc1c00200, 0x4194c000, 0x459ce000, 0x88000012, 0xc5d800f8,
|
||||
0xc0004862, 0xcd8000f8, 0xc0001406, 0xc98000f8, 0xc1c00002, 0x9d000000, 0xc5d80a00, 0xc5581048,
|
||||
0xcd8000f8, 0xc0004930, 0xc98000f8, 0xc0004932, 0xc9c000f8, 0xc140000e, 0xc5581c18, 0xdd9400f8,
|
||||
0xc0005600, 0x40140000, 0x5d405800, 0x88000012, 0x5c000200, 0xcd8000f8, 0x58000002, 0x5d405800,
|
||||
0x88000012, 0x5c000200, 0xcdc000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000,
|
||||
0x58140000, 0xc98000d8, 0x6ddc2000, 0xc000491e, 0x41d8e000, 0xcdc000f8, 0xdd9800f8, 0xc1c00022,
|
||||
0xc5d80d70, 0xdd9400f9, 0xc5581c18, 0xc000491c, 0xcd8000f8, 0xdd5400f8, 0xc1c00000, 0x58140006,
|
||||
0xc9c20078, 0xc1800000, 0x58140004, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, 0x84000010,
|
||||
0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81078, 0xcd821078, 0xc0004860, 0xc94000f8, 0xc1820080,
|
||||
0xc1d00002, 0x58146b00, 0xd58000f8, 0x58000002, 0xd58000f9, 0x59540004, 0xb5580018, 0xc0004860,
|
||||
0xc1400000, 0xcd4000f8, 0xdd9800f9, 0x9d000000, 0xdd9400f8, 0xc0001404, 0xcdc10800, 0xc1c00000,
|
||||
0xc1800200, 0x5d980004, 0xdf5d0048, 0x459ca000, 0x8800fff2, 0xdd8000f9, 0x5800000c, 0x00000000,
|
||||
0xc94000f9, 0xc98000f8, 0xc1c00002, 0xc5d43f00, 0xc5d81e00, 0xc0004862, 0xc9c000f8, 0x00000000,
|
||||
0x00000000, 0x581c5600, 0x5dc05800, 0x88000012, 0x5c000200, 0xcd4000f8, 0x58000002, 0x5dc05800,
|
||||
0x88000012, 0x5c000200, 0xcd8000f8, 0xc0004862, 0xc9c000f8, 0x00000000, 0xc15004c0, 0xc5d40060,
|
||||
0xdd9c00f8, 0xc5d41c18, 0xc1c00000, 0xdd8000f9, 0x58000030, 0xc9c00078, 0xdd8000f9, 0x58000002,
|
||||
0xc98000f8, 0x6ddc2000, 0xc000491c, 0x41d8e000, 0xcd4000f9, 0xcdc000f8, 0xdd9400f9, 0xc1c00000,
|
||||
0x58140030, 0xc9c00078, 0xc1800000, 0x58140006, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000,
|
||||
0x84000010, 0xc1c00000, 0x9d000000, 0x58140030, 0xc5d80078, 0xcd800078, 0xc1c00000, 0xdf5c0038,
|
||||
0x5ddc0080, 0x8400ffea, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0xc160fffe,
|
||||
0xc0000a10, 0xc9440060, 0xc1a0fffe, 0x59981e08, 0xc000100c, 0xcd4000f8, 0xc000100e, 0xcd8000f8,
|
||||
0xc0004964, 0xc98000f8, 0x00000000, 0xc170000a, 0x7158a000, 0x6c988000, 0x4588c000, 0x4588c000,
|
||||
0x59980004, 0xc5940270, 0xc0001010, 0xcd4000f8, 0xc0004946, 0xc94000f8, 0x00000000, 0x00000000,
|
||||
0x6d58a000, 0x6d5c4000, 0x459cc000, 0x4594c000, 0xc000494a, 0xc94000f8, 0xc0004948, 0xc9c000f8,
|
||||
0x4194c000, 0xc1400012, 0xc55c1818, 0x9d000000, 0xc59c0268, 0xc0001012, 0xcdc000f8, 0xc1400000,
|
||||
0x58000012, 0xc9410038, 0xc0004950, 0xc9c000f8, 0xc55800f8, 0xc5940838, 0xc5581078, 0xd99400f8,
|
||||
0xc000493c, 0xc94000f8, 0xc0004954, 0xc98000f8, 0x59dc00a8, 0x45d4e000, 0x41d8e000, 0x5d5c0030,
|
||||
0x88000010, 0xc1c00030, 0xc1800000, 0xc5d84028, 0xc1400000, 0xc5d40008, 0x5dd40002, 0x84000072,
|
||||
0x5dd40004, 0x8400009a, 0x5dd40006, 0x840000c2, 0x5dd80026, 0x840000ea, 0xdd5400f8, 0xdd8000f9,
|
||||
0x58000008, 0x40180000, 0xcd4000f8, 0x59980002, 0x8000ffc0, 0xdd5400f8, 0xdd8000f9, 0x58000008,
|
||||
0x40180000, 0xcd4000b8, 0x59980002, 0x8000ff88, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000,
|
||||
0xcd400078, 0x59980002, 0x8000ff50, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd400038,
|
||||
0x59980002, 0x8000ff18, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012,
|
||||
0xc94000f8, 0xc0004954, 0xc9c000f8, 0xc0004950, 0xc9400078, 0xdd8000f9, 0x58000028, 0x5d9c0000,
|
||||
0x84000052, 0x5d9c0002, 0x84000052, 0x5d9c0004, 0x8400006a, 0xc55b0038, 0xc55c08b8, 0xcd800039,
|
||||
0xcdc108b8, 0x80000060, 0xcd4000f8, 0x80000050, 0xc55900b8, 0xc55c1838, 0xcd8000b9, 0xcdc31838,
|
||||
0x80000028, 0xc55a0078, 0xc55c1078, 0xcd800079, 0xcdc21078, 0x9d000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x59540002, 0x6994e018, 0x61c0c008, 0x4194a000, 0x5d940040, 0x88000012, 0xc59400f8,
|
||||
0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000, 0x9d000000, 0x4158a000, 0xcd4000f8, 0x00000000,
|
||||
};
|
||||
|
||||
static unsigned int firmware_binary_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_AMAZON_SE_H
|
||||
439
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9.h
Normal file
439
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9.h
Normal file
@@ -0,0 +1,439 @@
|
||||
#ifndef IFXMIPS_ATM_FW_AR9_H
|
||||
#define IFXMIPS_ATM_FW_AR9_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_ar9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 22 OCT 2007
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 22 OCT 2007 Xu Liang Initiate Version, v00.01
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 16
|
||||
|
||||
|
||||
static unsigned int ar9_fw_bin[] = {
|
||||
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004980, 0xc2000000, 0xda0800f9, 0x80003fe8,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80003fa0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80005178, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80003ea0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc0400000, 0xc0004840, 0xc88400f8, 0x80004640, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc0400002, 0xc0004840, 0xc88400f8, 0x800045c0, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc3c00004, 0xdbc800f9, 0xc10c0002, 0xd90c00f8, 0x8000fee0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc10e0002, 0xd90c00f8, 0xc0004808, 0xc84000f8, 0x800045f0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xc3e1fffe, 0x597dfffe, 0x593dfe14, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xc3c00000, 0xdbc800f9, 0xc1400008, 0xc1900000, 0x71588000,
|
||||
0x14100100, 0xc140000a, 0xc1900002, 0x71588000, 0x14100100, 0xc140000c, 0xc1900004, 0x71588000,
|
||||
0x14100100, 0xc1400004, 0xc1900006, 0x71588000, 0x14100100, 0xc1400006, 0xc1900008, 0x71588000,
|
||||
0x14100100, 0xc140000e, 0xc190000a, 0x71588000, 0x14100100, 0xc1400000, 0xc190000c, 0x71588000,
|
||||
0x14100100, 0xc1400002, 0xc190000e, 0x71588000, 0x14100100, 0xc0400000, 0xc11c0000, 0xc000082c,
|
||||
0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0400002, 0xc11c0000, 0xc000082c, 0xcd05ce00,
|
||||
0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0000824, 0x00000000, 0xcbc000f9, 0xcb8000f9, 0xcb4000f9,
|
||||
0xcb0000f8, 0xc0004878, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f9, 0x5b744000, 0xcf4000f9,
|
||||
0x5b304000, 0xcf0000f8, 0xc0000a10, 0x00000000, 0xcbc000f9, 0xcb8000f8, 0xc0004874, 0x5bfc4000,
|
||||
0xcfc000f9, 0x5bb84000, 0xcf8000f8, 0xc30001fe, 0xc000140a, 0xcf0000f8, 0xc3000000, 0x7f018000,
|
||||
0xc000042e, 0xcf0000f8, 0xc000040e, 0xcf0000f8, 0xc3c1fffe, 0xc000490e, 0xcfc00078, 0xc000492c,
|
||||
0xcfc00078, 0xc0004924, 0xcfc00038, 0xc0004912, 0xcfc00038, 0xc0004966, 0xcfc00038, 0xc0004968,
|
||||
0xcfc00078, 0xc000496a, 0xcfc00078, 0xc3c1fffe, 0xc00049a0, 0xcfc000f8, 0xc3c00000, 0xc2800020,
|
||||
0xc3000000, 0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0x5838000a, 0xcf0000f8,
|
||||
0x5bfc0002, 0xb7e8ffc8, 0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47bdc000, 0x5bb84c80,
|
||||
0xc3400000, 0x58380004, 0xcb420078, 0x00000000, 0x58380008, 0xcf400078, 0x5bfc0002, 0xb7e8ffb0,
|
||||
0x00000000, 0xc3c00000, 0xc2800020, 0xc348001e, 0xc3000000, 0x7f018000, 0x6ff8a000, 0x6fd44000,
|
||||
0x4795c000, 0x47bdc000, 0x5bb87000, 0x58380008, 0xcf408418, 0x5838000a, 0xcf0000f8, 0x5bfc0002,
|
||||
0xb7e8ffb0, 0x00000000, 0x00000000, 0xc3e0a242, 0x5bfc0020, 0xc0004002, 0xcfc000f8, 0x00000000,
|
||||
0xc121fffe, 0x5911fe14, 0x14100000, 0x80000530, 0x00000000, 0x80002130, 0x00000000, 0x8000ffe0,
|
||||
0xc0004958, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0004848, 0xcb8400f8,
|
||||
0xc000495c, 0xcac400f8, 0xc0004844, 0xc88400f8, 0x47ad0000, 0x8400ff82, 0xc000487c, 0xc80400f8,
|
||||
0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc0001624, 0xcb0400f8, 0xa63c007a, 0x00000000,
|
||||
0x00000000, 0xa71eff22, 0x00000000, 0xc0000824, 0xca8400f8, 0x6ca08000, 0x6ca42000, 0x46250000,
|
||||
0x42290000, 0xc35e0002, 0xc6340060, 0xc0001624, 0xcf440078, 0xc2000000, 0xc161fffe, 0x5955fffe,
|
||||
0x14140000, 0x00000000, 0xc0004844, 0xc88400f8, 0xc000082c, 0xca040038, 0x00000000, 0x00000000,
|
||||
0x58880002, 0xb6080018, 0x00000000, 0xc0800000, 0xc0004844, 0xcc840038, 0x5aec0002, 0xc000495c,
|
||||
0xcec400f8, 0x5e6c0006, 0x84000060, 0xc0004848, 0xcb8400f8, 0xc0000838, 0xc2500002, 0xce450800,
|
||||
0x5fb80002, 0xc0004848, 0xcf8400f8, 0x5eec0002, 0xc000495c, 0xcec400f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x8000fd98, 0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000,
|
||||
0xcc4000f8, 0xc0004960, 0xcac400f8, 0x00000000, 0x00000000, 0x5eec0000, 0x8400010a, 0x00000000,
|
||||
0xb6fc0050, 0xc0001600, 0xca0400f8, 0x00000000, 0x00000000, 0xa61e00d2, 0x6fe90000, 0xc0000a28,
|
||||
0xce850800, 0xc2c00000, 0xc2800004, 0xb6e800a0, 0xc0001604, 0xca8400f8, 0xc0004960, 0xcec400f8,
|
||||
0xa69efcc2, 0x00000000, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00002, 0xc0001600, 0xca0400f8,
|
||||
0x00000000, 0x00000000, 0xa61e002a, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00000, 0xc0001604,
|
||||
0xca8400f8, 0xc0004960, 0xcec400f8, 0xa69efc2a, 0xc2400000, 0xc0000a14, 0xca440028, 0x00000000,
|
||||
0x00000000, 0x466d2000, 0xa4400020, 0xc2800000, 0xdfeb0029, 0x80000010, 0xdfea0029, 0xb668fba2,
|
||||
0x00000000, 0xc00048a0, 0xcb0400f8, 0xc0000a10, 0xca8400f8, 0x6f208000, 0x6f242000, 0x46250000,
|
||||
0x42a10000, 0xc2400000, 0xc0000a14, 0xca440028, 0xc35e0002, 0xc6340060, 0xc0001604, 0xcf440078,
|
||||
0x5b300002, 0xb6700018, 0x5aec0002, 0xc3000000, 0xc00048a0, 0xcf0400f8, 0xc0004960, 0xcec400f8,
|
||||
0x8000fad8, 0xc0004918, 0xd28000f8, 0xc2000000, 0xdf600038, 0x5e600080, 0x84000272, 0x00000000,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000480a, 0xca0000f8, 0xc0004912, 0xca4000f8,
|
||||
0xc0004924, 0xca8000f8, 0xc0004966, 0xcac000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000,
|
||||
0x76250000, 0x76290000, 0x762d0000, 0x840001ca, 0xc0004918, 0xca4000f8, 0xc28001fe, 0x76290000,
|
||||
0x5a640002, 0x6a254010, 0x5ee80000, 0x8400001a, 0x6aa54000, 0x80000010, 0xc62800f8, 0x62818008,
|
||||
0xc0004918, 0xcf0000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0004966, 0xca4000f8,
|
||||
0xc2000002, 0x6a310000, 0x7e010000, 0x76612000, 0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14,
|
||||
0x14100000, 0x6f346000, 0x4771a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800078, 0xc2c00000,
|
||||
0x58340000, 0xcac000d8, 0xc2400000, 0x5834000a, 0xca420078, 0x6ea82000, 0x42e9e000, 0x6f2ca000,
|
||||
0x42e56000, 0x5aec2e00, 0xc3990040, 0xc7381c18, 0xc6f80060, 0x99005b78, 0xdb9800f8, 0xdbd800f9,
|
||||
0x00000000, 0xdea000f8, 0x46310000, 0x8400fd80, 0xc0004958, 0xc84000f8, 0x00000000, 0xc3c00002,
|
||||
0x787c2000, 0xcc4000f8, 0xc0004848, 0xcb8400f8, 0xc0004844, 0xc88400f8, 0x5fb80000, 0x8400f7f2,
|
||||
0xc0001a1c, 0xca0000f8, 0xc2400002, 0x6a452000, 0x76250000, 0x8400f7c2, 0xc000487c, 0xc80400f8,
|
||||
0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc42400f8, 0x00000000, 0xa63c17da, 0x00000000,
|
||||
0xc0004878, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000, 0x40100000, 0xca0000f8, 0xc42400f8,
|
||||
0x00000000, 0xc0004934, 0xce0000f8, 0xc2800002, 0xc4681c08, 0xc62821d0, 0xc2600010, 0x5a650060,
|
||||
0xc0004800, 0xcb4000f8, 0xc2200400, 0x5a200020, 0xc7601040, 0xc0001220, 0xce8000f8, 0xc0001200,
|
||||
0xce4000f8, 0xc0001202, 0xce0000f8, 0xc0001240, 0xcb4000f8, 0x00000000, 0x00000000, 0xa754ffe0,
|
||||
0xc2000000, 0xc7600040, 0xa7520042, 0x00000000, 0x00000000, 0x990062f0, 0xc0004822, 0xc94000f8,
|
||||
0xc1800002, 0x80001680, 0x582040a0, 0xc2000000, 0xca000018, 0xc2400000, 0xca414000, 0xc2800000,
|
||||
0xca812000, 0xc2c00000, 0xcac20018, 0xc0004938, 0xce0000f8, 0xc0004920, 0xce4000f8, 0xc0004916,
|
||||
0xce8000f8, 0xc0004922, 0xcec000f8, 0xa6400540, 0x00000000, 0xc0004938, 0xcbc000f8, 0x00000000,
|
||||
0xc3800000, 0x6ff48000, 0x6fd44000, 0x4355a000, 0x5b744a00, 0x58340000, 0xcb802010, 0x00000000,
|
||||
0xc2000000, 0x6fb46000, 0x4779a000, 0x5b744c80, 0x5834000c, 0xca000020, 0xc000491a, 0xcf8000f8,
|
||||
0x5e200000, 0x8400046a, 0xc2000000, 0xdf610048, 0x5e6001e8, 0x8800ffe8, 0xc2000002, 0xc2400466,
|
||||
0xc2a00000, 0x5aa80000, 0xc0001006, 0xce0000f8, 0xc0001008, 0xce4000f8, 0xc000100a, 0xce8000f8,
|
||||
0x990055b8, 0xc1a0fffe, 0xc0000824, 0xc9840060, 0xc0004934, 0xca4000f8, 0xc2000000, 0xc2800002,
|
||||
0x990055f8, 0xda9800f8, 0xc61400f8, 0xc65800f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000,
|
||||
0x990056e0, 0xc000491a, 0xc94000f8, 0x00000000, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000,
|
||||
0xc0004922, 0xca001118, 0xc3c00000, 0xc3800000, 0xc0004930, 0xce023118, 0xc0004932, 0xcbc000d8,
|
||||
0xc2800000, 0xc000491e, 0xcfc000f8, 0xc0004862, 0xca800060, 0xc3a0001a, 0x5bb94000, 0xc6b80060,
|
||||
0xc000491c, 0xcf8000f8, 0x99005950, 0xc000491c, 0xc1400000, 0xc9420048, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xa8e2ffe8, 0xc2000000, 0xc1220002, 0xd90c00f8, 0xdf600038, 0x5e600080, 0x8400fff2,
|
||||
0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000, 0x00000000, 0x99005b78, 0xda1800f8,
|
||||
0xda5800f9, 0x00000000, 0xc2000000, 0xdf610048, 0x5e6001fe, 0x8800ffe8, 0xc0004916, 0xca8000f8,
|
||||
0xc2c00000, 0xdfec0048, 0xc2400000, 0x466d2000, 0x8400004a, 0x5ea80000, 0x8400003a, 0xc2600002,
|
||||
0x990062f0, 0xc000482e, 0xc94000f8, 0xc1800002, 0x80000030, 0xc2600000, 0x990062f0, 0xc000482c,
|
||||
0xc94000f8, 0xc1800002, 0xc2000068, 0xc6240078, 0xc0004930, 0xce400080, 0xc000491a, 0xc98000f8,
|
||||
0xc0004862, 0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x990059d8, 0xd95800f8, 0xd99800f9,
|
||||
0xd9d400f8, 0x99005950, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xdf600038, 0x5e600080,
|
||||
0x8400ffea, 0x00000000, 0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000, 0x00000000,
|
||||
0x99005b78, 0xda1800f8, 0xda5800f9, 0x00000000, 0x800010e8, 0x00000000, 0x990062f0, 0xc000482a,
|
||||
0xc94000f8, 0xc1800002, 0x800010b8, 0xc0004938, 0xcbc000f8, 0x00000000, 0x00000000, 0x6ff88000,
|
||||
0x6fd44000, 0x4395c000, 0x5bb84a00, 0x58380008, 0xca0000f8, 0x00000000, 0x00000000, 0xa6000382,
|
||||
0x00000000, 0xc0004938, 0xcbc000f8, 0xc3000000, 0x00000000, 0x6ff88000, 0x6fd44000, 0x4395c000,
|
||||
0x5bb84a00, 0x58380000, 0xcb002010, 0xc2000000, 0x58380008, 0xca020078, 0x5838000c, 0xcac000f8,
|
||||
0x5838000e, 0xca4000f8, 0xc000491a, 0xcf0000f8, 0xc0004930, 0xcec000f8, 0xc000493c, 0xce0000f8,
|
||||
0xc0004932, 0xce4000f8, 0x5e200000, 0x84000120, 0xc2800000, 0xa6fe00ba, 0x6f206000, 0x46310000,
|
||||
0x5a204c80, 0x5820000c, 0xca800020, 0x00000000, 0x00000000, 0x5ea80000, 0x840001f2, 0x00000000,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x990056e0, 0xc000491a, 0xc94000f8, 0x00000000,
|
||||
0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc0004930, 0xcac000f8, 0xc0004932, 0xca4000f8,
|
||||
0xc7ec1118, 0xc0004930, 0xcec000f8, 0x5838000c, 0xcec000f8, 0x58000002, 0xce4000f8, 0xc0004934,
|
||||
0xca0000f8, 0xc2400002, 0x6e642000, 0x6e642000, 0x76612000, 0x8400002a, 0xc2400002, 0x6e684000,
|
||||
0x58380008, 0xce804200, 0xa6000020, 0x6e682000, 0x58380008, 0xce802100, 0xc2400002, 0x6e642000,
|
||||
0x76612000, 0x840000ea, 0x58380008, 0xca0000f8, 0xc2800000, 0xc2400000, 0xa60200c0, 0xdba800f8,
|
||||
0x6f386000, 0x47b1c000, 0x5bb84c80, 0x58380004, 0xca400078, 0x58380002, 0xca800078, 0x00000000,
|
||||
0xdeb800f8, 0x46a54000, 0x88000060, 0x00000000, 0xc0004824, 0xca0000f8, 0xc2400002, 0x6e640000,
|
||||
0x5a200002, 0xce0000f8, 0x58380008, 0xce400000, 0x80000018, 0x00000000, 0x80000048, 0xc0004934,
|
||||
0xca0000f8, 0x00000000, 0x00000000, 0xa6020c6a, 0x00000000, 0x00000000, 0x80000c98, 0xc2800000,
|
||||
0xc2000200, 0xc240001a, 0xdf690048, 0x46294000, 0x46a54000, 0x8800ffd2, 0xc2000006, 0xc2600982,
|
||||
0x5a643b6e, 0x5838000a, 0xca8000f8, 0xc0001006, 0xce0000f8, 0xc0001008, 0xce4000f8, 0xc000100a,
|
||||
0xce8000f8, 0x990055b8, 0xc1a0fffe, 0xc0000824, 0xc9840060, 0xc2000000, 0xc0004930, 0xca02e008,
|
||||
0x58380026, 0xca4000f8, 0x00000000, 0xc2800000, 0x990055f8, 0xda9800f8, 0xc61400f8, 0xc65800f8,
|
||||
0xc0004934, 0xca0000f8, 0x00000000, 0x00000000, 0xa6020022, 0x00000000, 0x00000000, 0x80000318,
|
||||
0xc0004938, 0xcbc000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000, 0x40100000,
|
||||
0xca0000f8, 0xc42400f8, 0x00000000, 0x58240018, 0xca0000f8, 0x6ff88000, 0x6fd44000, 0x4395c000,
|
||||
0x5bb84a00, 0xc3000000, 0xc3400002, 0xc2c00000, 0xc62c0078, 0xc6270038, 0xc0004940, 0xce400038,
|
||||
0xc6260038, 0xc0004942, 0xce400038, 0xc000493c, 0xca0000f8, 0x5eec0000, 0x8400018a, 0x5a6c0010,
|
||||
0x46254000, 0x88000190, 0x5a600052, 0x46e54000, 0x88000178, 0x58380006, 0xca8000f8, 0xc0004940,
|
||||
0xca0000f8, 0xc2400000, 0xc6a70038, 0x7e412000, 0x76612000, 0xc2000000, 0xc6a10038, 0x46250000,
|
||||
0x84000138, 0xc0004942, 0xca0000f8, 0xc2400000, 0xc6a60038, 0x7e412000, 0x76612000, 0xc2000000,
|
||||
0xc6a00038, 0x58380002, 0xca8000f8, 0x46250000, 0x840000e8, 0xc2400000, 0xc6a60078, 0x466d0000,
|
||||
0x880000da, 0xc2400000, 0xc6a40078, 0x58380008, 0xca8000f8, 0x46e50000, 0x880000ba, 0x00000000,
|
||||
0xa6820018, 0x00000000, 0xc7700b00, 0xa6840098, 0x00000000, 0xc7700a00, 0x80000080, 0xc7700200,
|
||||
0xc000493c, 0xcac000f8, 0x80000060, 0xc7700300, 0xc000493c, 0xcac000f8, 0x80000040, 0xc7700900,
|
||||
0x80000030, 0xc7700800, 0x80000020, 0xc7700700, 0x80000010, 0xc7700500, 0xc0004944, 0xcf0000f8,
|
||||
0xc000493e, 0xcec000f8, 0xc0004938, 0xca4000f8, 0xc000493c, 0xcb8000f8, 0xc000493e, 0xcb4000f8,
|
||||
0xc3000000, 0x6e608000, 0x6e544000, 0x42150000, 0x5a204a00, 0x5aa00008, 0x58200004, 0xcb000078,
|
||||
0xc0004934, 0xca0000f8, 0xc2400000, 0xc0004930, 0xca42e008, 0xc3c00018, 0xa6020098, 0x00000000,
|
||||
0x43656000, 0x47ad0000, 0x88000050, 0x46f96000, 0x6ee04010, 0x5be00004, 0xc2000000, 0xc6e00008,
|
||||
0x5e200000, 0x84000042, 0x5bfc0002, 0x80000030, 0xc3c00004, 0x5a2c0008, 0x47a10000, 0x88000012,
|
||||
0x5fb80008, 0x6fe04000, 0x42390000, 0x47212000, 0x88000068, 0xc2400000, 0xc0004930, 0xca42e008,
|
||||
0xc2060002, 0xc68000f8, 0xce006300, 0x6fe04000, 0x4721c000, 0x5f700010, 0x4765a000, 0xc2000000,
|
||||
0xc6340008, 0xc25a000a, 0xc000491a, 0xca401c18, 0xc2800000, 0xc0004932, 0xca8000d8, 0xc0004862,
|
||||
0xca400060, 0x6fa04010, 0x42290000, 0xc000491e, 0xce0000f8, 0xc7e41048, 0xc000491c, 0xce4000f8,
|
||||
0x6fe04000, 0x43a1c000, 0xc000493c, 0xcf8000f8, 0xc000493e, 0xcf4000f8, 0xc000493a, 0xcfc000f8,
|
||||
0x80000008, 0x00000000, 0x00000000, 0x00000000, 0xc2000000, 0xdce000f8, 0xa622ffd8, 0xc1220002,
|
||||
0xd90c00f8, 0xc0004938, 0xcbc000f8, 0xc0004944, 0xcb4000f8, 0xc0004862, 0xcb0000f8, 0xc0004934,
|
||||
0xca0000f8, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0xa6020268, 0xc2400000, 0x58380008,
|
||||
0xca406000, 0xdfe800f8, 0xc2218e08, 0x5a21baf6, 0x46a14000, 0x84000022, 0xc2080002, 0x7361a000,
|
||||
0x80000058, 0x5e640000, 0x84000022, 0xc20c0002, 0x7361a000, 0x80000030, 0xc2000000, 0xc760e710,
|
||||
0xc7604218, 0x5e200000, 0x84000272, 0xc2200002, 0xc0004930, 0xce021000, 0x990062f0, 0xc0004828,
|
||||
0xc94000f8, 0xc1800002, 0x58380000, 0xca0000f8, 0x00000000, 0x00000000, 0xa6000132, 0xc0004940,
|
||||
0xca8000f8, 0xc0004942, 0xca4000f8, 0xc7600078, 0xc6a01838, 0xc6601038, 0xc000493a, 0xca4000f8,
|
||||
0xc0004934, 0xca8000f8, 0xc0007800, 0x40300000, 0x40240000, 0x5c000004, 0x5ec07a00, 0x88000012,
|
||||
0x5c000200, 0xce0000f8, 0x58000002, 0x5ec07a00, 0x88000012, 0x5c000200, 0xce8000f8, 0xc000493e,
|
||||
0xca0000f8, 0xc2400000, 0x5838000c, 0xce4000f8, 0x990062f0, 0xc0004830, 0xc94000f8, 0xc61800f8,
|
||||
0xc0004930, 0xc6100078, 0xcd000078, 0x800000a8, 0xc2400002, 0x58380008, 0xce400000, 0xc0004944,
|
||||
0xcf4000f8, 0x80000278, 0xc000493c, 0xca4000f8, 0xdfe800f8, 0x5a300018, 0xc0007800, 0x40200000,
|
||||
0xca0000f8, 0x58380008, 0xc6501078, 0xcd021078, 0x5838000a, 0xce8000f8, 0x58380026, 0xce0000f8,
|
||||
0xc0004944, 0xcf4000f8, 0x99005950, 0xc000491c, 0xc1400000, 0xc9420048, 0x80000038, 0x00000000,
|
||||
0x990062f0, 0xc0004826, 0xc94000f8, 0xc1800002, 0x8000fdd8, 0xc2000000, 0xc2400080, 0xdf600038,
|
||||
0xb624ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x99005b78, 0xda5800f8, 0xda9800f9,
|
||||
0x00000000, 0xc0004934, 0xca0000f8, 0x00000000, 0xc2800000, 0xa6020160, 0xc2400004, 0xc2000200,
|
||||
0xdf690048, 0x46294000, 0x46a54000, 0x8800ffda, 0x00000000, 0xc000491a, 0xc98000f8, 0xc0004862,
|
||||
0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x990059d8, 0xd95800f8, 0xd99800f9, 0xd9d400f8,
|
||||
0x99005950, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xc2400080, 0xdf600038, 0xb624ffea,
|
||||
0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x99005b78, 0xda5800f8, 0xda9800f9, 0x00000000,
|
||||
0x58380008, 0xca4000f8, 0xc2000000, 0xce000018, 0xc2a1fffe, 0x5aa9fffe, 0xce021078, 0x5838000a,
|
||||
0xce8000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0000838, 0xc2500002, 0xce450800,
|
||||
0xc0004848, 0xcb8400f8, 0xc2000000, 0xc000082c, 0xca040028, 0x5fb80002, 0xc0004848, 0xcf8400f8,
|
||||
0x58880002, 0xb6080018, 0x00000000, 0xc0800000, 0xc0004844, 0xcc8400f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x8000ded8, 0xc2000000, 0xdf600038, 0x5e200080, 0x8400026a, 0x00000000,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000480c, 0xca0000f8, 0xc0004910, 0xca4000f8,
|
||||
0xc000492c, 0xca8000f8, 0xc0004968, 0xcac000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000,
|
||||
0x76250000, 0x76290000, 0x76e16000, 0x840001c2, 0xc0004926, 0xca4000f8, 0xc201fffe, 0x76e16000,
|
||||
0x5a640002, 0x6ae50010, 0x5f200000, 0x8400001a, 0x6a250000, 0x80000010, 0xc6e000f8, 0x62014008,
|
||||
0xc0004926, 0xce8000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0004968, 0xca4000f8,
|
||||
0xc2000002, 0x6a290000, 0x7e010000, 0x76612000, 0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14,
|
||||
0x14100000, 0x6eb4a000, 0x6e944000, 0x4755a000, 0x4769a000, 0x5b747000, 0x58340002, 0xc2000000,
|
||||
0xca0000d8, 0x5834002e, 0xc2400000, 0xca400078, 0x6eb0a000, 0x6ebc4000, 0x473d8000, 0x47298000,
|
||||
0x5b30302e, 0x5b300004, 0x6e642000, 0x4225e000, 0xc39a8024, 0xc7380060, 0xc6b81c18, 0x99005b78,
|
||||
0xdb9800f8, 0xdbd800f9, 0x00000000, 0xc2000000, 0xdf600038, 0x5e200080, 0x84000352, 0x00000000,
|
||||
0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca0000f8, 0xc00049a0, 0xca8000f8,
|
||||
0xc000492a, 0xca4000f8, 0xc000496a, 0xcb0000f8, 0xc0004956, 0xcac000f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x77218000, 0x77258000, 0x77298000, 0x8400029a, 0xc201fffe, 0x77218000,
|
||||
0x5aec0002, 0x6b2d0010, 0x5ea00000, 0x8400001a, 0x6a2d0000, 0x80000010, 0xc72000f8, 0x62016008,
|
||||
0xc0004956, 0xcec000f8, 0x6ef4a000, 0x6ed44000, 0x4755a000, 0x476da000, 0x5b747000, 0x58340000,
|
||||
0xc9c000f8, 0xc00049a0, 0xca0000f8, 0xc3000000, 0xc5f04018, 0xc2400000, 0xc5e50038, 0x7e412000,
|
||||
0x76250000, 0xce0000f8, 0xc0004980, 0x40300000, 0xcec000f8, 0xc161fffe, 0x5955fffe, 0x14140000,
|
||||
0x00000000, 0xc000496a, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8,
|
||||
0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ef4a000, 0x6ed44000, 0x4755a000, 0x476da000,
|
||||
0x5b747000, 0x5834000e, 0xc2000000, 0xca0000d8, 0x58340008, 0xc2400000, 0xca420078, 0x5834000c,
|
||||
0xc2800000, 0xca832010, 0x6e644010, 0x42250000, 0x4229e000, 0xc39a8008, 0x58340008, 0xcb809018,
|
||||
0x58340008, 0xc2800000, 0xca810010, 0x6ee0a000, 0x6ee44000, 0x46250000, 0x462d0000, 0x5a200008,
|
||||
0x5a203008, 0x42290000, 0xc6380060, 0xc6f81c18, 0x99005b78, 0xdb9800f8, 0xdbd800f9, 0x00000000,
|
||||
0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0001a1c, 0xca0000f8,
|
||||
0xc2400008, 0x6a452000, 0x76250000, 0x84000ec2, 0xc0000a28, 0xc3800000, 0xcb840028, 0xc0000a14,
|
||||
0xc3400000, 0xcb440028, 0xc0004880, 0xcb0400f8, 0xb7b40072, 0x58041802, 0xcac000f8, 0xa7000078,
|
||||
0x00000000, 0x00000000, 0xa6c8d808, 0xc1000000, 0xc6d00018, 0xc0004980, 0x40100000, 0xca8000f8,
|
||||
0x80000070, 0x00000000, 0x00000000, 0x00000000, 0x8000d7b8, 0x00000000, 0xc2800000, 0xc7282018,
|
||||
0xc000490e, 0xca4000f8, 0x6be9e000, 0x00000000, 0x767d2000, 0x8400d770, 0x6ea0a000, 0x6e944000,
|
||||
0x46150000, 0x46290000, 0x5a207000, 0x5820000c, 0xca0000f8, 0xc0004946, 0xce8000f8, 0xa62203a8,
|
||||
0x00000000, 0xc2200060, 0xc0004948, 0xce000008, 0xce021038, 0xc240000a, 0xc000494a, 0xce4000f8,
|
||||
0xc2b60002, 0xc0004964, 0xce837b00, 0x99005e48, 0xc00048a0, 0xc88400f8, 0x00000000, 0xc0004946,
|
||||
0xcbc000f8, 0x00000000, 0x00000000, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000, 0x5bb87000,
|
||||
0x99005c08, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0x99005950, 0xc000491c, 0xc1400000, 0xc9420048,
|
||||
0xc000491c, 0x99005e00, 0xc94000f9, 0xc98000f8, 0x00000000, 0x99005b78, 0xd95800f8, 0xd99800f9,
|
||||
0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005840, 0xdbd800f8, 0xdb9800f9,
|
||||
0xc7d800f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ff8a000, 0x6fd44000, 0x4795c000,
|
||||
0x47bdc000, 0x5bb87000, 0x58380010, 0xca0000f8, 0xc0004874, 0xc80400f8, 0x6c908000, 0x45088000,
|
||||
0x45088000, 0x40100000, 0xca4000f8, 0xc43400f8, 0x00000000, 0xc74000f8, 0xce0000f8, 0xc161fffe,
|
||||
0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000, 0x72692000,
|
||||
0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x990062f0, 0xc0004836, 0xc94000f8,
|
||||
0xc1800002, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0x58380000, 0xc90000f8,
|
||||
0xc00049a0, 0xca0000f8, 0xc2800000, 0xc5290038, 0x72290000, 0xce0000f8, 0xc1220002, 0xd90c00f8,
|
||||
0xc2000000, 0xc0000a14, 0xca040028, 0xc0000a28, 0xc2500002, 0xce450800, 0x58880002, 0xb6080018,
|
||||
0xc00048a0, 0xc0800000, 0xcc8400f8, 0x8000d380, 0xc0004946, 0xcbc000f8, 0xc161fffe, 0x5955fffe,
|
||||
0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000, 0x72692000, 0xce4000f8,
|
||||
0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000,
|
||||
0x5bb87000, 0x58380008, 0xca0000f8, 0x5838000c, 0xca4000f8, 0xc3400000, 0xc6340000, 0xc000494e,
|
||||
0xcf4000f8, 0xc2800000, 0xc62a0078, 0xc3000000, 0xc6308018, 0x6f304000, 0x43298000, 0xc000493c,
|
||||
0xcf0000f8, 0xc2c00000, 0xc66c0078, 0xc0004950, 0xcec000f8, 0xc2800000, 0xc66ae020, 0xc0004954,
|
||||
0xce8000f8, 0x5f740000, 0x840001a0, 0x5e300028, 0x46e12000, 0x8400016a, 0x46e12000, 0x88000132,
|
||||
0x5e300018, 0x46e12000, 0x8800002a, 0x46e12000, 0x84000042, 0x00000000, 0x800000c0, 0x00000000,
|
||||
0x99005f88, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0xc3400002, 0xc000494e, 0xcf4000f8, 0xc161fffe,
|
||||
0x5955fffe, 0x14140000, 0x00000000, 0xc000490e, 0xca4000f8, 0xc2800002, 0x6abd4000, 0x7e814000,
|
||||
0x76692000, 0xce4000f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc2200060, 0xc0004948,
|
||||
0xce021038, 0xc2000000, 0xc000494c, 0xce0000f8, 0x80000080, 0x00000000, 0x99005f88, 0xdbd800f8,
|
||||
0xdb9800f9, 0xc78000f8, 0x99006188, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0xc2200058, 0xc0004948,
|
||||
0xce021038, 0xc2000002, 0xc000494c, 0xce0000f8, 0xc2000006, 0xc0001006, 0xce0000f8, 0x5838000a,
|
||||
0xca4000f8, 0xc2200982, 0x5a203b6e, 0xc0001008, 0xce0000f8, 0xc000100a, 0xce4000f8, 0xc0004954,
|
||||
0xca8000f8, 0xc200000c, 0xc000494a, 0xce0000f8, 0xc0004948, 0xce800008, 0xc2b60000, 0xc0004964,
|
||||
0xce8000f8, 0x99005e48, 0xc00048a0, 0xc88400f8, 0x00000000, 0xc0004946, 0xcbc000f8, 0xc000494c,
|
||||
0xca0000f8, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000, 0x5bb87000, 0x5e200000, 0x840000fa,
|
||||
0x00000000, 0x99005c08, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0x99005950, 0xc000491c, 0xc1400000,
|
||||
0xc9420048, 0xc000491c, 0x99005e00, 0xc94000f9, 0xc98000f8, 0x00000000, 0x99005b78, 0xd95800f8,
|
||||
0xd99800f9, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005840, 0xdbd800f8,
|
||||
0xdb9800f9, 0xc7d800f8, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc000493c, 0xca8000f8,
|
||||
0xc000494e, 0xcac000f8, 0xc3000018, 0xc3400006, 0x5e200000, 0x8400002a, 0xc2800000, 0xc2c00000,
|
||||
0xc300001e, 0xc3400000, 0xc6ac1078, 0xc72c0418, 0xc76c0810, 0x58380010, 0xca8000f8, 0x58380008,
|
||||
0xcec000f8, 0xc6280100, 0xc0004874, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000, 0x40100000,
|
||||
0xcb0000f8, 0xc43400f8, 0x00000000, 0xc74000f8, 0xce8000f8, 0xc0004952, 0xce8000f8, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc000494c, 0xca0000f8, 0xc0004950, 0xcac000f8,
|
||||
0x5e200000, 0x8400006a, 0xdfe800f8, 0x7e814000, 0x5834001a, 0xce8000f8, 0x990062f0, 0xc0004834,
|
||||
0xc94000f8, 0xc1800002, 0x990062f0, 0xc0004838, 0xc94000f8, 0xc6d800f8, 0xc1220002, 0xd90c00f8,
|
||||
0x5e200000, 0x84000040, 0x5838002c, 0xcb0000f8, 0xdfe800f8, 0x00000000, 0x58380014, 0xcf0000f8,
|
||||
0x80000058, 0xc2a1fffe, 0x5aa9fffe, 0x58380000, 0xc90000f8, 0xc00049a0, 0xcb0000f8, 0xc2c00000,
|
||||
0xc52d0038, 0x732d8000, 0xcf0000f8, 0x5838000a, 0xce8000f8, 0xc3000000, 0xc0000a14, 0xcb040028,
|
||||
0xc2d00002, 0xc0000a28, 0xcec50800, 0xc000494e, 0xca8000f8, 0x58880002, 0xb4b00018, 0xc00048a0,
|
||||
0xc0800000, 0xcc8400f8, 0x5ea80000, 0x8400017a, 0x5e200000, 0x84000168, 0xc000493c, 0xca8000f8,
|
||||
0x00000000, 0x00000000, 0x5aa80060, 0xce8000f8, 0x99005f88, 0xdbd800f8, 0xdb9800f9, 0xc78000f8,
|
||||
0x99006188, 0xdbd800f8, 0xdb9800f9, 0xc78000f8, 0x58380000, 0xcac000f8, 0x00000000, 0xc2000000,
|
||||
0xc6e04018, 0xc0004952, 0xcac000f8, 0x58380000, 0xca8000f8, 0xc30c0002, 0xc6300018, 0xa6800098,
|
||||
0x00000000, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0001800, 0xca0000f8,
|
||||
0x00000000, 0x00000000, 0xa60cffea, 0xc6f00500, 0xc6b0c400, 0xcf0000f8, 0x00000000, 0xc121fffe,
|
||||
0x5911fe14, 0x14100000, 0x8000c9c8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000c960,
|
||||
0xdcbc00f9, 0x5ffc0000, 0x84000052, 0xc3800002, 0xdb8800f9, 0x5ffc0004, 0x8400c292, 0xc3800000,
|
||||
0xdb8800f9, 0xc3ce0002, 0xc0000800, 0xcfc0e700, 0xc3e1fffe, 0x597dfffe, 0x593dfe14, 0x94000001,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xcbc000f8, 0xc43800f8, 0x00000000, 0xc000480e, 0xca0000f8, 0xc0004858, 0xcb4400f8, 0x00000000,
|
||||
0x00000000, 0x47610000, 0x880000b0, 0x00000000, 0xa7c00048, 0xc0004854, 0xc1000002, 0xcd0400f8,
|
||||
0xc11c0000, 0xc000082c, 0xcd05ce00, 0x800000d8, 0x00000000, 0xa7d20138, 0x00000000, 0xc7e14040,
|
||||
0xc2400000, 0xc6246028, 0xc200006a, 0x46250000, 0xc6240030, 0xc0000810, 0xce440030, 0x8000ff70,
|
||||
0xc2000000, 0xc0000808, 0xca040010, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x5a200002, 0x5e600010,
|
||||
0x84000010, 0xc2000000, 0xc0000808, 0xce040010, 0xc3400000, 0x80000028, 0xc1200002, 0xc0000818,
|
||||
0xcd061000, 0x5b740002, 0xc0004858, 0xcf4400f8, 0x99005590, 0xc0004848, 0xc94400f8, 0xc1800000,
|
||||
0xc11c0002, 0xc000082c, 0xcd05ce00, 0x80000600, 0x5b740002, 0xc0004858, 0xcf4400f8, 0xc78000f8,
|
||||
0xc13c0002, 0xcd03de00, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c, 0xc9840028, 0x59540002,
|
||||
0xc0004848, 0xcd4400f8, 0x58880002, 0xb4980580, 0x00000000, 0xc0800000, 0x80000568, 0xc000487c,
|
||||
0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xcbc000f8, 0xc42800f8, 0x00000000, 0xa7c00130,
|
||||
0xc000484c, 0xca0400f8, 0xc2400000, 0xc0001aec, 0xca440018, 0x5a200002, 0xc000484c, 0xce0400f8,
|
||||
0xb624008a, 0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c,
|
||||
0xc9840028, 0x59540002, 0xc0004848, 0xcd4400f8, 0x58880002, 0xb4980470, 0x00000000, 0xc0800000,
|
||||
0x80000458, 0xc0004854, 0xc1000004, 0xcd0400f8, 0xc0000820, 0xc2000002, 0xce0400f8, 0xc2000000,
|
||||
0xc000484c, 0xce0400f8, 0xc0004858, 0xce0400f8, 0x8000ff28, 0xc0004854, 0xc1000000, 0xcd0400f8,
|
||||
0xc11c0000, 0xc000082c, 0xcd05ce00, 0x99005590, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc1200000,
|
||||
0xc0000818, 0xcd061000, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc2000000, 0xc000484c, 0xce0400f8,
|
||||
0x80000358, 0xc0001ac0, 0xcb8400f8, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xcbc000f8, 0xc42800f8, 0x00000000, 0x00000000, 0xc68000f8, 0xc13c0000, 0xcd03de00, 0xa780024a,
|
||||
0x00000000, 0x00000000, 0xa7c0020a, 0x00000000, 0xc0001b00, 0xc2060006, 0xce046308, 0xa7e801c2,
|
||||
0x00000000, 0xc0004850, 0xca0400f8, 0xc2400000, 0xc0001aec, 0xca448018, 0x5a200002, 0xc0004850,
|
||||
0xce0400f8, 0xb62400aa, 0x00000000, 0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc0001acc, 0xc2000002,
|
||||
0xce040000, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c, 0xc9840028, 0x59540002, 0xc0004848,
|
||||
0xcd4400f8, 0x58880002, 0xb49801c8, 0x00000000, 0xc0800000, 0x800001b0, 0xc0004854, 0xc1000000,
|
||||
0xcd0400f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x99005590, 0xc0004848, 0xc94400f8, 0xc1800000,
|
||||
0xc2000000, 0xc0000820, 0xce0400f8, 0xc1200000, 0xc0000818, 0xcd061000, 0xc11c0002, 0xc000082c,
|
||||
0xcd05ce00, 0xc0004850, 0xce0400f8, 0xc2000002, 0xc0001acc, 0xce040008, 0x800000e8, 0xc2000002,
|
||||
0xc0004850, 0xce0400f8, 0x8000fe88, 0xc2000000, 0xc0004850, 0xce0400f8, 0xa7e60032, 0x00000000,
|
||||
0xc2000002, 0xc0001b00, 0xce040000, 0x8000fe70, 0x00000000, 0xa7860052, 0x00000000, 0xc68000f8,
|
||||
0xc13c0002, 0xcd03de00, 0xc2020002, 0xc7e2a540, 0xc0001b00, 0xce0400f8, 0x8000fe18, 0xc2040002,
|
||||
0xc0001b00, 0xce044200, 0x8000fdf8, 0xc2c80002, 0x6ac56000, 0xdacc00f8, 0xc0004854, 0xcb4400f8,
|
||||
0xc0004848, 0xcb8400f8, 0xc0000838, 0xc3c00000, 0xcbc40028, 0x5ef40004, 0x84000022, 0xc3000000,
|
||||
0xc0001acc, 0xcf042100, 0x47f98000, 0x8400002a, 0x47f98000, 0x88000030, 0xc1006e8c, 0x8000b6c8,
|
||||
0xc0004840, 0xcc8400f8, 0x8000f6b0, 0xc0001ac0, 0xcac400f8, 0xc0004854, 0xcb4400f8, 0xa6c0fbd2,
|
||||
0x00000000, 0x5ef40000, 0x8400f70a, 0x5ef40002, 0x8400f99a, 0x5ef40004, 0x8400fb9a, 0xc1006ce8,
|
||||
0x8000b640, 0x00000000, 0xc0800000, 0xdf4b0038, 0xc0004900, 0xcb8000f8, 0xc2000000, 0xc000490a,
|
||||
0xa78000d0, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff46000, 0x477da000,
|
||||
0x5b744c80, 0xc2400000, 0x58340004, 0xca400078, 0xc0004900, 0xce000000, 0x5a640002, 0x58340004,
|
||||
0xc6500078, 0xcd000078, 0xc0004914, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8,
|
||||
0xc0000408, 0xce0000f8, 0xa78200d8, 0xc0004908, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002,
|
||||
0xd90c00f8, 0x6ff4a000, 0x6fd44000, 0x4755a000, 0x477da000, 0x5b747000, 0xc2800000, 0x58340006,
|
||||
0xca800078, 0xc2000000, 0xc0004900, 0xce002100, 0x5ea80002, 0x58340006, 0xc6900078, 0xcd000078,
|
||||
0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408, 0xce0000f8, 0xdca800f9, 0x5ea80000, 0x8400b4b0,
|
||||
0x00000000, 0xa4800230, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc00018, 0xc3400000, 0xc2400000,
|
||||
0x6ff86000, 0x47bdc000, 0x5bb84c80, 0x58380008, 0xcb400078, 0x58380006, 0xca400078, 0x5f740002,
|
||||
0x58380008, 0xc7500078, 0xcd000078, 0xc2000000, 0x58380004, 0xca020078, 0xc3000000, 0x5838000c,
|
||||
0xcb000020, 0x5a640002, 0x46610000, 0x84000010, 0xc2400000, 0x58380006, 0xc6500078, 0xcd000078,
|
||||
0xc2000000, 0x5838000a, 0xca020078, 0x5b300002, 0x5838000c, 0xc7100020, 0xcd000020, 0xc2420020,
|
||||
0x5a200004, 0x46252000, 0x84000010, 0xc2000000, 0x5838000a, 0xc6101078, 0xcd021078, 0xc0004966,
|
||||
0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0x5f740000, 0x84000040, 0xc0004912,
|
||||
0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x5f300020, 0x84000040,
|
||||
0xc0004924, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4820070,
|
||||
0xc2400000, 0xc000140e, 0xca408018, 0xc2000002, 0xc0004900, 0xce000000, 0xc000490a, 0xce4000f8,
|
||||
0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004, 0xd90000f9, 0xa4840270, 0x00000000, 0xc3c00000,
|
||||
0xc000140e, 0xcbc10018, 0xc2800000, 0xc2000000, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000,
|
||||
0x5bb87000, 0x5838002e, 0xca800078, 0x58380006, 0xca020078, 0xc3400000, 0x5838002e, 0xcb420078,
|
||||
0x5aa80002, 0x46a10000, 0x84000010, 0xc2800000, 0x5838002e, 0xc6900078, 0xcd000078, 0x5f740002,
|
||||
0x5838002e, 0xc7501078, 0xcd021078, 0xc0004968, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000,
|
||||
0xce4000f8, 0xc000492a, 0xca8000f8, 0x5e740000, 0x84000040, 0xc0004910, 0xca0000f8, 0xc2c00002,
|
||||
0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x6abd4010, 0xa68000ba, 0x00000000, 0x58380032,
|
||||
0xca0000f8, 0x58000002, 0xca4000f8, 0x5838000c, 0x00000000, 0xce0000f9, 0xce4000f8, 0xc000492a,
|
||||
0xca0000f8, 0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0xc000492c, 0xca0000f8, 0xc2c00002,
|
||||
0x6afd6000, 0x722d0000, 0xce0000f8, 0x80000040, 0xc000492c, 0xca0000f8, 0xc2c00002, 0x6afd6000,
|
||||
0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4880148, 0xc2c00000, 0xc000140e, 0xcac20018, 0xc000490e,
|
||||
0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc000496a, 0xca4000f8,
|
||||
0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0x6ef0a000, 0x6ed44000, 0x47158000, 0x472d8000,
|
||||
0x5b307000, 0x58300000, 0xca0000f8, 0x00000000, 0xc2400002, 0x76612000, 0x84000072, 0x58300000,
|
||||
0xca4000f8, 0xc2800000, 0x00000000, 0xc6684018, 0xc24c0002, 0xc6a40018, 0xc624c400, 0x58300010,
|
||||
0xca400500, 0x00000000, 0xc0001800, 0xce4000f8, 0xa4860070, 0xc2400000, 0xc000140e, 0xca418018,
|
||||
0xc2020002, 0xc0004900, 0xce002100, 0xc0004908, 0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078,
|
||||
0xc1000004, 0xd90000f9, 0xc0001408, 0xcc8000f8, 0xc10e0002, 0xd90c00f8, 0x8000edb0, 0xdfbc00f9,
|
||||
0xc000496e, 0x99006298, 0xc94000f8, 0xc7d800f8, 0x00000000, 0xc57000f8, 0x5ef00020, 0x88000148,
|
||||
0x6f346000, 0x4771a000, 0x5b744c80, 0x58340008, 0xc2400000, 0xca400078, 0x00000000, 0xc2000000,
|
||||
0x5a640002, 0xce400078, 0x58340004, 0xca000078, 0x00000000, 0x00000000, 0x5e200002, 0xce000078,
|
||||
0xc0004912, 0xca8000f8, 0xc2400002, 0x6a712000, 0x72a54000, 0xce8000f8, 0x5e200000, 0x84000052,
|
||||
0xc000480a, 0xca0000f8, 0xc0000408, 0xca8000f8, 0x76250000, 0x00000000, 0x72a14000, 0xce8000f8,
|
||||
0x80000038, 0xc0004914, 0xca0000f8, 0x7e412000, 0x00000000, 0x76250000, 0xce0000f8, 0x800000d0,
|
||||
0x6ef4a000, 0x6ed44000, 0x4755a000, 0x476da000, 0x5b747000, 0x5834002e, 0xc2400000, 0xca420078,
|
||||
0x00000000, 0xc2000000, 0x5a640002, 0xc6501078, 0xcd021078, 0x58340006, 0xca000078, 0x00000000,
|
||||
0x00000000, 0x5a200002, 0xce000078, 0xc0004910, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000,
|
||||
0xce4000f8, 0xc2000002, 0x6a310000, 0xc000042a, 0xce0000f8, 0xc1040002, 0xd90c00f8, 0x00000000,
|
||||
0x8000eb20, 0x00000000, 0xc4980928, 0x9d000000, 0xc5580028, 0xc0000838, 0xcd8400f8, 0xc1440200,
|
||||
0xc1c03800, 0xc55c1070, 0xc000100e, 0x9d000000, 0xcd8000f8, 0xc000100c, 0xcdc000f8, 0xc0004862,
|
||||
0xc9c000f8, 0x00000000, 0x00000000, 0xd9d800f9, 0xc0007800, 0x401c0000, 0x5dc07a00, 0x88000012,
|
||||
0x5c000200, 0xcd8000f8, 0xc1f0000a, 0x715ca000, 0xdd9800f8, 0xdd9c00f9, 0x41d8e000, 0xc5d40260,
|
||||
0xc0001010, 0xcd4000f8, 0x6c9c8000, 0x45c8e000, 0x45c8e000, 0x59dc0004, 0xc1601260, 0xc5d40260,
|
||||
0x9d000000, 0xc0001012, 0xcd4000f8, 0x00000000, 0x00000000, 0xd95800f8, 0x6d586000, 0x4594c000,
|
||||
0x59984c80, 0xd99800f9, 0x5818000a, 0xc1800000, 0xc9800078, 0xc0006e00, 0x6d5ca000, 0x401c0000,
|
||||
0x40180000, 0xc94000f8, 0x58000002, 0x00000000, 0xc9c000f8, 0xc0004930, 0xcd4000f8, 0xc0004932,
|
||||
0xcdc000f8, 0x59980004, 0xc1c20020, 0xb59c0018, 0x00000000, 0xc1800000, 0xdd9c00f9, 0x581c000a,
|
||||
0xcd800078, 0x581c000c, 0xc1800000, 0xc9800020, 0xc1c00002, 0xdd9400f8, 0x69d4e000, 0x5d980002,
|
||||
0xcd800020, 0xc0004924, 0xc98000f8, 0x00000000, 0x9d000000, 0x00000000, 0x719cc000, 0xcd8000f8,
|
||||
0xc000492a, 0xc94000f8, 0xc1c00002, 0x69d8e000, 0x7dc0c000, 0x7558a000, 0xcd4000f8, 0xc000492c,
|
||||
0xc94000f8, 0xdd8000f9, 0x58000032, 0x755ca000, 0x84000090, 0xc94000f9, 0xc98000f8, 0xdd8000f9,
|
||||
0x5800000c, 0x00000000, 0xcd4000f9, 0xcd8000f8, 0xc000492c, 0xc94000f8, 0xc000492a, 0xc98000f8,
|
||||
0x715ca000, 0xc000492c, 0xcd4000f8, 0x719cc000, 0xc000492a, 0xcd8000f8, 0x9d000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xc0004862, 0xc98000f8, 0x00000000, 0xc1c00200, 0x4194c000, 0x459ce000,
|
||||
0x88000012, 0xc5d800f8, 0xc0004862, 0xcd8000f8, 0xc0001406, 0xc98000f8, 0xc1c00002, 0x9d000000,
|
||||
0xc5d80a00, 0xc5581048, 0xcd8000f8, 0xc0004930, 0xc98000f8, 0xc0004932, 0xc9c000f8, 0xc140000e,
|
||||
0xc5581c18, 0xdd9400f8, 0xc0007800, 0x40140000, 0x5d407a00, 0x88000012, 0x5c000200, 0xcd8000f8,
|
||||
0x58000002, 0x5d407a00, 0x88000012, 0x5c000200, 0xcdc000f8, 0xdd5400f8, 0xc1c00000, 0x58140006,
|
||||
0xc9c20078, 0xc1800000, 0x58140000, 0xc98000d8, 0x6ddc2000, 0xc000491e, 0x41d8e000, 0xcdc000f8,
|
||||
0xdd9800f8, 0xc1c00022, 0xc5d80d70, 0xdd9400f9, 0xc5581c18, 0xc000491c, 0xcd8000f8, 0xdd5400f8,
|
||||
0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000, 0x58140004, 0xc9820078, 0x00000000, 0x59dc0002,
|
||||
0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81078, 0xcd821078, 0xc0004860,
|
||||
0xc94000f8, 0xc1820080, 0xc1d00002, 0x58147700, 0xd58000f8, 0x58000002, 0xd58000f9, 0x59540004,
|
||||
0xb5580018, 0xc0004860, 0xc1400000, 0xcd4000f8, 0xdd9800f9, 0x9d000000, 0xdd9400f8, 0xc0001404,
|
||||
0xcdc10800, 0xc1c00000, 0xc1800200, 0x5d980004, 0xdf5d0048, 0x459ca000, 0x8800fff2, 0xdd8000f9,
|
||||
0x5800000c, 0x00000000, 0xc94000f9, 0xc98000f8, 0xc1c00002, 0xc5d43f00, 0xc5d81e00, 0xc0004862,
|
||||
0xc9c000f8, 0x00000000, 0x00000000, 0x581c7800, 0x5dc07a00, 0x88000012, 0x5c000200, 0xcd4000f8,
|
||||
0x58000002, 0x5dc07a00, 0x88000012, 0x5c000200, 0xcd8000f8, 0xc0004862, 0xc9c000f8, 0x00000000,
|
||||
0xc15004c0, 0xc5d40060, 0xdd9c00f8, 0xc5d41c18, 0xc1c00000, 0xdd8000f9, 0x58000030, 0xc9c00078,
|
||||
0xdd8000f9, 0x58000002, 0xc98000f8, 0x6ddc2000, 0xc000491c, 0x41d8e000, 0xcd4000f9, 0xcdc000f8,
|
||||
0xdd9400f9, 0xc1c00000, 0x58140030, 0xc9c00078, 0xc1800000, 0x58140006, 0xc9820078, 0x00000000,
|
||||
0x59dc0002, 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140030, 0xc5d80078, 0xcd800078,
|
||||
0xc1c00000, 0xdf5c0038, 0x5ddc0080, 0x8400ffea, 0x00000000, 0x9d000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xc160fffe, 0xc0000a10, 0xc9440060, 0xc1a0fffe, 0x59983008, 0xc000100c, 0xcd4000f8,
|
||||
0xc000100e, 0xcd8000f8, 0xc0004964, 0xc98000f8, 0x00000000, 0xc170000a, 0x7158a000, 0x6c988000,
|
||||
0x4588c000, 0x4588c000, 0x59980004, 0xc5940270, 0xc0001010, 0xcd4000f8, 0xc0004946, 0xc94000f8,
|
||||
0x00000000, 0x00000000, 0x6d58a000, 0x6d5c4000, 0x459cc000, 0x4594c000, 0xc000494a, 0xc94000f8,
|
||||
0xc0004948, 0xc9c000f8, 0x4194c000, 0xc1400012, 0xc55c1818, 0x9d000000, 0xc59c0268, 0xc0001012,
|
||||
0xcdc000f8, 0xc1400000, 0x58000012, 0xc9410038, 0xc0004950, 0xc9c000f8, 0xc55800f8, 0xc5940838,
|
||||
0xc5581078, 0xd99400f8, 0xc000493c, 0xc94000f8, 0xc0004954, 0xc98000f8, 0x59dc00a8, 0x45d4e000,
|
||||
0x41d8e000, 0x5d5c0030, 0x88000010, 0xc1c00030, 0xc1800000, 0xc5d84028, 0xc1400000, 0xc5d40008,
|
||||
0x5dd40002, 0x84000072, 0x5dd40004, 0x8400009a, 0x5dd40006, 0x840000c2, 0x5dd80026, 0x840000ea,
|
||||
0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000f8, 0x59980002, 0x8000ffc0, 0xdd5400f8,
|
||||
0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000b8, 0x59980002, 0x8000ff88, 0xdd5400f8, 0xdd8000f9,
|
||||
0x58000008, 0x40180000, 0xcd400078, 0x59980002, 0x8000ff50, 0xdd5400f8, 0xdd8000f9, 0x58000008,
|
||||
0x40180000, 0xcd400038, 0x59980002, 0x8000ff18, 0x00000000, 0x9d000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x58000012, 0xc94000f8, 0xc0004954, 0xc9c000f8, 0xc0004950, 0xc9400078, 0xdd8000f9,
|
||||
0x58000028, 0x5d9c0000, 0x84000052, 0x5d9c0002, 0x84000052, 0x5d9c0004, 0x8400006a, 0xc55b0038,
|
||||
0xc55c08b8, 0xcd800039, 0xcdc108b8, 0x80000060, 0xcd4000f8, 0x80000050, 0xc55900b8, 0xc55c1838,
|
||||
0xcd8000b9, 0xcdc31838, 0x80000028, 0xc55a0078, 0xc55c1078, 0xcd800079, 0xcdc21078, 0x9d000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6994e018, 0x61c0c008, 0x4194a000, 0x5d940040,
|
||||
0x88000012, 0xc59400f8, 0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000, 0x9d000000, 0x4158a000,
|
||||
0xcd4000f8, 0x00000000,
|
||||
};
|
||||
|
||||
static unsigned int ar9_fw_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_AR9_H
|
||||
611
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9_retx.h
Normal file
611
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9_retx.h
Normal file
@@ -0,0 +1,611 @@
|
||||
#ifndef IFXMIPS_ATM_FW_AR9_H
|
||||
#define IFXMIPS_ATM_FW_AR9_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_ar9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 22 OCT 2007
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 22 OCT 2007 Xu Liang Initiate Version, v00.01
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 15
|
||||
|
||||
|
||||
static unsigned int firmware_binary_code[] = {
|
||||
0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xC2000000, 0xDA0800F9, 0x80006030, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80006008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1001DA6, 0x8D3C0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80005F08, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400000, 0xC0004840, 0xC88400F8, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400002, 0xC0004840, 0xC88400F8, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3C00004, 0xDBC800F9, 0xC10C0002, 0xD90C00F8, 0x8000FEE0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC10E0002, 0xD90C00F8, 0xC0004808, 0xC84000F8, 0xC2001B4C, 0x8E100000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC3E0A252, 0x5BFC001E, 0xC0004002, 0xCFC000F8, 0xC3C00000,
|
||||
0xDBC800F9, 0xC1400008, 0xC1900000, 0x71588000, 0x14100100, 0xC140000A, 0xC1900002, 0x71588000,
|
||||
0x14100100, 0xC140000C, 0xC1900004, 0x71588000, 0x14100100, 0xC1400004, 0xC1900006, 0x71588000,
|
||||
0x14100100, 0xC1400006, 0xC1900008, 0x71588000, 0x14100100, 0xC140000E, 0xC190000A, 0x71588000,
|
||||
0x14100100, 0xC1400000, 0xC190000C, 0x71588000, 0x14100100, 0xC1400002, 0xC190000E, 0x71588000,
|
||||
0x14100100, 0xC0400000, 0xC11C0000, 0xC000082C, 0xCD05CE00, 0xC11C0002, 0xC000082C, 0xCD05CE00,
|
||||
0xC0400002, 0xC11C0000, 0xC000082C, 0xCD05CE00, 0xC0000824, 0x00000000, 0xCBC000F9, 0xCB8000F9,
|
||||
0xCB4000F9, 0xCB0000F8, 0xC0004878, 0x5BFC4000, 0xCFC000F9, 0x5BB84000, 0xCF8000F9, 0x5B744000,
|
||||
0xCF4000F9, 0x5B304000, 0xCF0000F8, 0xC0000A10, 0x00000000, 0xCBC000F9, 0xCB8000F8, 0xC0004874,
|
||||
0x5BFC4000, 0xCFC000F9, 0x5BB84000, 0xCF8000F8, 0xC30001FE, 0xC000140A, 0xCF0000F8, 0xC3000000,
|
||||
0x7F018000, 0xC000042E, 0xCF0000F8, 0xC000040E, 0xCF0000F8, 0xC3C1FFFE, 0xC000490E, 0xCFC00078,
|
||||
0xC000492C, 0xCFC00078, 0xC0004924, 0xCFC00038, 0xC0004912, 0xCFC00038, 0xC0004966, 0xCFC00038,
|
||||
0xC0004968, 0xCFC00078, 0xC000496A, 0xCFC00078, 0xC3C00000, 0xC2800020, 0xC3000000, 0x7F018000,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFC8,
|
||||
0x00000000, 0xC3C00000, 0xC2800010, 0x6FF86000, 0x47BDC000, 0x5BB84C80, 0xC3400000, 0x58380004,
|
||||
0xCB420078, 0x00000000, 0x58380008, 0xCF400078, 0x5BFC0002, 0xB7E8FFB0, 0x00000000, 0xC3C00000,
|
||||
0xC2800020, 0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000,
|
||||
0x5BB87000, 0x58380008, 0xCF408418, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFB0, 0x00000000,
|
||||
0x00000000, 0xC0004816, 0xC3C00000, 0xCBC00078, 0x00000000, 0x00000000, 0xC1000000, 0xD90400F9,
|
||||
0xDBC40078, 0xC1000006, 0xD90400F9, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0xC3C00000,
|
||||
0xDCFC2000, 0x5FFC0002, 0x00000000, 0x98C08D62, 0xC0004730, 0xC94000F8, 0xC0004732, 0xC0001AF2,
|
||||
0xCBC000F8, 0x00000000, 0x00000000, 0xA7C20470, 0xC000474A, 0xCA8000F8, 0x00000000, 0x00000000,
|
||||
0x5D280000, 0x8400FFE0, 0x00000000, 0xC121FFFE, 0x5911FEF4, 0x14100000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC2802000, 0x6EA8E010, 0xC0004200, 0xC2400000, 0x7E410000, 0xC1000000, 0xCE4000F9, 0xCE4000F9,
|
||||
0xCE4000F9, 0xCE4000F9, 0x5EA80002, 0x8400FFD8, 0xC0004300, 0xC2800200, 0x6EA84010, 0xCE4000F9,
|
||||
0xCE0000F9, 0xCE4000F9, 0xCE0000F9, 0xCE4000F9, 0xCE0000F9, 0xCE4000F9, 0xCE0000F9, 0x5EA80002,
|
||||
0x8400FFB8, 0xC0004700, 0xC2800200, 0x6EA8E010, 0xCE4000F9, 0xCE4000F9, 0xCE4000F9, 0xCE4000F9,
|
||||
0x5EA80002, 0x8400FFD8, 0xC0004740, 0xCE4000F8, 0xC0004742, 0xC1000200, 0x5D100002, 0xCD0000F8,
|
||||
0xC0004744, 0xCE4000F8, 0xC0004746, 0xCE4000F8, 0xC0004748, 0xCE4000F8, 0xC000474A, 0xCE4000F8,
|
||||
0xC000474C, 0xC1000002, 0xCD0000F8, 0xC000474E, 0xCE4000F8, 0xC0004750, 0xCE4000F8, 0xC0004752,
|
||||
0xCE4000F8, 0xC0004754, 0xCE4000F8, 0xC0400000, 0xC11C0000, 0xC000082C, 0xCD05CE00, 0xC0000838,
|
||||
0xCE4000F8, 0xC0000818, 0xCE4000F8, 0xC0000820, 0xCE4000F8, 0xC2804840, 0xC240485A, 0x98C086B0,
|
||||
0xC68000F8, 0xC65400F8, 0xC1800000, 0xC11C0002, 0xC000082C, 0xCD05CE00, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x14100000, 0xC0000A10, 0xCB8000F8, 0xC0000A12, 0xCB4000F8, 0xC0000A14, 0xCB0000F8,
|
||||
0xC0000A16, 0xCAC000F8, 0xC0000040, 0xC2800000, 0xCE800000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC2800002,
|
||||
0xCE800000, 0xC0000A10, 0xCF8000F8, 0xC0000A12, 0xCF4000F8, 0xC0000A14, 0xCF0000F8, 0xC0000A16,
|
||||
0xCEC000F8, 0xC1000000, 0xC00048A0, 0xCD0000F8, 0xC00048A2, 0xCD0000F8, 0xC0001AF2, 0xC1000000,
|
||||
0xCD002100, 0x80001038, 0x00000000, 0xC3C00000, 0xDCFC2000, 0x5FFC0002, 0x00000000, 0x98C08D62,
|
||||
0xC0004730, 0xC94000F8, 0xC0004732, 0x800033D8, 0x00000000, 0xC3C00000, 0xDCFC2000, 0x5FFC0002,
|
||||
0x00000000, 0x98C08D62, 0xC0004730, 0xC94000F8, 0xC0004732, 0xC0004810, 0xC90000F8, 0xC000474A,
|
||||
0xC94000F8, 0xA50007E8, 0x00000000, 0x5D140002, 0x840007D2, 0xC1000000, 0xC000484A, 0xC90000F8,
|
||||
0xC0004740, 0xC84000F8, 0x5D100000, 0x84000798, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FEF4,
|
||||
0x14100000, 0xC0004744, 0xC88000F8, 0xC0001AF0, 0xC3000000, 0x58000002, 0xCB010038, 0x6C7C2000,
|
||||
0x5BFC4300, 0x98C08A88, 0xC1400000, 0xC4540020, 0x6C40A010, 0x5D240002, 0x8400021A, 0x00000000,
|
||||
0xC0004742, 0xCA8000F8, 0x00000000, 0x00000000, 0x59280002, 0x6D130000, 0x6D130010, 0x45048000,
|
||||
0x84000692, 0x00000000, 0x98C08870, 0xC45400F8, 0xC69800F8, 0xC241FFFE, 0xC67400F8, 0x5D35FFFE,
|
||||
0x84000652, 0x47448000, 0x84000642, 0xC1000000, 0x6F502000, 0xC0004300, 0x40100000, 0xC1400000,
|
||||
0x58000000, 0xC9410038, 0xC1800000, 0xC0004814, 0xC9820038, 0x4714A000, 0xC10001FE, 0x4150A004,
|
||||
0x45588000, 0x880005CA, 0x4744C000, 0xC1000200, 0x4190C004, 0xC000473E, 0xC90000F8, 0x00000000,
|
||||
0x00000000, 0x41188000, 0xCD0000F8, 0xC000471C, 0xC90000F8, 0x00000000, 0x00000000, 0x41188000,
|
||||
0xCD0000F8, 0x98C087E8, 0xC45400F8, 0x6C58A010, 0xC0004700, 0x58440002, 0x6C470000, 0x6C470010,
|
||||
0x44748000, 0x8400FFC0, 0xC74400F8, 0xC0004740, 0xCC4000F8, 0xC0800000, 0xC0004744, 0xCC8000F8,
|
||||
0x800004D0, 0xC1000000, 0x583C0000, 0xC9000038, 0x00000000, 0x00000000, 0x44908000, 0x88000280,
|
||||
0xC1400000, 0x583C0000, 0xC9410038, 0xC1800000, 0xC0004814, 0xC9800038, 0x4714A000, 0xC10001FE,
|
||||
0x4150A004, 0x45588000, 0x88000442, 0xC3800000, 0x583C0002, 0xCB820078, 0xC1000000, 0x583C0002,
|
||||
0xC9000078, 0x00000000, 0x00000000, 0x47908000, 0x8400024A, 0xC0400002, 0xC0800000, 0xC3C00000,
|
||||
0xC000481A, 0xC80000F8, 0x6F908000, 0x45388000, 0x45388000, 0x4011E000, 0xC000491E, 0xCFC000F8,
|
||||
0xC3400000, 0xC0004878, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCAC000F8,
|
||||
0xC43000F8, 0x00000000, 0xC7340060, 0xC1000002, 0xC5341B00, 0xC100001C, 0xC5341048, 0xC100000C,
|
||||
0xC5340D10, 0xC000491C, 0xCF4000F8, 0xC3000000, 0xDF700038, 0x5D300080, 0x8800FFE8, 0xC000474A,
|
||||
0xC1000002, 0xCD0000F8, 0xC000491C, 0xCB4000F8, 0xC000491E, 0xCBC000F8, 0x99007F18, 0xDB5800F8,
|
||||
0xDBD800F9, 0x00000000, 0xC1400000, 0xC794A030, 0xC1800000, 0xC7980020, 0x58144200, 0xC9C000F8,
|
||||
0xC1210000, 0x69188010, 0x7D008000, 0x75D0E000, 0xCDC000F8, 0x80000228, 0x00000000, 0xC1000000,
|
||||
0x583C0000, 0xC903E000, 0x00000000, 0x00000000, 0x5D100000, 0x84000042, 0xC0004734, 0xC90000F8,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x800000C0, 0xC1400000, 0x583C0000, 0xC9410038,
|
||||
0xC1800000, 0xC0004814, 0xC9820038, 0x4714A000, 0xC10001FE, 0x4150A004, 0x45588000, 0x8800015A,
|
||||
0xC000473E, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0xC000471C, 0xC90000F8,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0xC3800000, 0x583C0002, 0xCB820078, 0x00000000,
|
||||
0x00000000, 0x5D39FFFE, 0x84000062, 0xC1400000, 0xC794A030, 0xC1800000, 0xC7980020, 0x58144200,
|
||||
0xC9C000F8, 0xC1210000, 0x69188010, 0x7D008000, 0x75D0E000, 0xCDC000F8, 0x98C087E8, 0xC45400F8,
|
||||
0x6C58A010, 0xC0004700, 0x58440002, 0x6C470000, 0x6C470010, 0xC0004740, 0xCC4000F8, 0xC0800000,
|
||||
0xC0004744, 0xCC8000F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x8000F288, 0x00000000,
|
||||
0x00000000, 0x98C086F0, 0xC0004748, 0xC98000F8, 0xC2000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC1400000, 0xC7D4A030, 0xC1800000, 0xC7D80020, 0x58144200,
|
||||
0xC9C000F8, 0xC1210000, 0x69188010, 0x7D008000, 0x75D0E000, 0xCDC000F8, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x98C087E8, 0xC7D400F8, 0x6FD8A010, 0xC0004700, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x98C08870, 0xC7D400F8, 0xC79800F8, 0xC241FFFE, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08A88, 0xC1400000, 0xC7D40020, 0x6FC0A010,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08AB8, 0xC1400000, 0xC7D40020, 0x6FC0A010,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08AF0, 0xC7D400F8, 0xC0004740, 0xC9C000F8,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08BE0, 0xC7D400F8, 0xC0004742, 0xC98000F8,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004958, 0xC84000F8, 0x00000000, 0xC3C00002,
|
||||
0x787C2000, 0xCC4000F8, 0xC0004848, 0xCB8400F8, 0xC000495C, 0xCAC400F8, 0xC0004844, 0xC88400F8,
|
||||
0x47AD0000, 0x8400F492, 0xC000487C, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCA0000F8,
|
||||
0xC0001624, 0xCB0400F8, 0xA63C007A, 0x00000000, 0x00000000, 0xA71EF432, 0x00000000, 0xC0000824,
|
||||
0xCA8400F8, 0x6CA08000, 0x6CA42000, 0x46250000, 0x42290000, 0xC35E0002, 0xC6340060, 0xC0001624,
|
||||
0xCF440078, 0xC2000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xC0004844, 0xC88400F8, 0xC000082C, 0xCA040038, 0x00000000, 0x00000000, 0x58880002,
|
||||
0xB6080018, 0x00000000, 0xC0800000, 0xC0004844, 0xCC840038, 0x5AEC0002, 0xC000495C, 0xCEC400F8,
|
||||
0x5E6C0006, 0x84000060, 0xC0004848, 0xCB8400F8, 0xC0000838, 0xC2500002, 0xCE450800, 0x5FB80002,
|
||||
0xC0004848, 0xCF8400F8, 0x5EEC0002, 0xC000495C, 0xCEC400F8, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x14100000, 0x8000F290, 0xC000495A, 0xC84000F8, 0x00000000, 0xC3C00002, 0x787C2000, 0xCC4000F8,
|
||||
0xC0004960, 0xCAC400F8, 0x00000000, 0x00000000, 0x5EEC0000, 0x8400010A, 0x00000000, 0xB6FC0050,
|
||||
0xC0001600, 0xCA0400F8, 0x00000000, 0x00000000, 0xA61E00D2, 0x6FE90000, 0xC0000A28, 0xCE850800,
|
||||
0xC2C00000, 0xC2800004, 0xB6E800A0, 0xC0001604, 0xCA8400F8, 0xC0004960, 0xCEC400F8, 0xA69EFCAA,
|
||||
0x00000000, 0x6FE90000, 0xC0000A28, 0xCE850800, 0xC2C00002, 0xC0001600, 0xCA0400F8, 0x00000000,
|
||||
0x00000000, 0xA61E002A, 0x6FE90000, 0xC0000A28, 0xCE850800, 0xC2C00000, 0xC0001604, 0xCA8400F8,
|
||||
0xC0004960, 0xCEC400F8, 0xA69EFC12, 0xC2400000, 0xC0000A14, 0xCA440028, 0x00000000, 0x00000000,
|
||||
0x466D2000, 0xA4400020, 0xC2800000, 0xDFEB0029, 0x80000010, 0xDFEA0029, 0xB668EC0A, 0x00000000,
|
||||
0xC00048A0, 0xCB0400F8, 0xC0000A10, 0xCA8400F8, 0x6F208000, 0x6F242000, 0x46250000, 0x42A10000,
|
||||
0xC2400000, 0xC0000A14, 0xCA440028, 0xC35E0002, 0xC6340060, 0xC0001604, 0xCF440078, 0x5B300002,
|
||||
0xB6700018, 0x5AEC0002, 0xC3000000, 0xC00048A0, 0xCF0400F8, 0xC0004960, 0xCEC400F8, 0x8000F030,
|
||||
0xC0004918, 0xD28000F8, 0xC2000000, 0xDF600038, 0x5E600080, 0x840002A2, 0x00000000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC000480A, 0xCA0000F8,
|
||||
0xC0004912, 0xCA4000F8, 0xC0004924, 0xCA8000F8, 0xC0004966, 0xCAC000F8, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x14100000, 0x76250000, 0x76290000, 0x762D0000, 0x840001E2, 0xC0004918, 0xCA4000F8,
|
||||
0xC28001FE, 0x76290000, 0x5A640002, 0x6A254010, 0x5EE80000, 0x8400001A, 0x6AA54000, 0x80000010,
|
||||
0xC62800F8, 0x62818008, 0xC0004918, 0xCF0000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC0004966, 0xCA4000F8, 0xC2000002, 0x6A310000, 0x7E010000,
|
||||
0x76612000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x6F346000, 0x4771A000,
|
||||
0x5B744C80, 0xC2800000, 0x58340006, 0xCA800078, 0xC2C00000, 0x58340000, 0xCAC000D8, 0xC2400000,
|
||||
0x5834000A, 0xCA420078, 0x6EA82000, 0x42E9E000, 0x6F2CA000, 0x42E56000, 0x5AEC2E00, 0xC3990040,
|
||||
0xC7381C18, 0xC6F80060, 0x99007F18, 0xDB9800F8, 0xDBD800F9, 0x00000000, 0xDEA000F8, 0x46310000,
|
||||
0x8400FD50, 0xC0004958, 0xC84000F8, 0x00000000, 0xC1000002, 0x78502000, 0xCC4000F8, 0xC0004848,
|
||||
0xCBC400F8, 0xC0004844, 0xC88400F8, 0x5FFC0000, 0x8400ECBA, 0xC0004740, 0xCB0000F8, 0xC0004744,
|
||||
0xCAC000F8, 0x6F282000, 0x5AA84300, 0xC000487C, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xCA4000F8, 0xC40000F8, 0x00000000, 0xC0004878, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000,
|
||||
0x40100000, 0xC90000F8, 0xC43400F8, 0x00000000, 0x5C440000, 0x840000A2, 0x00000000, 0xC00047D2,
|
||||
0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x58340002, 0xC9000078, 0x00000000,
|
||||
0x00000000, 0x58280002, 0x6D120000, 0xCD021078, 0x5AEC0002, 0xC0004744, 0xCEC000F8, 0x80000630,
|
||||
0x00000000, 0xC00047C0, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0xA67C0048,
|
||||
0xC00047C2, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x80001E18, 0x00000000,
|
||||
0xA6600042, 0xC00047C4, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x80000570,
|
||||
0xC00047C6, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0xC3C00000, 0xC67D0038,
|
||||
0xC3800000, 0xC6780038, 0x47F08000, 0x840000A8, 0x47AC8000, 0x84000098, 0xC1000000, 0xC0004814,
|
||||
0xC9000038, 0x00000000, 0x00000000, 0x5D100000, 0x840000F0, 0x5AEC0002, 0xC0004744, 0xCEC000F8,
|
||||
0xC00047CA, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x80000478, 0x00000000,
|
||||
0x98C08AF0, 0xC7D400F8, 0xC0004740, 0xC9C000F8, 0x5D240000, 0x8400006A, 0x00000000, 0x98C087E8,
|
||||
0xC7D400F8, 0x6FD8A010, 0xC0004700, 0xC00047C8, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD0000F8, 0x80001C40, 0xC00047CC, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0x6FE82000, 0x5AA84300, 0x5D380000, 0x840000A0, 0x00000000, 0x98C086F0, 0xC0004748, 0xC98000F8,
|
||||
0xC2000000, 0x58280002, 0x6E520000, 0xCD021078, 0x58280002, 0xCE400078, 0x5D25FFFE, 0x84000040,
|
||||
0xC00047D0, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x800002D0, 0xC3000000,
|
||||
0x58280002, 0xCB000078, 0x00000000, 0x00000000, 0x5D31FFFE, 0x84000048, 0xC00047D0, 0xC90000F8,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x80000260, 0x00000000, 0x98C086F0, 0xC0004748,
|
||||
0xC98000F8, 0xC2000000, 0x58340002, 0xC6500078, 0xC7D01038, 0xC7901838, 0xCD0000F8, 0x58280002,
|
||||
0xCE400078, 0xC3C00200, 0x5FFC001C, 0xC3800000, 0xDF790048, 0x00000000, 0x00000000, 0x47F88000,
|
||||
0x8800FFDA, 0xC0004862, 0xCBC000F8, 0xC0000000, 0xC76C00F8, 0x5BBC7800, 0xC280001C, 0xCA6C00F9,
|
||||
0x00000000, 0x00000000, 0xCE7800F9, 0xC1007A00, 0x45388000, 0xC1007800, 0xC53800FE, 0x5EA80002,
|
||||
0x8400FFB8, 0xC3800000, 0xC000481A, 0xC80000F8, 0x6F108000, 0x45308000, 0x45308000, 0x4011C000,
|
||||
0xC000491E, 0xCF8000F8, 0xC2C00000, 0xC7EC0060, 0xC100001C, 0xC52C1048, 0xC100000A, 0xC52C0D10,
|
||||
0xC000491C, 0xCEC000F8, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0xC2800000, 0xDF680038,
|
||||
0x5D280080, 0x8800FFE8, 0xC000491C, 0xCAC000F8, 0xC000491E, 0xCB8000F8, 0x99007F18, 0xDAD800F8,
|
||||
0xDB9800F9, 0x00000000, 0xC00047CE, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0x00000000, 0x80001880, 0x00000000, 0x00000000, 0x00000000, 0xC0004878, 0xC80400F8, 0x6C908000,
|
||||
0x45088000, 0x45088000, 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0xC0004934, 0xCE0000F8,
|
||||
0xC2800002, 0xC4681C08, 0xC62821D0, 0xC6281E00, 0xC2600010, 0x5A650060, 0xC0004800, 0xCB4000F8,
|
||||
0xC2200400, 0x5A200020, 0xC7601040, 0xC0001220, 0xCE8000F8, 0xC0001200, 0xCE4000F8, 0xC0001202,
|
||||
0xCE0000F8, 0xC0001240, 0xCB4000F8, 0x00000000, 0x00000000, 0xA754FFE0, 0xC2000000, 0xC7600040,
|
||||
0xA7520042, 0x00000000, 0x00000000, 0x99008690, 0xC0004822, 0xC94000F8, 0xC1800002, 0x80001710,
|
||||
0x582040A0, 0xC2000000, 0xCA000018, 0xC2400000, 0xCA414000, 0xC2800000, 0xCA812000, 0xC2C00000,
|
||||
0xCAC20018, 0xC0004938, 0xCE0000F8, 0xC0004920, 0xCE4000F8, 0xC0004916, 0xCE8000F8, 0xC0004922,
|
||||
0xCEC000F8, 0xA6400558, 0x00000000, 0xC0004938, 0xCBC000F8, 0x00000000, 0xC3800000, 0x6FF48000,
|
||||
0x6FD44000, 0x4355A000, 0x5B744A00, 0x58340000, 0xCB802010, 0x00000000, 0xC2000000, 0x6FB46000,
|
||||
0x4779A000, 0x5B744C80, 0x5834000C, 0xCA000020, 0xC000491A, 0xCF8000F8, 0x5E200000, 0x84000482,
|
||||
0xC2000000, 0xDF610048, 0x5E6001E8, 0x8800FFE8, 0xC2000002, 0xC2400466, 0xC2A00000, 0x5AA80000,
|
||||
0xC0001006, 0xCE0000F8, 0xC0001008, 0xCE4000F8, 0xC000100A, 0xCE8000F8, 0x99007958, 0xC1A0FFFE,
|
||||
0xC0000824, 0xC9840060, 0xC0004934, 0xCA4000F8, 0xC2000000, 0xC2800002, 0x99007998, 0xDA9800F8,
|
||||
0xC61400F8, 0xC65800F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x99007A80, 0xC000491A, 0xC94000F8, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x14100000, 0xC0004922, 0xCA001118, 0xC3C00000, 0xC3800000, 0xC0004930, 0xCE023118, 0xC0004932,
|
||||
0xCBC000D8, 0xC2800000, 0xC000491E, 0xCFC000F8, 0xC0004862, 0xCA800060, 0xC3A0001A, 0x5BB94000,
|
||||
0xC6B80060, 0xC000491C, 0xCF8000F8, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xA8E2FFE8, 0xC2000000, 0xC1220002, 0xD90C00F8, 0xDF600038, 0x5E600080,
|
||||
0x8400FFF2, 0xC000491C, 0xCA0000F8, 0xC000491E, 0xCA4000F8, 0x00000000, 0x00000000, 0x99007F18,
|
||||
0xDA1800F8, 0xDA5800F9, 0x00000000, 0xC2000000, 0xDF610048, 0x5E6001FE, 0x8800FFE8, 0xC0004916,
|
||||
0xCA8000F8, 0xC2C00000, 0xDFEC0048, 0xC2400000, 0x466D2000, 0x8400004A, 0x5EA80000, 0x8400003A,
|
||||
0xC2600002, 0x99008690, 0xC000482E, 0xC94000F8, 0xC1800002, 0x80000030, 0xC2600000, 0x99008690,
|
||||
0xC000482C, 0xC94000F8, 0xC1800002, 0xC2000068, 0xC6240078, 0xC0004930, 0xCE400080, 0xC000491A,
|
||||
0xC98000F8, 0xC0004862, 0xC94000F8, 0x6D9C6000, 0x45D8E000, 0x59DC4C80, 0x99007D78, 0xD95800F8,
|
||||
0xD99800F9, 0xD9D400F8, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0xC2000000, 0xDF600038,
|
||||
0x5E600080, 0x8400FFEA, 0x00000000, 0xC000491C, 0xCA0000F8, 0xC000491E, 0xCA4000F8, 0x00000000,
|
||||
0x00000000, 0x99007F18, 0xDA1800F8, 0xDA5800F9, 0x00000000, 0x80001160, 0x00000000, 0x99008690,
|
||||
0xC000482A, 0xC94000F8, 0xC1800002, 0x80001130, 0xC0004938, 0xCBC000F8, 0x00000000, 0x00000000,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x58380008, 0xCA0000F8, 0x00000000, 0x00000000,
|
||||
0xA600039A, 0x00000000, 0xC0004938, 0xCBC000F8, 0xC3000000, 0x00000000, 0x6FF88000, 0x6FD44000,
|
||||
0x4395C000, 0x5BB84A00, 0x58380000, 0xCB002010, 0xC2000000, 0x58380008, 0xCA020078, 0x5838000C,
|
||||
0xCAC000F8, 0x5838000E, 0xCA4000F8, 0xC000491A, 0xCF0000F8, 0xC0004930, 0xCEC000F8, 0xC000493C,
|
||||
0xCE0000F8, 0xC0004932, 0xCE4000F8, 0x5E200000, 0x84000138, 0xC2800000, 0xA6FE00D2, 0x6F206000,
|
||||
0x46310000, 0x5A204C80, 0x5820000C, 0xCA800020, 0x00000000, 0x00000000, 0x5EA80000, 0x8400020A,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x99007A80, 0xC000491A, 0xC94000F8, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000,
|
||||
0xC0004930, 0xCAC000F8, 0xC0004932, 0xCA4000F8, 0xC7EC1118, 0xC0004930, 0xCEC000F8, 0x5838000C,
|
||||
0xCEC000F8, 0x58000002, 0xCE4000F8, 0xC0004934, 0xCA0000F8, 0xC2400002, 0x6E642000, 0x6E642000,
|
||||
0x76612000, 0x8400002A, 0xC2400002, 0x6E684000, 0x58380008, 0xCE804200, 0xA6000020, 0x6E682000,
|
||||
0x58380008, 0xCE802100, 0xC2400002, 0x6E642000, 0x76612000, 0x840000EA, 0x58380008, 0xCA0000F8,
|
||||
0xC2800000, 0xC2400000, 0xA60200C0, 0xDBA800F8, 0x6F386000, 0x47B1C000, 0x5BB84C80, 0x58380004,
|
||||
0xCA400078, 0x58380002, 0xCA800078, 0x00000000, 0xDEB800F8, 0x46A54000, 0x88000060, 0x00000000,
|
||||
0xC0004824, 0xCA0000F8, 0xC2400002, 0x6E640000, 0x5A200002, 0xCE0000F8, 0x58380008, 0xCE400000,
|
||||
0x80000018, 0x00000000, 0x80000048, 0xC0004934, 0xCA0000F8, 0x00000000, 0x00000000, 0xA6020CCA,
|
||||
0x00000000, 0x00000000, 0x80000CF8, 0xC2800000, 0xC2000200, 0xC240001A, 0xDF690048, 0x46294000,
|
||||
0x46A54000, 0x8800FFD2, 0xC2000006, 0xC2600982, 0x5A643B6E, 0x5838000A, 0xCA8000F8, 0xC0001006,
|
||||
0xCE0000F8, 0xC0001008, 0xCE4000F8, 0xC000100A, 0xCE8000F8, 0x99007958, 0xC1A0FFFE, 0xC0000824,
|
||||
0xC9840060, 0xC2000000, 0xC0004930, 0xCA02E008, 0x58380026, 0xCA4000F8, 0x00000000, 0xC2800000,
|
||||
0x99007998, 0xDA9800F8, 0xC61400F8, 0xC65800F8, 0xC0004934, 0xCA0000F8, 0x00000000, 0x00000000,
|
||||
0xA6020022, 0x00000000, 0x00000000, 0x80000318, 0xC0004938, 0xCBC000F8, 0xC0004878, 0xC80400F8,
|
||||
0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0x58240018,
|
||||
0xCA0000F8, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0xC3000000, 0xC3400002, 0xC2C00000,
|
||||
0xC62C0078, 0xC6270038, 0xC0004940, 0xCE400038, 0xC6260038, 0xC0004942, 0xCE400038, 0xC000493C,
|
||||
0xCA0000F8, 0x5EEC0000, 0x8400018A, 0x5A6C0010, 0x46254000, 0x88000190, 0x5A600052, 0x46E54000,
|
||||
0x88000178, 0x58380006, 0xCA8000F8, 0xC0004940, 0xCA0000F8, 0xC2400000, 0xC6A70038, 0x7E412000,
|
||||
0x76612000, 0xC2000000, 0xC6A10038, 0x46250000, 0x84000138, 0xC0004942, 0xCA0000F8, 0xC2400000,
|
||||
0xC6A60038, 0x7E412000, 0x76612000, 0xC2000000, 0xC6A00038, 0x58380002, 0xCA8000F8, 0x46250000,
|
||||
0x840000E8, 0xC2400000, 0xC6A60078, 0x466D0000, 0x880000DA, 0xC2400000, 0xC6A40078, 0x58380008,
|
||||
0xCA8000F8, 0x46E50000, 0x880000BA, 0x00000000, 0xA6820018, 0x00000000, 0xC7700B00, 0xA6840098,
|
||||
0x00000000, 0xC7700A00, 0x80000080, 0xC7700200, 0xC000493C, 0xCAC000F8, 0x80000060, 0xC7700300,
|
||||
0xC000493C, 0xCAC000F8, 0x80000040, 0xC7700900, 0x80000030, 0xC7700800, 0x80000020, 0xC7700700,
|
||||
0x80000010, 0xC7700500, 0xC0004944, 0xCF0000F8, 0xC000493E, 0xCEC000F8, 0xC0004938, 0xCA4000F8,
|
||||
0xC000493C, 0xCB8000F8, 0xC000493E, 0xCB4000F8, 0xC3000000, 0x6E608000, 0x6E544000, 0x42150000,
|
||||
0x5A204A00, 0x5AA00008, 0x58200004, 0xCB000078, 0xC0004934, 0xCA0000F8, 0xC2400000, 0xC0004930,
|
||||
0xCA42E008, 0xC3C00018, 0xA6020098, 0x00000000, 0x43656000, 0x47AD0000, 0x88000050, 0x46F96000,
|
||||
0x6EE04010, 0x5BE00004, 0xC2000000, 0xC6E00008, 0x5E200000, 0x84000042, 0x5BFC0002, 0x80000030,
|
||||
0xC3C00004, 0x5A2C0008, 0x47A10000, 0x88000012, 0x5FB80008, 0x6FE04000, 0x42390000, 0x47212000,
|
||||
0x88000068, 0xC2400000, 0xC0004930, 0xCA42E008, 0xC2060002, 0xC68000F8, 0xCE006300, 0x6FE04000,
|
||||
0x4721C000, 0x5F700010, 0x4765A000, 0xC2000000, 0xC6340008, 0xC25A000A, 0xC000491A, 0xCA401C18,
|
||||
0xC2800000, 0xC0004932, 0xCA8000D8, 0xC0004862, 0xCA400060, 0x6FA04010, 0x42290000, 0xC000491E,
|
||||
0xCE0000F8, 0xC7E41048, 0xC000491C, 0xCE4000F8, 0x6FE04000, 0x43A1C000, 0xC000493C, 0xCF8000F8,
|
||||
0xC000493E, 0xCF4000F8, 0xC000493A, 0xCFC000F8, 0x80000008, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC2000000, 0xDCE000F8, 0xA622FFD8, 0xC1220002, 0xD90C00F8, 0xC0004938, 0xCBC000F8, 0xC0004944,
|
||||
0xCB4000F8, 0xC0004862, 0xCB0000F8, 0xC0004934, 0xCA0000F8, 0x6FF88000, 0x6FD44000, 0x4395C000,
|
||||
0x5BB84A00, 0xA6020298, 0xC2400000, 0x58380008, 0xCA406000, 0xDFE800F8, 0xC2218E08, 0x5A21BAF6,
|
||||
0x46A14000, 0x84000022, 0xC2080002, 0x7361A000, 0x80000058, 0x5E640000, 0x84000022, 0xC20C0002,
|
||||
0x7361A000, 0x80000030, 0xC2000000, 0xC760E710, 0xC7604218, 0x5E200000, 0x840002A2, 0xC2200002,
|
||||
0xC0004930, 0xCE021000, 0x99008690, 0xC0004828, 0xC94000F8, 0xC1800002, 0xC0004780, 0xC93C00F8,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD3C00F8, 0x58380000, 0xCA0000F8, 0x00000000, 0x00000000,
|
||||
0xA6000132, 0xC0004940, 0xCA8000F8, 0xC0004942, 0xCA4000F8, 0xC7600078, 0xC6A01838, 0xC6601038,
|
||||
0xC000493A, 0xCA4000F8, 0xC0004934, 0xCA8000F8, 0xC0007800, 0x40300000, 0x40240000, 0x5C000004,
|
||||
0x5EC07A00, 0x88000012, 0x5C000200, 0xCE0000F8, 0x58000002, 0x5EC07A00, 0x88000012, 0x5C000200,
|
||||
0xCE8000F8, 0xC000493E, 0xCA0000F8, 0xC2400000, 0x5838000C, 0xCE4000F8, 0x99008690, 0xC0004830,
|
||||
0xC94000F8, 0xC61800F8, 0xC0004930, 0xC6100078, 0xCD000078, 0x800000A8, 0xC2400002, 0x58380008,
|
||||
0xCE400000, 0xC0004944, 0xCF4000F8, 0x800002A8, 0xC000493C, 0xCA4000F8, 0xDFE800F8, 0x5A300018,
|
||||
0xC0007800, 0x40200000, 0xCA0000F8, 0x58380008, 0xC6501078, 0xCD021078, 0x5838000A, 0xCE8000F8,
|
||||
0x58380026, 0xCE0000F8, 0xC0004944, 0xCF4000F8, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048,
|
||||
0x80000068, 0x00000000, 0x99008690, 0xC0004826, 0xC94000F8, 0xC1800002, 0xC0004760, 0xC93C00F8,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD3C00F8, 0x8000FDA8, 0xC2000000, 0xC2400080, 0xDF600038,
|
||||
0xB624FFEA, 0xC000491C, 0xCA4000F8, 0xC000491E, 0xCA8000F8, 0x99007F18, 0xDA5800F8, 0xDA9800F9,
|
||||
0x00000000, 0xC0004934, 0xCA0000F8, 0x00000000, 0xC2800000, 0xA6020160, 0xC2400004, 0xC2000200,
|
||||
0xDF690048, 0x46294000, 0x46A54000, 0x8800FFDA, 0x00000000, 0xC000491A, 0xC98000F8, 0xC0004862,
|
||||
0xC94000F8, 0x6D9C6000, 0x45D8E000, 0x59DC4C80, 0x99007D78, 0xD95800F8, 0xD99800F9, 0xD9D400F8,
|
||||
0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0xC2000000, 0xC2400080, 0xDF600038, 0xB624FFEA,
|
||||
0xC000491C, 0xCA4000F8, 0xC000491E, 0xCA8000F8, 0x99007F18, 0xDA5800F8, 0xDA9800F9, 0x00000000,
|
||||
0x58380008, 0xCA4000F8, 0xC2000000, 0xCE000018, 0xC2A1FFFE, 0x5AA9FFFE, 0xCE021078, 0x5838000A,
|
||||
0xCE8000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0000838, 0xC2500002, 0xCE450800, 0xC0004848, 0xCBC400F8, 0xC3800000, 0xC000082C, 0xCB840028,
|
||||
0x5FFC0002, 0xC0004848, 0xCFC400F8, 0x58880002, 0x47888000, 0xC1000000, 0xC50800FE, 0xC0004844,
|
||||
0xCC8400F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x8000CBF0, 0xC2000000, 0xDF600038,
|
||||
0x5E200080, 0x8400029A, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000480C, 0xCA0000F8, 0xC0004910, 0xCA4000F8, 0xC000492C, 0xCA8000F8,
|
||||
0xC0004968, 0xCAC000F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x76250000, 0x76290000,
|
||||
0x76E16000, 0x840001DA, 0xC0004926, 0xCA4000F8, 0xC201FFFE, 0x76E16000, 0x5A640002, 0x6AE50010,
|
||||
0x5F200000, 0x8400001A, 0x6A250000, 0x80000010, 0xC6E000F8, 0x62014008, 0xC0004926, 0xCE8000F8,
|
||||
0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004968,
|
||||
0xCA4000F8, 0xC2000002, 0x6A290000, 0x7E010000, 0x76612000, 0xCE4000F8, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x14100000, 0x6EB4A000, 0x6E944000, 0x4755A000, 0x4769A000, 0x5B747000, 0x58340002,
|
||||
0xC2000000, 0xCA0000D8, 0x5834002E, 0xC2400000, 0xCA400078, 0x6EB0A000, 0x6EBC4000, 0x473D8000,
|
||||
0x47298000, 0x5B30302E, 0x5B300004, 0x6E642000, 0x4225E000, 0xC39A8024, 0xC7380060, 0xC6B81C18,
|
||||
0x99007F18, 0xDB9800F8, 0xDBD800F9, 0x00000000, 0xC2000000, 0xDF600038, 0x5E200080, 0x840002D2,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000490E, 0xCA0000F8, 0xC000492A, 0xCA4000F8, 0xC000496A, 0xCB0000F8, 0xC0004956, 0xCAC000F8,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x77218000, 0x77258000, 0x8400021A, 0xC201FFFE,
|
||||
0x77218000, 0x5AEC0002, 0x6B2D0010, 0x5EA00000, 0x8400001A, 0x6A2D0000, 0x80000010, 0xC72000F8,
|
||||
0x62016008, 0xC0004956, 0xCEC000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000496A, 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76612000,
|
||||
0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x6EF4A000, 0x6ED44000, 0x4755A000,
|
||||
0x476DA000, 0x5B747000, 0x5834000E, 0xC2000000, 0xCA0000D8, 0x58340008, 0xC2400000, 0xCA420078,
|
||||
0x5834000C, 0xC2800000, 0xCA832010, 0x6E644010, 0x42250000, 0x4229E000, 0xC39A8008, 0x58340008,
|
||||
0xCB809018, 0x58340008, 0xC2800000, 0xCA810010, 0x6EE0A000, 0x6EE44000, 0x46250000, 0x462D0000,
|
||||
0x5A200008, 0x5A203008, 0x42290000, 0xC6380060, 0xC6F81C18, 0x99007F18, 0xDB9800F8, 0xDBD800F9,
|
||||
0x00000000, 0xC000495A, 0xC84000F8, 0x00000000, 0xC3C00002, 0x787C2000, 0xCC4000F8, 0xC0001A1C,
|
||||
0xCA0000F8, 0xC2400008, 0x6A452000, 0x76250000, 0x84000E9A, 0xC0000A28, 0xC3800000, 0xCB840028,
|
||||
0xC0000A14, 0xC3400000, 0xCB440028, 0xC0004880, 0xCB0400F8, 0x47B48000, 0x88000E48, 0x58041802,
|
||||
0xCAC000F8, 0xA7000060, 0x00000000, 0x00000000, 0xA6C8C5C8, 0xC2800000, 0xC6E80018, 0x80000070,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x8000C590, 0x00000000, 0xC2800000, 0xC7282018, 0xC000490E,
|
||||
0xCA4000F8, 0x6BE9E000, 0x00000000, 0x767D2000, 0x8400C548, 0x6EA0A000, 0x6E944000, 0x46150000,
|
||||
0x46290000, 0x5A207000, 0x5820000C, 0xCA0000F8, 0xC0004946, 0xCE8000F8, 0xA6220398, 0x00000000,
|
||||
0xC2200060, 0xC0004948, 0xCE000008, 0xCE021038, 0xC240000A, 0xC000494A, 0xCE4000F8, 0xC2B60002,
|
||||
0xC0004964, 0xCE837B00, 0x990081E8, 0xC00048A0, 0xC88400F8, 0x00000000, 0xC0004946, 0xCBC000F8,
|
||||
0x00000000, 0x00000000, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87000, 0x99007FA8,
|
||||
0xDBD800F8, 0xDB9800F9, 0x00000000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0xC000491C,
|
||||
0x990081A0, 0xC94000F9, 0xC98000F8, 0x00000000, 0x99007F18, 0xD95800F8, 0xD99800F9, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99007BE0,
|
||||
0xDBD800F8, 0xDB9800F9, 0xC7D800F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x6FF8A000,
|
||||
0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87000, 0x58380010, 0xCA0000F8, 0xC0004874, 0xC80400F8,
|
||||
0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCA4000F8, 0xC43400F8, 0x00000000, 0xC74000F8,
|
||||
0xCE0000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000490E, 0xCA4000F8, 0xC2800002, 0x6ABD4000, 0x72692000, 0xCE4000F8, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x14100000, 0x99008690, 0xC0004836, 0xC94000F8, 0xC1800002, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xA8E2FFE8, 0x00000000, 0xC1220002, 0xD90C00F8, 0xC2000000, 0xC0000A14, 0xCA040028,
|
||||
0xC0000A28, 0xC2500002, 0xCE450800, 0x58880002, 0xB6080018, 0xC00048A0, 0xC0800000, 0xCC8400F8,
|
||||
0x8000C168, 0xC0004946, 0xCBC000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000490E, 0xCA4000F8, 0xC2800002, 0x6ABD4000, 0x72692000, 0xCE4000F8,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000,
|
||||
0x5BB87000, 0x58380008, 0xCA0000F8, 0x5838000C, 0xCA4000F8, 0xC3400000, 0xC6340000, 0xC000494E,
|
||||
0xCF4000F8, 0xC2800000, 0xC62A0078, 0xC3000000, 0xC6308018, 0x6F304000, 0x43298000, 0xC000493C,
|
||||
0xCF0000F8, 0xC2C00000, 0xC66C0078, 0xC0004950, 0xCEC000F8, 0xC2800000, 0xC66AE020, 0xC0004954,
|
||||
0xCE8000F8, 0x5F740000, 0x840001B8, 0x5E300028, 0x46E12000, 0x84000182, 0x46E12000, 0x8800014A,
|
||||
0x5E300018, 0x46E12000, 0x8800002A, 0x46E12000, 0x84000042, 0x00000000, 0x800000D8, 0x00000000,
|
||||
0x99008328, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0xC3400002, 0xC000494E, 0xCF4000F8, 0xC161FFFE,
|
||||
0x5955FFFE, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC000490E, 0xCA4000F8,
|
||||
0xC2800002, 0x6ABD4000, 0x7E814000, 0x76692000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x14100000, 0xC2200060, 0xC0004948, 0xCE021038, 0xC2000000, 0xC000494C, 0xCE0000F8, 0x80000080,
|
||||
0x00000000, 0x99008328, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0x99008528, 0xDBD800F8, 0xDB9800F9,
|
||||
0xC78000F8, 0xC2200058, 0xC0004948, 0xCE021038, 0xC2000002, 0xC000494C, 0xCE0000F8, 0xC2000006,
|
||||
0xC0001006, 0xCE0000F8, 0x5838000A, 0xCA4000F8, 0xC2200982, 0x5A203B6E, 0xC0001008, 0xCE0000F8,
|
||||
0xC000100A, 0xCE4000F8, 0xC0004954, 0xCA8000F8, 0xC200000C, 0xC000494A, 0xCE0000F8, 0xC0004948,
|
||||
0xCE800008, 0xC2B60000, 0xC0004964, 0xCE8000F8, 0x990081E8, 0xC00048A0, 0xC88400F8, 0x00000000,
|
||||
0xC0004946, 0xCBC000F8, 0xC000494C, 0xCA0000F8, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000,
|
||||
0x5BB87000, 0x5E200000, 0x84000112, 0x00000000, 0x99007FA8, 0xDBD800F8, 0xDB9800F9, 0x00000000,
|
||||
0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420048, 0xC000491C, 0x990081A0, 0xC94000F9, 0xC98000F8,
|
||||
0x00000000, 0x99007F18, 0xD95800F8, 0xD99800F9, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99007BE0, 0xDBD800F8, 0xDB9800F9, 0xC7D800F8,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0xC000493C, 0xCA8000F8, 0xC000494E, 0xCAC000F8,
|
||||
0xC3000018, 0xC3400006, 0x5E200000, 0x8400002A, 0xC2800000, 0xC2C00000, 0xC300001E, 0xC3400000,
|
||||
0xC6AC1078, 0xC72C0418, 0xC76C0810, 0x58380010, 0xCA8000F8, 0x58380008, 0xCEC000F8, 0xC6280100,
|
||||
0xC0004874, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCB0000F8, 0xC43400F8,
|
||||
0x00000000, 0xC74000F8, 0xCE8000F8, 0xC0004952, 0xCE8000F8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xA8E2FFE8, 0x00000000, 0xC000494C, 0xCA0000F8, 0xC0004950, 0xCAC000F8, 0x5E200000, 0x8400006A,
|
||||
0xDFE800F8, 0x7E814000, 0x5834001A, 0xCE8000F8, 0x99008690, 0xC0004834, 0xC94000F8, 0xC1800002,
|
||||
0x99008690, 0xC0004838, 0xC94000F8, 0xC6D800F8, 0xC1220002, 0xD90C00F8, 0x5E200000, 0x84000040,
|
||||
0x5838002C, 0xCB0000F8, 0xDFE800F8, 0x00000000, 0x58380014, 0xCF0000F8, 0x80000018, 0xC2A1FFFE,
|
||||
0x5AA9FFFE, 0x5838000A, 0xCE8000F8, 0xC3000000, 0xC0000A14, 0xCB040028, 0xC2D00002, 0xC0000A28,
|
||||
0xCEC50800, 0xC000494E, 0xCA8000F8, 0x58880002, 0xB4B00018, 0xC00048A0, 0xC0800000, 0xCC8400F8,
|
||||
0x5EA80000, 0x8400016A, 0x5E200000, 0x84000158, 0xC000493C, 0xCA8000F8, 0x00000000, 0x00000000,
|
||||
0x5AA80060, 0xCE8000F8, 0x99008328, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0x99008528, 0xDBD800F8,
|
||||
0xDB9800F9, 0xC78000F8, 0xC0004952, 0xCAC000F8, 0x58380000, 0xCA8000F8, 0xC30C0002, 0xC7F00018,
|
||||
0xA68000B0, 0x00000000, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC0001800, 0xCA0000F8, 0x00000000, 0x00000000, 0xA60CFFEA, 0xC6F00500,
|
||||
0xC6B0C400, 0xCF0000F8, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x14100000, 0x8000B7B8, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x8000B750, 0xDCBC00F9, 0x5FFC0000, 0x8400095A, 0xC3800002,
|
||||
0xDB8800F9, 0xC3800000, 0xDB8800F9, 0xC0004728, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD0000F8, 0xC0004730, 0xC98000F8, 0xC000472E, 0xC94000F8, 0xC00047DC, 0xC90000F8, 0xC00047DE,
|
||||
0xC9C000F8, 0xC000472E, 0xCD8000F8, 0x6D110000, 0xC5D30038, 0xC00047DC, 0xCD0000F8, 0x4594A000,
|
||||
0x6DDD0000, 0xC55C0038, 0xC00047DE, 0xCDC000F8, 0xC0001AC4, 0xC94000F8, 0xC0001AC8, 0xC98000F8,
|
||||
0xC000472C, 0xC9C000F8, 0x45948000, 0xC1000002, 0x41D0E004, 0xCDC000F8, 0xC5501078, 0xC5900078,
|
||||
0xC000472A, 0xCD0000F8, 0xC0001AF0, 0xCBC000F8, 0x58000002, 0xCB8000F8, 0xC3400000, 0xC7F50038,
|
||||
0x6F702000, 0x5B304300, 0xC000474C, 0xCAC000F8, 0xC0004720, 0xC94000F8, 0x00000000, 0x00000000,
|
||||
0x5D940002, 0x6D9B8000, 0x6D9B8010, 0x581847E0, 0xC98000F8, 0x581447E0, 0xC9C000F8, 0x5D2C0000,
|
||||
0x8400007A, 0xC7901078, 0xC7D00078, 0xCD0000F8, 0xC1000000, 0xC5910038, 0x45348000, 0x84000090,
|
||||
0xC0004722, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x80000058, 0xC1000000,
|
||||
0xC5D10038, 0x45348000, 0x8400003A, 0xC0004724, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD0000F8, 0xA7840080, 0x59540002, 0x6D578000, 0x6D578010, 0xC0004720, 0xCD4000F8, 0xC1000000,
|
||||
0xC5910038, 0x45348000, 0x84000038, 0xC0004726, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD0000F8, 0xA78000B8, 0xC2800002, 0xC000474E, 0xCE8000F8, 0xC2C00000, 0xC000474C, 0xCEC000F8,
|
||||
0xC0004758, 0xCFC000F8, 0x58000002, 0xCF8000F8, 0xC000475C, 0xC90000F8, 0x00000000, 0x00000000,
|
||||
0xA53E003A, 0x00000000, 0xC13E0002, 0xCFC000F8, 0xCD03DE08, 0x58000002, 0xCF8000F8, 0x800001A0,
|
||||
0xC000475C, 0xC13C0002, 0xCD03DE08, 0x5D2C0000, 0x8400017A, 0xC2C00000, 0xC000474C, 0xCEC000F8,
|
||||
0x98C08AF0, 0xC75400F8, 0xC0004740, 0xC9C000F8, 0x5D240000, 0x84000042, 0xC1000002, 0xC0004750,
|
||||
0xCD0000F8, 0xC0004752, 0xCD0000F8, 0x80000100, 0x00000000, 0x98C08BE0, 0xC75400F8, 0xC0004742,
|
||||
0xC98000F8, 0x5D240000, 0x8400002A, 0xC1000002, 0xC0004752, 0xCD0000F8, 0x80000060, 0xC0004742,
|
||||
0xC94000F8, 0xC0004754, 0xC1000002, 0xCD0000F8, 0x98C08CF0, 0xC55400F8, 0xC75800F8, 0x00000000,
|
||||
0xC0004742, 0xCF4000F8, 0x98C08AB8, 0xC1400000, 0xC7540020, 0x6F40A010, 0xC1000000, 0xC7D00038,
|
||||
0x58300000, 0x6D110000, 0xCD010838, 0xA7840398, 0xC000474C, 0xCAC000F8, 0xC000474E, 0xCA8000F8,
|
||||
0xC0004750, 0xCBC000F8, 0xC0004752, 0xCB8000F8, 0xC0004710, 0xC90000F8, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD0000F8, 0x5D280002, 0x840000B8, 0xC000473C, 0xC90000F8, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD0000F8, 0xC0004712, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0xC0004754, 0xC90000F8, 0x00000000, 0x00000000, 0x5D100000, 0x8400021A, 0x58300000, 0xC13C0002,
|
||||
0xCD03DE00, 0x800001F8, 0xC0004714, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0x5D380000, 0x8400003A, 0xC0004736, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0x5D3C0000, 0x84000042, 0xC0004718, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8,
|
||||
0x80000140, 0xC1000000, 0x58300000, 0xC903E000, 0x00000000, 0x00000000, 0x5D100000, 0x84000042,
|
||||
0xC000471A, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x800000D0, 0x58300000,
|
||||
0xC13E0002, 0xCD03FF00, 0xC1000000, 0x58300000, 0xC903C000, 0x00000000, 0x00000000, 0x5D100000,
|
||||
0x84000082, 0xC0004716, 0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0xC000473A,
|
||||
0xC90000F8, 0x00000000, 0x00000000, 0x59100002, 0xCD0000F8, 0x58300000, 0xC13C0000, 0xCD03DE00,
|
||||
0xC1000000, 0xC0004746, 0xCD0000F8, 0xC0004750, 0xCD0000F8, 0xC0004752, 0xCD0000F8, 0xC000474E,
|
||||
0xCD0000F8, 0xC2C00002, 0xC000474C, 0xCEC000F8, 0xC0004754, 0xCD0000F8, 0xC3CE0002, 0xC0000800,
|
||||
0xCFC0E700, 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000487C, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCBC000F8, 0xC43800F8, 0x00000000,
|
||||
0xC000480E, 0xCA0000F8, 0xC0004858, 0xCB4400F8, 0x00000000, 0x00000000, 0x47610000, 0x880000B0,
|
||||
0x00000000, 0xA7C00048, 0xC0004854, 0xC1000002, 0xCD0400F8, 0xC11C0000, 0xC000082C, 0xCD05CE00,
|
||||
0x800000D8, 0x00000000, 0xA7D20138, 0x00000000, 0xC7E14040, 0xC2400000, 0xC6246028, 0xC200006A,
|
||||
0x46250000, 0xC6240030, 0xC0000810, 0xCE440030, 0x8000FF70, 0xC2000000, 0xC0000808, 0xCA040010,
|
||||
0xC11C0000, 0xC000082C, 0xCD05CE00, 0x5A200002, 0x5E600010, 0x84000010, 0xC2000000, 0xC0000808,
|
||||
0xCE040010, 0xC3400000, 0x80000028, 0xC1200002, 0xC0000818, 0xCD061000, 0x5B740002, 0xC0004858,
|
||||
0xCF4400F8, 0x99007930, 0xC0004848, 0xC94400F8, 0xC1800000, 0xC11C0002, 0xC000082C, 0xCD05CE00,
|
||||
0x80000878, 0x5B740002, 0xC0004858, 0xCF4400F8, 0xC78000F8, 0xC13C0002, 0xCD03DE00, 0xC0004848,
|
||||
0xC94400F8, 0xC1800000, 0xC000082C, 0xC9840028, 0x59540002, 0xC0004848, 0xCD4400F8, 0x58880002,
|
||||
0xB49807F8, 0x00000000, 0xC0800000, 0x800007E0, 0xC000487C, 0xC80400F8, 0x00000000, 0x00000000,
|
||||
0x40080000, 0xCBC000F8, 0xC42800F8, 0x00000000, 0xA7C00130, 0xC000484C, 0xCA0400F8, 0xC2400000,
|
||||
0xC0001AEC, 0xCA440018, 0x5A200002, 0xC000484C, 0xCE0400F8, 0xB624008A, 0xC68000F8, 0xC13C0002,
|
||||
0xCD03DE00, 0xC0004848, 0xC94400F8, 0xC1800000, 0xC000082C, 0xC9840028, 0x59540002, 0xC0004848,
|
||||
0xCD4400F8, 0x58880002, 0xB49806E8, 0x00000000, 0xC0800000, 0x800006D0, 0xC0004854, 0xC1000004,
|
||||
0xCD0400F8, 0xC0000820, 0xC2000002, 0xCE0400F8, 0xC2000000, 0xC000484C, 0xCE0400F8, 0xC0004858,
|
||||
0xCE0400F8, 0x8000FF28, 0xC0004854, 0xC1000000, 0xCD0400F8, 0xC11C0000, 0xC000082C, 0xCD05CE00,
|
||||
0x99007930, 0xC0004848, 0xC94400F8, 0xC1800000, 0xC1200000, 0xC0000818, 0xCD061000, 0xC11C0002,
|
||||
0xC000082C, 0xCD05CE00, 0xC2000000, 0xC000484C, 0xCE0400F8, 0x800005D0, 0xC0001AC0, 0xCB8400F8,
|
||||
0xC000487C, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCBC000F8, 0xC42800F8, 0x00000000,
|
||||
0xA78004E2, 0x00000000, 0x00000000, 0xA7C004A2, 0x00000000, 0xC0001B00, 0xC2060006, 0xCE046308,
|
||||
0xA7E8045A, 0x00000000, 0xC0004850, 0xCA0400F8, 0xC2400000, 0xC0004812, 0xCA420078, 0x5A200002,
|
||||
0xC0004850, 0xCE0400F8, 0x5E640000, 0x8400001A, 0x46250000, 0x880002F8, 0xC68000F8, 0xC13C0002,
|
||||
0xCD03DE00, 0xC0001ACC, 0xC2000002, 0xCE040000, 0x5C440000, 0x84000250, 0xC0004810, 0xC94000F8,
|
||||
0xC68000F8, 0xCBC000F8, 0x00000000, 0xC1000000, 0xA5400208, 0xC53C1000, 0x00000000, 0xA7FC01F2,
|
||||
0xC0001AF0, 0xC1000000, 0x58000002, 0xC9000000, 0xC000474E, 0xC98000F8, 0x5D100000, 0x84000022,
|
||||
0xC1000002, 0xC53C1E00, 0x80000198, 0x5D180000, 0x84000022, 0xC1000002, 0xC53C1E00, 0x80000170,
|
||||
0xC0004878, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xC98000F8, 0xC43800F8,
|
||||
0x00000000, 0xC000481E, 0xC9C000F8, 0xC000481C, 0xCA0000F8, 0x00000000, 0x759CC000, 0x45A08000,
|
||||
0x840000E8, 0xC0001AF0, 0xC3400000, 0x58000000, 0xCB410038, 0xC0004746, 0xC94000F8, 0x6F702000,
|
||||
0x5B304300, 0xC2C00000, 0x58300000, 0xCAC00038, 0x00000000, 0x00000000, 0x456C8000, 0x88000020,
|
||||
0xC1000002, 0xC53C1E00, 0x80000040, 0x5AEC0002, 0x58300000, 0xCEC00038, 0xC1000002, 0xC53C1000,
|
||||
0xC77C0838, 0xC57C0038, 0x59540002, 0xC0004746, 0xCD4000F8, 0xC68000F8, 0xCFC000F8, 0xC0004848,
|
||||
0xC94400F8, 0xC1800000, 0xC000082C, 0xC9840028, 0x59540002, 0xC0004848, 0xCD4400F8, 0x58880002,
|
||||
0xB49801F8, 0x00000000, 0xC0800000, 0x800001E0, 0xC000471E, 0xC90000F8, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD0000F8, 0xC0004854, 0xC1000000, 0xCD0400F8, 0xC11C0000, 0xC000082C, 0xCD05CE00,
|
||||
0x99007930, 0xC0004848, 0xC94400F8, 0xC1800000, 0xC2000000, 0xC0000820, 0xCE0400F8, 0xC1200000,
|
||||
0xC0000818, 0xCD061000, 0xC11C0002, 0xC000082C, 0xCD05CE00, 0xC0004850, 0xCE0400F8, 0xC2000002,
|
||||
0xC0001ACC, 0xCE040008, 0x800000E8, 0xC2000002, 0xC0004850, 0xCE0400F8, 0x8000FC00, 0xC2000000,
|
||||
0xC0004850, 0xCE0400F8, 0xA7E60032, 0x00000000, 0xC2000002, 0xC0001B00, 0xCE040000, 0x8000FBE8,
|
||||
0x00000000, 0xA7860052, 0x00000000, 0xC68000F8, 0xC13C0002, 0xCD03DE00, 0xC2020002, 0xC7E2A540,
|
||||
0xC0001B00, 0xCE0400F8, 0x8000FB90, 0xC2040002, 0xC0001B00, 0xCE044200, 0x8000FB70, 0xC2C80002,
|
||||
0x6AC56000, 0xDACC00F8, 0xC0004854, 0xCB4400F8, 0xC0004848, 0xCB8400F8, 0xC0000838, 0xC3C00000,
|
||||
0xCBC40028, 0x5EF40004, 0x84000022, 0xC3000000, 0xC0001ACC, 0xCF042100, 0x47F98000, 0x8400004A,
|
||||
0x47F98000, 0x88000050, 0xC1006E8C, 0xC1400010, 0x8D580000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0004840, 0xCC8400F8, 0x8000EB10, 0xC0001AC0, 0xCAC400F8, 0xC0004854, 0xCB4400F8, 0xA6C0F93A,
|
||||
0x00000000, 0x5EF40000, 0x8400F472, 0x5EF40002, 0x8400F702, 0x5EF40004, 0x8400F902, 0xC1006CE8,
|
||||
0xC1400010, 0x8D580000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0800000, 0xDF4B0038,
|
||||
0xC0004900, 0xCB8000F8, 0xC2000000, 0xC000490A, 0xA78000D0, 0xCBC000F8, 0xC1000000, 0xD90000F9,
|
||||
0xC1000002, 0xD90C00F8, 0x6FF46000, 0x477DA000, 0x5B744C80, 0xC2400000, 0x58340004, 0xCA400078,
|
||||
0xC0004900, 0xCE000000, 0x5A640002, 0x58340004, 0xC6500078, 0xCD000078, 0xC0004914, 0xCA4000F8,
|
||||
0xC2000002, 0x6A3D0000, 0x72612000, 0xCE4000F8, 0xC0000408, 0xCE0000F8, 0xA78200D8, 0xC0004908,
|
||||
0xCBC000F8, 0xC1000000, 0xD90000F9, 0xC1000002, 0xD90C00F8, 0x6FF4A000, 0x6FD44000, 0x4755A000,
|
||||
0x477DA000, 0x5B747000, 0xC2800000, 0x58340006, 0xCA800078, 0xC2000000, 0xC0004900, 0xCE002100,
|
||||
0x5EA80002, 0x58340006, 0xC6900078, 0xCD000078, 0x5A7C0020, 0xC2000002, 0x6A250000, 0xC0000408,
|
||||
0xCE0000F8, 0xC0000032, 0xDCA800F9, 0xC1000002, 0x45294000, 0x00000000, 0x8C100006, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xA4800230, 0x00000000, 0xC3C00000, 0xC000140E, 0xCBC00018, 0xC3400000,
|
||||
0xC2400000, 0x6FF86000, 0x47BDC000, 0x5BB84C80, 0x58380008, 0xCB400078, 0x58380006, 0xCA400078,
|
||||
0x5F740002, 0x58380008, 0xC7500078, 0xCD000078, 0xC2000000, 0x58380004, 0xCA020078, 0xC3000000,
|
||||
0x5838000C, 0xCB000020, 0x5A640002, 0x46610000, 0x84000010, 0xC2400000, 0x58380006, 0xC6500078,
|
||||
0xCD000078, 0xC2000000, 0x5838000A, 0xCA020078, 0x5B300002, 0x5838000C, 0xC7100020, 0xCD000020,
|
||||
0xC2420020, 0x5A200004, 0x46252000, 0x84000010, 0xC2000000, 0x5838000A, 0xC6101078, 0xCD021078,
|
||||
0xC0004966, 0xCA4000F8, 0xC2000002, 0x6A3D0000, 0x72612000, 0xCE4000F8, 0x5F740000, 0x84000040,
|
||||
0xC0004912, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x5F300020,
|
||||
0x84000040, 0xC0004924, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8,
|
||||
0xA4820070, 0xC2400000, 0xC000140E, 0xCA408018, 0xC2000002, 0xC0004900, 0xCE000000, 0xC000490A,
|
||||
0xCE4000F8, 0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xA48402A8, 0x00000000,
|
||||
0xC3C00000, 0xC000140E, 0xCBC10018, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000, 0x4795C000,
|
||||
0x47BDC000, 0x5BB87000, 0x5838002E, 0xCA800078, 0x58380006, 0xCA020078, 0xC3400000, 0x5838002E,
|
||||
0xCB420078, 0x5AA80002, 0x46A10000, 0x84000010, 0xC2800000, 0x5838002E, 0xC6900078, 0xCD000078,
|
||||
0x5F740002, 0x5838002E, 0xC7501078, 0xCD021078, 0xC0004968, 0xCA4000F8, 0xC2000002, 0x6A3D0000,
|
||||
0x72612000, 0xCE4000F8, 0xC000492A, 0xCA8000F8, 0x5E740000, 0x84000040, 0xC0004910, 0xCA0000F8,
|
||||
0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x6ABD4010, 0xA68000F2, 0x00000000,
|
||||
0xC0004910, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x58380032,
|
||||
0xCA0000F8, 0x58000002, 0xCA4000F8, 0x5838000C, 0x00000000, 0xCE0000F9, 0xCE4000F8, 0xC000492A,
|
||||
0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x722D0000, 0xCE0000F8, 0xC000492C, 0xCA0000F8, 0xC2C00002,
|
||||
0x6AFD6000, 0x722D0000, 0xCE0000F8, 0x80000040, 0xC000492C, 0xCA0000F8, 0xC2C00002, 0x6AFD6000,
|
||||
0x7EC16000, 0x762D0000, 0xCE0000F8, 0xA4880120, 0xC2C00000, 0xC000140E, 0xCAC20018, 0xC000490E,
|
||||
0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76612000, 0xCE4000F8, 0xC000496A, 0xCA4000F8,
|
||||
0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0x6EF0A000, 0x6ED44000, 0x47158000, 0x472D8000,
|
||||
0x5B307000, 0x58300000, 0xCA0000F8, 0x00000000, 0xC2400002, 0x76612000, 0x8400004A, 0xC24C0002,
|
||||
0xC6E40018, 0xC624C400, 0x58300010, 0xCA400500, 0x00000000, 0xC0001800, 0xCE4000F8, 0xA4860070,
|
||||
0xC2400000, 0xC000140E, 0xCA418018, 0xC2020002, 0xC0004900, 0xCE002100, 0xC0004908, 0xCE4000F8,
|
||||
0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xA48C0048, 0xC2800002, 0xC000484A,
|
||||
0xCE8000F8, 0xC2800000, 0xC000474A, 0xCE8000F8, 0xC0004846, 0xCE8000F8, 0xC0001408, 0xCC8000F8,
|
||||
0xC10E0002, 0xD90C00F8, 0x8000EA78, 0xDFBC00F9, 0xC000496E, 0x99008638, 0xC94000F8, 0xC7D800F8,
|
||||
0x00000000, 0xC57000F8, 0x5EF00020, 0x88000148, 0x6F346000, 0x4771A000, 0x5B744C80, 0x58340008,
|
||||
0xC2400000, 0xCA400078, 0x00000000, 0xC2000000, 0x5A640002, 0xCE400078, 0x58340004, 0xCA000078,
|
||||
0x00000000, 0x00000000, 0x5E200002, 0xCE000078, 0xC0004912, 0xCA8000F8, 0xC2400002, 0x6A712000,
|
||||
0x72A54000, 0xCE8000F8, 0x5E200000, 0x84000052, 0xC000480A, 0xCA0000F8, 0xC0000408, 0xCA8000F8,
|
||||
0x76250000, 0x00000000, 0x72A14000, 0xCE8000F8, 0x80000038, 0xC0004914, 0xCA0000F8, 0x7E412000,
|
||||
0x00000000, 0x76250000, 0xCE0000F8, 0x800000D0, 0x6EF4A000, 0x6ED44000, 0x4755A000, 0x476DA000,
|
||||
0x5B747000, 0x5834002E, 0xC2400000, 0xCA420078, 0x00000000, 0xC2000000, 0x5A640002, 0xC6501078,
|
||||
0xCD021078, 0x58340006, 0xCA000078, 0x00000000, 0x00000000, 0x5A200002, 0xCE000078, 0xC0004910,
|
||||
0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0xC2000002, 0x6A310000, 0xC000042A,
|
||||
0xCE0000F8, 0xC1040002, 0xD90C00F8, 0x00000000, 0x8000E7E8, 0x00000000, 0xC4980928, 0x9D000000,
|
||||
0xC5580028, 0xC0000838, 0xCD8400F8, 0xC1440200, 0xC1C03800, 0xC55C1070, 0xC000100E, 0x9D000000,
|
||||
0xCD8000F8, 0xC000100C, 0xCDC000F8, 0xC0004862, 0xC9C000F8, 0x00000000, 0x00000000, 0xD9D800F9,
|
||||
0xC0007800, 0x401C0000, 0x5DC07A00, 0x88000012, 0x5C000200, 0xCD8000F8, 0xC1F0000A, 0x715CA000,
|
||||
0xDD9800F8, 0xDD9C00F9, 0x41D8E000, 0xC5D40260, 0xC0001010, 0xCD4000F8, 0x6C9C8000, 0x45C8E000,
|
||||
0x45C8E000, 0x59DC0004, 0xC1601260, 0xC5D40260, 0x9D000000, 0xC0001012, 0xCD4000F8, 0x00000000,
|
||||
0x00000000, 0xD95800F8, 0x6D586000, 0x4594C000, 0x59984C80, 0xD99800F9, 0x5818000A, 0xC1800000,
|
||||
0xC9800078, 0xC0006E00, 0x6D5CA000, 0x401C0000, 0x40180000, 0xC94000F8, 0x58000002, 0x00000000,
|
||||
0xC9C000F8, 0xC0004930, 0xCD4000F8, 0xC0004932, 0xCDC000F8, 0x59980004, 0xC1C20020, 0xB59C0018,
|
||||
0x00000000, 0xC1800000, 0xDD9C00F9, 0x581C000A, 0xCD800078, 0x581C000C, 0xC1800000, 0xC9800020,
|
||||
0xC1C00002, 0xDD9400F8, 0x69D4E000, 0x5D980002, 0xCD800020, 0xC0004924, 0xC98000F8, 0x00000000,
|
||||
0x9D000000, 0x00000000, 0x719CC000, 0xCD8000F8, 0xC000492A, 0xC94000F8, 0xC1C00002, 0x69D8E000,
|
||||
0x7DC0C000, 0x7558A000, 0xCD4000F8, 0xC000492C, 0xC94000F8, 0xDD8000F9, 0x58000032, 0x755CA000,
|
||||
0x84000090, 0xC94000F9, 0xC98000F8, 0xDD8000F9, 0x5800000C, 0x00000000, 0xCD4000F9, 0xCD8000F8,
|
||||
0xC000492C, 0xC94000F8, 0xC000492A, 0xC98000F8, 0x715CA000, 0xC000492C, 0xCD4000F8, 0x719CC000,
|
||||
0xC000492A, 0xCD8000F8, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004862, 0xC98000F8,
|
||||
0x00000000, 0xC1C00200, 0x4194C000, 0x459CE000, 0x88000012, 0xC5D800F8, 0xC0004862, 0xCD8000F8,
|
||||
0xC0001406, 0xC98000F8, 0xC1C00002, 0x9D000000, 0xC5D80A00, 0xC5581048, 0xCD8000F8, 0xC0004930,
|
||||
0xC98000F8, 0xC0004932, 0xC9C000F8, 0xC140000E, 0xC5581C18, 0xDD9400F8, 0xC0007800, 0x40140000,
|
||||
0x5D407A00, 0x88000012, 0x5C000200, 0xCD8000F8, 0x58000002, 0x5D407A00, 0x88000012, 0x5C000200,
|
||||
0xCDC000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078, 0xC1800000, 0x58140000, 0xC98000D8,
|
||||
0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC000F8, 0xDD9800F8, 0xC1C00022, 0xC5D80D70, 0xDD9400F9,
|
||||
0xC5581C18, 0xC000491C, 0xCD8000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078, 0xC1800000,
|
||||
0x58140004, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, 0xC1C00000, 0x9D000000,
|
||||
0x58140006, 0xC5D81078, 0xCD821078, 0xC0004860, 0xC94000F8, 0xC1820080, 0xC1D00002, 0x58147700,
|
||||
0xD58000F8, 0x58000002, 0xD58000F9, 0x59540004, 0xB5580018, 0xC0004860, 0xC1400000, 0xCD4000F8,
|
||||
0xDD9800F9, 0x9D000000, 0xDD9400F8, 0xC0001404, 0xCDC10800, 0xC1C00000, 0xC1800200, 0x5D980004,
|
||||
0xDF5D0048, 0x459CA000, 0x8800FFF2, 0xDD8000F9, 0x5800000C, 0x00000000, 0xC94000F9, 0xC98000F8,
|
||||
0xC1C00002, 0xC5D43F00, 0xC5D81E00, 0xC0004862, 0xC9C000F8, 0x00000000, 0x00000000, 0x581C7800,
|
||||
0x5DC07A00, 0x88000012, 0x5C000200, 0xCD4000F8, 0x58000002, 0x5DC07A00, 0x88000012, 0x5C000200,
|
||||
0xCD8000F8, 0xC0004862, 0xC9C000F8, 0x00000000, 0xC15004C0, 0xC5D40060, 0xDD9C00F8, 0xC5D41C18,
|
||||
0xC1C00000, 0xDD8000F9, 0x58000030, 0xC9C00078, 0xDD8000F9, 0x58000002, 0xC98000F8, 0x6DDC2000,
|
||||
0xC000491C, 0x41D8E000, 0xCD4000F9, 0xCDC000F8, 0xDD9400F9, 0xC1C00000, 0x58140030, 0xC9C00078,
|
||||
0xC1800000, 0x58140006, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, 0xC1C00000,
|
||||
0x9D000000, 0x58140030, 0xC5D80078, 0xCD800078, 0xC1C00000, 0xDF5C0038, 0x5DDC0080, 0x8400FFEA,
|
||||
0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440060,
|
||||
0xC1A0FFFE, 0x59983008, 0xC000100C, 0xCD4000F8, 0xC000100E, 0xCD8000F8, 0xC0004964, 0xC98000F8,
|
||||
0x00000000, 0xC170000A, 0x7158A000, 0x6C988000, 0x4588C000, 0x4588C000, 0x59980004, 0xC5940270,
|
||||
0xC0001010, 0xCD4000F8, 0xC0004946, 0xC94000F8, 0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000,
|
||||
0x459CC000, 0x4594C000, 0xC000494A, 0xC94000F8, 0xC0004948, 0xC9C000F8, 0x4194C000, 0xC1400012,
|
||||
0xC55C1818, 0x9D000000, 0xC59C0268, 0xC0001012, 0xCDC000F8, 0xC1400000, 0x58000012, 0xC9410038,
|
||||
0xC0004950, 0xC9C000F8, 0xC55800F8, 0xC5940838, 0xC5581078, 0xD99400F8, 0xC000493C, 0xC94000F8,
|
||||
0xC0004954, 0xC98000F8, 0x59DC00A8, 0x45D4E000, 0x41D8E000, 0x5D5C0030, 0x88000010, 0xC1C00030,
|
||||
0xC1800000, 0xC5D84028, 0xC1400000, 0xC5D40008, 0x5DD40002, 0x84000072, 0x5DD40004, 0x8400009A,
|
||||
0x5DD40006, 0x840000C2, 0x5DD80026, 0x840000EA, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000,
|
||||
0xCD4000F8, 0x59980002, 0x8000FFC0, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD4000B8,
|
||||
0x59980002, 0x8000FF88, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400078, 0x59980002,
|
||||
0x8000FF50, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400038, 0x59980002, 0x8000FF18,
|
||||
0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC94000F8, 0xC0004954,
|
||||
0xC9C000F8, 0xC0004950, 0xC9400078, 0xDD8000F9, 0x58000028, 0x5D9C0000, 0x84000052, 0x5D9C0002,
|
||||
0x84000052, 0x5D9C0004, 0x8400006A, 0xC55B0038, 0xC55C08B8, 0xCD800039, 0xCDC108B8, 0x80000060,
|
||||
0xCD4000F8, 0x80000050, 0xC55900B8, 0xC55C1838, 0xCD8000B9, 0xCDC31838, 0x80000028, 0xC55A0078,
|
||||
0xC55C1078, 0xCD800079, 0xCDC21078, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x59540002,
|
||||
0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x88000012, 0xC59400F8, 0x9D000000, 0xCD4000F8,
|
||||
0x00000000, 0x00000000, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000, 0xCD8000F9, 0x45408000,
|
||||
0x8800FFF0, 0x00000000, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004810, 0xCA010038,
|
||||
0xC241FFFE, 0xC1400000, 0x46148000, 0x00000000, 0x9CC00006, 0xC0004200, 0x40180000, 0xC9C000F8,
|
||||
0x00000000, 0x00000000, 0x61C08010, 0x8400005A, 0xC2400002, 0x6A512000, 0x71E4E000, 0xCDC000F8,
|
||||
0xC0004748, 0xCD8000F8, 0x9CC00000, 0x6D98A000, 0x5998003E, 0x45912000, 0x59540002, 0x59980002,
|
||||
0x46188000, 0xC1000000, 0xC51800FE, 0x8000FF38, 0x00000000, 0x40180000, 0xC9C000F8, 0xC2000000,
|
||||
0xC5600020, 0xC1210000, 0x69208010, 0x7D008000, 0x75D0E000, 0xCDC000F8, 0x6D542000, 0x58144300,
|
||||
0xC1000000, 0xCD0000F9, 0x9CC00000, 0xC121FFFE, 0x5911FFFE, 0xCD0000F9, 0x79588000, 0x6D10A010,
|
||||
0x5D100000, 0x840000C0, 0x45948000, 0x880000B0, 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700,
|
||||
0x40140000, 0xCA0000F8, 0x00000000, 0x00000000, 0x6A110000, 0x6A110010, 0x62008018, 0x84000032,
|
||||
0x00000000, 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45512000, 0x59540002, 0x6D57A000, 0x6D57A010,
|
||||
0x6D54A000, 0x6D936000, 0x6D136010, 0xC1E10000, 0x69D0E010, 0x5DDC0002, 0x7DC0E000, 0x6D98A010,
|
||||
0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, 0x40140000, 0xCA0000F8, 0x00000000, 0x00000000,
|
||||
0x6A110000, 0x6A110010, 0x45588000, 0x00000000, 0x761D0002, 0x62008018, 0x84000032, 0x00000000,
|
||||
0x9CC00000, 0x6D54A000, 0x5954003E, 0x45512000, 0x45588000, 0x00000000, 0x9CC00002, 0x59540002,
|
||||
0x6D57A000, 0x6D57A010, 0xC0004700, 0x40140000, 0xCA0000F8, 0x8000FF68, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x58004700, 0xC98000F8, 0x9CC00000, 0x00000000, 0x6994C000, 0x6DA7E010, 0x58004700,
|
||||
0xC98000F8, 0xC1210000, 0x9CC00000, 0x69148010, 0x7190C000, 0xCD8000F8, 0xC1000000, 0xC0004810,
|
||||
0xC9020038, 0x00000000, 0x00000000, 0x45D0C000, 0x88000062, 0xC2400002, 0x45588000, 0xC1000000,
|
||||
0xC52400FC, 0x45D48000, 0xC1000000, 0xC52400FE, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x59980200, 0xC2400000, 0x455C8000, 0xC1000002, 0xC52400FC, 0x45948000, 0xC1000002, 0xC52400FE,
|
||||
0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004740, 0xC9C000F8, 0x59180002, 0x6D130000,
|
||||
0x6D130010, 0x451C8000, 0xC2400000, 0x9CC00002, 0x00000000, 0x00000000, 0x459C8000, 0x88000062,
|
||||
0xC2400002, 0x455C8000, 0xC1000000, 0xC52400FC, 0x45948000, 0xC1000000, 0xC52400FC, 0x9CC00000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC2400000, 0x45588000, 0xC1000002, 0xC52400FE, 0x45D48000,
|
||||
0xC1000002, 0xC52400FE, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6D570000,
|
||||
0x6D570010, 0x45588000, 0x6D402000, 0x9CC00002, 0x58004300, 0x58000000, 0xC13C0002, 0xCD03DE00,
|
||||
0x8000FFB0, 0x00000000, 0x00000000, 0x00000000, 0xC1020002, 0xD90C00F8, 0xC98000F8, 0x59540002,
|
||||
0xC0004730, 0xCD4000F8, 0x5D980002, 0x00000000, 0x80000036, 0x00000000, 0x9CC00000, 0xC0004732,
|
||||
0xCD8000F8, 0x00000000, 0xC0004734, 0xC9C000F8, 0xC1800000, 0xC0004816, 0xC9820078, 0xC0004738,
|
||||
0xCDC000F8, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC000F8, 0xC0004732, 0xCD8000F8,
|
||||
};
|
||||
|
||||
static unsigned int firmware_binary_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_AR9_H
|
||||
442
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_danube.h
Normal file
442
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_danube.h
Normal file
@@ -0,0 +1,442 @@
|
||||
#ifndef IFXMIPS_ATM_FW_DANUBE_H
|
||||
#define IFXMIPS_ATM_FW_DANUBE_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_danube.h
|
||||
** PROJECT : Danube
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 17
|
||||
// fix 1 upstream packet stuck in TX queue issue
|
||||
// add multiple queue per PVC feature
|
||||
|
||||
|
||||
static unsigned int danube_fw_bin[] = {
|
||||
0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0x80004968, 0xC2000000, 0xDA080001, 0x80003FD0,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80003F88, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80005160, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80003E88, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400000, 0xC0004840, 0xC8840000, 0x80004628, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400002, 0xC0004840, 0xC8840000, 0x800045A8, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3C00004, 0xDBC80001, 0xC10C0002, 0xD90C0000, 0x8000FEC8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC10E0002, 0xD90C0000, 0xC0004808, 0xC8400000, 0x800045D8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC3C00000, 0xDBC80001, 0xC1400008, 0xC1900000, 0x71948000,
|
||||
0x15000100, 0xC140000A, 0xC1900002, 0x71948000, 0x15000100, 0xC140000C, 0xC1900004, 0x71948000,
|
||||
0x15000100, 0xC1400004, 0xC1900006, 0x71948000, 0x15000100, 0xC1400006, 0xC1900008, 0x71948000,
|
||||
0x15000100, 0xC140000E, 0xC190000A, 0x71948000, 0x15000100, 0xC1400000, 0xC190000C, 0x71948000,
|
||||
0x15000100, 0xC1400002, 0xC190000E, 0x71948000, 0x15000100, 0xC0400000, 0xC11C0000, 0xC000082C,
|
||||
0xCD040E08, 0xC11C0002, 0xC000082C, 0xCD040E08, 0xC0400002, 0xC11C0000, 0xC000082C, 0xCD040E08,
|
||||
0xC11C0002, 0xC000082C, 0xCD040E08, 0xC0000824, 0x00000000, 0xCBC00001, 0xCB800001, 0xCB400001,
|
||||
0xCB000000, 0xC0004878, 0x5BFC4000, 0xCFC00001, 0x5BB84000, 0xCF800001, 0x5B744000, 0xCF400001,
|
||||
0x5B304000, 0xCF000000, 0xC0000A10, 0x00000000, 0xCBC00001, 0xCB800000, 0xC0004874, 0x5BFC4000,
|
||||
0xCFC00001, 0x5BB84000, 0xCF800000, 0xC30001FE, 0xC000140A, 0xCF000000, 0xC3000000, 0x7F018000,
|
||||
0xC000042E, 0xCF000000, 0xC000040E, 0xCF000000, 0xC3C1FFFE, 0xC000490E, 0xCFC00080, 0xC000492C,
|
||||
0xCFC00080, 0xC0004924, 0xCFC00040, 0xC0004912, 0xCFC00040, 0xC0004966, 0xCFC00040, 0xC0004968,
|
||||
0xCFC00080, 0xC000496A, 0xCFC00080, 0xC3C1FFFE, 0xC00049A0, 0xCFC00000, 0xC3C00000, 0xC2800020,
|
||||
0xC3000000, 0x7F018000, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x5838000A, 0xCF000000,
|
||||
0x5BFC0002, 0xB7E8FFA8, 0x00000000, 0xC3C00000, 0xC2800010, 0x6FF86000, 0x47F9C000, 0x5BB84C80,
|
||||
0xC3400000, 0x58380004, 0xCB420080, 0x00000000, 0x58380008, 0xCF400080, 0x5BFC0002, 0xB7E8FF90,
|
||||
0x00000000, 0xC3C00000, 0xC2800020, 0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000,
|
||||
0x4579C000, 0x47F9C000, 0x5BB84E20, 0x58380008, 0xCF400420, 0x5838000A, 0xCF000000, 0x5BFC0002,
|
||||
0xB7E8FF90, 0x00000000, 0x00000000, 0xC3E02242, 0x5BFC0022, 0xC0004002, 0xCFC00000, 0x00000000,
|
||||
0xC121FFFE, 0x5911FE14, 0x15000000, 0x80000518, 0x00000000, 0x80002118, 0x00000000, 0x8000FFC8,
|
||||
0xC0004958, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, 0xCC400000, 0xC0004848, 0xCB840000,
|
||||
0xC000495C, 0xCAC40000, 0xC0004844, 0xC8840000, 0x46F90000, 0x8400FF6A, 0xC000487C, 0xC8040000,
|
||||
0x00000000, 0x00000000, 0x40080000, 0xCA000000, 0xC0001624, 0xCB040000, 0xA63C005A, 0x00000000,
|
||||
0x00000000, 0xA71EFF02, 0x00000000, 0xC0000824, 0xCA840000, 0x6CA08000, 0x6CA42000, 0x46610000,
|
||||
0x42290000, 0xC35E0002, 0xC6340068, 0xC0001624, 0xCF440080, 0xC2000000, 0xC161FFFE, 0x5955FFFE,
|
||||
0x15400000, 0x00000000, 0xC0004844, 0xC8840000, 0xC000082C, 0xCA040040, 0x00000000, 0x00000000,
|
||||
0x58880002, 0xB608FFF8, 0x00000000, 0xC0800000, 0xC0004844, 0xCC840040, 0x5AEC0002, 0xC000495C,
|
||||
0xCEC40000, 0x5E6C0006, 0x84000048, 0xC0004848, 0xCB840000, 0xC0000838, 0xC2500002, 0xCE440808,
|
||||
0x5FB80002, 0xC0004848, 0xCF840000, 0x5EEC0002, 0xC000495C, 0xCEC40000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE14, 0x15000000, 0x8000FD80, 0xC000495A, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000,
|
||||
0xCC400000, 0xC0004960, 0xCAC40000, 0x00000000, 0x00000000, 0x5EEC0000, 0x840000F2, 0x00000000,
|
||||
0xB6FC0030, 0xC0001600, 0xCA040000, 0x00000000, 0x00000000, 0xA61E00B2, 0x6FE90000, 0xC0000A28,
|
||||
0xCE840808, 0xC2C00000, 0xC2800004, 0xB6E80080, 0xC0001604, 0xCA840000, 0xC0004960, 0xCEC40000,
|
||||
0xA69EFCA2, 0x00000000, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00002, 0xC0001600, 0xCA040000,
|
||||
0x00000000, 0x00000000, 0xA61E000A, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00000, 0xC0001604,
|
||||
0xCA840000, 0xC0004960, 0xCEC40000, 0xA69EFC0A, 0xC2400000, 0xC0000A14, 0xCA440030, 0x00000000,
|
||||
0x00000000, 0x46E52000, 0xA4400000, 0xC2800000, 0xDFEB0031, 0x8000FFF8, 0xDFEA0031, 0xB668FB82,
|
||||
0x00000000, 0xC00048A0, 0xCB040000, 0xC0000A10, 0xCA840000, 0x6F208000, 0x6F242000, 0x46610000,
|
||||
0x42A10000, 0xC2400000, 0xC0000A14, 0xCA440030, 0xC35E0002, 0xC6340068, 0xC0001604, 0xCF440080,
|
||||
0x5B300002, 0xB670FFF8, 0x5AEC0002, 0xC3000000, 0xC00048A0, 0xCF040000, 0xC0004960, 0xCEC40000,
|
||||
0x8000FAC0, 0xC0004918, 0xD2800000, 0xC2000000, 0xDF600040, 0x5E600080, 0x8400025A, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC000480A, 0xCA000000, 0xC0004912, 0xCA400000,
|
||||
0xC0004924, 0xCA800000, 0xC0004966, 0xCAC00000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000,
|
||||
0x76610000, 0x76A10000, 0x76E10000, 0x840001B2, 0xC0004918, 0xCA400000, 0xC28001FE, 0x76A10000,
|
||||
0x5A640002, 0x6A254010, 0x5EE80000, 0x84000002, 0x6AA54000, 0x8000FFF8, 0xC6280000, 0x62818008,
|
||||
0xC0004918, 0xCF000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC0004966, 0xCA400000,
|
||||
0xC2000002, 0x6A310000, 0x7E010000, 0x76252000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE14,
|
||||
0x15000000, 0x6F346000, 0x4735A000, 0x5B744C80, 0xC2800000, 0x58340006, 0xCA800080, 0xC2C00000,
|
||||
0x58340000, 0xCAC000E0, 0xC2400000, 0x5834000A, 0xCA420080, 0x6EA82000, 0x42E9E000, 0x6F2CA000,
|
||||
0x42E56000, 0x5AEC1400, 0xC3990040, 0xC7381C20, 0xC6F80068, 0x99005B78, 0xDB980000, 0xDBD80001,
|
||||
0x00000000, 0xDEA00000, 0x47210000, 0x8400FD68, 0xC0004958, 0xC8400000, 0x00000000, 0xC3C00002,
|
||||
0x7BC42000, 0xCC400000, 0xC0004848, 0xCB840000, 0xC0004844, 0xC8840000, 0x5FB80000, 0x8400F7DA,
|
||||
0xC0001A1C, 0xCA000000, 0xC2400002, 0x6A452000, 0x76610000, 0x8400F7AA, 0xC000487C, 0xC8040000,
|
||||
0x00000000, 0x00000000, 0x40080000, 0xCA000000, 0xC4240000, 0x00000000, 0xA63C17BA, 0x00000000,
|
||||
0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCA000000, 0xC4240000,
|
||||
0x00000000, 0xC0004934, 0xCE000000, 0xC2800002, 0xC4681C10, 0xC62821D8, 0xC2600010, 0x5A650040,
|
||||
0xC0004800, 0xCB400000, 0xC2200400, 0x5A200000, 0xC7601048, 0xC0001220, 0xCE800000, 0xC0001200,
|
||||
0xCE400000, 0xC0001202, 0xCE000000, 0xC0001240, 0xCB400000, 0x00000000, 0x00000000, 0xA754FFC0,
|
||||
0xC2000000, 0xC7600048, 0xA7520022, 0x00000000, 0x00000000, 0x990062F0, 0xC0004822, 0xC9400000,
|
||||
0xC1800002, 0x80001668, 0x58204080, 0xC2000000, 0xCA000020, 0xC2400000, 0xCA414008, 0xC2800000,
|
||||
0xCA812008, 0xC2C00000, 0xCAC20020, 0xC0004938, 0xCE000000, 0xC0004920, 0xCE400000, 0xC0004916,
|
||||
0xCE800000, 0xC0004922, 0xCEC00000, 0xA6400520, 0x00000000, 0xC0004938, 0xCBC00000, 0x00000000,
|
||||
0xC3800000, 0x6FF48000, 0x6FD44000, 0x4355A000, 0x5B744A00, 0x58340000, 0xCB802018, 0x00000000,
|
||||
0xC2000000, 0x6FB46000, 0x47B5A000, 0x5B744C80, 0x5834000C, 0xCA000028, 0xC000491A, 0xCF800000,
|
||||
0x5E200000, 0x84000452, 0xC2000000, 0xDF610050, 0x5E6001E8, 0x8800FFD0, 0xC2000002, 0xC2400466,
|
||||
0xC2A00000, 0x5AA80000, 0xC0001006, 0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A, 0xCE800000,
|
||||
0x990055B8, 0xC1A0FFFE, 0xC0000824, 0xC9840068, 0xC0004934, 0xCA400000, 0xC2000000, 0xC2800002,
|
||||
0x990055F8, 0xDA980000, 0xC6140000, 0xC6580000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000,
|
||||
0x990056E0, 0xC000491A, 0xC9400000, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000,
|
||||
0xC0004922, 0xCA001120, 0xC3C00000, 0xC3800000, 0xC0004930, 0xCE001120, 0xC0004932, 0xCBC000E0,
|
||||
0xC2800000, 0xC000491E, 0xCFC00000, 0xC0004862, 0xCA800068, 0xC3A0001A, 0x5BB94000, 0xC6B80068,
|
||||
0xC000491C, 0xCF800000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xA8E2FFC8, 0xC2000000, 0xC1220002, 0xD90C0000, 0xDF600040, 0x5E600080, 0x8400FFDA,
|
||||
0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000, 0x00000000, 0x99005B78, 0xDA180000,
|
||||
0xDA580001, 0x00000000, 0xC2000000, 0xDF610050, 0x5E6001FE, 0x8800FFD0, 0xC0004916, 0xCA800000,
|
||||
0xC2C00000, 0xDFEC0050, 0xC2400000, 0x46E52000, 0x84000032, 0x5EA80000, 0x84000022, 0xC2600002,
|
||||
0x990062F0, 0xC000482E, 0xC9400000, 0xC1800002, 0x80000018, 0xC2600000, 0x990062F0, 0xC000482C,
|
||||
0xC9400000, 0xC1800002, 0xC2000068, 0xC6240080, 0xC0004930, 0xCE400088, 0xC000491A, 0xC9800000,
|
||||
0xC0004862, 0xC9400000, 0x6D9C6000, 0x459CE000, 0x59DC4C80, 0x990059D8, 0xD9580000, 0xD9980001,
|
||||
0xD9D40000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2000000, 0xDF600040, 0x5E600080,
|
||||
0x8400FFD2, 0x00000000, 0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000, 0x00000000,
|
||||
0x99005B78, 0xDA180000, 0xDA580001, 0x00000000, 0x800010D0, 0x00000000, 0x990062F0, 0xC000482A,
|
||||
0xC9400000, 0xC1800002, 0x800010A0, 0xC0004938, 0xCBC00000, 0x00000000, 0x00000000, 0x6FF88000,
|
||||
0x6FD44000, 0x4395C000, 0x5BB84A00, 0x58380008, 0xCA000000, 0x00000000, 0x00000000, 0xA6000362,
|
||||
0x00000000, 0xC0004938, 0xCBC00000, 0xC3000000, 0x00000000, 0x6FF88000, 0x6FD44000, 0x4395C000,
|
||||
0x5BB84A00, 0x58380000, 0xCB002018, 0xC2000000, 0x58380008, 0xCA020080, 0x5838000C, 0xCAC00000,
|
||||
0x5838000E, 0xCA400000, 0xC000491A, 0xCF000000, 0xC0004930, 0xCEC00000, 0xC000493C, 0xCE000000,
|
||||
0xC0004932, 0xCE400000, 0x5E200000, 0x84000108, 0xC2800000, 0xA6FE009A, 0x6F206000, 0x47210000,
|
||||
0x5A204C80, 0x5820000C, 0xCA800028, 0x00000000, 0x00000000, 0x5EA80000, 0x840001DA, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x990056E0, 0xC000491A, 0xC9400000, 0x00000000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0xC0004930, 0xCAC00000, 0xC0004932, 0xCA400000,
|
||||
0xC7EC1120, 0xC0004930, 0xCEC00000, 0x5838000C, 0xCEC00000, 0x58000002, 0xCE400000, 0xC0004934,
|
||||
0xCA000000, 0xC2400002, 0x6E642000, 0x6E642000, 0x76252000, 0x84000012, 0xC2400002, 0x6E684000,
|
||||
0x58380008, 0xCE800208, 0xA6000000, 0x6E682000, 0x58380008, 0xCE800108, 0xC2400002, 0x6E642000,
|
||||
0x76252000, 0x840000D2, 0x58380008, 0xCA000000, 0xC2800000, 0xC2400000, 0xA60200A0, 0xDBA80000,
|
||||
0x6F386000, 0x4739C000, 0x5BB84C80, 0x58380004, 0xCA400080, 0x58380002, 0xCA800080, 0x00000000,
|
||||
0xDEB80000, 0x46694000, 0x88000048, 0x00000000, 0xC0004824, 0xCA000000, 0xC2400002, 0x6E640000,
|
||||
0x5A200002, 0xCE000000, 0x58380008, 0xCE400008, 0x80000000, 0x00000000, 0x80000030, 0xC0004934,
|
||||
0xCA000000, 0x00000000, 0x00000000, 0xA6020C4A, 0x00000000, 0x00000000, 0x80000C80, 0xC2800000,
|
||||
0xC2000200, 0xC240001A, 0xDF690050, 0x46A14000, 0x46694000, 0x8800FFBA, 0xC2000006, 0xC2600982,
|
||||
0x5A643B6E, 0x5838000A, 0xCA800000, 0xC0001006, 0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A,
|
||||
0xCE800000, 0x990055B8, 0xC1A0FFFE, 0xC0000824, 0xC9840068, 0xC2000000, 0xC0004930, 0xCA02E010,
|
||||
0x58380026, 0xCA400000, 0x00000000, 0xC2800000, 0x990055F8, 0xDA980000, 0xC6140000, 0xC6580000,
|
||||
0xC0004934, 0xCA000000, 0x00000000, 0x00000000, 0xA6020002, 0x00000000, 0x00000000, 0x80000300,
|
||||
0xC0004938, 0xCBC00000, 0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000,
|
||||
0xCA000000, 0xC4240000, 0x00000000, 0x58240018, 0xCA000000, 0x6FF88000, 0x6FD44000, 0x4395C000,
|
||||
0x5BB84A00, 0xC3000000, 0xC3400002, 0xC2C00000, 0xC62C0080, 0xC6270040, 0xC0004940, 0xCE400040,
|
||||
0xC6260040, 0xC0004942, 0xCE400040, 0xC000493C, 0xCA000000, 0x5EEC0000, 0x84000172, 0x5A6C0010,
|
||||
0x46614000, 0x88000178, 0x5A600052, 0x466D4000, 0x88000160, 0x58380006, 0xCA800000, 0xC0004940,
|
||||
0xCA000000, 0xC2400000, 0xC6A70040, 0x7E412000, 0x76252000, 0xC2000000, 0xC6A10040, 0x46610000,
|
||||
0x84000120, 0xC0004942, 0xCA000000, 0xC2400000, 0xC6A60040, 0x7E412000, 0x76252000, 0xC2000000,
|
||||
0xC6A00040, 0x58380002, 0xCA800000, 0x46610000, 0x840000D0, 0xC2400000, 0xC6A60080, 0x46E50000,
|
||||
0x880000C2, 0xC2400000, 0xC6A40080, 0x58380008, 0xCA800000, 0x466D0000, 0x880000A2, 0x00000000,
|
||||
0xA682FFF8, 0x00000000, 0xC7700B08, 0xA6840078, 0x00000000, 0xC7700A08, 0x80000068, 0xC7700208,
|
||||
0xC000493C, 0xCAC00000, 0x80000048, 0xC7700308, 0xC000493C, 0xCAC00000, 0x80000028, 0xC7700908,
|
||||
0x80000018, 0xC7700808, 0x80000008, 0xC7700708, 0x8000FFF8, 0xC7700508, 0xC0004944, 0xCF000000,
|
||||
0xC000493E, 0xCEC00000, 0xC0004938, 0xCA400000, 0xC000493C, 0xCB800000, 0xC000493E, 0xCB400000,
|
||||
0xC3000000, 0x6E608000, 0x6E544000, 0x42150000, 0x5A204A00, 0x5AA00008, 0x58200004, 0xCB000080,
|
||||
0xC0004934, 0xCA000000, 0xC2400000, 0xC0004930, 0xCA42E010, 0xC3C00018, 0xA6020078, 0x00000000,
|
||||
0x43656000, 0x46F90000, 0x88000038, 0x47AD6000, 0x6EE04010, 0x5BE00004, 0xC2000000, 0xC6E00010,
|
||||
0x5E200000, 0x8400002A, 0x5BFC0002, 0x80000018, 0xC3C00004, 0x5A2C0008, 0x46390000, 0x8800FFFA,
|
||||
0x5FB80008, 0x6FE04000, 0x42390000, 0x46312000, 0x88000050, 0xC2400000, 0xC0004930, 0xCA42E010,
|
||||
0xC2060002, 0xC6800000, 0xCE000308, 0x6FE04000, 0x4631C000, 0x5F700010, 0x4675A000, 0xC2000000,
|
||||
0xC6340010, 0xC25A000A, 0xC000491A, 0xCA401C20, 0xC2800000, 0xC0004932, 0xCA8000E0, 0xC0004862,
|
||||
0xCA400068, 0x6FA04010, 0x42290000, 0xC000491E, 0xCE000000, 0xC7E41050, 0xC000491C, 0xCE400000,
|
||||
0x6FE04000, 0x43A1C000, 0xC000493C, 0xCF800000, 0xC000493E, 0xCF400000, 0xC000493A, 0xCFC00000,
|
||||
0x8000FFF0, 0x00000000, 0x00000000, 0x00000000, 0xC2000000, 0xDCE00000, 0xA622FFB8, 0xC1220002,
|
||||
0xD90C0000, 0xC0004938, 0xCBC00000, 0xC0004944, 0xCB400000, 0xC0004862, 0xCB000000, 0xC0004934,
|
||||
0xCA000000, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0xA6020248, 0xC2400000, 0x58380008,
|
||||
0xCA406008, 0xDFE80000, 0xC2218E08, 0x5A21BAF6, 0x46294000, 0x8400000A, 0xC2080002, 0x7235A000,
|
||||
0x80000040, 0x5E640000, 0x8400000A, 0xC20C0002, 0x7235A000, 0x80000018, 0xC2000000, 0xC760E718,
|
||||
0xC7604220, 0x5E200000, 0x8400025A, 0xC2200002, 0xC0004930, 0xCE001008, 0x990062F0, 0xC0004828,
|
||||
0xC9400000, 0xC1800002, 0x58380000, 0xCA000000, 0x00000000, 0x00000000, 0xA6000112, 0xC0004940,
|
||||
0xCA800000, 0xC0004942, 0xCA400000, 0xC7600080, 0xC6A01840, 0xC6601040, 0xC000493A, 0xCA400000,
|
||||
0xC0004934, 0xCA800000, 0xC0007200, 0x40300000, 0x40240000, 0x5C000004, 0x5EC07400, 0x8800FFFA,
|
||||
0x5C000200, 0xCE000000, 0x58000002, 0x5EC07400, 0x8800FFFA, 0x5C000200, 0xCE800000, 0xC000493E,
|
||||
0xCA000000, 0xC2400000, 0x5838000C, 0xCE400000, 0x990062F0, 0xC0004830, 0xC9400000, 0xC6180000,
|
||||
0xC0004930, 0xC6100080, 0xCD000080, 0x80000090, 0xC2400002, 0x58380008, 0xCE400008, 0xC0004944,
|
||||
0xCF400000, 0x80000260, 0xC000493C, 0xCA400000, 0xDFE80000, 0x5A300018, 0xC0007200, 0x40200000,
|
||||
0xCA000000, 0x58380008, 0xC6501080, 0xCD001080, 0x5838000A, 0xCE800000, 0x58380026, 0xCE000000,
|
||||
0xC0004944, 0xCF400000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0x80000020, 0x00000000,
|
||||
0x990062F0, 0xC0004826, 0xC9400000, 0xC1800002, 0x8000FDC0, 0xC2000000, 0xC2400080, 0xDF600040,
|
||||
0xB624FFCA, 0xC000491C, 0xCA400000, 0xC000491E, 0xCA800000, 0x99005B78, 0xDA580000, 0xDA980001,
|
||||
0x00000000, 0xC0004934, 0xCA000000, 0x00000000, 0xC2800000, 0xA6020140, 0xC2400004, 0xC2000200,
|
||||
0xDF690050, 0x46A14000, 0x46694000, 0x8800FFC2, 0x00000000, 0xC000491A, 0xC9800000, 0xC0004862,
|
||||
0xC9400000, 0x6D9C6000, 0x459CE000, 0x59DC4C80, 0x990059D8, 0xD9580000, 0xD9980001, 0xD9D40000,
|
||||
0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2000000, 0xC2400080, 0xDF600040, 0xB624FFCA,
|
||||
0xC000491C, 0xCA400000, 0xC000491E, 0xCA800000, 0x99005B78, 0xDA580000, 0xDA980001, 0x00000000,
|
||||
0x58380008, 0xCA400000, 0xC2000000, 0xCE000020, 0xC2A1FFFE, 0x5AA9FFFE, 0xCE001080, 0x5838000A,
|
||||
0xCE800000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC0000838, 0xC2500002, 0xCE440808,
|
||||
0xC0004848, 0xCB840000, 0xC2000000, 0xC000082C, 0xCA040030, 0x5FB80002, 0xC0004848, 0xCF840000,
|
||||
0x58880002, 0xB608FFF8, 0x00000000, 0xC0800000, 0xC0004844, 0xCC840000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE14, 0x15000000, 0x8000DEC0, 0xC2000000, 0xDF600040, 0x5E200080, 0x84000252, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC000480C, 0xCA000000, 0xC0004910, 0xCA400000,
|
||||
0xC000492C, 0xCA800000, 0xC0004968, 0xCAC00000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000,
|
||||
0x76610000, 0x76A10000, 0x762D6000, 0x840001AA, 0xC0004926, 0xCA400000, 0xC201FFFE, 0x762D6000,
|
||||
0x5A640002, 0x6AE50010, 0x5F200000, 0x84000002, 0x6A250000, 0x8000FFF8, 0xC6E00000, 0x62014008,
|
||||
0xC0004926, 0xCE800000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC0004968, 0xCA400000,
|
||||
0xC2000002, 0x6A290000, 0x7E010000, 0x76252000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE14,
|
||||
0x15000000, 0x6EB4A000, 0x6E944000, 0x4575A000, 0x46B5A000, 0x5B744E20, 0x58340002, 0xC2000000,
|
||||
0xCA0000E0, 0x5834002E, 0xC2400000, 0xCA400080, 0x6EB0A000, 0x6EBC4000, 0x47F18000, 0x46B18000,
|
||||
0x5B300E4E, 0x5B300004, 0x6E642000, 0x4225E000, 0xC39A8024, 0xC7380068, 0xC6B81C20, 0x99005B78,
|
||||
0xDB980000, 0xDBD80001, 0x00000000, 0xC2000000, 0xDF600040, 0x5E200080, 0x8400033A, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC000490E, 0xCA000000, 0xC00049A0, 0xCA800000,
|
||||
0xC000492A, 0xCA400000, 0xC000496A, 0xCB000000, 0xC0004956, 0xCAC00000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE14, 0x15000000, 0x76318000, 0x76718000, 0x76B18000, 0x84000282, 0xC201FFFE, 0x76318000,
|
||||
0x5AEC0002, 0x6B2D0010, 0x5EA00000, 0x84000002, 0x6A2D0000, 0x8000FFF8, 0xC7200000, 0x62016008,
|
||||
0xC0004956, 0xCEC00000, 0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000, 0x5B744E20, 0x58340000,
|
||||
0xC9C00000, 0xC00049A0, 0xCA000000, 0xC3000000, 0xC5F04020, 0xC2400000, 0xC5E50040, 0x7E412000,
|
||||
0x76610000, 0xCE000000, 0xC0004980, 0x40300000, 0xCEC00000, 0xC161FFFE, 0x5955FFFE, 0x15400000,
|
||||
0x00000000, 0xC000496A, 0xCA400000, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76252000, 0xCE400000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000,
|
||||
0x5B744E20, 0x5834000E, 0xC2000000, 0xCA0000E0, 0x58340008, 0xC2400000, 0xCA420080, 0x5834000C,
|
||||
0xC2800000, 0xCA832018, 0x6E644010, 0x42250000, 0x4229E000, 0xC39A8008, 0x58340008, 0xCB809020,
|
||||
0x58340008, 0xC2800000, 0xCA810018, 0x6EE0A000, 0x6EE44000, 0x46610000, 0x46E10000, 0x5A200008,
|
||||
0x5A200E28, 0x42290000, 0xC6380068, 0xC6F81C20, 0x99005B78, 0xDB980000, 0xDBD80001, 0x00000000,
|
||||
0xC000495A, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, 0xCC400000, 0xC0001A1C, 0xCA000000,
|
||||
0xC2400008, 0x6A452000, 0x76610000, 0x84000EAA, 0xC0000A28, 0xC3800000, 0xCB840030, 0xC0000A14,
|
||||
0xC3400000, 0xCB440030, 0xC0004880, 0xCB040000, 0xB7B40052, 0x58041802, 0xCAC00000, 0xA7000058,
|
||||
0x00000000, 0x00000000, 0xA6C8D7E8, 0xC1000000, 0xC6D00020, 0xC0004980, 0x40100000, 0xCA800000,
|
||||
0x80000058, 0x00000000, 0x00000000, 0x00000000, 0x8000D7A0, 0x00000000, 0xC2800000, 0xC7282020,
|
||||
0xC000490E, 0xCA400000, 0x6BE9E000, 0x00000000, 0x77E52000, 0x8400D758, 0x6EA0A000, 0x6E944000,
|
||||
0x45610000, 0x46A10000, 0x5A204E20, 0x5820000C, 0xCA000000, 0xC0004946, 0xCE800000, 0xA6220388,
|
||||
0x00000000, 0xC2200060, 0xC0004948, 0xCE000010, 0xCE001040, 0xC240000A, 0xC000494A, 0xCE400000,
|
||||
0xC2B60002, 0xC0004964, 0xCE801B08, 0x99005E48, 0xC00048A0, 0xC8840000, 0x00000000, 0xC0004946,
|
||||
0xCBC00000, 0x00000000, 0x00000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000, 0x5BB84E20,
|
||||
0x99005C08, 0xDBD80000, 0xDB980001, 0x00000000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050,
|
||||
0xC000491C, 0x99005E00, 0xC9400001, 0xC9800000, 0x00000000, 0x99005B78, 0xD9580000, 0xD9980001,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x99005840, 0xDBD80000, 0xDB980001,
|
||||
0xC7D80000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0x6FF8A000, 0x6FD44000, 0x4579C000,
|
||||
0x47F9C000, 0x5BB84E20, 0x58380010, 0xCA000000, 0xC0004874, 0xC8040000, 0x6C908000, 0x44908000,
|
||||
0x44908000, 0x40100000, 0xCA400000, 0xC4340000, 0x00000000, 0xC7400000, 0xCE000000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x15400000, 0x00000000, 0xC000490E, 0xCA400000, 0xC2800002, 0x6ABD4000, 0x72A52000,
|
||||
0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0x990062F0, 0xC0004836, 0xC9400000,
|
||||
0xC1800002, 0x00000000, 0x00000000, 0x00000000, 0xA8E2FFC8, 0x00000000, 0x58380000, 0xC9000000,
|
||||
0xC00049A0, 0xCA000000, 0xC2800000, 0xC5290040, 0x72A10000, 0xCE000000, 0xC1220002, 0xD90C0000,
|
||||
0xC2000000, 0xC0000A14, 0xCA040030, 0xC0000A28, 0xC2500002, 0xCE440808, 0x58880002, 0xB608FFF8,
|
||||
0xC00048A0, 0xC0800000, 0xCC840000, 0x8000D368, 0xC0004946, 0xCBC00000, 0xC161FFFE, 0x5955FFFE,
|
||||
0x15400000, 0x00000000, 0xC000490E, 0xCA400000, 0xC2800002, 0x6ABD4000, 0x72A52000, 0xCE400000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000,
|
||||
0x5BB84E20, 0x58380008, 0xCA000000, 0x5838000C, 0xCA400000, 0xC3400000, 0xC6340008, 0xC000494E,
|
||||
0xCF400000, 0xC2800000, 0xC62A0080, 0xC3000000, 0xC6308020, 0x6F304000, 0x43298000, 0xC000493C,
|
||||
0xCF000000, 0xC2C00000, 0xC66C0080, 0xC0004950, 0xCEC00000, 0xC2800000, 0xC66AE028, 0xC0004954,
|
||||
0xCE800000, 0x5F740000, 0x84000188, 0x5E300028, 0x462D2000, 0x84000152, 0x462D2000, 0x8800011A,
|
||||
0x5E300018, 0x462D2000, 0x88000012, 0x462D2000, 0x8400002A, 0x00000000, 0x800000A8, 0x00000000,
|
||||
0x99005F88, 0xDBD80000, 0xDB980001, 0xC7800000, 0xC3400002, 0xC000494E, 0xCF400000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x15400000, 0x00000000, 0xC000490E, 0xCA400000, 0xC2800002, 0x6ABD4000, 0x7E814000,
|
||||
0x76A52000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0xC2200060, 0xC0004948,
|
||||
0xCE001040, 0xC2000000, 0xC000494C, 0xCE000000, 0x80000068, 0x00000000, 0x99005F88, 0xDBD80000,
|
||||
0xDB980001, 0xC7800000, 0x99006188, 0xDBD80000, 0xDB980001, 0xC7800000, 0xC2200058, 0xC0004948,
|
||||
0xCE001040, 0xC2000002, 0xC000494C, 0xCE000000, 0xC2000006, 0xC0001006, 0xCE000000, 0x5838000A,
|
||||
0xCA400000, 0xC2200982, 0x5A203B6E, 0xC0001008, 0xCE000000, 0xC000100A, 0xCE400000, 0xC0004954,
|
||||
0xCA800000, 0xC200000C, 0xC000494A, 0xCE000000, 0xC0004948, 0xCE800010, 0xC2B60000, 0xC0004964,
|
||||
0xCE800000, 0x99005E48, 0xC00048A0, 0xC8840000, 0x00000000, 0xC0004946, 0xCBC00000, 0xC000494C,
|
||||
0xCA000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000, 0x5BB84E20, 0x5E200000, 0x840000E2,
|
||||
0x00000000, 0x99005C08, 0xDBD80000, 0xDB980001, 0x00000000, 0x99005950, 0xC000491C, 0xC1400000,
|
||||
0xC9420050, 0xC000491C, 0x99005E00, 0xC9400001, 0xC9800000, 0x00000000, 0x99005B78, 0xD9580000,
|
||||
0xD9980001, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x99005840, 0xDBD80000,
|
||||
0xDB980001, 0xC7D80000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0xC000493C, 0xCA800000,
|
||||
0xC000494E, 0xCAC00000, 0xC3000018, 0xC3400006, 0x5E200000, 0x84000012, 0xC2800000, 0xC2C00000,
|
||||
0xC300001E, 0xC3400000, 0xC6AC1080, 0xC72C0420, 0xC76C0818, 0x58380010, 0xCA800000, 0x58380008,
|
||||
0xCEC00000, 0xC6280108, 0xC0004874, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000,
|
||||
0xCB000000, 0xC4340000, 0x00000000, 0xC7400000, 0xCE800000, 0xC0004952, 0xCE800000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xA8E2FFC8, 0x00000000, 0xC000494C, 0xCA000000, 0xC0004950, 0xCAC00000,
|
||||
0x5E200000, 0x84000052, 0xDFE80000, 0x7E814000, 0x5834001A, 0xCE800000, 0x990062F0, 0xC0004834,
|
||||
0xC9400000, 0xC1800002, 0x990062F0, 0xC0004838, 0xC9400000, 0xC6D80000, 0xC1220002, 0xD90C0000,
|
||||
0x5E200000, 0x84000028, 0x5838002C, 0xCB000000, 0xDFE80000, 0x00000000, 0x58380014, 0xCF000000,
|
||||
0x80000040, 0xC2A1FFFE, 0x5AA9FFFE, 0x58380000, 0xC9000000, 0xC00049A0, 0xCB000000, 0xC2C00000,
|
||||
0xC52D0040, 0x72F18000, 0xCF000000, 0x5838000A, 0xCE800000, 0xC3000000, 0xC0000A14, 0xCB040030,
|
||||
0xC2D00002, 0xC0000A28, 0xCEC40808, 0xC000494E, 0xCA800000, 0x58880002, 0xB4B0FFF8, 0xC00048A0,
|
||||
0xC0800000, 0xCC840000, 0x5EA80000, 0x84000162, 0x5E200000, 0x84000150, 0xC000493C, 0xCA800000,
|
||||
0x00000000, 0x00000000, 0x5AA80060, 0xCE800000, 0x99005F88, 0xDBD80000, 0xDB980001, 0xC7800000,
|
||||
0x99006188, 0xDBD80000, 0xDB980001, 0xC7800000, 0x58380000, 0xCAC00000, 0x00000000, 0xC2000000,
|
||||
0xC6E04020, 0xC0004952, 0xCAC00000, 0x58380000, 0xCA800000, 0xC30C0002, 0xC6300020, 0xA6800078,
|
||||
0x00000000, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC0001800, 0xCA000000,
|
||||
0x00000000, 0x00000000, 0xA60CFFCA, 0xC6F00508, 0xC6B0C408, 0xCF000000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE14, 0x15000000, 0x8000C9B0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000C948,
|
||||
0xDCBC0001, 0x5FFC0000, 0x8400003A, 0xC3800002, 0xDB880001, 0x5FFC0004, 0x8400C27A, 0xC3800000,
|
||||
0xDB880001, 0xC3CE0002, 0xC0000800, 0xCFC00708, 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x94000001,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xCBC00000, 0xC4380000, 0x00000000, 0xC000480E, 0xCA000000, 0xC0004858, 0xCB440000, 0x00000000,
|
||||
0x00000000, 0x46350000, 0x88000098, 0x00000000, 0xA7C00028, 0xC0004854, 0xC1000002, 0xCD040000,
|
||||
0xC11C0000, 0xC000082C, 0xCD040E08, 0x800000C0, 0x00000000, 0xA7D20118, 0x00000000, 0xC7E14048,
|
||||
0xC2400000, 0xC6246030, 0xC200006A, 0x46610000, 0xC6240038, 0xC0000810, 0xCE440038, 0x8000FF58,
|
||||
0xC2000000, 0xC0000808, 0xCA040018, 0xC11C0000, 0xC000082C, 0xCD040E08, 0x5A200002, 0x5E600010,
|
||||
0x8400FFF8, 0xC2000000, 0xC0000808, 0xCE040018, 0xC3400000, 0x80000010, 0xC1200002, 0xC0000818,
|
||||
0xCD041008, 0x5B740002, 0xC0004858, 0xCF440000, 0x99005590, 0xC0004848, 0xC9440000, 0xC1800000,
|
||||
0xC11C0002, 0xC000082C, 0xCD040E08, 0x800005E8, 0x5B740002, 0xC0004858, 0xCF440000, 0xC7800000,
|
||||
0xC13C0002, 0xCD001E08, 0xC0004848, 0xC9440000, 0xC1800000, 0xC000082C, 0xC9840030, 0x59540002,
|
||||
0xC0004848, 0xCD440000, 0x58880002, 0xB4980560, 0x00000000, 0xC0800000, 0x80000550, 0xC000487C,
|
||||
0xC8040000, 0x00000000, 0x00000000, 0x40080000, 0xCBC00000, 0xC4280000, 0x00000000, 0xA7C00110,
|
||||
0xC000484C, 0xCA040000, 0xC2400000, 0xC0001AEC, 0xCA440020, 0x5A200002, 0xC000484C, 0xCE040000,
|
||||
0xB624006A, 0xC6800000, 0xC13C0002, 0xCD001E08, 0xC0004848, 0xC9440000, 0xC1800000, 0xC000082C,
|
||||
0xC9840030, 0x59540002, 0xC0004848, 0xCD440000, 0x58880002, 0xB4980450, 0x00000000, 0xC0800000,
|
||||
0x80000440, 0xC0004854, 0xC1000004, 0xCD040000, 0xC0000820, 0xC2000002, 0xCE040000, 0xC2000000,
|
||||
0xC000484C, 0xCE040000, 0xC0004858, 0xCE040000, 0x8000FF10, 0xC0004854, 0xC1000000, 0xCD040000,
|
||||
0xC11C0000, 0xC000082C, 0xCD040E08, 0x99005590, 0xC0004848, 0xC9440000, 0xC1800000, 0xC1200000,
|
||||
0xC0000818, 0xCD041008, 0xC11C0002, 0xC000082C, 0xCD040E08, 0xC2000000, 0xC000484C, 0xCE040000,
|
||||
0x80000340, 0xC0001AC0, 0xCB840000, 0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xCBC00000, 0xC4280000, 0x00000000, 0x00000000, 0xC6800000, 0xC13C0000, 0xCD001E08, 0xA780022A,
|
||||
0x00000000, 0x00000000, 0xA7C001EA, 0x00000000, 0xC0001B00, 0xC2060006, 0xCE040310, 0xA7E801A2,
|
||||
0x00000000, 0xC0004850, 0xCA040000, 0xC2400000, 0xC0001AEC, 0xCA448020, 0x5A200002, 0xC0004850,
|
||||
0xCE040000, 0xB624008A, 0x00000000, 0xC6800000, 0xC13C0002, 0xCD001E08, 0xC0001ACC, 0xC2000002,
|
||||
0xCE040008, 0xC0004848, 0xC9440000, 0xC1800000, 0xC000082C, 0xC9840030, 0x59540002, 0xC0004848,
|
||||
0xCD440000, 0x58880002, 0xB49801A8, 0x00000000, 0xC0800000, 0x80000198, 0xC0004854, 0xC1000000,
|
||||
0xCD040000, 0xC11C0000, 0xC000082C, 0xCD040E08, 0x99005590, 0xC0004848, 0xC9440000, 0xC1800000,
|
||||
0xC2000000, 0xC0000820, 0xCE040000, 0xC1200000, 0xC0000818, 0xCD041008, 0xC11C0002, 0xC000082C,
|
||||
0xCD040E08, 0xC0004850, 0xCE040000, 0xC2000002, 0xC0001ACC, 0xCE040010, 0x800000D0, 0xC2000002,
|
||||
0xC0004850, 0xCE040000, 0x8000FE70, 0xC2000000, 0xC0004850, 0xCE040000, 0xA7E60012, 0x00000000,
|
||||
0xC2000002, 0xC0001B00, 0xCE040008, 0x8000FE58, 0x00000000, 0xA7860032, 0x00000000, 0xC6800000,
|
||||
0xC13C0002, 0xCD001E08, 0xC2020002, 0xC7E2A548, 0xC0001B00, 0xCE040000, 0x8000FE00, 0xC2040002,
|
||||
0xC0001B00, 0xCE040208, 0x8000FDE0, 0xC2C80002, 0x6AC56000, 0xDACC0000, 0xC0004854, 0xCB440000,
|
||||
0xC0004848, 0xCB840000, 0xC0000838, 0xC3C00000, 0xCBC40030, 0x5EF40004, 0x8400000A, 0xC3000000,
|
||||
0xC0001ACC, 0xCF040108, 0x47BD8000, 0x84000012, 0x47BD8000, 0x88000018, 0xC1006E8C, 0x8000B6B0,
|
||||
0xC0004840, 0xCC840000, 0x8000F698, 0xC0001AC0, 0xCAC40000, 0xC0004854, 0xCB440000, 0xA6C0FBB2,
|
||||
0x00000000, 0x5EF40000, 0x8400F6F2, 0x5EF40002, 0x8400F982, 0x5EF40004, 0x8400FB82, 0xC1006CE8,
|
||||
0x8000B628, 0x00000000, 0xC0800000, 0xDF4B0040, 0xC0004900, 0xCB800000, 0xC2000000, 0xC000490A,
|
||||
0xA78000B0, 0xCBC00000, 0xC1000000, 0xD9000001, 0xC1000002, 0xD90C0000, 0x6FF46000, 0x47F5A000,
|
||||
0x5B744C80, 0xC2400000, 0x58340004, 0xCA400080, 0xC0004900, 0xCE000008, 0x5A640002, 0x58340004,
|
||||
0xC6500080, 0xCD000080, 0xC0004914, 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000,
|
||||
0xC0000408, 0xCE000000, 0xA78200B8, 0xC0004908, 0xCBC00000, 0xC1000000, 0xD9000001, 0xC1000002,
|
||||
0xD90C0000, 0x6FF4A000, 0x6FD44000, 0x4575A000, 0x47F5A000, 0x5B744E20, 0xC2800000, 0x58340006,
|
||||
0xCA800080, 0xC2000000, 0xC0004900, 0xCE000108, 0x5EA80002, 0x58340006, 0xC6900080, 0xCD000080,
|
||||
0x5A7C0020, 0xC2000002, 0x6A250000, 0xC0000408, 0xCE000000, 0xDCA80001, 0x5EA80000, 0x8400B498,
|
||||
0x00000000, 0xA4800210, 0x00000000, 0xC3C00000, 0xC000140E, 0xCBC00020, 0xC3400000, 0xC2400000,
|
||||
0x6FF86000, 0x47F9C000, 0x5BB84C80, 0x58380008, 0xCB400080, 0x58380006, 0xCA400080, 0x5F740002,
|
||||
0x58380008, 0xC7500080, 0xCD000080, 0xC2000000, 0x58380004, 0xCA020080, 0xC3000000, 0x5838000C,
|
||||
0xCB000028, 0x5A640002, 0x46250000, 0x8400FFF8, 0xC2400000, 0x58380006, 0xC6500080, 0xCD000080,
|
||||
0xC2000000, 0x5838000A, 0xCA020080, 0x5B300002, 0x5838000C, 0xC7100028, 0xCD000028, 0xC2420020,
|
||||
0x5A200004, 0x46612000, 0x8400FFF8, 0xC2000000, 0x5838000A, 0xC6101080, 0xCD001080, 0xC0004966,
|
||||
0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000, 0x5F740000, 0x84000028, 0xC0004912,
|
||||
0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x5F300020, 0x84000028,
|
||||
0xC0004924, 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0xA4820050,
|
||||
0xC2400000, 0xC000140E, 0xCA408020, 0xC2000002, 0xC0004900, 0xCE000008, 0xC000490A, 0xCE400000,
|
||||
0xC1000000, 0xD9000001, 0xD8400080, 0xC1000004, 0xD9000001, 0xA4840250, 0x00000000, 0xC3C00000,
|
||||
0xC000140E, 0xCBC10020, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000,
|
||||
0x5BB84E20, 0x5838002E, 0xCA800080, 0x58380006, 0xCA020080, 0xC3400000, 0x5838002E, 0xCB420080,
|
||||
0x5AA80002, 0x46290000, 0x8400FFF8, 0xC2800000, 0x5838002E, 0xC6900080, 0xCD000080, 0x5F740002,
|
||||
0x5838002E, 0xC7501080, 0xCD001080, 0xC0004968, 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000,
|
||||
0xCE400000, 0xC000492A, 0xCA800000, 0x5E740000, 0x84000028, 0xC0004910, 0xCA000000, 0xC2C00002,
|
||||
0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x6ABD4010, 0xA680009A, 0x00000000, 0x58380032,
|
||||
0xCA000000, 0x58000002, 0xCA400000, 0x5838000C, 0x00000000, 0xCE000001, 0xCE400000, 0xC000492A,
|
||||
0xCA000000, 0xC2C00002, 0x6AFD6000, 0x72E10000, 0xCE000000, 0xC000492C, 0xCA000000, 0xC2C00002,
|
||||
0x6AFD6000, 0x72E10000, 0xCE000000, 0x80000028, 0xC000492C, 0xCA000000, 0xC2C00002, 0x6AFD6000,
|
||||
0x7EC16000, 0x76E10000, 0xCE000000, 0xA4880128, 0xC2C00000, 0xC000140E, 0xCAC20020, 0xC000490E,
|
||||
0xCA400000, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76252000, 0xCE400000, 0xC000496A, 0xCA400000,
|
||||
0xC2000002, 0x6A2D0000, 0x72252000, 0xCE400000, 0x6EF0A000, 0x6ED44000, 0x45718000, 0x46F18000,
|
||||
0x5B304E20, 0x58300000, 0xCA000000, 0x00000000, 0xC2400002, 0x76252000, 0x8400005A, 0x58300000,
|
||||
0xCA400000, 0xC2800000, 0x00000000, 0xC6684020, 0xC24C0002, 0xC6A40020, 0xC624C408, 0x58300010,
|
||||
0xCA400508, 0x00000000, 0xC0001800, 0xCE400000, 0xA4860050, 0xC2400000, 0xC000140E, 0xCA418020,
|
||||
0xC2020002, 0xC0004900, 0xCE000108, 0xC0004908, 0xCE400000, 0xC1000000, 0xD9000001, 0xD8400080,
|
||||
0xC1000004, 0xD9000001, 0xC0001408, 0xCC800000, 0xC10E0002, 0xD90C0000, 0x8000ED98, 0xDFBC0001,
|
||||
0xC000496E, 0x99006298, 0xC9400000, 0xC7D80000, 0x00000000, 0xC5700000, 0x5EF00020, 0x88000130,
|
||||
0x6F346000, 0x4735A000, 0x5B744C80, 0x58340008, 0xC2400000, 0xCA400080, 0x00000000, 0xC2000000,
|
||||
0x5A640002, 0xCE400080, 0x58340004, 0xCA000080, 0x00000000, 0x00000000, 0x5E200002, 0xCE000080,
|
||||
0xC0004912, 0xCA800000, 0xC2400002, 0x6A712000, 0x72694000, 0xCE800000, 0x5E200000, 0x8400003A,
|
||||
0xC000480A, 0xCA000000, 0xC0000408, 0xCA800000, 0x76610000, 0x00000000, 0x72294000, 0xCE800000,
|
||||
0x80000020, 0xC0004914, 0xCA000000, 0x7E412000, 0x00000000, 0x76610000, 0xCE000000, 0x800000B8,
|
||||
0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000, 0x5B744E20, 0x5834002E, 0xC2400000, 0xCA420080,
|
||||
0x00000000, 0xC2000000, 0x5A640002, 0xC6501080, 0xCD001080, 0x58340006, 0xCA000080, 0x00000000,
|
||||
0x00000000, 0x5A200002, 0xCE000080, 0xC0004910, 0xCA400000, 0xC2000002, 0x6A2D0000, 0x72252000,
|
||||
0xCE400000, 0xC2000002, 0x6A310000, 0xC000042A, 0xCE000000, 0xC1040002, 0xD90C0000, 0x00000000,
|
||||
0x8000EB08, 0x00000000, 0xC4980930, 0x9D000000, 0xC5580030, 0xC0000838, 0xCD840000, 0xC1440200,
|
||||
0xC1C03200, 0xC55C1078, 0xC000100E, 0x9D000000, 0xCD800000, 0xC000100C, 0xCDC00000, 0xC0004862,
|
||||
0xC9C00000, 0x00000000, 0x00000000, 0xD9D80001, 0xC0007200, 0x401C0000, 0x5DC07400, 0x8800FFFA,
|
||||
0x5C000200, 0xCD800000, 0xC1F0000A, 0x71D4A000, 0xDD980000, 0xDD9C0001, 0x41D8E000, 0xC5D40268,
|
||||
0xC0001010, 0xCD400000, 0x6C9C8000, 0x449CE000, 0x449CE000, 0x59DC0004, 0xC1601260, 0xC5D40268,
|
||||
0x9D000000, 0xC0001012, 0xCD400000, 0x00000000, 0x00000000, 0xD9580000, 0x6D586000, 0x4558C000,
|
||||
0x59984C80, 0xD9980001, 0x5818000A, 0xC1800000, 0xC9800080, 0xC0005400, 0x6D5CA000, 0x401C0000,
|
||||
0x40180000, 0xC9400000, 0x58000002, 0x00000000, 0xC9C00000, 0xC0004930, 0xCD400000, 0xC0004932,
|
||||
0xCDC00000, 0x59980004, 0xC1C20020, 0xB59CFFF8, 0x00000000, 0xC1800000, 0xDD9C0001, 0x581C000A,
|
||||
0xCD800080, 0x581C000C, 0xC1800000, 0xC9800028, 0xC1C00002, 0xDD940000, 0x69D4E000, 0x5D980002,
|
||||
0xCD800028, 0xC0004924, 0xC9800000, 0x00000000, 0x9D000000, 0x00000000, 0x71D8C000, 0xCD800000,
|
||||
0xC000492A, 0xC9400000, 0xC1C00002, 0x69D8E000, 0x7DC0C000, 0x7594A000, 0xCD400000, 0xC000492C,
|
||||
0xC9400000, 0xDD800001, 0x58000032, 0x75D4A000, 0x84000078, 0xC9400001, 0xC9800000, 0xDD800001,
|
||||
0x5800000C, 0x00000000, 0xCD400001, 0xCD800000, 0xC000492C, 0xC9400000, 0xC000492A, 0xC9800000,
|
||||
0x71D4A000, 0xC000492C, 0xCD400000, 0x71D8C000, 0xC000492A, 0xCD800000, 0x9D000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC0004862, 0xC9800000, 0x00000000, 0xC1C00200, 0x4194C000, 0x45D8E000,
|
||||
0x8800FFFA, 0xC5D80000, 0xC0004862, 0xCD800000, 0xC0001406, 0xC9800000, 0xC1C00002, 0x9D000000,
|
||||
0xC5D80A08, 0xC5581050, 0xCD800000, 0xC0004930, 0xC9800000, 0xC0004932, 0xC9C00000, 0xC140000E,
|
||||
0xC5581C20, 0xDD940000, 0xC0007200, 0x40140000, 0x5D407400, 0x8800FFFA, 0x5C000200, 0xCD800000,
|
||||
0x58000002, 0x5D407400, 0x8800FFFA, 0x5C000200, 0xCDC00000, 0xDD540000, 0xC1C00000, 0x58140006,
|
||||
0xC9C20080, 0xC1800000, 0x58140000, 0xC98000E0, 0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC00000,
|
||||
0xDD980000, 0xC1C00022, 0xC5D80D78, 0xDD940001, 0xC5581C20, 0xC000491C, 0xCD800000, 0xDD540000,
|
||||
0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000, 0x58140004, 0xC9820080, 0x00000000, 0x59DC0002,
|
||||
0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000, 0x58140006, 0xC5D81080, 0xCD801080, 0xC0004860,
|
||||
0xC9400000, 0xC1820080, 0xC1D00002, 0x58146B00, 0xD5800000, 0x58000002, 0xD5800001, 0x59540004,
|
||||
0xB558FFF8, 0xC0004860, 0xC1400000, 0xCD400000, 0xDD980001, 0x9D000000, 0xDD940000, 0xC0001404,
|
||||
0xCDC00808, 0xC1C00000, 0xC1800200, 0x5D980004, 0xDF5D0050, 0x45D8A000, 0x8800FFDA, 0xDD800001,
|
||||
0x5800000C, 0x00000000, 0xC9400001, 0xC9800000, 0xC1C00002, 0xC5D43F08, 0xC5D81E08, 0xC0004862,
|
||||
0xC9C00000, 0x00000000, 0x00000000, 0x581C7200, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD400000,
|
||||
0x58000002, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0xC0004862, 0xC9C00000, 0x00000000,
|
||||
0xC15004C0, 0xC5D40068, 0xDD9C0000, 0xC5D41C20, 0xC1C00000, 0xDD800001, 0x58000030, 0xC9C00080,
|
||||
0xDD800001, 0x58000002, 0xC9800000, 0x6DDC2000, 0xC000491C, 0x41D8E000, 0xCD400001, 0xCDC00000,
|
||||
0xDD940001, 0xC1C00000, 0x58140030, 0xC9C00080, 0xC1800000, 0x58140006, 0xC9820080, 0x00000000,
|
||||
0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000, 0x58140030, 0xC5D80080, 0xCD800080,
|
||||
0xC1C00000, 0xDF5C0040, 0x5DDC0080, 0x8400FFD2, 0x00000000, 0x9D000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440068, 0xC1A0FFFE, 0x59980E28, 0xC000100C, 0xCD400000,
|
||||
0xC000100E, 0xCD800000, 0xC0004964, 0xC9800000, 0x00000000, 0xC170000A, 0x7194A000, 0x6C988000,
|
||||
0x4498C000, 0x4498C000, 0x59980004, 0xC5940278, 0xC0001010, 0xCD400000, 0xC0004946, 0xC9400000,
|
||||
0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000, 0x45D8C000, 0x4558C000, 0xC000494A, 0xC9400000,
|
||||
0xC0004948, 0xC9C00000, 0x4194C000, 0xC1400012, 0xC55C1820, 0x9D000000, 0xC59C0270, 0xC0001012,
|
||||
0xCDC00000, 0xC1400000, 0x58000012, 0xC9410040, 0xC0004950, 0xC9C00000, 0xC5580000, 0xC5940840,
|
||||
0xC5581080, 0xD9940000, 0xC000493C, 0xC9400000, 0xC0004954, 0xC9800000, 0x59DC00A8, 0x455CE000,
|
||||
0x41D8E000, 0x5D5C0030, 0x8800FFF8, 0xC1C00030, 0xC1800000, 0xC5D84030, 0xC1400000, 0xC5D40010,
|
||||
0x5DD40002, 0x8400005A, 0x5DD40004, 0x84000082, 0x5DD40006, 0x840000AA, 0x5DD80026, 0x840000D2,
|
||||
0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400000, 0x59980002, 0x8000FFA8, 0xDD540000,
|
||||
0xDD800001, 0x58000008, 0x40180000, 0xCD4000C0, 0x59980002, 0x8000FF70, 0xDD540000, 0xDD800001,
|
||||
0x58000008, 0x40180000, 0xCD400080, 0x59980002, 0x8000FF38, 0xDD540000, 0xDD800001, 0x58000008,
|
||||
0x40180000, 0xCD400040, 0x59980002, 0x8000FF00, 0x00000000, 0x9D000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x58000012, 0xC9400000, 0xC0004954, 0xC9C00000, 0xC0004950, 0xC9400080, 0xDD800001,
|
||||
0x58000028, 0x5D9C0000, 0x8400003A, 0x5D9C0002, 0x8400003A, 0x5D9C0004, 0x84000052, 0xC55B0040,
|
||||
0xC55C08C0, 0xCD800041, 0xCDC008C0, 0x80000048, 0xCD400000, 0x80000038, 0xC55900C0, 0xC55C1840,
|
||||
0xCD8000C1, 0xCDC01840, 0x80000010, 0xC55A0080, 0xC55C1080, 0xCD800081, 0xCDC01080, 0x9D000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040,
|
||||
0x8800FFFA, 0xC5940000, 0x9D000000, 0xCD400000, 0x00000000, 0x00000000, 0x9D000000, 0x4158A000,
|
||||
0xCD400000, 0x00000000,
|
||||
};
|
||||
|
||||
static unsigned int danube_fw_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_DANUBE_H
|
||||
612
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_danube_retx.h
Normal file
612
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_danube_retx.h
Normal file
@@ -0,0 +1,612 @@
|
||||
#ifndef IFXMIPS_ATM_FW_DANUBE_H
|
||||
#define IFXMIPS_ATM_FW_DANUBE_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_danube.h
|
||||
** PROJECT : Danube
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 15
|
||||
|
||||
|
||||
static unsigned int firmware_binary_code[] = {
|
||||
0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xC2000000, 0xDA080001, 0x80006018, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80005FF0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1001DA6, 0x8D3C0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80005EF0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400000, 0xC0004840, 0xC8840000, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400002, 0xC0004840, 0xC8840000, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3C00004, 0xDBC80001, 0xC10C0002, 0xD90C0000, 0x8000FEC8, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC10E0002, 0xD90C0000, 0xC0004808, 0xC8400000, 0xC2001B4C, 0x8E100000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC3E02252, 0x5BFC001E, 0xC0004002, 0xCFC00000, 0xC3C00000,
|
||||
0xDBC80001, 0xC1400008, 0xC1900000, 0x71948000, 0x15000100, 0xC140000A, 0xC1900002, 0x71948000,
|
||||
0x15000100, 0xC140000C, 0xC1900004, 0x71948000, 0x15000100, 0xC1400004, 0xC1900006, 0x71948000,
|
||||
0x15000100, 0xC1400006, 0xC1900008, 0x71948000, 0x15000100, 0xC140000E, 0xC190000A, 0x71948000,
|
||||
0x15000100, 0xC1400000, 0xC190000C, 0x71948000, 0x15000100, 0xC1400002, 0xC190000E, 0x71948000,
|
||||
0x15000100, 0xC0400000, 0xC11C0000, 0xC000082C, 0xCD040E08, 0xC11C0002, 0xC000082C, 0xCD040E08,
|
||||
0xC0400002, 0xC11C0000, 0xC000082C, 0xCD040E08, 0xC0000824, 0x00000000, 0xCBC00001, 0xCB800001,
|
||||
0xCB400001, 0xCB000000, 0xC0004878, 0x5BFC4000, 0xCFC00001, 0x5BB84000, 0xCF800001, 0x5B744000,
|
||||
0xCF400001, 0x5B304000, 0xCF000000, 0xC0000A10, 0x00000000, 0xCBC00001, 0xCB800000, 0xC0004874,
|
||||
0x5BFC4000, 0xCFC00001, 0x5BB84000, 0xCF800000, 0xC30001FE, 0xC000140A, 0xCF000000, 0xC3000000,
|
||||
0x7F018000, 0xC000042E, 0xCF000000, 0xC000040E, 0xCF000000, 0xC3C1FFFE, 0xC000490E, 0xCFC00080,
|
||||
0xC000492C, 0xCFC00080, 0xC0004924, 0xCFC00040, 0xC0004912, 0xCFC00040, 0xC0004966, 0xCFC00040,
|
||||
0xC0004968, 0xCFC00080, 0xC000496A, 0xCFC00080, 0xC3C00000, 0xC2800020, 0xC3000000, 0x7F018000,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x5838000A, 0xCF000000, 0x5BFC0002, 0xB7E8FFA8,
|
||||
0x00000000, 0xC3C00000, 0xC2800010, 0x6FF86000, 0x47F9C000, 0x5BB84C80, 0xC3400000, 0x58380004,
|
||||
0xCB420080, 0x00000000, 0x58380008, 0xCF400080, 0x5BFC0002, 0xB7E8FF90, 0x00000000, 0xC3C00000,
|
||||
0xC2800020, 0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000,
|
||||
0x5BB84E20, 0x58380008, 0xCF400420, 0x5838000A, 0xCF000000, 0x5BFC0002, 0xB7E8FF90, 0x00000000,
|
||||
0x00000000, 0xC0004816, 0xC3C00000, 0xCBC00080, 0x00000000, 0x00000000, 0xC1000000, 0xD9040001,
|
||||
0xDBC40080, 0xC1000006, 0xD9040001, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0xC3C00000,
|
||||
0xDCFC2008, 0x5FFC0002, 0x00000000, 0x98C08D62, 0xC0004730, 0xC9400000, 0xC0004732, 0xC0001AF2,
|
||||
0xCBC00000, 0x00000000, 0x00000000, 0xA7C20450, 0xC000474A, 0xCA800000, 0x00000000, 0x00000000,
|
||||
0x5D280000, 0x8400FFC8, 0x00000000, 0xC121FFFE, 0x5911FEF4, 0x15000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC2802000, 0x6EA8E010, 0xC0004200, 0xC2400000, 0x7E410000, 0xC1000000, 0xCE400001, 0xCE400001,
|
||||
0xCE400001, 0xCE400001, 0x5EA80002, 0x8400FFC0, 0xC0004300, 0xC2800200, 0x6EA84010, 0xCE400001,
|
||||
0xCE000001, 0xCE400001, 0xCE000001, 0xCE400001, 0xCE000001, 0xCE400001, 0xCE000001, 0x5EA80002,
|
||||
0x8400FFA0, 0xC0004700, 0xC2800200, 0x6EA8E010, 0xCE400001, 0xCE400001, 0xCE400001, 0xCE400001,
|
||||
0x5EA80002, 0x8400FFC0, 0xC0004740, 0xCE400000, 0xC0004742, 0xC1000200, 0x5D100002, 0xCD000000,
|
||||
0xC0004744, 0xCE400000, 0xC0004746, 0xCE400000, 0xC0004748, 0xCE400000, 0xC000474A, 0xCE400000,
|
||||
0xC000474C, 0xC1000002, 0xCD000000, 0xC000474E, 0xCE400000, 0xC0004750, 0xCE400000, 0xC0004752,
|
||||
0xCE400000, 0xC0004754, 0xCE400000, 0xC0400000, 0xC11C0000, 0xC000082C, 0xCD040E08, 0xC0000838,
|
||||
0xCE400000, 0xC0000818, 0xCE400000, 0xC0000820, 0xCE400000, 0xC2804840, 0xC240485A, 0x98C086B0,
|
||||
0xC6800000, 0xC6540000, 0xC1800000, 0xC11C0002, 0xC000082C, 0xCD040E08, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x15000000, 0xC0000A10, 0xCB800000, 0xC0000A12, 0xCB400000, 0xC0000A14, 0xCB000000,
|
||||
0xC0000A16, 0xCAC00000, 0xC0000040, 0xC2800000, 0xCE800008, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC2800002,
|
||||
0xCE800008, 0xC0000A10, 0xCF800000, 0xC0000A12, 0xCF400000, 0xC0000A14, 0xCF000000, 0xC0000A16,
|
||||
0xCEC00000, 0xC1000000, 0xC00048A0, 0xCD000000, 0xC00048A2, 0xCD000000, 0xC0001AF2, 0xC1000000,
|
||||
0xCD000108, 0x80001020, 0x00000000, 0xC3C00000, 0xDCFC2008, 0x5FFC0002, 0x00000000, 0x98C08D62,
|
||||
0xC0004730, 0xC9400000, 0xC0004732, 0x800033C0, 0x00000000, 0xC3C00000, 0xDCFC2008, 0x5FFC0002,
|
||||
0x00000000, 0x98C08D62, 0xC0004730, 0xC9400000, 0xC0004732, 0xC0004810, 0xC9000000, 0xC000474A,
|
||||
0xC9400000, 0xA50007C8, 0x00000000, 0x5D140002, 0x840007BA, 0xC1000000, 0xC000484A, 0xC9000000,
|
||||
0xC0004740, 0xC8400000, 0x5D100000, 0x84000780, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FEF4,
|
||||
0x15000000, 0xC0004744, 0xC8800000, 0xC0001AF0, 0xC3000000, 0x58000002, 0xCB010040, 0x6C7C2000,
|
||||
0x5BFC4300, 0x98C08A88, 0xC1400000, 0xC4540028, 0x6C40A010, 0x5D240002, 0x84000202, 0x00000000,
|
||||
0xC0004742, 0xCA800000, 0x00000000, 0x00000000, 0x59280002, 0x6D130000, 0x6D130010, 0x44508000,
|
||||
0x8400067A, 0x00000000, 0x98C08870, 0xC4540000, 0xC6980000, 0xC241FFFE, 0xC6740000, 0x5D35FFFE,
|
||||
0x8400063A, 0x44748000, 0x8400062A, 0xC1000000, 0x6F502000, 0xC0004300, 0x40100000, 0xC1400000,
|
||||
0x58000000, 0xC9410040, 0xC1800000, 0xC0004814, 0xC9820040, 0x4570A000, 0xC10001FE, 0x4150A004,
|
||||
0x45948000, 0x880005B2, 0x4474C000, 0xC1000200, 0x4190C004, 0xC000473E, 0xC9000000, 0x00000000,
|
||||
0x00000000, 0x41188000, 0xCD000000, 0xC000471C, 0xC9000000, 0x00000000, 0x00000000, 0x41188000,
|
||||
0xCD000000, 0x98C087E8, 0xC4540000, 0x6C58A010, 0xC0004700, 0x58440002, 0x6C470000, 0x6C470010,
|
||||
0x47448000, 0x8400FFA8, 0xC7440000, 0xC0004740, 0xCC400000, 0xC0800000, 0xC0004744, 0xCC800000,
|
||||
0x800004B8, 0xC1000000, 0x583C0000, 0xC9000040, 0x00000000, 0x00000000, 0x45088000, 0x88000268,
|
||||
0xC1400000, 0x583C0000, 0xC9410040, 0xC1800000, 0xC0004814, 0xC9800040, 0x4570A000, 0xC10001FE,
|
||||
0x4150A004, 0x45948000, 0x8800042A, 0xC3800000, 0x583C0002, 0xCB820080, 0xC1000000, 0x583C0002,
|
||||
0xC9000080, 0x00000000, 0x00000000, 0x45388000, 0x84000232, 0xC0400002, 0xC0800000, 0xC3C00000,
|
||||
0xC000481A, 0xC8000000, 0x6F908000, 0x47908000, 0x47908000, 0x4011E000, 0xC000491E, 0xCFC00000,
|
||||
0xC3400000, 0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCAC00000,
|
||||
0xC4300000, 0x00000000, 0xC7340068, 0xC1000002, 0xC5341B08, 0xC100001C, 0xC5341050, 0xC100000C,
|
||||
0xC5340D18, 0xC000491C, 0xCF400000, 0xC3000000, 0xDF700040, 0x5D300080, 0x8800FFD0, 0xC000474A,
|
||||
0xC1000002, 0xCD000000, 0xC000491C, 0xCB400000, 0xC000491E, 0xCBC00000, 0x99007F18, 0xDB580000,
|
||||
0xDBD80001, 0x00000000, 0xC1400000, 0xC794A038, 0xC1800000, 0xC7980028, 0x58144200, 0xC9C00000,
|
||||
0xC1210000, 0x69188010, 0x7D008000, 0x751CE000, 0xCDC00000, 0x80000210, 0x00000000, 0xC1000000,
|
||||
0x583C0000, 0xC903E008, 0x00000000, 0x00000000, 0x5D100000, 0x8400002A, 0xC0004734, 0xC9000000,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x800000A8, 0xC1400000, 0x583C0000, 0xC9410040,
|
||||
0xC1800000, 0xC0004814, 0xC9820040, 0x4570A000, 0xC10001FE, 0x4150A004, 0x45948000, 0x88000142,
|
||||
0xC000473E, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0xC000471C, 0xC9000000,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0xC3800000, 0x583C0002, 0xCB820080, 0x00000000,
|
||||
0x00000000, 0x5D39FFFE, 0x8400004A, 0xC1400000, 0xC794A038, 0xC1800000, 0xC7980028, 0x58144200,
|
||||
0xC9C00000, 0xC1210000, 0x69188010, 0x7D008000, 0x751CE000, 0xCDC00000, 0x98C087E8, 0xC4540000,
|
||||
0x6C58A010, 0xC0004700, 0x58440002, 0x6C470000, 0x6C470010, 0xC0004740, 0xCC400000, 0xC0800000,
|
||||
0xC0004744, 0xCC800000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x8000F270, 0x00000000,
|
||||
0x00000000, 0x98C086F0, 0xC0004748, 0xC9800000, 0xC2000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC1400000, 0xC7D4A038, 0xC1800000, 0xC7D80028, 0x58144200,
|
||||
0xC9C00000, 0xC1210000, 0x69188010, 0x7D008000, 0x751CE000, 0xCDC00000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x98C087E8, 0xC7D40000, 0x6FD8A010, 0xC0004700, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x98C08870, 0xC7D40000, 0xC7980000, 0xC241FFFE, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08A88, 0xC1400000, 0xC7D40028, 0x6FC0A010,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08AB8, 0xC1400000, 0xC7D40028, 0x6FC0A010,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08AF0, 0xC7D40000, 0xC0004740, 0xC9C00000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98C08BE0, 0xC7D40000, 0xC0004742, 0xC9800000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004958, 0xC8400000, 0x00000000, 0xC3C00002,
|
||||
0x7BC42000, 0xCC400000, 0xC0004848, 0xCB840000, 0xC000495C, 0xCAC40000, 0xC0004844, 0xC8840000,
|
||||
0x46F90000, 0x8400F47A, 0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000, 0xCA000000,
|
||||
0xC0001624, 0xCB040000, 0xA63C005A, 0x00000000, 0x00000000, 0xA71EF412, 0x00000000, 0xC0000824,
|
||||
0xCA840000, 0x6CA08000, 0x6CA42000, 0x46610000, 0x42290000, 0xC35E0002, 0xC6340068, 0xC0001624,
|
||||
0xCF440080, 0xC2000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xC0004844, 0xC8840000, 0xC000082C, 0xCA040040, 0x00000000, 0x00000000, 0x58880002,
|
||||
0xB608FFF8, 0x00000000, 0xC0800000, 0xC0004844, 0xCC840040, 0x5AEC0002, 0xC000495C, 0xCEC40000,
|
||||
0x5E6C0006, 0x84000048, 0xC0004848, 0xCB840000, 0xC0000838, 0xC2500002, 0xCE440808, 0x5FB80002,
|
||||
0xC0004848, 0xCF840000, 0x5EEC0002, 0xC000495C, 0xCEC40000, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x15000000, 0x8000F278, 0xC000495A, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, 0xCC400000,
|
||||
0xC0004960, 0xCAC40000, 0x00000000, 0x00000000, 0x5EEC0000, 0x840000F2, 0x00000000, 0xB6FC0030,
|
||||
0xC0001600, 0xCA040000, 0x00000000, 0x00000000, 0xA61E00B2, 0x6FE90000, 0xC0000A28, 0xCE840808,
|
||||
0xC2C00000, 0xC2800004, 0xB6E80080, 0xC0001604, 0xCA840000, 0xC0004960, 0xCEC40000, 0xA69EFC8A,
|
||||
0x00000000, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00002, 0xC0001600, 0xCA040000, 0x00000000,
|
||||
0x00000000, 0xA61E000A, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00000, 0xC0001604, 0xCA840000,
|
||||
0xC0004960, 0xCEC40000, 0xA69EFBF2, 0xC2400000, 0xC0000A14, 0xCA440030, 0x00000000, 0x00000000,
|
||||
0x46E52000, 0xA4400000, 0xC2800000, 0xDFEB0031, 0x8000FFF8, 0xDFEA0031, 0xB668EBEA, 0x00000000,
|
||||
0xC00048A0, 0xCB040000, 0xC0000A10, 0xCA840000, 0x6F208000, 0x6F242000, 0x46610000, 0x42A10000,
|
||||
0xC2400000, 0xC0000A14, 0xCA440030, 0xC35E0002, 0xC6340068, 0xC0001604, 0xCF440080, 0x5B300002,
|
||||
0xB670FFF8, 0x5AEC0002, 0xC3000000, 0xC00048A0, 0xCF040000, 0xC0004960, 0xCEC40000, 0x8000F018,
|
||||
0xC0004918, 0xD2800000, 0xC2000000, 0xDF600040, 0x5E600080, 0x8400028A, 0x00000000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC000480A, 0xCA000000,
|
||||
0xC0004912, 0xCA400000, 0xC0004924, 0xCA800000, 0xC0004966, 0xCAC00000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x15000000, 0x76610000, 0x76A10000, 0x76E10000, 0x840001CA, 0xC0004918, 0xCA400000,
|
||||
0xC28001FE, 0x76A10000, 0x5A640002, 0x6A254010, 0x5EE80000, 0x84000002, 0x6AA54000, 0x8000FFF8,
|
||||
0xC6280000, 0x62818008, 0xC0004918, 0xCF000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC0004966, 0xCA400000, 0xC2000002, 0x6A310000, 0x7E010000,
|
||||
0x76252000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x6F346000, 0x4735A000,
|
||||
0x5B744C80, 0xC2800000, 0x58340006, 0xCA800080, 0xC2C00000, 0x58340000, 0xCAC000E0, 0xC2400000,
|
||||
0x5834000A, 0xCA420080, 0x6EA82000, 0x42E9E000, 0x6F2CA000, 0x42E56000, 0x5AEC1400, 0xC3990040,
|
||||
0xC7381C20, 0xC6F80068, 0x99007F18, 0xDB980000, 0xDBD80001, 0x00000000, 0xDEA00000, 0x47210000,
|
||||
0x8400FD38, 0xC0004958, 0xC8400000, 0x00000000, 0xC1000002, 0x79042000, 0xCC400000, 0xC0004848,
|
||||
0xCBC40000, 0xC0004844, 0xC8840000, 0x5FFC0000, 0x8400ECA2, 0xC0004740, 0xCB000000, 0xC0004744,
|
||||
0xCAC00000, 0x6F282000, 0x5AA84300, 0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000,
|
||||
0xCA400000, 0xC4000000, 0x00000000, 0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000,
|
||||
0x40100000, 0xC9000000, 0xC4340000, 0x00000000, 0x5C440000, 0x8400008A, 0x00000000, 0xC00047D2,
|
||||
0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x58340002, 0xC9000080, 0x00000000,
|
||||
0x00000000, 0x58280002, 0x6D120000, 0xCD001080, 0x5AEC0002, 0xC0004744, 0xCEC00000, 0x80000618,
|
||||
0x00000000, 0xC00047C0, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0xA67C0028,
|
||||
0xC00047C2, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x80001E00, 0x00000000,
|
||||
0xA6600022, 0xC00047C4, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x80000558,
|
||||
0xC00047C6, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0xC3C00000, 0xC67D0040,
|
||||
0xC3800000, 0xC6780040, 0x473C8000, 0x84000090, 0x46F88000, 0x84000080, 0xC1000000, 0xC0004814,
|
||||
0xC9000040, 0x00000000, 0x00000000, 0x5D100000, 0x840000D8, 0x5AEC0002, 0xC0004744, 0xCEC00000,
|
||||
0xC00047CA, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x80000460, 0x00000000,
|
||||
0x98C08AF0, 0xC7D40000, 0xC0004740, 0xC9C00000, 0x5D240000, 0x84000052, 0x00000000, 0x98C087E8,
|
||||
0xC7D40000, 0x6FD8A010, 0xC0004700, 0xC00047C8, 0xC9000000, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD000000, 0x80001C28, 0xC00047CC, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0x6FE82000, 0x5AA84300, 0x5D380000, 0x84000088, 0x00000000, 0x98C086F0, 0xC0004748, 0xC9800000,
|
||||
0xC2000000, 0x58280002, 0x6E520000, 0xCD001080, 0x58280002, 0xCE400080, 0x5D25FFFE, 0x84000028,
|
||||
0xC00047D0, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x800002B8, 0xC3000000,
|
||||
0x58280002, 0xCB000080, 0x00000000, 0x00000000, 0x5D31FFFE, 0x84000030, 0xC00047D0, 0xC9000000,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x80000248, 0x00000000, 0x98C086F0, 0xC0004748,
|
||||
0xC9800000, 0xC2000000, 0x58340002, 0xC6500080, 0xC7D01040, 0xC7901840, 0xCD000000, 0x58280002,
|
||||
0xCE400080, 0xC3C00200, 0x5FFC001C, 0xC3800000, 0xDF790050, 0x00000000, 0x00000000, 0x47BC8000,
|
||||
0x8800FFC2, 0xC0004862, 0xCBC00000, 0xC0000000, 0xC76C0000, 0x5BBC7200, 0xC280001C, 0xCA6C0001,
|
||||
0x00000000, 0x00000000, 0xCE780001, 0xC1007400, 0x47908000, 0xC1007200, 0xC5380006, 0x5EA80002,
|
||||
0x8400FFA0, 0xC3800000, 0xC000481A, 0xC8000000, 0x6F108000, 0x47108000, 0x47108000, 0x4011C000,
|
||||
0xC000491E, 0xCF800000, 0xC2C00000, 0xC7EC0068, 0xC100001C, 0xC52C1050, 0xC100000A, 0xC52C0D18,
|
||||
0xC000491C, 0xCEC00000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2800000, 0xDF680040,
|
||||
0x5D280080, 0x8800FFD0, 0xC000491C, 0xCAC00000, 0xC000491E, 0xCB800000, 0x99007F18, 0xDAD80000,
|
||||
0xDB980001, 0x00000000, 0xC00047CE, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0x00000000, 0x80001868, 0x00000000, 0x00000000, 0x00000000, 0xC0004878, 0xC8040000, 0x6C908000,
|
||||
0x44908000, 0x44908000, 0x40100000, 0xCA000000, 0xC4240000, 0x00000000, 0xC0004934, 0xCE000000,
|
||||
0xC2800002, 0xC4681C10, 0xC62821D8, 0xC6281E08, 0xC2600010, 0x5A650080, 0xC0004800, 0xCB400000,
|
||||
0xC2200400, 0x5A200040, 0xC7601048, 0xC0001220, 0xCE800000, 0xC0001200, 0xCE400000, 0xC0001202,
|
||||
0xCE000000, 0xC0001240, 0xCB400000, 0x00000000, 0x00000000, 0xA754FFC0, 0xC2000000, 0xC7600048,
|
||||
0xA7520022, 0x00000000, 0x00000000, 0x99008690, 0xC0004822, 0xC9400000, 0xC1800002, 0x800016F8,
|
||||
0x582040C0, 0xC2000000, 0xCA000020, 0xC2400000, 0xCA414008, 0xC2800000, 0xCA812008, 0xC2C00000,
|
||||
0xCAC20020, 0xC0004938, 0xCE000000, 0xC0004920, 0xCE400000, 0xC0004916, 0xCE800000, 0xC0004922,
|
||||
0xCEC00000, 0xA6400538, 0x00000000, 0xC0004938, 0xCBC00000, 0x00000000, 0xC3800000, 0x6FF48000,
|
||||
0x6FD44000, 0x4355A000, 0x5B744A00, 0x58340000, 0xCB802018, 0x00000000, 0xC2000000, 0x6FB46000,
|
||||
0x47B5A000, 0x5B744C80, 0x5834000C, 0xCA000028, 0xC000491A, 0xCF800000, 0x5E200000, 0x8400046A,
|
||||
0xC2000000, 0xDF610050, 0x5E6001E8, 0x8800FFD0, 0xC2000002, 0xC2400466, 0xC2A00000, 0x5AA80000,
|
||||
0xC0001006, 0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A, 0xCE800000, 0x99007958, 0xC1A0FFFE,
|
||||
0xC0000824, 0xC9840068, 0xC0004934, 0xCA400000, 0xC2000000, 0xC2800002, 0x99007998, 0xDA980000,
|
||||
0xC6140000, 0xC6580000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x99007A80, 0xC000491A, 0xC9400000, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x15000000, 0xC0004922, 0xCA001120, 0xC3C00000, 0xC3800000, 0xC0004930, 0xCE001120, 0xC0004932,
|
||||
0xCBC000E0, 0xC2800000, 0xC000491E, 0xCFC00000, 0xC0004862, 0xCA800068, 0xC3A0001A, 0x5BB94000,
|
||||
0xC6B80068, 0xC000491C, 0xCF800000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xA8E2FFC8, 0xC2000000, 0xC1220002, 0xD90C0000, 0xDF600040, 0x5E600080,
|
||||
0x8400FFDA, 0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000, 0x00000000, 0x99007F18,
|
||||
0xDA180000, 0xDA580001, 0x00000000, 0xC2000000, 0xDF610050, 0x5E6001FE, 0x8800FFD0, 0xC0004916,
|
||||
0xCA800000, 0xC2C00000, 0xDFEC0050, 0xC2400000, 0x46E52000, 0x84000032, 0x5EA80000, 0x84000022,
|
||||
0xC2600002, 0x99008690, 0xC000482E, 0xC9400000, 0xC1800002, 0x80000018, 0xC2600000, 0x99008690,
|
||||
0xC000482C, 0xC9400000, 0xC1800002, 0xC2000068, 0xC6240080, 0xC0004930, 0xCE400088, 0xC000491A,
|
||||
0xC9800000, 0xC0004862, 0xC9400000, 0x6D9C6000, 0x459CE000, 0x59DC4C80, 0x99007D78, 0xD9580000,
|
||||
0xD9980001, 0xD9D40000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2000000, 0xDF600040,
|
||||
0x5E600080, 0x8400FFD2, 0x00000000, 0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000,
|
||||
0x00000000, 0x99007F18, 0xDA180000, 0xDA580001, 0x00000000, 0x80001148, 0x00000000, 0x99008690,
|
||||
0xC000482A, 0xC9400000, 0xC1800002, 0x80001118, 0xC0004938, 0xCBC00000, 0x00000000, 0x00000000,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x58380008, 0xCA000000, 0x00000000, 0x00000000,
|
||||
0xA600037A, 0x00000000, 0xC0004938, 0xCBC00000, 0xC3000000, 0x00000000, 0x6FF88000, 0x6FD44000,
|
||||
0x4395C000, 0x5BB84A00, 0x58380000, 0xCB002018, 0xC2000000, 0x58380008, 0xCA020080, 0x5838000C,
|
||||
0xCAC00000, 0x5838000E, 0xCA400000, 0xC000491A, 0xCF000000, 0xC0004930, 0xCEC00000, 0xC000493C,
|
||||
0xCE000000, 0xC0004932, 0xCE400000, 0x5E200000, 0x84000120, 0xC2800000, 0xA6FE00B2, 0x6F206000,
|
||||
0x47210000, 0x5A204C80, 0x5820000C, 0xCA800028, 0x00000000, 0x00000000, 0x5EA80000, 0x840001F2,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x99007A80, 0xC000491A, 0xC9400000, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000,
|
||||
0xC0004930, 0xCAC00000, 0xC0004932, 0xCA400000, 0xC7EC1120, 0xC0004930, 0xCEC00000, 0x5838000C,
|
||||
0xCEC00000, 0x58000002, 0xCE400000, 0xC0004934, 0xCA000000, 0xC2400002, 0x6E642000, 0x6E642000,
|
||||
0x76252000, 0x84000012, 0xC2400002, 0x6E684000, 0x58380008, 0xCE800208, 0xA6000000, 0x6E682000,
|
||||
0x58380008, 0xCE800108, 0xC2400002, 0x6E642000, 0x76252000, 0x840000D2, 0x58380008, 0xCA000000,
|
||||
0xC2800000, 0xC2400000, 0xA60200A0, 0xDBA80000, 0x6F386000, 0x4739C000, 0x5BB84C80, 0x58380004,
|
||||
0xCA400080, 0x58380002, 0xCA800080, 0x00000000, 0xDEB80000, 0x46694000, 0x88000048, 0x00000000,
|
||||
0xC0004824, 0xCA000000, 0xC2400002, 0x6E640000, 0x5A200002, 0xCE000000, 0x58380008, 0xCE400008,
|
||||
0x80000000, 0x00000000, 0x80000030, 0xC0004934, 0xCA000000, 0x00000000, 0x00000000, 0xA6020CAA,
|
||||
0x00000000, 0x00000000, 0x80000CE0, 0xC2800000, 0xC2000200, 0xC240001A, 0xDF690050, 0x46A14000,
|
||||
0x46694000, 0x8800FFBA, 0xC2000006, 0xC2600982, 0x5A643B6E, 0x5838000A, 0xCA800000, 0xC0001006,
|
||||
0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A, 0xCE800000, 0x99007958, 0xC1A0FFFE, 0xC0000824,
|
||||
0xC9840068, 0xC2000000, 0xC0004930, 0xCA02E010, 0x58380026, 0xCA400000, 0x00000000, 0xC2800000,
|
||||
0x99007998, 0xDA980000, 0xC6140000, 0xC6580000, 0xC0004934, 0xCA000000, 0x00000000, 0x00000000,
|
||||
0xA6020002, 0x00000000, 0x00000000, 0x80000300, 0xC0004938, 0xCBC00000, 0xC0004878, 0xC8040000,
|
||||
0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCA000000, 0xC4240000, 0x00000000, 0x58240018,
|
||||
0xCA000000, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0xC3000000, 0xC3400002, 0xC2C00000,
|
||||
0xC62C0080, 0xC6270040, 0xC0004940, 0xCE400040, 0xC6260040, 0xC0004942, 0xCE400040, 0xC000493C,
|
||||
0xCA000000, 0x5EEC0000, 0x84000172, 0x5A6C0010, 0x46614000, 0x88000178, 0x5A600052, 0x466D4000,
|
||||
0x88000160, 0x58380006, 0xCA800000, 0xC0004940, 0xCA000000, 0xC2400000, 0xC6A70040, 0x7E412000,
|
||||
0x76252000, 0xC2000000, 0xC6A10040, 0x46610000, 0x84000120, 0xC0004942, 0xCA000000, 0xC2400000,
|
||||
0xC6A60040, 0x7E412000, 0x76252000, 0xC2000000, 0xC6A00040, 0x58380002, 0xCA800000, 0x46610000,
|
||||
0x840000D0, 0xC2400000, 0xC6A60080, 0x46E50000, 0x880000C2, 0xC2400000, 0xC6A40080, 0x58380008,
|
||||
0xCA800000, 0x466D0000, 0x880000A2, 0x00000000, 0xA682FFF8, 0x00000000, 0xC7700B08, 0xA6840078,
|
||||
0x00000000, 0xC7700A08, 0x80000068, 0xC7700208, 0xC000493C, 0xCAC00000, 0x80000048, 0xC7700308,
|
||||
0xC000493C, 0xCAC00000, 0x80000028, 0xC7700908, 0x80000018, 0xC7700808, 0x80000008, 0xC7700708,
|
||||
0x8000FFF8, 0xC7700508, 0xC0004944, 0xCF000000, 0xC000493E, 0xCEC00000, 0xC0004938, 0xCA400000,
|
||||
0xC000493C, 0xCB800000, 0xC000493E, 0xCB400000, 0xC3000000, 0x6E608000, 0x6E544000, 0x42150000,
|
||||
0x5A204A00, 0x5AA00008, 0x58200004, 0xCB000080, 0xC0004934, 0xCA000000, 0xC2400000, 0xC0004930,
|
||||
0xCA42E010, 0xC3C00018, 0xA6020078, 0x00000000, 0x43656000, 0x46F90000, 0x88000038, 0x47AD6000,
|
||||
0x6EE04010, 0x5BE00004, 0xC2000000, 0xC6E00010, 0x5E200000, 0x8400002A, 0x5BFC0002, 0x80000018,
|
||||
0xC3C00004, 0x5A2C0008, 0x46390000, 0x8800FFFA, 0x5FB80008, 0x6FE04000, 0x42390000, 0x46312000,
|
||||
0x88000050, 0xC2400000, 0xC0004930, 0xCA42E010, 0xC2060002, 0xC6800000, 0xCE000308, 0x6FE04000,
|
||||
0x4631C000, 0x5F700010, 0x4675A000, 0xC2000000, 0xC6340010, 0xC25A000A, 0xC000491A, 0xCA401C20,
|
||||
0xC2800000, 0xC0004932, 0xCA8000E0, 0xC0004862, 0xCA400068, 0x6FA04010, 0x42290000, 0xC000491E,
|
||||
0xCE000000, 0xC7E41050, 0xC000491C, 0xCE400000, 0x6FE04000, 0x43A1C000, 0xC000493C, 0xCF800000,
|
||||
0xC000493E, 0xCF400000, 0xC000493A, 0xCFC00000, 0x8000FFF0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC2000000, 0xDCE00000, 0xA622FFB8, 0xC1220002, 0xD90C0000, 0xC0004938, 0xCBC00000, 0xC0004944,
|
||||
0xCB400000, 0xC0004862, 0xCB000000, 0xC0004934, 0xCA000000, 0x6FF88000, 0x6FD44000, 0x4395C000,
|
||||
0x5BB84A00, 0xA6020278, 0xC2400000, 0x58380008, 0xCA406008, 0xDFE80000, 0xC2218E08, 0x5A21BAF6,
|
||||
0x46294000, 0x8400000A, 0xC2080002, 0x7235A000, 0x80000040, 0x5E640000, 0x8400000A, 0xC20C0002,
|
||||
0x7235A000, 0x80000018, 0xC2000000, 0xC760E718, 0xC7604220, 0x5E200000, 0x8400028A, 0xC2200002,
|
||||
0xC0004930, 0xCE001008, 0x99008690, 0xC0004828, 0xC9400000, 0xC1800002, 0xC0004780, 0xC93C0000,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD3C0000, 0x58380000, 0xCA000000, 0x00000000, 0x00000000,
|
||||
0xA6000112, 0xC0004940, 0xCA800000, 0xC0004942, 0xCA400000, 0xC7600080, 0xC6A01840, 0xC6601040,
|
||||
0xC000493A, 0xCA400000, 0xC0004934, 0xCA800000, 0xC0007200, 0x40300000, 0x40240000, 0x5C000004,
|
||||
0x5EC07400, 0x8800FFFA, 0x5C000200, 0xCE000000, 0x58000002, 0x5EC07400, 0x8800FFFA, 0x5C000200,
|
||||
0xCE800000, 0xC000493E, 0xCA000000, 0xC2400000, 0x5838000C, 0xCE400000, 0x99008690, 0xC0004830,
|
||||
0xC9400000, 0xC6180000, 0xC0004930, 0xC6100080, 0xCD000080, 0x80000090, 0xC2400002, 0x58380008,
|
||||
0xCE400008, 0xC0004944, 0xCF400000, 0x80000290, 0xC000493C, 0xCA400000, 0xDFE80000, 0x5A300018,
|
||||
0xC0007200, 0x40200000, 0xCA000000, 0x58380008, 0xC6501080, 0xCD001080, 0x5838000A, 0xCE800000,
|
||||
0x58380026, 0xCE000000, 0xC0004944, 0xCF400000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050,
|
||||
0x80000050, 0x00000000, 0x99008690, 0xC0004826, 0xC9400000, 0xC1800002, 0xC0004760, 0xC93C0000,
|
||||
0x00000000, 0x00000000, 0x59100002, 0xCD3C0000, 0x8000FD90, 0xC2000000, 0xC2400080, 0xDF600040,
|
||||
0xB624FFCA, 0xC000491C, 0xCA400000, 0xC000491E, 0xCA800000, 0x99007F18, 0xDA580000, 0xDA980001,
|
||||
0x00000000, 0xC0004934, 0xCA000000, 0x00000000, 0xC2800000, 0xA6020140, 0xC2400004, 0xC2000200,
|
||||
0xDF690050, 0x46A14000, 0x46694000, 0x8800FFC2, 0x00000000, 0xC000491A, 0xC9800000, 0xC0004862,
|
||||
0xC9400000, 0x6D9C6000, 0x459CE000, 0x59DC4C80, 0x99007D78, 0xD9580000, 0xD9980001, 0xD9D40000,
|
||||
0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2000000, 0xC2400080, 0xDF600040, 0xB624FFCA,
|
||||
0xC000491C, 0xCA400000, 0xC000491E, 0xCA800000, 0x99007F18, 0xDA580000, 0xDA980001, 0x00000000,
|
||||
0x58380008, 0xCA400000, 0xC2000000, 0xCE000020, 0xC2A1FFFE, 0x5AA9FFFE, 0xCE001080, 0x5838000A,
|
||||
0xCE800000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0000838, 0xC2500002, 0xCE440808, 0xC0004848, 0xCBC40000, 0xC3800000, 0xC000082C, 0xCB840030,
|
||||
0x5FFC0002, 0xC0004848, 0xCFC40000, 0x58880002, 0x44B88000, 0xC1000000, 0xC5080006, 0xC0004844,
|
||||
0xCC840000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x8000CBD8, 0xC2000000, 0xDF600040,
|
||||
0x5E200080, 0x84000282, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000480C, 0xCA000000, 0xC0004910, 0xCA400000, 0xC000492C, 0xCA800000,
|
||||
0xC0004968, 0xCAC00000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x76610000, 0x76A10000,
|
||||
0x762D6000, 0x840001C2, 0xC0004926, 0xCA400000, 0xC201FFFE, 0x762D6000, 0x5A640002, 0x6AE50010,
|
||||
0x5F200000, 0x84000002, 0x6A250000, 0x8000FFF8, 0xC6E00000, 0x62014008, 0xC0004926, 0xCE800000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004968,
|
||||
0xCA400000, 0xC2000002, 0x6A290000, 0x7E010000, 0x76252000, 0xCE400000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x15000000, 0x6EB4A000, 0x6E944000, 0x4575A000, 0x46B5A000, 0x5B744E20, 0x58340002,
|
||||
0xC2000000, 0xCA0000E0, 0x5834002E, 0xC2400000, 0xCA400080, 0x6EB0A000, 0x6EBC4000, 0x47F18000,
|
||||
0x46B18000, 0x5B300E4E, 0x5B300004, 0x6E642000, 0x4225E000, 0xC39A8024, 0xC7380068, 0xC6B81C20,
|
||||
0x99007F18, 0xDB980000, 0xDBD80001, 0x00000000, 0xC2000000, 0xDF600040, 0x5E200080, 0x840002BA,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000490E, 0xCA000000, 0xC000492A, 0xCA400000, 0xC000496A, 0xCB000000, 0xC0004956, 0xCAC00000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x76318000, 0x76718000, 0x84000202, 0xC201FFFE,
|
||||
0x76318000, 0x5AEC0002, 0x6B2D0010, 0x5EA00000, 0x84000002, 0x6A2D0000, 0x8000FFF8, 0xC7200000,
|
||||
0x62016008, 0xC0004956, 0xCEC00000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000496A, 0xCA400000, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76252000,
|
||||
0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x6EF4A000, 0x6ED44000, 0x4575A000,
|
||||
0x46F5A000, 0x5B744E20, 0x5834000E, 0xC2000000, 0xCA0000E0, 0x58340008, 0xC2400000, 0xCA420080,
|
||||
0x5834000C, 0xC2800000, 0xCA832018, 0x6E644010, 0x42250000, 0x4229E000, 0xC39A8008, 0x58340008,
|
||||
0xCB809020, 0x58340008, 0xC2800000, 0xCA810018, 0x6EE0A000, 0x6EE44000, 0x46610000, 0x46E10000,
|
||||
0x5A200008, 0x5A200E28, 0x42290000, 0xC6380068, 0xC6F81C20, 0x99007F18, 0xDB980000, 0xDBD80001,
|
||||
0x00000000, 0xC000495A, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, 0xCC400000, 0xC0001A1C,
|
||||
0xCA000000, 0xC2400008, 0x6A452000, 0x76610000, 0x84000E82, 0xC0000A28, 0xC3800000, 0xCB840030,
|
||||
0xC0000A14, 0xC3400000, 0xCB440030, 0xC0004880, 0xCB040000, 0x47788000, 0x88000E30, 0x58041802,
|
||||
0xCAC00000, 0xA7000040, 0x00000000, 0x00000000, 0xA6C8C5A8, 0xC2800000, 0xC6E80020, 0x80000058,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x8000C578, 0x00000000, 0xC2800000, 0xC7282020, 0xC000490E,
|
||||
0xCA400000, 0x6BE9E000, 0x00000000, 0x77E52000, 0x8400C530, 0x6EA0A000, 0x6E944000, 0x45610000,
|
||||
0x46A10000, 0x5A204E20, 0x5820000C, 0xCA000000, 0xC0004946, 0xCE800000, 0xA6220378, 0x00000000,
|
||||
0xC2200060, 0xC0004948, 0xCE000010, 0xCE001040, 0xC240000A, 0xC000494A, 0xCE400000, 0xC2B60002,
|
||||
0xC0004964, 0xCE801B08, 0x990081E8, 0xC00048A0, 0xC8840000, 0x00000000, 0xC0004946, 0xCBC00000,
|
||||
0x00000000, 0x00000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000, 0x5BB84E20, 0x99007FA8,
|
||||
0xDBD80000, 0xDB980001, 0x00000000, 0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0xC000491C,
|
||||
0x990081A0, 0xC9400001, 0xC9800000, 0x00000000, 0x99007F18, 0xD9580000, 0xD9980001, 0x00000000,
|
||||
0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99007BE0,
|
||||
0xDBD80000, 0xDB980001, 0xC7D80000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x6FF8A000,
|
||||
0x6FD44000, 0x4579C000, 0x47F9C000, 0x5BB84E20, 0x58380010, 0xCA000000, 0xC0004874, 0xC8040000,
|
||||
0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCA400000, 0xC4340000, 0x00000000, 0xC7400000,
|
||||
0xCE000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000490E, 0xCA400000, 0xC2800002, 0x6ABD4000, 0x72A52000, 0xCE400000, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE54, 0x15000000, 0x99008690, 0xC0004836, 0xC9400000, 0xC1800002, 0x00000000, 0x00000000,
|
||||
0x00000000, 0xA8E2FFC8, 0x00000000, 0xC1220002, 0xD90C0000, 0xC2000000, 0xC0000A14, 0xCA040030,
|
||||
0xC0000A28, 0xC2500002, 0xCE440808, 0x58880002, 0xB608FFF8, 0xC00048A0, 0xC0800000, 0xCC840000,
|
||||
0x8000C150, 0xC0004946, 0xCBC00000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC000490E, 0xCA400000, 0xC2800002, 0x6ABD4000, 0x72A52000, 0xCE400000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000,
|
||||
0x5BB84E20, 0x58380008, 0xCA000000, 0x5838000C, 0xCA400000, 0xC3400000, 0xC6340008, 0xC000494E,
|
||||
0xCF400000, 0xC2800000, 0xC62A0080, 0xC3000000, 0xC6308020, 0x6F304000, 0x43298000, 0xC000493C,
|
||||
0xCF000000, 0xC2C00000, 0xC66C0080, 0xC0004950, 0xCEC00000, 0xC2800000, 0xC66AE028, 0xC0004954,
|
||||
0xCE800000, 0x5F740000, 0x840001A0, 0x5E300028, 0x462D2000, 0x8400016A, 0x462D2000, 0x88000132,
|
||||
0x5E300018, 0x462D2000, 0x88000012, 0x462D2000, 0x8400002A, 0x00000000, 0x800000C0, 0x00000000,
|
||||
0x99008328, 0xDBD80000, 0xDB980001, 0xC7800000, 0xC3400002, 0xC000494E, 0xCF400000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC000490E, 0xCA400000,
|
||||
0xC2800002, 0x6ABD4000, 0x7E814000, 0x76A52000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE54,
|
||||
0x15000000, 0xC2200060, 0xC0004948, 0xCE001040, 0xC2000000, 0xC000494C, 0xCE000000, 0x80000068,
|
||||
0x00000000, 0x99008328, 0xDBD80000, 0xDB980001, 0xC7800000, 0x99008528, 0xDBD80000, 0xDB980001,
|
||||
0xC7800000, 0xC2200058, 0xC0004948, 0xCE001040, 0xC2000002, 0xC000494C, 0xCE000000, 0xC2000006,
|
||||
0xC0001006, 0xCE000000, 0x5838000A, 0xCA400000, 0xC2200982, 0x5A203B6E, 0xC0001008, 0xCE000000,
|
||||
0xC000100A, 0xCE400000, 0xC0004954, 0xCA800000, 0xC200000C, 0xC000494A, 0xCE000000, 0xC0004948,
|
||||
0xCE800010, 0xC2B60000, 0xC0004964, 0xCE800000, 0x990081E8, 0xC00048A0, 0xC8840000, 0x00000000,
|
||||
0xC0004946, 0xCBC00000, 0xC000494C, 0xCA000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000,
|
||||
0x5BB84E20, 0x5E200000, 0x840000FA, 0x00000000, 0x99007FA8, 0xDBD80000, 0xDB980001, 0x00000000,
|
||||
0x99007CF0, 0xC000491C, 0xC1400000, 0xC9420050, 0xC000491C, 0x990081A0, 0xC9400001, 0xC9800000,
|
||||
0x00000000, 0x99007F18, 0xD9580000, 0xD9980001, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99007BE0, 0xDBD80000, 0xDB980001, 0xC7D80000,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0xC000493C, 0xCA800000, 0xC000494E, 0xCAC00000,
|
||||
0xC3000018, 0xC3400006, 0x5E200000, 0x84000012, 0xC2800000, 0xC2C00000, 0xC300001E, 0xC3400000,
|
||||
0xC6AC1080, 0xC72C0420, 0xC76C0818, 0x58380010, 0xCA800000, 0x58380008, 0xCEC00000, 0xC6280108,
|
||||
0xC0004874, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCB000000, 0xC4340000,
|
||||
0x00000000, 0xC7400000, 0xCE800000, 0xC0004952, 0xCE800000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xA8E2FFC8, 0x00000000, 0xC000494C, 0xCA000000, 0xC0004950, 0xCAC00000, 0x5E200000, 0x84000052,
|
||||
0xDFE80000, 0x7E814000, 0x5834001A, 0xCE800000, 0x99008690, 0xC0004834, 0xC9400000, 0xC1800002,
|
||||
0x99008690, 0xC0004838, 0xC9400000, 0xC6D80000, 0xC1220002, 0xD90C0000, 0x5E200000, 0x84000028,
|
||||
0x5838002C, 0xCB000000, 0xDFE80000, 0x00000000, 0x58380014, 0xCF000000, 0x80000000, 0xC2A1FFFE,
|
||||
0x5AA9FFFE, 0x5838000A, 0xCE800000, 0xC3000000, 0xC0000A14, 0xCB040030, 0xC2D00002, 0xC0000A28,
|
||||
0xCEC40808, 0xC000494E, 0xCA800000, 0x58880002, 0xB4B0FFF8, 0xC00048A0, 0xC0800000, 0xCC840000,
|
||||
0x5EA80000, 0x84000152, 0x5E200000, 0x84000140, 0xC000493C, 0xCA800000, 0x00000000, 0x00000000,
|
||||
0x5AA80060, 0xCE800000, 0x99008328, 0xDBD80000, 0xDB980001, 0xC7800000, 0x99008528, 0xDBD80000,
|
||||
0xDB980001, 0xC7800000, 0xC0004952, 0xCAC00000, 0x58380000, 0xCA800000, 0xC30C0002, 0xC7F00020,
|
||||
0xA6800090, 0x00000000, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xC0001800, 0xCA000000, 0x00000000, 0x00000000, 0xA60CFFCA, 0xC6F00508,
|
||||
0xC6B0C408, 0xCF000000, 0x00000000, 0xC121FFFE, 0x5911FE54, 0x15000000, 0x8000B7A0, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x8000B738, 0xDCBC0001, 0x5FFC0000, 0x84000942, 0xC3800002,
|
||||
0xDB880001, 0xC3800000, 0xDB880001, 0xC0004728, 0xC9000000, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD000000, 0xC0004730, 0xC9800000, 0xC000472E, 0xC9400000, 0xC00047DC, 0xC9000000, 0xC00047DE,
|
||||
0xC9C00000, 0xC000472E, 0xCD800000, 0x6D110000, 0xC5D30040, 0xC00047DC, 0xCD000000, 0x4558A000,
|
||||
0x6DDD0000, 0xC55C0040, 0xC00047DE, 0xCDC00000, 0xC0001AC4, 0xC9400000, 0xC0001AC8, 0xC9800000,
|
||||
0xC000472C, 0xC9C00000, 0x45588000, 0xC1000002, 0x41D0E004, 0xCDC00000, 0xC5501080, 0xC5900080,
|
||||
0xC000472A, 0xCD000000, 0xC0001AF0, 0xCBC00000, 0x58000002, 0xCB800000, 0xC3400000, 0xC7F50040,
|
||||
0x6F702000, 0x5B304300, 0xC000474C, 0xCAC00000, 0xC0004720, 0xC9400000, 0x00000000, 0x00000000,
|
||||
0x5D940002, 0x6D9B8000, 0x6D9B8010, 0x581847E0, 0xC9800000, 0x581447E0, 0xC9C00000, 0x5D2C0000,
|
||||
0x84000062, 0xC7901080, 0xC7D00080, 0xCD000000, 0xC1000000, 0xC5910040, 0x47508000, 0x84000078,
|
||||
0xC0004722, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x80000040, 0xC1000000,
|
||||
0xC5D10040, 0x47508000, 0x84000022, 0xC0004724, 0xC9000000, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD000000, 0xA7840060, 0x59540002, 0x6D578000, 0x6D578010, 0xC0004720, 0xCD400000, 0xC1000000,
|
||||
0xC5910040, 0x47508000, 0x84000020, 0xC0004726, 0xC9000000, 0x00000000, 0x00000000, 0x59100002,
|
||||
0xCD000000, 0xA7800098, 0xC2800002, 0xC000474E, 0xCE800000, 0xC2C00000, 0xC000474C, 0xCEC00000,
|
||||
0xC0004758, 0xCFC00000, 0x58000002, 0xCF800000, 0xC000475C, 0xC9000000, 0x00000000, 0x00000000,
|
||||
0xA53E001A, 0x00000000, 0xC13E0002, 0xCFC00000, 0xCD001E10, 0x58000002, 0xCF800000, 0x80000188,
|
||||
0xC000475C, 0xC13C0002, 0xCD001E10, 0x5D2C0000, 0x84000162, 0xC2C00000, 0xC000474C, 0xCEC00000,
|
||||
0x98C08AF0, 0xC7540000, 0xC0004740, 0xC9C00000, 0x5D240000, 0x8400002A, 0xC1000002, 0xC0004750,
|
||||
0xCD000000, 0xC0004752, 0xCD000000, 0x800000E8, 0x00000000, 0x98C08BE0, 0xC7540000, 0xC0004742,
|
||||
0xC9800000, 0x5D240000, 0x84000012, 0xC1000002, 0xC0004752, 0xCD000000, 0x80000048, 0xC0004742,
|
||||
0xC9400000, 0xC0004754, 0xC1000002, 0xCD000000, 0x98C08CF0, 0xC5540000, 0xC7580000, 0x00000000,
|
||||
0xC0004742, 0xCF400000, 0x98C08AB8, 0xC1400000, 0xC7540028, 0x6F40A010, 0xC1000000, 0xC7D00040,
|
||||
0x58300000, 0x6D110000, 0xCD000840, 0xA7840378, 0xC000474C, 0xCAC00000, 0xC000474E, 0xCA800000,
|
||||
0xC0004750, 0xCBC00000, 0xC0004752, 0xCB800000, 0xC0004710, 0xC9000000, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD000000, 0x5D280002, 0x840000A0, 0xC000473C, 0xC9000000, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD000000, 0xC0004712, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0xC0004754, 0xC9000000, 0x00000000, 0x00000000, 0x5D100000, 0x84000202, 0x58300000, 0xC13C0002,
|
||||
0xCD001E08, 0x800001E0, 0xC0004714, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0x5D380000, 0x84000022, 0xC0004736, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0x5D3C0000, 0x8400002A, 0xC0004718, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000,
|
||||
0x80000128, 0xC1000000, 0x58300000, 0xC903E008, 0x00000000, 0x00000000, 0x5D100000, 0x8400002A,
|
||||
0xC000471A, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x800000B8, 0x58300000,
|
||||
0xC13E0002, 0xCD001F08, 0xC1000000, 0x58300000, 0xC903C008, 0x00000000, 0x00000000, 0x5D100000,
|
||||
0x8400006A, 0xC0004716, 0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0xC000473A,
|
||||
0xC9000000, 0x00000000, 0x00000000, 0x59100002, 0xCD000000, 0x58300000, 0xC13C0000, 0xCD001E08,
|
||||
0xC1000000, 0xC0004746, 0xCD000000, 0xC0004750, 0xCD000000, 0xC0004752, 0xCD000000, 0xC000474E,
|
||||
0xCD000000, 0xC2C00002, 0xC000474C, 0xCEC00000, 0xC0004754, 0xCD000000, 0xC3CE0002, 0xC0000800,
|
||||
0xCFC00708, 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000, 0xCBC00000, 0xC4380000, 0x00000000,
|
||||
0xC000480E, 0xCA000000, 0xC0004858, 0xCB440000, 0x00000000, 0x00000000, 0x46350000, 0x88000098,
|
||||
0x00000000, 0xA7C00028, 0xC0004854, 0xC1000002, 0xCD040000, 0xC11C0000, 0xC000082C, 0xCD040E08,
|
||||
0x800000C0, 0x00000000, 0xA7D20118, 0x00000000, 0xC7E14048, 0xC2400000, 0xC6246030, 0xC200006A,
|
||||
0x46610000, 0xC6240038, 0xC0000810, 0xCE440038, 0x8000FF58, 0xC2000000, 0xC0000808, 0xCA040018,
|
||||
0xC11C0000, 0xC000082C, 0xCD040E08, 0x5A200002, 0x5E600010, 0x8400FFF8, 0xC2000000, 0xC0000808,
|
||||
0xCE040018, 0xC3400000, 0x80000010, 0xC1200002, 0xC0000818, 0xCD041008, 0x5B740002, 0xC0004858,
|
||||
0xCF440000, 0x99007930, 0xC0004848, 0xC9440000, 0xC1800000, 0xC11C0002, 0xC000082C, 0xCD040E08,
|
||||
0x80000860, 0x5B740002, 0xC0004858, 0xCF440000, 0xC7800000, 0xC13C0002, 0xCD001E08, 0xC0004848,
|
||||
0xC9440000, 0xC1800000, 0xC000082C, 0xC9840030, 0x59540002, 0xC0004848, 0xCD440000, 0x58880002,
|
||||
0xB49807D8, 0x00000000, 0xC0800000, 0x800007C8, 0xC000487C, 0xC8040000, 0x00000000, 0x00000000,
|
||||
0x40080000, 0xCBC00000, 0xC4280000, 0x00000000, 0xA7C00110, 0xC000484C, 0xCA040000, 0xC2400000,
|
||||
0xC0001AEC, 0xCA440020, 0x5A200002, 0xC000484C, 0xCE040000, 0xB624006A, 0xC6800000, 0xC13C0002,
|
||||
0xCD001E08, 0xC0004848, 0xC9440000, 0xC1800000, 0xC000082C, 0xC9840030, 0x59540002, 0xC0004848,
|
||||
0xCD440000, 0x58880002, 0xB49806C8, 0x00000000, 0xC0800000, 0x800006B8, 0xC0004854, 0xC1000004,
|
||||
0xCD040000, 0xC0000820, 0xC2000002, 0xCE040000, 0xC2000000, 0xC000484C, 0xCE040000, 0xC0004858,
|
||||
0xCE040000, 0x8000FF10, 0xC0004854, 0xC1000000, 0xCD040000, 0xC11C0000, 0xC000082C, 0xCD040E08,
|
||||
0x99007930, 0xC0004848, 0xC9440000, 0xC1800000, 0xC1200000, 0xC0000818, 0xCD041008, 0xC11C0002,
|
||||
0xC000082C, 0xCD040E08, 0xC2000000, 0xC000484C, 0xCE040000, 0x800005B8, 0xC0001AC0, 0xCB840000,
|
||||
0xC000487C, 0xC8040000, 0x00000000, 0x00000000, 0x40080000, 0xCBC00000, 0xC4280000, 0x00000000,
|
||||
0xA78004C2, 0x00000000, 0x00000000, 0xA7C00482, 0x00000000, 0xC0001B00, 0xC2060006, 0xCE040310,
|
||||
0xA7E8043A, 0x00000000, 0xC0004850, 0xCA040000, 0xC2400000, 0xC0004812, 0xCA420080, 0x5A200002,
|
||||
0xC0004850, 0xCE040000, 0x5E640000, 0x84000002, 0x46610000, 0x880002E0, 0xC6800000, 0xC13C0002,
|
||||
0xCD001E08, 0xC0001ACC, 0xC2000002, 0xCE040008, 0x5C440000, 0x84000238, 0xC0004810, 0xC9400000,
|
||||
0xC6800000, 0xCBC00000, 0x00000000, 0xC1000000, 0xA54001E8, 0xC53C1008, 0x00000000, 0xA7FC01D2,
|
||||
0xC0001AF0, 0xC1000000, 0x58000002, 0xC9000008, 0xC000474E, 0xC9800000, 0x5D100000, 0x8400000A,
|
||||
0xC1000002, 0xC53C1E08, 0x80000180, 0x5D180000, 0x8400000A, 0xC1000002, 0xC53C1E08, 0x80000158,
|
||||
0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xC9800000, 0xC4380000,
|
||||
0x00000000, 0xC000481E, 0xC9C00000, 0xC000481C, 0xCA000000, 0x00000000, 0x75D8C000, 0x46188000,
|
||||
0x840000D0, 0xC0001AF0, 0xC3400000, 0x58000000, 0xCB410040, 0xC0004746, 0xC9400000, 0x6F702000,
|
||||
0x5B304300, 0xC2C00000, 0x58300000, 0xCAC00040, 0x00000000, 0x00000000, 0x46D48000, 0x88000008,
|
||||
0xC1000002, 0xC53C1E08, 0x80000028, 0x5AEC0002, 0x58300000, 0xCEC00040, 0xC1000002, 0xC53C1008,
|
||||
0xC77C0840, 0xC57C0040, 0x59540002, 0xC0004746, 0xCD400000, 0xC6800000, 0xCFC00000, 0xC0004848,
|
||||
0xC9440000, 0xC1800000, 0xC000082C, 0xC9840030, 0x59540002, 0xC0004848, 0xCD440000, 0x58880002,
|
||||
0xB49801D8, 0x00000000, 0xC0800000, 0x800001C8, 0xC000471E, 0xC9000000, 0x00000000, 0x00000000,
|
||||
0x59100002, 0xCD000000, 0xC0004854, 0xC1000000, 0xCD040000, 0xC11C0000, 0xC000082C, 0xCD040E08,
|
||||
0x99007930, 0xC0004848, 0xC9440000, 0xC1800000, 0xC2000000, 0xC0000820, 0xCE040000, 0xC1200000,
|
||||
0xC0000818, 0xCD041008, 0xC11C0002, 0xC000082C, 0xCD040E08, 0xC0004850, 0xCE040000, 0xC2000002,
|
||||
0xC0001ACC, 0xCE040010, 0x800000D0, 0xC2000002, 0xC0004850, 0xCE040000, 0x8000FBE8, 0xC2000000,
|
||||
0xC0004850, 0xCE040000, 0xA7E60012, 0x00000000, 0xC2000002, 0xC0001B00, 0xCE040008, 0x8000FBD0,
|
||||
0x00000000, 0xA7860032, 0x00000000, 0xC6800000, 0xC13C0002, 0xCD001E08, 0xC2020002, 0xC7E2A548,
|
||||
0xC0001B00, 0xCE040000, 0x8000FB78, 0xC2040002, 0xC0001B00, 0xCE040208, 0x8000FB58, 0xC2C80002,
|
||||
0x6AC56000, 0xDACC0000, 0xC0004854, 0xCB440000, 0xC0004848, 0xCB840000, 0xC0000838, 0xC3C00000,
|
||||
0xCBC40030, 0x5EF40004, 0x8400000A, 0xC3000000, 0xC0001ACC, 0xCF040108, 0x47BD8000, 0x84000032,
|
||||
0x47BD8000, 0x88000038, 0xC1006E8C, 0xC1400010, 0x8D580000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0004840, 0xCC840000, 0x8000EAF8, 0xC0001AC0, 0xCAC40000, 0xC0004854, 0xCB440000, 0xA6C0F91A,
|
||||
0x00000000, 0x5EF40000, 0x8400F45A, 0x5EF40002, 0x8400F6EA, 0x5EF40004, 0x8400F8EA, 0xC1006CE8,
|
||||
0xC1400010, 0x8D580000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xC0800000, 0xDF4B0040,
|
||||
0xC0004900, 0xCB800000, 0xC2000000, 0xC000490A, 0xA78000B0, 0xCBC00000, 0xC1000000, 0xD9000001,
|
||||
0xC1000002, 0xD90C0000, 0x6FF46000, 0x47F5A000, 0x5B744C80, 0xC2400000, 0x58340004, 0xCA400080,
|
||||
0xC0004900, 0xCE000008, 0x5A640002, 0x58340004, 0xC6500080, 0xCD000080, 0xC0004914, 0xCA400000,
|
||||
0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000, 0xC0000408, 0xCE000000, 0xA78200B8, 0xC0004908,
|
||||
0xCBC00000, 0xC1000000, 0xD9000001, 0xC1000002, 0xD90C0000, 0x6FF4A000, 0x6FD44000, 0x4575A000,
|
||||
0x47F5A000, 0x5B744E20, 0xC2800000, 0x58340006, 0xCA800080, 0xC2000000, 0xC0004900, 0xCE000108,
|
||||
0x5EA80002, 0x58340006, 0xC6900080, 0xCD000080, 0x5A7C0020, 0xC2000002, 0x6A250000, 0xC0000408,
|
||||
0xCE000000, 0xC0000032, 0xDCA80001, 0xC1000002, 0x46914000, 0x00000000, 0x8C100006, 0x00000000,
|
||||
0x00000000, 0x00000000, 0xA4800210, 0x00000000, 0xC3C00000, 0xC000140E, 0xCBC00020, 0xC3400000,
|
||||
0xC2400000, 0x6FF86000, 0x47F9C000, 0x5BB84C80, 0x58380008, 0xCB400080, 0x58380006, 0xCA400080,
|
||||
0x5F740002, 0x58380008, 0xC7500080, 0xCD000080, 0xC2000000, 0x58380004, 0xCA020080, 0xC3000000,
|
||||
0x5838000C, 0xCB000028, 0x5A640002, 0x46250000, 0x8400FFF8, 0xC2400000, 0x58380006, 0xC6500080,
|
||||
0xCD000080, 0xC2000000, 0x5838000A, 0xCA020080, 0x5B300002, 0x5838000C, 0xC7100028, 0xCD000028,
|
||||
0xC2420020, 0x5A200004, 0x46612000, 0x8400FFF8, 0xC2000000, 0x5838000A, 0xC6101080, 0xCD001080,
|
||||
0xC0004966, 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000, 0x5F740000, 0x84000028,
|
||||
0xC0004912, 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x5F300020,
|
||||
0x84000028, 0xC0004924, 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000,
|
||||
0xA4820050, 0xC2400000, 0xC000140E, 0xCA408020, 0xC2000002, 0xC0004900, 0xCE000008, 0xC000490A,
|
||||
0xCE400000, 0xC1000000, 0xD9000001, 0xD8400080, 0xC1000004, 0xD9000001, 0xA4840288, 0x00000000,
|
||||
0xC3C00000, 0xC000140E, 0xCBC10020, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000, 0x4579C000,
|
||||
0x47F9C000, 0x5BB84E20, 0x5838002E, 0xCA800080, 0x58380006, 0xCA020080, 0xC3400000, 0x5838002E,
|
||||
0xCB420080, 0x5AA80002, 0x46290000, 0x8400FFF8, 0xC2800000, 0x5838002E, 0xC6900080, 0xCD000080,
|
||||
0x5F740002, 0x5838002E, 0xC7501080, 0xCD001080, 0xC0004968, 0xCA400000, 0xC2000002, 0x6A3D0000,
|
||||
0x72252000, 0xCE400000, 0xC000492A, 0xCA800000, 0x5E740000, 0x84000028, 0xC0004910, 0xCA000000,
|
||||
0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x6ABD4010, 0xA68000D2, 0x00000000,
|
||||
0xC0004910, 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x58380032,
|
||||
0xCA000000, 0x58000002, 0xCA400000, 0x5838000C, 0x00000000, 0xCE000001, 0xCE400000, 0xC000492A,
|
||||
0xCA000000, 0xC2C00002, 0x6AFD6000, 0x72E10000, 0xCE000000, 0xC000492C, 0xCA000000, 0xC2C00002,
|
||||
0x6AFD6000, 0x72E10000, 0xCE000000, 0x80000028, 0xC000492C, 0xCA000000, 0xC2C00002, 0x6AFD6000,
|
||||
0x7EC16000, 0x76E10000, 0xCE000000, 0xA4880100, 0xC2C00000, 0xC000140E, 0xCAC20020, 0xC000490E,
|
||||
0xCA400000, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76252000, 0xCE400000, 0xC000496A, 0xCA400000,
|
||||
0xC2000002, 0x6A2D0000, 0x72252000, 0xCE400000, 0x6EF0A000, 0x6ED44000, 0x45718000, 0x46F18000,
|
||||
0x5B304E20, 0x58300000, 0xCA000000, 0x00000000, 0xC2400002, 0x76252000, 0x84000032, 0xC24C0002,
|
||||
0xC6E40020, 0xC624C408, 0x58300010, 0xCA400508, 0x00000000, 0xC0001800, 0xCE400000, 0xA4860050,
|
||||
0xC2400000, 0xC000140E, 0xCA418020, 0xC2020002, 0xC0004900, 0xCE000108, 0xC0004908, 0xCE400000,
|
||||
0xC1000000, 0xD9000001, 0xD8400080, 0xC1000004, 0xD9000001, 0xA48C0028, 0xC2800002, 0xC000484A,
|
||||
0xCE800000, 0xC2800000, 0xC000474A, 0xCE800000, 0xC0004846, 0xCE800000, 0xC0001408, 0xCC800000,
|
||||
0xC10E0002, 0xD90C0000, 0x8000EA60, 0xDFBC0001, 0xC000496E, 0x99008638, 0xC9400000, 0xC7D80000,
|
||||
0x00000000, 0xC5700000, 0x5EF00020, 0x88000130, 0x6F346000, 0x4735A000, 0x5B744C80, 0x58340008,
|
||||
0xC2400000, 0xCA400080, 0x00000000, 0xC2000000, 0x5A640002, 0xCE400080, 0x58340004, 0xCA000080,
|
||||
0x00000000, 0x00000000, 0x5E200002, 0xCE000080, 0xC0004912, 0xCA800000, 0xC2400002, 0x6A712000,
|
||||
0x72694000, 0xCE800000, 0x5E200000, 0x8400003A, 0xC000480A, 0xCA000000, 0xC0000408, 0xCA800000,
|
||||
0x76610000, 0x00000000, 0x72294000, 0xCE800000, 0x80000020, 0xC0004914, 0xCA000000, 0x7E412000,
|
||||
0x00000000, 0x76610000, 0xCE000000, 0x800000B8, 0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000,
|
||||
0x5B744E20, 0x5834002E, 0xC2400000, 0xCA420080, 0x00000000, 0xC2000000, 0x5A640002, 0xC6501080,
|
||||
0xCD001080, 0x58340006, 0xCA000080, 0x00000000, 0x00000000, 0x5A200002, 0xCE000080, 0xC0004910,
|
||||
0xCA400000, 0xC2000002, 0x6A2D0000, 0x72252000, 0xCE400000, 0xC2000002, 0x6A310000, 0xC000042A,
|
||||
0xCE000000, 0xC1040002, 0xD90C0000, 0x00000000, 0x8000E7D0, 0x00000000, 0xC4980930, 0x9D000000,
|
||||
0xC5580030, 0xC0000838, 0xCD840000, 0xC1440200, 0xC1C03200, 0xC55C1078, 0xC000100E, 0x9D000000,
|
||||
0xCD800000, 0xC000100C, 0xCDC00000, 0xC0004862, 0xC9C00000, 0x00000000, 0x00000000, 0xD9D80001,
|
||||
0xC0007200, 0x401C0000, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0xC1F0000A, 0x71D4A000,
|
||||
0xDD980000, 0xDD9C0001, 0x41D8E000, 0xC5D40268, 0xC0001010, 0xCD400000, 0x6C9C8000, 0x449CE000,
|
||||
0x449CE000, 0x59DC0004, 0xC1601260, 0xC5D40268, 0x9D000000, 0xC0001012, 0xCD400000, 0x00000000,
|
||||
0x00000000, 0xD9580000, 0x6D586000, 0x4558C000, 0x59984C80, 0xD9980001, 0x5818000A, 0xC1800000,
|
||||
0xC9800080, 0xC0005400, 0x6D5CA000, 0x401C0000, 0x40180000, 0xC9400000, 0x58000002, 0x00000000,
|
||||
0xC9C00000, 0xC0004930, 0xCD400000, 0xC0004932, 0xCDC00000, 0x59980004, 0xC1C20020, 0xB59CFFF8,
|
||||
0x00000000, 0xC1800000, 0xDD9C0001, 0x581C000A, 0xCD800080, 0x581C000C, 0xC1800000, 0xC9800028,
|
||||
0xC1C00002, 0xDD940000, 0x69D4E000, 0x5D980002, 0xCD800028, 0xC0004924, 0xC9800000, 0x00000000,
|
||||
0x9D000000, 0x00000000, 0x71D8C000, 0xCD800000, 0xC000492A, 0xC9400000, 0xC1C00002, 0x69D8E000,
|
||||
0x7DC0C000, 0x7594A000, 0xCD400000, 0xC000492C, 0xC9400000, 0xDD800001, 0x58000032, 0x75D4A000,
|
||||
0x84000078, 0xC9400001, 0xC9800000, 0xDD800001, 0x5800000C, 0x00000000, 0xCD400001, 0xCD800000,
|
||||
0xC000492C, 0xC9400000, 0xC000492A, 0xC9800000, 0x71D4A000, 0xC000492C, 0xCD400000, 0x71D8C000,
|
||||
0xC000492A, 0xCD800000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004862, 0xC9800000,
|
||||
0x00000000, 0xC1C00200, 0x4194C000, 0x45D8E000, 0x8800FFFA, 0xC5D80000, 0xC0004862, 0xCD800000,
|
||||
0xC0001406, 0xC9800000, 0xC1C00002, 0x9D000000, 0xC5D80A08, 0xC5581050, 0xCD800000, 0xC0004930,
|
||||
0xC9800000, 0xC0004932, 0xC9C00000, 0xC140000E, 0xC5581C20, 0xDD940000, 0xC0007200, 0x40140000,
|
||||
0x5D407400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0x58000002, 0x5D407400, 0x8800FFFA, 0x5C000200,
|
||||
0xCDC00000, 0xDD540000, 0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000, 0x58140000, 0xC98000E0,
|
||||
0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC00000, 0xDD980000, 0xC1C00022, 0xC5D80D78, 0xDD940001,
|
||||
0xC5581C20, 0xC000491C, 0xCD800000, 0xDD540000, 0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000,
|
||||
0x58140004, 0xC9820080, 0x00000000, 0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000,
|
||||
0x58140006, 0xC5D81080, 0xCD801080, 0xC0004860, 0xC9400000, 0xC1820080, 0xC1D00002, 0x58146B00,
|
||||
0xD5800000, 0x58000002, 0xD5800001, 0x59540004, 0xB558FFF8, 0xC0004860, 0xC1400000, 0xCD400000,
|
||||
0xDD980001, 0x9D000000, 0xDD940000, 0xC0001404, 0xCDC00808, 0xC1C00000, 0xC1800200, 0x5D980004,
|
||||
0xDF5D0050, 0x45D8A000, 0x8800FFDA, 0xDD800001, 0x5800000C, 0x00000000, 0xC9400001, 0xC9800000,
|
||||
0xC1C00002, 0xC5D43F08, 0xC5D81E08, 0xC0004862, 0xC9C00000, 0x00000000, 0x00000000, 0x581C7200,
|
||||
0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD400000, 0x58000002, 0x5DC07400, 0x8800FFFA, 0x5C000200,
|
||||
0xCD800000, 0xC0004862, 0xC9C00000, 0x00000000, 0xC15004C0, 0xC5D40068, 0xDD9C0000, 0xC5D41C20,
|
||||
0xC1C00000, 0xDD800001, 0x58000030, 0xC9C00080, 0xDD800001, 0x58000002, 0xC9800000, 0x6DDC2000,
|
||||
0xC000491C, 0x41D8E000, 0xCD400001, 0xCDC00000, 0xDD940001, 0xC1C00000, 0x58140030, 0xC9C00080,
|
||||
0xC1800000, 0x58140006, 0xC9820080, 0x00000000, 0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000,
|
||||
0x9D000000, 0x58140030, 0xC5D80080, 0xCD800080, 0xC1C00000, 0xDF5C0040, 0x5DDC0080, 0x8400FFD2,
|
||||
0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440068,
|
||||
0xC1A0FFFE, 0x59980E28, 0xC000100C, 0xCD400000, 0xC000100E, 0xCD800000, 0xC0004964, 0xC9800000,
|
||||
0x00000000, 0xC170000A, 0x7194A000, 0x6C988000, 0x4498C000, 0x4498C000, 0x59980004, 0xC5940278,
|
||||
0xC0001010, 0xCD400000, 0xC0004946, 0xC9400000, 0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000,
|
||||
0x45D8C000, 0x4558C000, 0xC000494A, 0xC9400000, 0xC0004948, 0xC9C00000, 0x4194C000, 0xC1400012,
|
||||
0xC55C1820, 0x9D000000, 0xC59C0270, 0xC0001012, 0xCDC00000, 0xC1400000, 0x58000012, 0xC9410040,
|
||||
0xC0004950, 0xC9C00000, 0xC5580000, 0xC5940840, 0xC5581080, 0xD9940000, 0xC000493C, 0xC9400000,
|
||||
0xC0004954, 0xC9800000, 0x59DC00A8, 0x455CE000, 0x41D8E000, 0x5D5C0030, 0x8800FFF8, 0xC1C00030,
|
||||
0xC1800000, 0xC5D84030, 0xC1400000, 0xC5D40010, 0x5DD40002, 0x8400005A, 0x5DD40004, 0x84000082,
|
||||
0x5DD40006, 0x840000AA, 0x5DD80026, 0x840000D2, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000,
|
||||
0xCD400000, 0x59980002, 0x8000FFA8, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD4000C0,
|
||||
0x59980002, 0x8000FF70, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400080, 0x59980002,
|
||||
0x8000FF38, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400040, 0x59980002, 0x8000FF00,
|
||||
0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC9400000, 0xC0004954,
|
||||
0xC9C00000, 0xC0004950, 0xC9400080, 0xDD800001, 0x58000028, 0x5D9C0000, 0x8400003A, 0x5D9C0002,
|
||||
0x8400003A, 0x5D9C0004, 0x84000052, 0xC55B0040, 0xC55C08C0, 0xCD800041, 0xCDC008C0, 0x80000048,
|
||||
0xCD400000, 0x80000038, 0xC55900C0, 0xC55C1840, 0xCD8000C1, 0xCDC01840, 0x80000010, 0xC55A0080,
|
||||
0xC55C1080, 0xCD800081, 0xCDC01080, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x59540002,
|
||||
0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x8800FFFA, 0xC5940000, 0x9D000000, 0xCD400000,
|
||||
0x00000000, 0x00000000, 0x9D000000, 0x4158A000, 0xCD400000, 0x00000000, 0xCD800001, 0x44148000,
|
||||
0x8800FFD8, 0x00000000, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004810, 0xCA010040,
|
||||
0xC241FFFE, 0xC1400000, 0x45608000, 0x00000000, 0x9CC00006, 0xC0004200, 0x40180000, 0xC9C00000,
|
||||
0x00000000, 0x00000000, 0x61C08010, 0x84000042, 0xC2400002, 0x6A512000, 0x725CE000, 0xCDC00000,
|
||||
0xC0004748, 0xCD800000, 0x9CC00000, 0x6D98A000, 0x5998003E, 0x45192000, 0x59540002, 0x59980002,
|
||||
0x45A08000, 0xC1000000, 0xC5180006, 0x8000FF20, 0x00000000, 0x40180000, 0xC9C00000, 0xC2000000,
|
||||
0xC5600028, 0xC1210000, 0x69208010, 0x7D008000, 0x751CE000, 0xCDC00000, 0x6D542000, 0x58144300,
|
||||
0xC1000000, 0xCD000001, 0x9CC00000, 0xC121FFFE, 0x5911FFFE, 0xCD000001, 0x79948000, 0x6D10A010,
|
||||
0x5D100000, 0x840000A8, 0x45588000, 0x88000098, 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700,
|
||||
0x40140000, 0xCA000000, 0x00000000, 0x00000000, 0x6A110000, 0x6A110010, 0x62008018, 0x8400001A,
|
||||
0x00000000, 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45152000, 0x59540002, 0x6D57A000, 0x6D57A010,
|
||||
0x6D54A000, 0x6D936000, 0x6D136010, 0xC1E10000, 0x69D0E010, 0x5DDC0002, 0x7DC0E000, 0x6D98A010,
|
||||
0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, 0x40140000, 0xCA000000, 0x00000000, 0x00000000,
|
||||
0x6A110000, 0x6A110010, 0x45948000, 0x00000000, 0x75E10002, 0x62008018, 0x8400001A, 0x00000000,
|
||||
0x9CC00000, 0x6D54A000, 0x5954003E, 0x45152000, 0x45948000, 0x00000000, 0x9CC00002, 0x59540002,
|
||||
0x6D57A000, 0x6D57A010, 0xC0004700, 0x40140000, 0xCA000000, 0x8000FF50, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x58004700, 0xC9800000, 0x9CC00000, 0x00000000, 0x6994C000, 0x6DA7E010, 0x58004700,
|
||||
0xC9800000, 0xC1210000, 0x9CC00000, 0x69148010, 0x7118C000, 0xCD800000, 0xC1000000, 0xC0004810,
|
||||
0xC9020040, 0x00000000, 0x00000000, 0x451CC000, 0x8800004A, 0xC2400002, 0x45948000, 0xC1000000,
|
||||
0xC5240004, 0x455C8000, 0xC1000000, 0xC5240006, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x59980200, 0xC2400000, 0x45D48000, 0xC1000002, 0xC5240004, 0x45588000, 0xC1000002, 0xC5240006,
|
||||
0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004740, 0xC9C00000, 0x59180002, 0x6D130000,
|
||||
0x6D130010, 0x45D08000, 0xC2400000, 0x9CC00002, 0x00000000, 0x00000000, 0x45D88000, 0x8800004A,
|
||||
0xC2400002, 0x45D48000, 0xC1000000, 0xC5240004, 0x45588000, 0xC1000000, 0xC5240004, 0x9CC00000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC2400000, 0x45948000, 0xC1000002, 0xC5240006, 0x455C8000,
|
||||
0xC1000002, 0xC5240006, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6D570000,
|
||||
0x6D570010, 0x45948000, 0x6D402000, 0x9CC00002, 0x58004300, 0x58000000, 0xC13C0002, 0xCD001E08,
|
||||
0x8000FF98, 0x00000000, 0x00000000, 0x00000000, 0xC1020002, 0xD90C0000, 0xC9800000, 0x59540002,
|
||||
0xC0004730, 0xCD400000, 0x5D980002, 0x00000000, 0x8000001E, 0x00000000, 0x9CC00000, 0xC0004732,
|
||||
0xCD800000, 0x00000000, 0xC0004734, 0xC9C00000, 0xC1800000, 0xC0004816, 0xC9820080, 0xC0004738,
|
||||
0xCDC00000, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC00000, 0xC0004732, 0xCD800000,
|
||||
};
|
||||
|
||||
static unsigned int firmware_binary_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_DANUBE_H
|
||||
@@ -0,0 +1,57 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_regs_amazon_se.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (Firmware Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_FW_REGS_AMAZON_SE_H
|
||||
#define IFXMIPS_ATM_FW_REGS_AMAZON_SE_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Host-PPE Communication Data Address Mapping
|
||||
*/
|
||||
#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2401)) /* Firmware Version ID */
|
||||
#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */
|
||||
//#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */
|
||||
#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */
|
||||
#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */
|
||||
#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */
|
||||
#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20))
|
||||
#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7))
|
||||
#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i)))
|
||||
#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2F00 + (i) * 27))
|
||||
#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2F01 + (i) * 27))
|
||||
#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410))
|
||||
#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x3200 + (i)))
|
||||
#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x3220 + (i)))
|
||||
#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x3240 + (i)))
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_REGS_AMAZON_SE_H
|
||||
172
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_ar9.h
Normal file
172
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_ar9.h
Normal file
@@ -0,0 +1,172 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_regs_ar9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (Firmware Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_FW_REGS_AR9_H
|
||||
#define IFXMIPS_ATM_FW_REGS_AR9_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Host-PPE Communication Data Address Mapping
|
||||
*/
|
||||
#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001))
|
||||
#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */
|
||||
#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */
|
||||
#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */
|
||||
#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */
|
||||
#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20))
|
||||
#define WRX_QUEUE_CONTEXT(i) ((struct wrx_queue_context*) SB_BUFFER(0x2504 + (i) * 20))
|
||||
#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7))
|
||||
#define WRX_DESC_CONTEXT(i) ((struct wrx_desc_context*) SB_BUFFER(0x2643 + (i) * 7))
|
||||
#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i)))
|
||||
#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x3800 + (i) * 27))
|
||||
#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x3801 + (i) * 27))
|
||||
#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410))
|
||||
#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2010 + (i)))
|
||||
#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2030 + (i)))
|
||||
#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2050 + (i)))
|
||||
|
||||
#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
|
||||
|
||||
#define RETX_MODE_CFG ((volatile struct Retx_mode_cfg *) SB_BUFFER(0x2408))
|
||||
#define RETX_TSYNC_CFG ((volatile struct Retx_Tsync_cfg *) SB_BUFFER(0x2409))
|
||||
#define RETX_TD_CFG ((volatile struct Retx_Td_cfg *) SB_BUFFER(0x240A))
|
||||
#define RETX_MIB_TIMER_CFG ((volatile struct Retx_MIB_Timer_cfg *) SB_BUFFER(0x240B))
|
||||
#define RETX_PLAYOUT_BUFFER_BASE SB_BUFFER(0x240D)
|
||||
#define RETX_SERVICE_HEADER_CFG SB_BUFFER(0x240E)
|
||||
#define RETX_MASK_HEADER_CFG SB_BUFFER(0x240F)
|
||||
|
||||
#define RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) PPE_REG_ADDR(0x0D78))
|
||||
#define BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AC))
|
||||
#define FIRST_BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AE))
|
||||
|
||||
#define PB_BUFFER_USAGE SB_BUFFER(0x2100)
|
||||
#define DTU_STAT_INFO ((volatile struct DTU_stat_info *) SB_BUFFER(0x2180))
|
||||
#define DTU_VLD_STAT SB_BUFFER(0x2380)
|
||||
|
||||
|
||||
//=====================================================================
|
||||
// retx firmware mib, for debug purpose
|
||||
// address : 0x2388 - 0x238F
|
||||
// size : 8
|
||||
//=====================================================================
|
||||
#define URETX_RX_TOTAL_DTU SB_BUFFER(0x2388)
|
||||
#define URETX_RX_BAD_DTU SB_BUFFER(0x2389)
|
||||
#define URETX_RX_GOOD_DTU SB_BUFFER(0x238A)
|
||||
#define URETX_RX_CORRECTED_DTU SB_BUFFER(0x238B)
|
||||
#define URETX_RX_OUTOFDATE_DTU SB_BUFFER(0x238C)
|
||||
#define URETX_RX_DUPLICATE_DTU SB_BUFFER(0x238D)
|
||||
#define URETX_RX_TIMEOUT_DTU SB_BUFFER(0x238E)
|
||||
|
||||
#define URETX_ALPHA_SWITCH_TO_HUNT_TIMES SB_BUFFER(0x238F)
|
||||
|
||||
// cell counter for debug purpose
|
||||
#define WRX_BC0_CELL_NUM SB_BUFFER(0x23E0)
|
||||
#define WRX_BC0_DROP_CELL_NUM SB_BUFFER(0x23E1)
|
||||
#define WRX_BC0_NONRETX_CELL_NUM SB_BUFFER(0x23E2)
|
||||
#define WRX_BC0_RETX_CELL_NUM SB_BUFFER(0x23E3)
|
||||
#define WRX_BC0_OUTOFDATE_CELL_NUM SB_BUFFER(0x23E4)
|
||||
#define WRX_BC0_DIRECTUP_NUM SB_BUFFER(0x23E5)
|
||||
#define WRX_BC0_PBW_TOTAL_NUM SB_BUFFER(0x23E6)
|
||||
#define WRX_BC0_PBW_SUCC_NUM SB_BUFFER(0x23E7)
|
||||
#define WRX_BC0_PBW_FAIL_NUM SB_BUFFER(0x23E8)
|
||||
#define WRX_BC1_CELL_NUM SB_BUFFER(0x23E9)
|
||||
|
||||
// debug info (interface)
|
||||
|
||||
#define DBG_DTU_INTF_WRPTR SB_BUFFER(0x2390)
|
||||
#define DBG_INTF_FCW_DUP_CNT SB_BUFFER(0x2391)
|
||||
#define DBG_INTF_SID_CHANGE_IN_DTU_CNT SB_BUFFER(0x2392)
|
||||
#define DBG_INTF_LCW_DUP_CNT SB_BUFFER(0x2393)
|
||||
|
||||
#define DBG_RFBI_DONE_INT_CNT SB_BUFFER(0x2394)
|
||||
#define DBG_DREG_BEG_END SB_BUFFER(0x2395)
|
||||
#define DBG_RFBI_BC0_INVALID_CNT SB_BUFFER(0x2396)
|
||||
#define DBG_RFBI_LAST_T SB_BUFFER(0x2397)
|
||||
|
||||
#define DBG_RFBI_INTV0 SB_BUFFER(0x23EE)
|
||||
#define DBG_RFBI_INTV1 SB_BUFFER(0x23EF)
|
||||
|
||||
#define DBG_INTF_INFO(i) ((volatile struct Retx_adsl_ppe_intf_rec *) SB_BUFFER(0x23F0 + i))
|
||||
|
||||
// Internal status
|
||||
#define URetx_curr_time SB_BUFFER(0x2398)
|
||||
#define URetx_sec_counter SB_BUFFER(0x2399)
|
||||
#define RxCURR_EFB SB_BUFFER(0x239A)
|
||||
#define RxDTURetransmittedCNT SB_BUFFER(0x239B)
|
||||
|
||||
//=====================================================================
|
||||
// standardized MIB counter
|
||||
// address : 0x239C - 0x239F
|
||||
// size : 4
|
||||
//=====================================================================
|
||||
#define RxLastEFBCNT SB_BUFFER(0x239C)
|
||||
#define RxDTUCorrectedCNT SB_BUFFER(0x239D)
|
||||
#define RxDTUCorruptedCNT SB_BUFFER(0x239E)
|
||||
#define RxRetxDTUUncorrectedCNT SB_BUFFER(0x239F)
|
||||
|
||||
|
||||
//=====================================================================
|
||||
// General URetx Context
|
||||
// address : 0x23A0 - 0x23AF
|
||||
// size : 16
|
||||
//=====================================================================
|
||||
#define NEXT_DTU_SID_OUT SB_BUFFER(0x23A0)
|
||||
#define LAST_DTU_SID_IN SB_BUFFER(0x23A1)
|
||||
#define NEXT_CELL_SID_OUT SB_BUFFER(0x23A2)
|
||||
#define ISR_CELL_ID SB_BUFFER(0x23A3)
|
||||
#define PB_CELL_SEARCH_IDX SB_BUFFER(0x23A4)
|
||||
#define PB_READ_PEND_FLAG SB_BUFFER(0x23A5)
|
||||
#define RFBI_FIRST_CW SB_BUFFER(0x23A6)
|
||||
#define RFBI_BAD_CW SB_BUFFER(0x23A7)
|
||||
#define RFBI_INVALID_CW SB_BUFFER(0x23A8)
|
||||
#define RFBI_RETX_CW SB_BUFFER(0x23A9)
|
||||
#define RFBI_CHK_DTU_STATUS SB_BUFFER(0x23AA)
|
||||
|
||||
//=====================================================================
|
||||
// per PVC counter for RX error_pdu and correct_pdu
|
||||
// address : 0x23B0 - 0x23CF
|
||||
// size : 32
|
||||
//=====================================================================
|
||||
#define WRX_PER_PVC_CORRECT_PDU_BASE SB_BUFFER(0x23B0)
|
||||
#define WRX_PER_PVC_ERROR_PDU_BASE SB_BUFFER(0x23C0)
|
||||
|
||||
#define __WRXCTXT_L2_RdPtr(i) SB_BUFFER(0x2422 + (i))
|
||||
#define __WRXCTXT_L2Pages(i) SB_BUFFER(0x2424 + (i))
|
||||
|
||||
#define __WTXCTXT_TC_WRPTR(i) SB_BUFFER(0x2450 + (i))
|
||||
#define __WRXCTXT_PortState(i) SB_BUFFER(0x242A + (i))
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_REGS_AR9_H
|
||||
549
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_common.h
Normal file
549
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_common.h
Normal file
@@ -0,0 +1,549 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_regs_common.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (Firmware Register Structures)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_FW_REGS_COMMON_H
|
||||
#define IFXMIPS_ATM_FW_REGS_COMMON_H
|
||||
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_atm_fw_regs_danube.h"
|
||||
#elif defined(CONFIG_AMAZON_SE)
|
||||
#include "ifxmips_atm_fw_regs_amazon_se.h"
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_atm_fw_regs_ar9.h"
|
||||
#elif defined(CONFIG_VR9)
|
||||
#include "ifxmips_atm_fw_regs_vr9.h"
|
||||
#else
|
||||
#error Platform is not specified!
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* PPE ATM Cell Header
|
||||
*/
|
||||
#if defined(__BIG_ENDIAN)
|
||||
struct uni_cell_header {
|
||||
unsigned int gfc :4;
|
||||
unsigned int vpi :8;
|
||||
unsigned int vci :16;
|
||||
unsigned int pti :3;
|
||||
unsigned int clp :1;
|
||||
};
|
||||
#else
|
||||
struct uni_cell_header {
|
||||
unsigned int clp :1;
|
||||
unsigned int pti :3;
|
||||
unsigned int vci :16;
|
||||
unsigned int vpi :8;
|
||||
unsigned int gfc :4;
|
||||
};
|
||||
#endif // defined(__BIG_ENDIAN)
|
||||
|
||||
/*
|
||||
* Inband Header and Trailer
|
||||
*/
|
||||
#if defined(__BIG_ENDIAN)
|
||||
struct rx_inband_trailer {
|
||||
/* 0 - 3h */
|
||||
unsigned int uu :8;
|
||||
unsigned int cpi :8;
|
||||
unsigned int stw_res1:4;
|
||||
unsigned int stw_clp :1;
|
||||
unsigned int stw_ec :1;
|
||||
unsigned int stw_uu :1;
|
||||
unsigned int stw_cpi :1;
|
||||
unsigned int stw_ovz :1;
|
||||
unsigned int stw_mfl :1;
|
||||
unsigned int stw_usz :1;
|
||||
unsigned int stw_crc :1;
|
||||
unsigned int stw_il :1;
|
||||
unsigned int stw_ra :1;
|
||||
unsigned int stw_res2:2;
|
||||
/* 4 - 7h */
|
||||
unsigned int gfc :4;
|
||||
unsigned int vpi :8;
|
||||
unsigned int vci :16;
|
||||
unsigned int pti :3;
|
||||
unsigned int clp :1;
|
||||
};
|
||||
|
||||
struct tx_inband_header {
|
||||
/* 0 - 3h */
|
||||
unsigned int gfc :4;
|
||||
unsigned int vpi :8;
|
||||
unsigned int vci :16;
|
||||
unsigned int pti :3;
|
||||
unsigned int clp :1;
|
||||
/* 4 - 7h */
|
||||
unsigned int uu :8;
|
||||
unsigned int cpi :8;
|
||||
unsigned int pad :8;
|
||||
unsigned int res1 :8;
|
||||
};
|
||||
#else
|
||||
struct rx_inband_trailer {
|
||||
/* 0 - 3h */
|
||||
unsigned int stw_res2:2;
|
||||
unsigned int stw_ra :1;
|
||||
unsigned int stw_il :1;
|
||||
unsigned int stw_crc :1;
|
||||
unsigned int stw_usz :1;
|
||||
unsigned int stw_mfl :1;
|
||||
unsigned int stw_ovz :1;
|
||||
unsigned int stw_cpi :1;
|
||||
unsigned int stw_uu :1;
|
||||
unsigned int stw_ec :1;
|
||||
unsigned int stw_clp :1;
|
||||
unsigned int stw_res1:4;
|
||||
unsigned int cpi :8;
|
||||
unsigned int uu :8;
|
||||
/* 4 - 7h */
|
||||
unsigned int clp :1;
|
||||
unsigned int pti :3;
|
||||
unsigned int vci :16;
|
||||
unsigned int vpi :8;
|
||||
unsigned int gfc :4;
|
||||
};
|
||||
|
||||
struct tx_inband_header {
|
||||
/* 0 - 3h */
|
||||
unsigned int clp :1;
|
||||
unsigned int pti :3;
|
||||
unsigned int vci :16;
|
||||
unsigned int vpi :8;
|
||||
unsigned int gfc :4;
|
||||
/* 4 - 7h */
|
||||
unsigned int res1 :8;
|
||||
unsigned int pad :8;
|
||||
unsigned int cpi :8;
|
||||
unsigned int uu :8;
|
||||
};
|
||||
#endif // defined(__BIG_ENDIAN)
|
||||
|
||||
/*
|
||||
* MIB Table Maintained by Firmware
|
||||
*/
|
||||
struct wan_mib_table {
|
||||
u32 res1;
|
||||
u32 wrx_drophtu_cell;
|
||||
u32 wrx_dropdes_pdu;
|
||||
u32 wrx_correct_pdu;
|
||||
u32 wrx_err_pdu;
|
||||
u32 wrx_dropdes_cell;
|
||||
u32 wrx_correct_cell;
|
||||
u32 wrx_err_cell;
|
||||
u32 wrx_total_byte;
|
||||
u32 res2;
|
||||
u32 wtx_total_pdu;
|
||||
u32 wtx_total_cell;
|
||||
u32 wtx_total_byte;
|
||||
};
|
||||
|
||||
/*
|
||||
* Host-PPE Communication Data Structure
|
||||
*/
|
||||
|
||||
#if defined(__BIG_ENDIAN)
|
||||
struct fw_ver_id {
|
||||
unsigned int family :4;
|
||||
unsigned int fwtype :4;
|
||||
unsigned int interface :4;
|
||||
unsigned int fwmode :4;
|
||||
unsigned int major :8;
|
||||
unsigned int minor :8;
|
||||
};
|
||||
|
||||
struct wrx_queue_config {
|
||||
/* 0h */
|
||||
unsigned int res2 :27;
|
||||
unsigned int dmach :4;
|
||||
unsigned int errdp :1;
|
||||
/* 1h */
|
||||
unsigned int oversize :16;
|
||||
unsigned int undersize :16;
|
||||
/* 2h */
|
||||
unsigned int res1 :16;
|
||||
unsigned int mfs :16;
|
||||
/* 3h */
|
||||
unsigned int uumask :8;
|
||||
unsigned int cpimask :8;
|
||||
unsigned int uuexp :8;
|
||||
unsigned int cpiexp :8;
|
||||
};
|
||||
|
||||
struct wrx_queue_context {
|
||||
/* 0h */
|
||||
unsigned int curr_len :16;
|
||||
unsigned int res0 :12;
|
||||
unsigned int mfs :1;
|
||||
unsigned int ec :1;
|
||||
unsigned int clp1 :1;
|
||||
unsigned int aal5dp :1;
|
||||
|
||||
/* 1h */
|
||||
unsigned int intcrc;
|
||||
|
||||
/* 2h, 3h */
|
||||
unsigned int curr_des0;
|
||||
unsigned int curr_des1;
|
||||
|
||||
/* 4h - 0xE */
|
||||
unsigned int res1[11];
|
||||
|
||||
unsigned int last_dword;
|
||||
};
|
||||
|
||||
struct wtx_port_config {
|
||||
unsigned int res1 :27;
|
||||
unsigned int qid :4;
|
||||
unsigned int qsben :1;
|
||||
};
|
||||
|
||||
struct wtx_queue_config {
|
||||
unsigned int res1 :16;
|
||||
unsigned int same_vc_qmap:8;
|
||||
unsigned int res2 :1;
|
||||
unsigned int sbid :1;
|
||||
unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to.
|
||||
unsigned int res3 :1;
|
||||
unsigned int qsben :1;
|
||||
};
|
||||
|
||||
struct wrx_desc_context {
|
||||
unsigned int dmach_wrptr : 16;
|
||||
unsigned int dmach_rdptr : 16;
|
||||
|
||||
unsigned int res0 : 16;
|
||||
unsigned int dmach_fcnt : 16;
|
||||
|
||||
unsigned int res1 : 11;
|
||||
unsigned int desbuf_wrptr : 5;
|
||||
unsigned int res2 : 11;
|
||||
unsigned int desbuf_rdptr : 5;
|
||||
|
||||
unsigned int res3 : 27;
|
||||
unsigned int desbuf_vcnt : 5;
|
||||
};
|
||||
|
||||
struct wrx_dma_channel_config {
|
||||
/* 0h */
|
||||
unsigned int res1 :1;
|
||||
unsigned int mode :2;
|
||||
unsigned int rlcfg :1;
|
||||
unsigned int desba :28;
|
||||
/* 1h */
|
||||
unsigned int chrl :16;
|
||||
unsigned int clp1th :16;
|
||||
/* 2h */
|
||||
unsigned int deslen :16;
|
||||
unsigned int vlddes :16;
|
||||
};
|
||||
|
||||
struct wtx_dma_channel_config {
|
||||
/* 0h */
|
||||
unsigned int res2 :1;
|
||||
unsigned int mode :2;
|
||||
unsigned int res3 :1;
|
||||
unsigned int desba :28;
|
||||
/* 1h */
|
||||
unsigned int res1 :32;
|
||||
/* 2h */
|
||||
unsigned int deslen :16;
|
||||
unsigned int vlddes :16;
|
||||
};
|
||||
|
||||
struct htu_entry {
|
||||
unsigned int res1 :1;
|
||||
unsigned int clp :1;
|
||||
unsigned int pid :2;
|
||||
unsigned int vpi :8;
|
||||
unsigned int vci :16;
|
||||
unsigned int pti :3;
|
||||
unsigned int vld :1;
|
||||
};
|
||||
|
||||
struct htu_mask {
|
||||
unsigned int set :1;
|
||||
unsigned int clp :1;
|
||||
unsigned int pid_mask :2;
|
||||
unsigned int vpi_mask :8;
|
||||
unsigned int vci_mask :16;
|
||||
unsigned int pti_mask :3;
|
||||
unsigned int clear :1;
|
||||
};
|
||||
|
||||
struct htu_result {
|
||||
unsigned int res1 :12;
|
||||
unsigned int cellid :4;
|
||||
unsigned int res2 :5;
|
||||
unsigned int type :1;
|
||||
unsigned int ven :1;
|
||||
unsigned int res3 :5;
|
||||
unsigned int qid :4;
|
||||
};
|
||||
|
||||
struct rx_descriptor {
|
||||
/* 0 - 3h */
|
||||
unsigned int own :1;
|
||||
unsigned int c :1;
|
||||
unsigned int sop :1;
|
||||
unsigned int eop :1;
|
||||
unsigned int res1 :3;
|
||||
unsigned int byteoff :2;
|
||||
unsigned int res2 :2;
|
||||
unsigned int id :4;
|
||||
unsigned int err :1;
|
||||
unsigned int datalen :16;
|
||||
/* 4 - 7h */
|
||||
unsigned int res3 :4;
|
||||
unsigned int dataptr :28;
|
||||
};
|
||||
|
||||
struct tx_descriptor {
|
||||
/* 0 - 3h */
|
||||
unsigned int own :1;
|
||||
unsigned int c :1;
|
||||
unsigned int sop :1;
|
||||
unsigned int eop :1;
|
||||
unsigned int byteoff :5;
|
||||
unsigned int res1 :5;
|
||||
unsigned int iscell :1;
|
||||
unsigned int clp :1;
|
||||
unsigned int datalen :16;
|
||||
/* 4 - 7h */
|
||||
unsigned int res2 :4;
|
||||
unsigned int dataptr :28;
|
||||
};
|
||||
#else
|
||||
struct wrx_queue_config {
|
||||
/* 0h */
|
||||
unsigned int errdp :1;
|
||||
unsigned int dmach :4;
|
||||
unsigned int res2 :27;
|
||||
/* 1h */
|
||||
unsigned int undersize :16;
|
||||
unsigned int oversize :16;
|
||||
/* 2h */
|
||||
unsigned int mfs :16;
|
||||
unsigned int res1 :16;
|
||||
/* 3h */
|
||||
unsigned int cpiexp :8;
|
||||
unsigned int uuexp :8;
|
||||
unsigned int cpimask :8;
|
||||
unsigned int uumask :8;
|
||||
};
|
||||
|
||||
struct wtx_port_config {
|
||||
unsigned int qsben :1;
|
||||
unsigned int qid :4;
|
||||
unsigned int res1 :27;
|
||||
};
|
||||
|
||||
struct wtx_queue_config {
|
||||
unsigned int qsben :1;
|
||||
unsigned int res3 :1;
|
||||
unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to.
|
||||
unsigned int sbid :1;
|
||||
unsigned int res2 :1;
|
||||
unsigned int same_vc_qmap:8;
|
||||
unsigned int res1 :16;
|
||||
};
|
||||
|
||||
struct wrx_dma_channel_config
|
||||
{
|
||||
/* 0h */
|
||||
unsigned int desba :28;
|
||||
unsigned int rlcfg :1;
|
||||
unsigned int mode :2;
|
||||
unsigned int res1 :1;
|
||||
/* 1h */
|
||||
unsigned int clp1th :16;
|
||||
unsigned int chrl :16;
|
||||
/* 2h */
|
||||
unsigned int vlddes :16;
|
||||
unsigned int deslen :16;
|
||||
};
|
||||
|
||||
struct wtx_dma_channel_config {
|
||||
/* 0h */
|
||||
unsigned int desba :28;
|
||||
unsigned int res3 :1;
|
||||
unsigned int mode :2;
|
||||
unsigned int res2 :1;
|
||||
/* 1h */
|
||||
unsigned int res1 :32;
|
||||
/* 2h */
|
||||
unsigned int vlddes :16;
|
||||
unsigned int deslen :16;
|
||||
};
|
||||
|
||||
struct rx_descriptor {
|
||||
/* 4 - 7h */
|
||||
unsigned int dataptr :28;
|
||||
unsigned int res3 :4;
|
||||
/* 0 - 3h */
|
||||
unsigned int datalen :16;
|
||||
unsigned int err :1;
|
||||
unsigned int id :4;
|
||||
unsigned int res2 :2;
|
||||
unsigned int byteoff :2;
|
||||
unsigned int res1 :3;
|
||||
unsigned int eop :1;
|
||||
unsigned int sop :1;
|
||||
unsigned int c :1;
|
||||
unsigned int own :1;
|
||||
};
|
||||
|
||||
struct tx_descriptor {
|
||||
/* 4 - 7h */
|
||||
unsigned int dataptr :28;
|
||||
unsigned int res2 :4;
|
||||
/* 0 - 3h */
|
||||
unsigned int datalen :16;
|
||||
unsigned int clp :1;
|
||||
unsigned int iscell :1;
|
||||
unsigned int res1 :5;
|
||||
unsigned int byteoff :5;
|
||||
unsigned int eop :1;
|
||||
unsigned int sop :1;
|
||||
unsigned int c :1;
|
||||
unsigned int own :1;
|
||||
};
|
||||
#endif // defined(__BIG_ENDIAN)
|
||||
|
||||
#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
|
||||
#if defined(__BIG_ENDIAN)
|
||||
|
||||
struct Retx_adsl_ppe_intf {
|
||||
unsigned int res0_0 : 16;
|
||||
unsigned int dtu_sid : 8;
|
||||
unsigned int dtu_timestamp : 8;
|
||||
|
||||
unsigned int res1_0 : 16;
|
||||
unsigned int local_time : 8;
|
||||
unsigned int res1_1 : 5;
|
||||
unsigned int is_last_cw : 1;
|
||||
unsigned int reinit_flag : 1;
|
||||
unsigned int is_bad_cw : 1;
|
||||
};
|
||||
|
||||
struct Retx_adsl_ppe_intf_rec {
|
||||
|
||||
unsigned int local_time : 8;
|
||||
unsigned int res1_1 : 5;
|
||||
unsigned int is_last_cw : 1;
|
||||
unsigned int reinit_flag : 1;
|
||||
unsigned int is_bad_cw : 1;
|
||||
|
||||
unsigned int dtu_sid : 8;
|
||||
unsigned int dtu_timestamp : 8;
|
||||
|
||||
};
|
||||
|
||||
struct Retx_mode_cfg {
|
||||
unsigned int res0 :8;
|
||||
unsigned int invld_range :8; // used for rejecting the too late arrival of the retransmitted DTU
|
||||
unsigned int buff_size :8; // the total number of cells in playout buffer is 32 * buff_size
|
||||
unsigned int res1 :7;
|
||||
unsigned int retx_en :1;
|
||||
};
|
||||
|
||||
struct Retx_Tsync_cfg {
|
||||
unsigned int fw_alpha :16; // number of consecutive HEC error cell causes that the cell delineation state machine transit from SYNC to HUNT (0 means never)
|
||||
unsigned int sync_inp :16; // reserved
|
||||
};
|
||||
|
||||
struct Retx_Td_cfg {
|
||||
unsigned int res0 :8;
|
||||
unsigned int td_max :8; // maximum delay between the time a DTU is first created at transmitter and the time the DTU is sent out of ReTX layer at receiver
|
||||
unsigned int res1 :8;
|
||||
unsigned int td_min :8; // minimum delay between the time a DTU is first created at transmitter and the time the DTU is sent out of ReTX layer at receiver
|
||||
};
|
||||
|
||||
struct Retx_MIB_Timer_cfg {
|
||||
unsigned int ticks_per_sec : 16;
|
||||
unsigned int tick_cycle : 16;
|
||||
};
|
||||
|
||||
struct DTU_stat_info {
|
||||
unsigned int complete : 1;
|
||||
unsigned int bad : 1;
|
||||
unsigned int res0_0 : 14;
|
||||
unsigned int time_stamp : 8;
|
||||
unsigned int cell_cnt : 8;
|
||||
|
||||
unsigned int dtu_rd_ptr : 16;
|
||||
unsigned int dtu_wr_ptr : 16;
|
||||
};
|
||||
|
||||
struct Retx_ctrl_field {
|
||||
unsigned int res0 : 1;
|
||||
|
||||
unsigned int l2_drop : 1;
|
||||
unsigned int res1 : 13;
|
||||
unsigned int retx : 1;
|
||||
|
||||
unsigned int dtu_sid : 8;
|
||||
unsigned int cell_sid : 8;
|
||||
};
|
||||
|
||||
#else
|
||||
#error Little Endian is not supported yet.
|
||||
#endif
|
||||
|
||||
struct dsl_param {
|
||||
unsigned int update_flag; // 00
|
||||
unsigned int res0; // 04
|
||||
unsigned int MinDelayrt; // 08
|
||||
unsigned int MaxDelayrt; // 0C
|
||||
unsigned int res1; // 10
|
||||
unsigned int res2; // 14
|
||||
unsigned int RetxEnable; // 18
|
||||
unsigned int ServiceSpecificReTx; // 1C
|
||||
unsigned int res3; // 20
|
||||
unsigned int ReTxPVC; // 24
|
||||
unsigned int res4; // 28
|
||||
unsigned int res5; // 2C
|
||||
unsigned int res6; // 30
|
||||
unsigned int res7; // 34
|
||||
unsigned int res8; // 38
|
||||
unsigned int res9; // 3C
|
||||
unsigned int res10; // 40
|
||||
unsigned int res11; // 44
|
||||
unsigned int res12; // 48
|
||||
unsigned int res13; // 4C
|
||||
unsigned int RxDtuCorruptedCNT; // 50
|
||||
unsigned int RxRetxDtuUnCorrectedCNT;// 54
|
||||
unsigned int RxLastEFB; // 58
|
||||
unsigned int RxDtuCorrectedCNT; // 5C
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_REGS_COMMON_H
|
||||
@@ -0,0 +1,51 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_regs_danube.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (Firmware Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H
|
||||
#define IFXMIPS_ATM_FW_REGS_DANUBE_H
|
||||
|
||||
#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001))
|
||||
#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */
|
||||
#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */
|
||||
#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */
|
||||
#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */
|
||||
|
||||
#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20))
|
||||
#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7))
|
||||
#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i)))
|
||||
#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27))
|
||||
#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27))
|
||||
#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410))
|
||||
#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i)))
|
||||
#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i)))
|
||||
#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i)))
|
||||
|
||||
#endif
|
||||
72
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_vr9.h
Normal file
72
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_vr9.h
Normal file
@@ -0,0 +1,72 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_regs_vr9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (Firmware Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_FW_REGS_VR9_H
|
||||
#define IFXMIPS_ATM_FW_REGS_VR9_H
|
||||
|
||||
#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001))
|
||||
|
||||
/* WAN RX HTU Table Size, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRX_HTUTS SB_BUFFER(0x2010)
|
||||
/* WAN RX Queue Number */
|
||||
#define CFG_WRX_QNUM SB_BUFFER(0x2011)
|
||||
/* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRX_DCHNUM SB_BUFFER(0x2012)
|
||||
/* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */
|
||||
#define CFG_WTX_DCHNUM SB_BUFFER(0x2013)
|
||||
/* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */
|
||||
#define CFG_WRDES_DELAY SB_BUFFER(0x2014)
|
||||
/* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WRX_DMACH_ON SB_BUFFER(0x2015)
|
||||
/* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */
|
||||
#define WTX_DMACH_ON SB_BUFFER(0x2016)
|
||||
/* WAN RX HUNT Threshold, must be between 2 to 8. */
|
||||
#define WRX_HUNT_BITTH SB_BUFFER(0x2017)
|
||||
/* i < 16 */
|
||||
#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config *) SB_BUFFER(0x4C00 + (i) * 20))
|
||||
/* i < 8 */
|
||||
#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config *) SB_BUFFER(0x4F80 + (i) * 7))
|
||||
/* i < 2 */
|
||||
#define WTX_PORT_CONFIG(i) ((struct wtx_port_config *) SB_BUFFER(0x4FB8 + (i)))
|
||||
/* i < 16 */
|
||||
#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config *) SB_BUFFER(0x3A00 + (i) * 27))
|
||||
/* i < 16 */
|
||||
#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config *) SB_BUFFER(0x3A01 + (i) * 27))
|
||||
|
||||
#define WAN_MIB_TABLE ((struct wan_mib_table *) SB_BUFFER(0x4EF0))
|
||||
/* i < 32 */
|
||||
#define HTU_ENTRY(i) ((struct htu_entry *) SB_BUFFER(0x26A0 + (i)))
|
||||
/* i < 32 */
|
||||
#define HTU_MASK(i) ((struct htu_mask *) SB_BUFFER(0x26C0 + (i)))
|
||||
/* i < 32 */
|
||||
#define HTU_RESULT(i) ((struct htu_result *) SB_BUFFER(0x26E0 + (i)))
|
||||
/* bit 0~3 - 0x0F: in showtime, 0x00: not in showtime */
|
||||
#define UTP_CFG SB_BUFFER(0x2018)
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_REGS_VR9_H
|
||||
427
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_vr9.h
Normal file
427
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_fw_vr9.h
Normal file
@@ -0,0 +1,427 @@
|
||||
#ifndef IFXMIPS_ATM_FW_VR9_H
|
||||
#define IFXMIPS_ATM_FW_VR9_H
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_fw_vr9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 22 OCT 2007
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PP32 Firmware)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 22 OCT 2007 Xu Liang Initial Version, v00.01
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#define VER_IN_FIRMWARE 1
|
||||
|
||||
#define ATM_FW_VER_MAJOR 0
|
||||
#define ATM_FW_VER_MINOR 24
|
||||
|
||||
|
||||
static u32 vr9_fw_bin[] = {
|
||||
0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0x80004390, 0xC2000000, 0xDA0800F9, 0x80003A10,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x800039C8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x80004B60, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x800038C8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400000, 0xC000ABC0, 0xC88400F8, 0x80004050, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC0400002, 0xC000ABC0, 0xC88400F8, 0x80003FD0, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3C00004, 0xDBC800F9, 0xC10C0002, 0xD90C00F8, 0x8000FEE0, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC10E0002, 0xD90C00F8, 0xC0004028, 0xC84000F8, 0x80004000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481,
|
||||
0x00000000, 0x00000000, 0x00000000, 0xC3C00000, 0xDBC800F9, 0xC1400008, 0xC1900000, 0x71588000,
|
||||
0x14100100, 0xC140000A, 0xC1900002, 0x71588000, 0x14100100, 0xC140000C, 0xC1900004, 0x71588000,
|
||||
0x14100100, 0xC1400004, 0xC1900006, 0x71588000, 0x14100100, 0xC1400006, 0xC1900008, 0x71588000,
|
||||
0x14100100, 0xC140000E, 0xC190000A, 0x71588000, 0x14100100, 0xC1400000, 0xC190000C, 0x71588000,
|
||||
0x14100100, 0xC1400002, 0xC190000E, 0x71588000, 0x14100100, 0xC0400000, 0xC11C0000, 0xC000E82C,
|
||||
0xCD05CE00, 0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC0400002, 0xC11C0000, 0xC000E82C, 0xCD05CE00,
|
||||
0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC000E824, 0x00000000, 0xCBC000F9, 0xCB8000F9, 0xCB4000F9,
|
||||
0xCB0000F8, 0xC000ABE4, 0x5BFC4000, 0xCFC000F9, 0x5BB84000, 0xCF8000F9, 0x5B744000, 0xCF4000F9,
|
||||
0x5B304000, 0xCF0000F8, 0xC000EA10, 0x00000000, 0xCBC000F9, 0xCB8000F8, 0xC000ABE0, 0x5BFC4000,
|
||||
0xCFC000F9, 0x5BB84000, 0xCF8000F8, 0xC30001FE, 0xC000F416, 0xCF0000F8, 0xC3000000, 0x7F018000,
|
||||
0xC000E42E, 0xCF0000F8, 0xC000E40E, 0xCF0000F8, 0xC3C1FFFE, 0xC000690E, 0xCFC00078, 0xC000692C,
|
||||
0xCFC00078, 0xC0006924, 0xCFC00038, 0xC0006912, 0xCFC00038, 0xC0006966, 0xCFC00038, 0xC0006968,
|
||||
0xCFC00078, 0xC000696A, 0xCFC00078, 0xC3C00000, 0xC2800020, 0xC3000000, 0x7F018000, 0x6FF88000,
|
||||
0x6FD44000, 0x4395C000, 0x5BB89800, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFC8, 0x00000000,
|
||||
0xC3C00000, 0xC2800010, 0x6FF86000, 0x47BDC000, 0x5BB89F00, 0xC3400000, 0x58380004, 0xCB420078,
|
||||
0x00000000, 0x58380008, 0xCF400078, 0x5BFC0002, 0xB7E8FFB0, 0x00000000, 0xC3C00000, 0xC2800020,
|
||||
0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87400,
|
||||
0x58380008, 0xCF408418, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFB0, 0x00000000, 0x00000000,
|
||||
0xC3E0E282, 0x5BFC0030, 0xC0004002, 0xCFC000F8, 0xC000E82C, 0xC11E0002, 0xCD01EF00, 0xC000E82E,
|
||||
0xCD01EF00, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x80000028, 0x00000000, 0x80001CB8,
|
||||
0x00000000, 0x8000FFE0, 0xC0006918, 0xD28000F8, 0xC2000000, 0xDF600038, 0x5E600020, 0x84000272,
|
||||
0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000402A, 0xCA0000F8, 0xC0006912,
|
||||
0xCA4000F8, 0xC0006924, 0xCA8000F8, 0xC0006966, 0xCAC000F8, 0x00000000, 0xC121FFFE, 0x5911FE94,
|
||||
0x14100000, 0x76250000, 0x76290000, 0x762D0000, 0x840001CA, 0xC0006918, 0xCA4000F8, 0xC28001FE,
|
||||
0x76290000, 0x5A640002, 0x6A254010, 0x5EE80000, 0x8400001A, 0x6AA54000, 0x80000010, 0xC62800F8,
|
||||
0x62818008, 0xC0006918, 0xCF0000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC0006966,
|
||||
0xCA4000F8, 0xC2000002, 0x6A310000, 0x7E010000, 0x76612000, 0xCE4000F8, 0x00000000, 0xC121FFFE,
|
||||
0x5911FE94, 0x14100000, 0x6F346000, 0x4771A000, 0x5B749F00, 0xC2800000, 0x58340006, 0xCA800078,
|
||||
0xC2C00000, 0x58340000, 0xCAC000D8, 0xC2400000, 0x5834000A, 0xCA420078, 0x6EA82000, 0x42E9E000,
|
||||
0x6F2CA000, 0x42E56000, 0x5AEC3200, 0xC3990040, 0xC7381C18, 0xC6F80060, 0x99005560, 0xDB9800F8,
|
||||
0xDBD800F9, 0x00000000, 0xDEA000F8, 0x46310000, 0x8400FD80, 0xC0006958, 0xC84000F8, 0x00000000,
|
||||
0xC3C00002, 0x787C2000, 0xCC4000F8, 0xC000ABC8, 0xCB8400F8, 0xC000ABC4, 0xC88400F8, 0x5FB80000,
|
||||
0x8400FCFA, 0xC000FAC0, 0xCA0400F8, 0x00000000, 0x00000000, 0xA6040070, 0xC000ABE4, 0xC80400F8,
|
||||
0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0x98C05CD8,
|
||||
0xC000697C, 0xCA0000F8, 0x59640004, 0xC0004030, 0xCA0000F8, 0xC2400002, 0x6A452000, 0x76250000,
|
||||
0x8400FC3A, 0xC000ABE8, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCA0000F8, 0xC42400F8,
|
||||
0x00000000, 0xA63C17DA, 0x00000000, 0xC000ABE4, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000,
|
||||
0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0xC0006934, 0xCE0000F8, 0xC2800002, 0xC4681C08,
|
||||
0xC62821D0, 0xC2600010, 0x5A650D80, 0xC0004020, 0xCB4000F8, 0xC2200400, 0x5A200D40, 0xC7601040,
|
||||
0xC000F220, 0xCE8000F8, 0xC000F200, 0xCE4000F8, 0xC000F202, 0xCE0000F8, 0xC000F240, 0xCB4000F8,
|
||||
0x00000000, 0x00000000, 0xA754FFE0, 0xC2000000, 0xC7600040, 0xA7520042, 0x00000000, 0x00000000,
|
||||
0x99005FD8, 0xC0009DE2, 0xC94000F8, 0xC1800002, 0x80001680, 0x58204DC0, 0xC2000000, 0xCA000018,
|
||||
0xC2400000, 0xCA414000, 0xC2800000, 0xCA812000, 0xC2C00000, 0xCAC20018, 0xC0006938, 0xCE0000F8,
|
||||
0xC0006920, 0xCE4000F8, 0xC0006916, 0xCE8000F8, 0xC0006922, 0xCEC000F8, 0xA6400540, 0x00000000,
|
||||
0xC0006938, 0xCBC000F8, 0x00000000, 0xC3800000, 0x6FF48000, 0x6FD44000, 0x4355A000, 0x5B749800,
|
||||
0x58340000, 0xCB802010, 0x00000000, 0xC2000000, 0x6FB46000, 0x4779A000, 0x5B749F00, 0x5834000C,
|
||||
0xCA000020, 0xC000691A, 0xCF8000F8, 0x5E200000, 0x8400046A, 0xC2000000, 0xDF610048, 0x5E6001E8,
|
||||
0x8800FFE8, 0xC2000002, 0xC2400466, 0xC2A00000, 0x5AA80000, 0xC000F006, 0xCE0000F8, 0xC000F008,
|
||||
0xCE4000F8, 0xC000F00A, 0xCE8000F8, 0x99004FA0, 0xC1A0FFFE, 0xC000E824, 0xC9840070, 0xC0006934,
|
||||
0xCA4000F8, 0xC2000000, 0xC2800002, 0x99004FE0, 0xDA9800F8, 0xC61400F8, 0xC65800F8, 0xC161FFFE,
|
||||
0x5955FFFE, 0x14140000, 0x00000000, 0x990050C8, 0xC000691A, 0xC94000F8, 0x00000000, 0x00000000,
|
||||
0xC121FFFE, 0x5911FE94, 0x14100000, 0xC0006922, 0xCA001118, 0xC3C00000, 0xC3800000, 0xC0006930,
|
||||
0xCE023118, 0xC0006932, 0xCBC000D8, 0xC2800000, 0xC000691E, 0xCFC000F8, 0xC000ABDE, 0xCA800060,
|
||||
0xC3A0001A, 0x5BB94000, 0xC6B80060, 0xC000691C, 0xCF8000F8, 0x99005338, 0xC000691C, 0xC1400000,
|
||||
0xC9420048, 0x00000000, 0x00000000, 0x00000000, 0xA8E2FFE8, 0xC2000000, 0xC1220002, 0xD90C00F8,
|
||||
0xDF600038, 0x5E600020, 0x8400FFF2, 0xC000691C, 0xCA0000F8, 0xC000691E, 0xCA4000F8, 0x00000000,
|
||||
0x00000000, 0x99005560, 0xDA1800F8, 0xDA5800F9, 0x00000000, 0xC2000000, 0xDF610048, 0x5E6001FE,
|
||||
0x8800FFE8, 0xC0006916, 0xCA8000F8, 0xC2C00000, 0xDFEC0048, 0xC2400000, 0x466D2000, 0x8400004A,
|
||||
0x5EA80000, 0x8400003A, 0xC2600002, 0x99005FD8, 0xC0009DEE, 0xC94000F8, 0xC1800002, 0x80000030,
|
||||
0xC2600000, 0x99005FD8, 0xC0009DEC, 0xC94000F8, 0xC1800002, 0xC2000068, 0xC6240078, 0xC0006930,
|
||||
0xCE400080, 0xC000691A, 0xC98000F8, 0xC000ABDE, 0xC94000F8, 0x6D9C6000, 0x45D8E000, 0x59DC9F00,
|
||||
0x990053C0, 0xD95800F8, 0xD99800F9, 0xD9D400F8, 0x99005338, 0xC000691C, 0xC1400000, 0xC9420048,
|
||||
0xC2000000, 0xDF600038, 0x5E600020, 0x8400FFEA, 0x00000000, 0xC000691C, 0xCA0000F8, 0xC000691E,
|
||||
0xCA4000F8, 0x00000000, 0x00000000, 0x99005560, 0xDA1800F8, 0xDA5800F9, 0x00000000, 0x800010E8,
|
||||
0x00000000, 0x99005FD8, 0xC0009DEA, 0xC94000F8, 0xC1800002, 0x800010B8, 0xC0006938, 0xCBC000F8,
|
||||
0x00000000, 0x00000000, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB89800, 0x58380008, 0xCA0000F8,
|
||||
0x00000000, 0x00000000, 0xA6000382, 0x00000000, 0xC0006938, 0xCBC000F8, 0xC3000000, 0x00000000,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB89800, 0x58380000, 0xCB002010, 0xC2000000, 0x58380008,
|
||||
0xCA020078, 0x5838000C, 0xCAC000F8, 0x5838000E, 0xCA4000F8, 0xC000691A, 0xCF0000F8, 0xC0006930,
|
||||
0xCEC000F8, 0xC000693C, 0xCE0000F8, 0xC0006932, 0xCE4000F8, 0x5E200000, 0x84000120, 0xC2800000,
|
||||
0xA6FE00BA, 0x6F206000, 0x46310000, 0x5A209F00, 0x5820000C, 0xCA800020, 0x00000000, 0x00000000,
|
||||
0x5EA80000, 0x840001F2, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x990050C8,
|
||||
0xC000691A, 0xC94000F8, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0xC0006930,
|
||||
0xCAC000F8, 0xC0006932, 0xCA4000F8, 0xC7EC1118, 0xC0006930, 0xCEC000F8, 0x5838000C, 0xCEC000F8,
|
||||
0x58000002, 0xCE4000F8, 0xC0006934, 0xCA0000F8, 0xC2400002, 0x6E642000, 0x6E642000, 0x76612000,
|
||||
0x8400002A, 0xC2400002, 0x6E684000, 0x58380008, 0xCE804200, 0xA6000020, 0x6E682000, 0x58380008,
|
||||
0xCE802100, 0xC2400002, 0x6E642000, 0x76612000, 0x840000EA, 0x58380008, 0xCA0000F8, 0xC2800000,
|
||||
0xC2400000, 0xA60200C0, 0xDBA800F8, 0x6F386000, 0x47B1C000, 0x5BB89F00, 0x58380004, 0xCA400078,
|
||||
0x58380002, 0xCA800078, 0x00000000, 0xDEB800F8, 0x46A54000, 0x88000060, 0x00000000, 0xC0009DE4,
|
||||
0xCA0000F8, 0xC2400002, 0x6E640000, 0x5A200002, 0xCE0000F8, 0x58380008, 0xCE400000, 0x80000018,
|
||||
0x00000000, 0x80000048, 0xC0006934, 0xCA0000F8, 0x00000000, 0x00000000, 0xA6020C6A, 0x00000000,
|
||||
0x00000000, 0x80000C98, 0xC2800000, 0xC2000080, 0xC240001A, 0xDF690048, 0x46294000, 0x46A54000,
|
||||
0x8800FFD2, 0xC2000006, 0xC2600982, 0x5A643B6E, 0x5838000A, 0xCA8000F8, 0xC000F006, 0xCE0000F8,
|
||||
0xC000F008, 0xCE4000F8, 0xC000F00A, 0xCE8000F8, 0x99004FA0, 0xC1A0FFFE, 0xC000E824, 0xC9840070,
|
||||
0xC2000000, 0xC0006930, 0xCA02E008, 0x58380026, 0xCA4000F8, 0x00000000, 0xC2800000, 0x99004FE0,
|
||||
0xDA9800F8, 0xC61400F8, 0xC65800F8, 0xC0006934, 0xCA0000F8, 0x00000000, 0x00000000, 0xA6020022,
|
||||
0x00000000, 0x00000000, 0x80000318, 0xC0006938, 0xCBC000F8, 0xC000ABE4, 0xC80400F8, 0x6C908000,
|
||||
0x45088000, 0x45088000, 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0x58240018, 0xCA0000F8,
|
||||
0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB89800, 0xC3000000, 0xC3400002, 0xC2C00000, 0xC62C0078,
|
||||
0xC6270038, 0xC0006940, 0xCE400038, 0xC6260038, 0xC0006942, 0xCE400038, 0xC000693C, 0xCA0000F8,
|
||||
0x5EEC0000, 0x8400018A, 0x5A6C0010, 0x46254000, 0x88000190, 0x5A600052, 0x46E54000, 0x88000178,
|
||||
0x58380006, 0xCA8000F8, 0xC0006940, 0xCA0000F8, 0xC2400000, 0xC6A70038, 0x7E412000, 0x76612000,
|
||||
0xC2000000, 0xC6A10038, 0x46250000, 0x84000138, 0xC0006942, 0xCA0000F8, 0xC2400000, 0xC6A60038,
|
||||
0x7E412000, 0x76612000, 0xC2000000, 0xC6A00038, 0x58380002, 0xCA8000F8, 0x46250000, 0x840000E8,
|
||||
0xC2400000, 0xC6A60078, 0x466D0000, 0x880000DA, 0xC2400000, 0xC6A40078, 0x58380008, 0xCA8000F8,
|
||||
0x46E50000, 0x880000BA, 0x00000000, 0xA6820018, 0x00000000, 0xC7700B00, 0xA6840098, 0x00000000,
|
||||
0xC7700A00, 0x80000080, 0xC7700200, 0xC000693C, 0xCAC000F8, 0x80000060, 0xC7700300, 0xC000693C,
|
||||
0xCAC000F8, 0x80000040, 0xC7700900, 0x80000030, 0xC7700800, 0x80000020, 0xC7700700, 0x80000010,
|
||||
0xC7700500, 0xC0006944, 0xCF0000F8, 0xC000693E, 0xCEC000F8, 0xC0006938, 0xCA4000F8, 0xC000693C,
|
||||
0xCB8000F8, 0xC000693E, 0xCB4000F8, 0xC3000000, 0x6E608000, 0x6E544000, 0x42150000, 0x5A209800,
|
||||
0x5AA00008, 0x58200004, 0xCB000078, 0xC0006934, 0xCA0000F8, 0xC2400000, 0xC0006930, 0xCA42E008,
|
||||
0xC3C00018, 0xA6020098, 0x00000000, 0x43656000, 0x47AD0000, 0x88000050, 0x46F96000, 0x6EE04010,
|
||||
0x5BE00004, 0xC2000000, 0xC6E00008, 0x5E200000, 0x84000042, 0x5BFC0002, 0x80000030, 0xC3C00004,
|
||||
0x5A2C0008, 0x47A10000, 0x88000012, 0x5FB80008, 0x6FE04000, 0x42390000, 0x47212000, 0x88000068,
|
||||
0xC2400000, 0xC0006930, 0xCA42E008, 0xC2060002, 0xC68000F8, 0xCE006300, 0x6FE04000, 0x4721C000,
|
||||
0x5F700010, 0x4765A000, 0xC2000000, 0xC6340008, 0xC25A000A, 0xC000691A, 0xCA401C18, 0xC2800000,
|
||||
0xC0006932, 0xCA8000D8, 0xC000ABDE, 0xCA400060, 0x6FA04010, 0x42290000, 0xC000691E, 0xCE0000F8,
|
||||
0xC7E41048, 0xC000691C, 0xCE4000F8, 0x6FE04000, 0x43A1C000, 0xC000693C, 0xCF8000F8, 0xC000693E,
|
||||
0xCF4000F8, 0xC000693A, 0xCFC000F8, 0x80000008, 0x00000000, 0x00000000, 0x00000000, 0xC2000000,
|
||||
0xDCE000F8, 0xA622FFD8, 0xC1220002, 0xD90C00F8, 0xC0006938, 0xCBC000F8, 0xC0006944, 0xCB4000F8,
|
||||
0xC000ABDE, 0xCB0000F8, 0xC0006934, 0xCA0000F8, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB89800,
|
||||
0xA6020268, 0xC2400000, 0x58380008, 0xCA406000, 0xDFE800F8, 0xC2218E08, 0x5A21BAF6, 0x46A14000,
|
||||
0x84000022, 0xC2080002, 0x7361A000, 0x80000058, 0x5E640000, 0x84000022, 0xC20C0002, 0x7361A000,
|
||||
0x80000030, 0xC2000000, 0xC760E710, 0xC7604218, 0x5E200000, 0x84000272, 0xC2200002, 0xC0006930,
|
||||
0xCE021000, 0x99005FD8, 0xC0009DE8, 0xC94000F8, 0xC1800002, 0x58380000, 0xCA0000F8, 0x00000000,
|
||||
0x00000000, 0xA6000132, 0xC0006940, 0xCA8000F8, 0xC0006942, 0xCA4000F8, 0xC7600078, 0xC6A01838,
|
||||
0xC6601038, 0xC000693A, 0xCA4000F8, 0xC0006934, 0xCA8000F8, 0xC000AB40, 0x40300000, 0x40240000,
|
||||
0x5C000004, 0x5EC0ABC0, 0x88000012, 0x5C000080, 0xCE0000F8, 0x58000002, 0x5EC0ABC0, 0x88000012,
|
||||
0x5C000080, 0xCE8000F8, 0xC000693E, 0xCA0000F8, 0xC2400000, 0x5838000C, 0xCE4000F8, 0x99005FD8,
|
||||
0xC0009DF0, 0xC94000F8, 0xC61800F8, 0xC0006930, 0xC6100078, 0xCD000078, 0x800000A8, 0xC2400002,
|
||||
0x58380008, 0xCE400000, 0xC0006944, 0xCF4000F8, 0x80000278, 0xC000693C, 0xCA4000F8, 0xDFE800F8,
|
||||
0x5A300018, 0xC000AB40, 0x40200000, 0xCA0000F8, 0x58380008, 0xC6501078, 0xCD021078, 0x5838000A,
|
||||
0xCE8000F8, 0x58380026, 0xCE0000F8, 0xC0006944, 0xCF4000F8, 0x99005338, 0xC000691C, 0xC1400000,
|
||||
0xC9420048, 0x80000038, 0x00000000, 0x99005FD8, 0xC0009DE6, 0xC94000F8, 0xC1800002, 0x8000FDD8,
|
||||
0xC2000000, 0xC2400020, 0xDF600038, 0xB624FFEA, 0xC000691C, 0xCA4000F8, 0xC000691E, 0xCA8000F8,
|
||||
0x99005560, 0xDA5800F8, 0xDA9800F9, 0x00000000, 0xC0006934, 0xCA0000F8, 0x00000000, 0xC2800000,
|
||||
0xA6020160, 0xC2400004, 0xC2000080, 0xDF690048, 0x46294000, 0x46A54000, 0x8800FFDA, 0x00000000,
|
||||
0xC000691A, 0xC98000F8, 0xC000ABDE, 0xC94000F8, 0x6D9C6000, 0x45D8E000, 0x59DC9F00, 0x990053C0,
|
||||
0xD95800F8, 0xD99800F9, 0xD9D400F8, 0x99005338, 0xC000691C, 0xC1400000, 0xC9420048, 0xC2000000,
|
||||
0xC2400020, 0xDF600038, 0xB624FFEA, 0xC000691C, 0xCA4000F8, 0xC000691E, 0xCA8000F8, 0x99005560,
|
||||
0xDA5800F8, 0xDA9800F9, 0x00000000, 0x58380008, 0xCA4000F8, 0xC2000000, 0xCE000018, 0xC2A1FFFE,
|
||||
0x5AA9FFFE, 0xCE021078, 0x5838000A, 0xCE8000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000,
|
||||
0xC000E838, 0xC2500002, 0xCE450800, 0xC000ABC8, 0xCB8400F8, 0xC2000000, 0xC000E82C, 0xCA040038,
|
||||
0x5FB80002, 0xC000ABC8, 0xCF8400F8, 0x58880002, 0xB6080018, 0x00000000, 0xC0800000, 0xC000ABC4,
|
||||
0xCC8400F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x8000E350, 0xC2000000, 0xDF600038,
|
||||
0x5E200020, 0x8400026A, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000402C,
|
||||
0xCA0000F8, 0xC0006910, 0xCA4000F8, 0xC000692C, 0xCA8000F8, 0xC0006968, 0xCAC000F8, 0x00000000,
|
||||
0xC121FFFE, 0x5911FE94, 0x14100000, 0x76250000, 0x76290000, 0x76E16000, 0x840001C2, 0xC0006926,
|
||||
0xCA4000F8, 0xC201FFFE, 0x76E16000, 0x5A640002, 0x6AE50010, 0x5F200000, 0x8400001A, 0x6A250000,
|
||||
0x80000010, 0xC6E000F8, 0x62014008, 0xC0006926, 0xCE8000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000,
|
||||
0x00000000, 0xC0006968, 0xCA4000F8, 0xC2000002, 0x6A290000, 0x7E010000, 0x76612000, 0xCE4000F8,
|
||||
0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x6EB4A000, 0x6E944000, 0x4755A000, 0x4769A000,
|
||||
0x5B747400, 0x58340002, 0xC2000000, 0xCA0000D8, 0x5834002E, 0xC2400000, 0xCA400078, 0x6EB0A000,
|
||||
0x6EBC4000, 0x473D8000, 0x47298000, 0x5B30342E, 0x5B300004, 0x6E642000, 0x4225E000, 0xC39A8024,
|
||||
0xC7380060, 0xC6B81C18, 0x99005560, 0xDB9800F8, 0xDBD800F9, 0x00000000, 0xC2000000, 0xDF600038,
|
||||
0x5E200020, 0x840002A2, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000690E,
|
||||
0xCA0000F8, 0xC000692A, 0xCA4000F8, 0xC000696A, 0xCB0000F8, 0xC0006956, 0xCAC000F8, 0x00000000,
|
||||
0xC121FFFE, 0x5911FE94, 0x14100000, 0x77218000, 0x77258000, 0x84000202, 0xC201FFFE, 0x77218000,
|
||||
0x5AEC0002, 0x6B2D0010, 0x5EA00000, 0x8400001A, 0x6A2D0000, 0x80000010, 0xC72000F8, 0x62016008,
|
||||
0xC0006956, 0xCEC000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000696A, 0xCA4000F8,
|
||||
0xC2000002, 0x6A2D0000, 0x7E010000, 0x76612000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE94,
|
||||
0x14100000, 0x6EF4A000, 0x6ED44000, 0x4755A000, 0x476DA000, 0x5B747400, 0x5834000E, 0xC2000000,
|
||||
0xCA0000D8, 0x58340008, 0xC2400000, 0xCA420078, 0x5834000C, 0xC2800000, 0xCA832010, 0x6E644010,
|
||||
0x42250000, 0x4229E000, 0xC39A8008, 0x58340008, 0xCB809018, 0x58340008, 0xC2800000, 0xCA810010,
|
||||
0x6EE0A000, 0x6EE44000, 0x46250000, 0x462D0000, 0x5A200008, 0x5A203408, 0x42290000, 0xC6380060,
|
||||
0xC6F81C18, 0x99005560, 0xDB9800F8, 0xDBD800F9, 0x00000000, 0xC000695A, 0xC84000F8, 0x00000000,
|
||||
0xC3C00002, 0x787C2000, 0xCC4000F8, 0xC0004030, 0xCA0000F8, 0xC2400008, 0x6A452000, 0x76250000,
|
||||
0x84000E02, 0xC000EA28, 0xC3800000, 0xCB840038, 0xC000EA14, 0xC3400000, 0xCB440038, 0xC0009F70,
|
||||
0xCB0400F8, 0xB7B4005A, 0x5804F802, 0xCAC000F8, 0xA7000060, 0x00000000, 0x00000000, 0xA6C8DD30,
|
||||
0xC2800000, 0xC6E80018, 0x80000070, 0x00000000, 0x00000000, 0x00000000, 0x8000DCF8, 0x00000000,
|
||||
0xC2800000, 0xC7282018, 0xC000690E, 0xCA4000F8, 0x6BE9E000, 0x00000000, 0x767D2000, 0x8400DCB0,
|
||||
0x6EA0A000, 0x6E944000, 0x46150000, 0x46290000, 0x5A207400, 0x5820000C, 0xCA0000F8, 0xC0006946,
|
||||
0xCE8000F8, 0xA6220368, 0x00000000, 0xC2200060, 0xC0006948, 0xCE000008, 0xCE021038, 0xC240000A,
|
||||
0xC000694A, 0xCE4000F8, 0xC2B60002, 0xC0006964, 0xCE837B00, 0x99005830, 0xC0009F74, 0xC88400F8,
|
||||
0x00000000, 0xC0006946, 0xCBC000F8, 0x00000000, 0x00000000, 0x6FF8A000, 0x6FD44000, 0x4795C000,
|
||||
0x47BDC000, 0x5BB87400, 0x990055F0, 0xDBD800F8, 0xDB9800F9, 0x00000000, 0x99005338, 0xC000691C,
|
||||
0xC1400000, 0xC9420048, 0xC000691C, 0x990057E8, 0xC94000F9, 0xC98000F8, 0x00000000, 0x99005560,
|
||||
0xD95800F8, 0xD99800F9, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0x99005228,
|
||||
0xDBD800F8, 0xDB9800F9, 0xC7D800F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x6FF8A000,
|
||||
0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87400, 0x58380010, 0xCA0000F8, 0xC000ABE0, 0xC80400F8,
|
||||
0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCA4000F8, 0xC43400F8, 0x00000000, 0xC74000F8,
|
||||
0xCE0000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000690E, 0xCA4000F8, 0xC2800002,
|
||||
0x6ABD4000, 0x72692000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x99005FD8,
|
||||
0xC0009DF6, 0xC94000F8, 0xC1800002, 0x00000000, 0x00000000, 0x00000000, 0xA8E2FFE8, 0x00000000,
|
||||
0xC1220002, 0xD90C00F8, 0xC2000000, 0xC000EA14, 0xCA040038, 0xC000EA28, 0xC2500002, 0xCE450800,
|
||||
0x58880002, 0xB6080018, 0xC0009F74, 0xC0800000, 0xCC8400F8, 0x8000D900, 0xC0006946, 0xCBC000F8,
|
||||
0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000690E, 0xCA4000F8, 0xC2800002, 0x6ABD4000,
|
||||
0x72692000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x6FF8A000, 0x6FD44000,
|
||||
0x4795C000, 0x47BDC000, 0x5BB87400, 0x58380008, 0xCA0000F8, 0x5838000C, 0xCA4000F8, 0xC3400000,
|
||||
0xC6340000, 0xC000694E, 0xCF4000F8, 0xC2800000, 0xC62A0078, 0xC3000000, 0xC6308018, 0x6F304000,
|
||||
0x43298000, 0xC000693C, 0xCF0000F8, 0xC2C00000, 0xC66C0078, 0xC0006950, 0xCEC000F8, 0xC2800000,
|
||||
0xC66AE020, 0xC0006954, 0xCE8000F8, 0x5F740000, 0x840001A0, 0x5E300028, 0x46E12000, 0x8400016A,
|
||||
0x46E12000, 0x88000132, 0x5E300018, 0x46E12000, 0x8800002A, 0x46E12000, 0x84000042, 0x00000000,
|
||||
0x800000C0, 0x00000000, 0x99005970, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0xC3400002, 0xC000694E,
|
||||
0xCF4000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000690E, 0xCA4000F8, 0xC2800002,
|
||||
0x6ABD4000, 0x7E814000, 0x76692000, 0xCE4000F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000,
|
||||
0xC2200060, 0xC0006948, 0xCE021038, 0xC2000000, 0xC000694C, 0xCE0000F8, 0x80000080, 0x00000000,
|
||||
0x99005970, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0x99005B70, 0xDBD800F8, 0xDB9800F9, 0xC78000F8,
|
||||
0xC2200058, 0xC0006948, 0xCE021038, 0xC2000002, 0xC000694C, 0xCE0000F8, 0xC2000006, 0xC000F006,
|
||||
0xCE0000F8, 0x5838000A, 0xCA4000F8, 0xC2200982, 0x5A203B6E, 0xC000F008, 0xCE0000F8, 0xC000F00A,
|
||||
0xCE4000F8, 0xC0006954, 0xCA8000F8, 0xC200000C, 0xC000694A, 0xCE0000F8, 0xC0006948, 0xCE800008,
|
||||
0xC2B60000, 0xC0006964, 0xCE8000F8, 0x99005830, 0xC0009F74, 0xC88400F8, 0x00000000, 0xC0006946,
|
||||
0xCBC000F8, 0xC000694C, 0xCA0000F8, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87400,
|
||||
0x5E200000, 0x840000FA, 0x00000000, 0x990055F0, 0xDBD800F8, 0xDB9800F9, 0x00000000, 0x99005338,
|
||||
0xC000691C, 0xC1400000, 0xC9420048, 0xC000691C, 0x990057E8, 0xC94000F9, 0xC98000F8, 0x00000000,
|
||||
0x99005560, 0xD95800F8, 0xD99800F9, 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000,
|
||||
0x99005228, 0xDBD800F8, 0xDB9800F9, 0xC7D800F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000,
|
||||
0xC000693C, 0xCA8000F8, 0xC000694E, 0xCAC000F8, 0xC3000018, 0xC3400006, 0x5E200000, 0x8400002A,
|
||||
0xC2800000, 0xC2C00000, 0xC300001E, 0xC3400000, 0xC6AC1078, 0xC72C0418, 0xC76C0810, 0x58380010,
|
||||
0xCA8000F8, 0x58380008, 0xCEC000F8, 0xC6280100, 0xC000ABE0, 0xC80400F8, 0x6C908000, 0x45088000,
|
||||
0x45088000, 0x40100000, 0xCB0000F8, 0xC43400F8, 0x00000000, 0xC74000F8, 0xCE8000F8, 0xC0006952,
|
||||
0xCE8000F8, 0x00000000, 0x00000000, 0x00000000, 0xA8E2FFE8, 0x00000000, 0xC000694C, 0xCA0000F8,
|
||||
0xC0006950, 0xCAC000F8, 0x5E200000, 0x8400006A, 0xDFE800F8, 0x7E814000, 0x5834001A, 0xCE8000F8,
|
||||
0x99005FD8, 0xC0009DF4, 0xC94000F8, 0xC1800002, 0x99005FD8, 0xC0009DF8, 0xC94000F8, 0xC6D800F8,
|
||||
0xC1220002, 0xD90C00F8, 0x5E200000, 0x84000040, 0x5838002C, 0xCB0000F8, 0xDFE800F8, 0x00000000,
|
||||
0x58380014, 0xCF0000F8, 0x80000018, 0xC2A1FFFE, 0x5AA9FFFE, 0x5838000A, 0xCE8000F8, 0xC3000000,
|
||||
0xC000EA14, 0xCB040038, 0xC2D00002, 0xC000EA28, 0xCEC50800, 0xC000694E, 0xCA8000F8, 0x58880002,
|
||||
0xB4B00018, 0xC0009F74, 0xC0800000, 0xCC8400F8, 0x5EA80000, 0x84000152, 0x5E200000, 0x84000140,
|
||||
0xC000693C, 0xCA8000F8, 0x00000000, 0x00000000, 0x5AA80060, 0xCE8000F8, 0x99005970, 0xDBD800F8,
|
||||
0xDB9800F9, 0xC78000F8, 0x99005B70, 0xDBD800F8, 0xDB9800F9, 0xC78000F8, 0xC0006952, 0xCAC000F8,
|
||||
0x58380000, 0xCA8000F8, 0xC30C0002, 0xC7F00018, 0xA6800098, 0x00000000, 0x00000000, 0xC161FFFE,
|
||||
0x5955FFFE, 0x14140000, 0x00000000, 0xC000F800, 0xCA0000F8, 0x00000000, 0x00000000, 0xA60CFFEA,
|
||||
0xC6F00500, 0xC6B0C400, 0xCF0000F8, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x8000CFB0,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000CF48, 0xDCBC00F9, 0x5FFC0000, 0x84000052,
|
||||
0xC3800002, 0xDB8800F9, 0x5FFC0004, 0x8400C86A, 0xC3800000, 0xDB8800F9, 0xC3CE0002, 0xC000E800,
|
||||
0xCFC0E700, 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xC000ABE8, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCBC000F8, 0xC43800F8, 0x00000000,
|
||||
0xC000402E, 0xCA0000F8, 0xC000ABD8, 0xCB4400F8, 0x00000000, 0x00000000, 0x47610000, 0x880000B0,
|
||||
0x00000000, 0xA7C00048, 0xC000ABD4, 0xC1000002, 0xCD0400F8, 0xC11C0000, 0xC000E82C, 0xCD05CE00,
|
||||
0x800000D8, 0x00000000, 0xA7D20120, 0x00000000, 0xC7E14040, 0xC2400000, 0xC6246028, 0xC200006A,
|
||||
0x46250000, 0xC6240030, 0xC000E810, 0xCE440030, 0x8000FF70, 0xC2000000, 0xC000E808, 0xCA040010,
|
||||
0xC11C0000, 0xC000E82C, 0xCD05CE00, 0x5A200002, 0x5E600010, 0x84000010, 0xC2000000, 0xC000E808,
|
||||
0xCE040010, 0xC3400000, 0x80000010, 0x5B740002, 0xC000ABD8, 0xCF4400F8, 0x99004F78, 0xC000ABC8,
|
||||
0xC94400F8, 0xC1800000, 0xC11C0002, 0xC000E82C, 0xCD05CE00, 0x80000600, 0x5B740002, 0xC000ABD8,
|
||||
0xCF4400F8, 0xC78000F8, 0xC13C0002, 0xCD03DE00, 0xC000ABC8, 0xC94400F8, 0xC1800000, 0xC000E82C,
|
||||
0xC9840038, 0x59540002, 0xC000ABC8, 0xCD4400F8, 0x58880002, 0xB4980580, 0x00000000, 0xC0800000,
|
||||
0x80000568, 0xC000ABE8, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCBC000F8, 0xC42800F8,
|
||||
0x00000000, 0xA7C00130, 0xC000ABCC, 0xCA0400F8, 0xC2400000, 0xC000FAEC, 0xCA440018, 0x5A200002,
|
||||
0xC000ABCC, 0xCE0400F8, 0xB624008A, 0xC68000F8, 0xC13C0002, 0xCD03DE00, 0xC000ABC8, 0xC94400F8,
|
||||
0xC1800000, 0xC000E82C, 0xC9840038, 0x59540002, 0xC000ABC8, 0xCD4400F8, 0x58880002, 0xB4980470,
|
||||
0x00000000, 0xC0800000, 0x80000458, 0xC000ABD4, 0xC1000004, 0xCD0400F8, 0xC000E820, 0xC2000002,
|
||||
0xCE0400F8, 0xC2000000, 0xC000ABCC, 0xCE0400F8, 0xC000ABD8, 0xCE0400F8, 0x8000FF28, 0xC000ABD4,
|
||||
0xC1000000, 0xCD0400F8, 0xC11C0000, 0xC000E82C, 0xCD05CE00, 0x99004F78, 0xC000ABC8, 0xC94400F8,
|
||||
0xC1800000, 0xC1200000, 0xC000E818, 0xCD061000, 0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC2000000,
|
||||
0xC000ABCC, 0xCE0400F8, 0x80000358, 0xC000FAC0, 0xCB8400F8, 0xC000ABE8, 0xC80400F8, 0x00000000,
|
||||
0x00000000, 0x40080000, 0xCBC000F8, 0xC42800F8, 0x00000000, 0x00000000, 0xC68000F8, 0xC13C0000,
|
||||
0xCD03DE00, 0xA780024A, 0x00000000, 0x00000000, 0xA7C0020A, 0x00000000, 0xC000FB60, 0xC2060006,
|
||||
0xCE046308, 0xA7E801C2, 0x00000000, 0xC000ABD0, 0xCA0400F8, 0xC2400000, 0xC000FAEC, 0xCA448018,
|
||||
0x5A200002, 0xC000ABD0, 0xCE0400F8, 0xB62400AA, 0x00000000, 0xC68000F8, 0xC13C0002, 0xCD03DE00,
|
||||
0xC000FACC, 0xC2000002, 0xCE040000, 0xC000ABC8, 0xC94400F8, 0xC1800000, 0xC000E82C, 0xC9840038,
|
||||
0x59540002, 0xC000ABC8, 0xCD4400F8, 0x58880002, 0xB49801C8, 0x00000000, 0xC0800000, 0x800001B0,
|
||||
0xC000ABD4, 0xC1000000, 0xCD0400F8, 0xC11C0000, 0xC000E82C, 0xCD05CE00, 0x99004F78, 0xC000ABC8,
|
||||
0xC94400F8, 0xC1800000, 0xC2000000, 0xC000E820, 0xCE0400F8, 0xC1200000, 0xC000E818, 0xCD061000,
|
||||
0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC000ABD0, 0xCE0400F8, 0xC2000002, 0xC000FACC, 0xCE040008,
|
||||
0x800000E8, 0xC2000002, 0xC000ABD0, 0xCE0400F8, 0x8000FE88, 0xC2000000, 0xC000ABD0, 0xCE0400F8,
|
||||
0xA7E60032, 0x00000000, 0xC2000002, 0xC000FB60, 0xCE040000, 0x8000FE70, 0x00000000, 0xA7860052,
|
||||
0x00000000, 0xC68000F8, 0xC13C0002, 0xCD03DE00, 0xC2020002, 0xC7E2A540, 0xC000FB60, 0xCE0400F8,
|
||||
0x8000FE18, 0xC2040002, 0xC000FB60, 0xCE044200, 0x8000FDF8, 0xC2C80002, 0x6AC56000, 0xDACC00F8,
|
||||
0xC000ABD4, 0xCB4400F8, 0xC000ABC8, 0xCB8400F8, 0xC000E838, 0xC3C00000, 0xCBC40038, 0x5EF40004,
|
||||
0x84000022, 0xC3000000, 0xC000FACC, 0xCF042100, 0x47F98000, 0x8400002A, 0x47F98000, 0x88000030,
|
||||
0xC1006E8C, 0x8000BCB8, 0xC000ABC0, 0xCC8400F8, 0x8000F6C8, 0xC000FAC0, 0xCAC400F8, 0xC000ABD4,
|
||||
0xCB4400F8, 0xA6C0FBD2, 0x00000000, 0x5EF40000, 0x8400F722, 0x5EF40002, 0x8400F99A, 0x5EF40004,
|
||||
0x8400FB9A, 0xC1006CE8, 0x8000BC30, 0x00000000, 0xC0800000, 0xDF4B0038, 0xC0006900, 0xCB8000F8,
|
||||
0xC2000000, 0xC000690A, 0xA78000D0, 0xCBC000F8, 0xC1000000, 0xD90000F9, 0xC1000002, 0xD90C00F8,
|
||||
0x6FF46000, 0x477DA000, 0x5B749F00, 0xC2400000, 0x58340004, 0xCA400078, 0xC0006900, 0xCE000000,
|
||||
0x5A640002, 0x58340004, 0xC6500078, 0xCD000078, 0xC0006914, 0xCA4000F8, 0xC2000002, 0x6A3D0000,
|
||||
0x72612000, 0xCE4000F8, 0xC000E408, 0xCE0000F8, 0xA78200D8, 0xC0006908, 0xCBC000F8, 0xC1000000,
|
||||
0xD90000F9, 0xC1000002, 0xD90C00F8, 0x6FF4A000, 0x6FD44000, 0x4755A000, 0x477DA000, 0x5B747400,
|
||||
0xC2800000, 0x58340006, 0xCA800078, 0xC2000000, 0xC0006900, 0xCE002100, 0x5EA80002, 0x58340006,
|
||||
0xC6900078, 0xCD000078, 0x5A7C0020, 0xC2000002, 0x6A250000, 0xC000E408, 0xCE0000F8, 0xDCA800F9,
|
||||
0x5EA80000, 0x8400BAA0, 0x00000000, 0xA4800230, 0x00000000, 0xC3C00000, 0xC000F418, 0xCBC00018,
|
||||
0xC3400000, 0xC2400000, 0x6FF86000, 0x47BDC000, 0x5BB89F00, 0x58380008, 0xCB400078, 0x58380006,
|
||||
0xCA400078, 0x5F740002, 0x58380008, 0xC7500078, 0xCD000078, 0xC2000000, 0x58380004, 0xCA020078,
|
||||
0xC3000000, 0x5838000C, 0xCB000020, 0x5A640002, 0x46610000, 0x84000010, 0xC2400000, 0x58380006,
|
||||
0xC6500078, 0xCD000078, 0xC2000000, 0x5838000A, 0xCA020078, 0x5B300002, 0x5838000C, 0xC7100020,
|
||||
0xCD000020, 0xC2420020, 0x5A200004, 0x46252000, 0x84000010, 0xC2000000, 0x5838000A, 0xC6101078,
|
||||
0xCD021078, 0xC0006966, 0xCA4000F8, 0xC2000002, 0x6A3D0000, 0x72612000, 0xCE4000F8, 0x5F740000,
|
||||
0x84000040, 0xC0006912, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8,
|
||||
0x5F300020, 0x84000040, 0xC0006924, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000,
|
||||
0xCE0000F8, 0xA4820070, 0xC2400000, 0xC000F418, 0xCA408018, 0xC2000002, 0xC0006900, 0xCE000000,
|
||||
0xC000690A, 0xCE4000F8, 0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xA4840270,
|
||||
0x00000000, 0xC3C00000, 0xC000F418, 0xCBC10018, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000,
|
||||
0x4795C000, 0x47BDC000, 0x5BB87400, 0x5838002E, 0xCA800078, 0x58380006, 0xCA020078, 0xC3400000,
|
||||
0x5838002E, 0xCB420078, 0x5AA80002, 0x46A10000, 0x84000010, 0xC2800000, 0x5838002E, 0xC6900078,
|
||||
0xCD000078, 0x5F740002, 0x5838002E, 0xC7501078, 0xCD021078, 0xC0006968, 0xCA4000F8, 0xC2000002,
|
||||
0x6A3D0000, 0x72612000, 0xCE4000F8, 0xC000692A, 0xCA8000F8, 0x5E740000, 0x84000040, 0xC0006910,
|
||||
0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x6ABD4010, 0xA68000BA,
|
||||
0x00000000, 0x58380032, 0xCA0000F8, 0x58000002, 0xCA4000F8, 0x5838000C, 0x00000000, 0xCE0000F9,
|
||||
0xCE4000F8, 0xC000692A, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x722D0000, 0xCE0000F8, 0xC000692C,
|
||||
0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x722D0000, 0xCE0000F8, 0x80000040, 0xC000692C, 0xCA0000F8,
|
||||
0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0xA4880120, 0xC2C00000, 0xC000F418,
|
||||
0xCAC20018, 0xC000690E, 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76612000, 0xCE4000F8,
|
||||
0xC000696A, 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0x6EF0A000, 0x6ED44000,
|
||||
0x47158000, 0x472D8000, 0x5B307400, 0x58300000, 0xCA0000F8, 0x00000000, 0xC2400002, 0x76612000,
|
||||
0x8400004A, 0xC24C0002, 0xC6E40018, 0xC624C400, 0x58300010, 0xCA400500, 0x00000000, 0xC000F800,
|
||||
0xCE4000F8, 0xA4860070, 0xC2400000, 0xC000F418, 0xCA418018, 0xC2020002, 0xC0006900, 0xCE002100,
|
||||
0xC0006908, 0xCE4000F8, 0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xC000F414,
|
||||
0xCC8000F8, 0xC10E0002, 0xD90C00F8, 0x8000EDF0, 0xDFBC00F9, 0xC000696E, 0x99005C80, 0xC94000F8,
|
||||
0xC7D800F8, 0x00000000, 0xC57000F8, 0x5EF00020, 0x88000148, 0x6F346000, 0x4771A000, 0x5B749F00,
|
||||
0x58340008, 0xC2400000, 0xCA400078, 0x00000000, 0xC2000000, 0x5A640002, 0xCE400078, 0x58340004,
|
||||
0xCA000078, 0x00000000, 0x00000000, 0x5E200002, 0xCE000078, 0xC0006912, 0xCA8000F8, 0xC2400002,
|
||||
0x6A712000, 0x72A54000, 0xCE8000F8, 0x5E200000, 0x84000052, 0xC000402A, 0xCA0000F8, 0xC000E408,
|
||||
0xCA8000F8, 0x76250000, 0x00000000, 0x72A14000, 0xCE8000F8, 0x80000038, 0xC0006914, 0xCA0000F8,
|
||||
0x7E412000, 0x00000000, 0x76250000, 0xCE0000F8, 0x800000D0, 0x6EF4A000, 0x6ED44000, 0x4755A000,
|
||||
0x476DA000, 0x5B747400, 0x5834002E, 0xC2400000, 0xCA420078, 0x00000000, 0xC2000000, 0x5A640002,
|
||||
0xC6501078, 0xCD021078, 0x58340006, 0xCA000078, 0x00000000, 0x00000000, 0x5A200002, 0xCE000078,
|
||||
0xC0006910, 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0xC2000002, 0x6A310000,
|
||||
0xC000E42A, 0xCE0000F8, 0xC1040002, 0xD90C00F8, 0x00000000, 0x8000EB60, 0x00000000, 0xC4980928,
|
||||
0x9D000000, 0xC5580038, 0xC000E838, 0xCD8400F8, 0xC1440080, 0xC1C06B40, 0xC55C0F80, 0xC000F00E,
|
||||
0x9D000000, 0xCD8000F8, 0xC000F00C, 0xCDC000F8, 0xC000ABDE, 0xC9C000F8, 0x00000000, 0x00000000,
|
||||
0xD9D800F9, 0xC000AB40, 0x401C0000, 0x5DC0ABC0, 0x88000012, 0x5C000080, 0xCD8000F8, 0xC1F0000A,
|
||||
0x715CA000, 0xDD9800F8, 0xDD9C00F9, 0x41D8E000, 0xC5D40260, 0xC000F010, 0xCD4000F8, 0x6C9C8000,
|
||||
0x45C8E000, 0x45C8E000, 0x59DC0004, 0xC1601260, 0xC5D40260, 0x9D000000, 0xC000F012, 0xCD4000F8,
|
||||
0x00000000, 0x00000000, 0xD95800F8, 0x6D586000, 0x4594C000, 0x59989F00, 0xD99800F9, 0x5818000A,
|
||||
0xC1800000, 0xC9800078, 0xC0007200, 0x6D5CA000, 0x401C0000, 0x40180000, 0xC94000F8, 0x58000002,
|
||||
0x00000000, 0xC9C000F8, 0xC0006930, 0xCD4000F8, 0xC0006932, 0xCDC000F8, 0x59980004, 0xC1C20020,
|
||||
0xB59C0018, 0x00000000, 0xC1800000, 0xDD9C00F9, 0x581C000A, 0xCD800078, 0x581C000C, 0xC1800000,
|
||||
0xC9800020, 0xC1C00002, 0xDD9400F8, 0x69D4E000, 0x5D980002, 0xCD800020, 0xC0006924, 0xC98000F8,
|
||||
0x00000000, 0x9D000000, 0x00000000, 0x719CC000, 0xCD8000F8, 0xC000692A, 0xC94000F8, 0xC1C00002,
|
||||
0x69D8E000, 0x7DC0C000, 0x7558A000, 0xCD4000F8, 0xC000692C, 0xC94000F8, 0xDD8000F9, 0x58000032,
|
||||
0x755CA000, 0x84000090, 0xC94000F9, 0xC98000F8, 0xDD8000F9, 0x5800000C, 0x00000000, 0xCD4000F9,
|
||||
0xCD8000F8, 0xC000692C, 0xC94000F8, 0xC000692A, 0xC98000F8, 0x715CA000, 0xC000692C, 0xCD4000F8,
|
||||
0x719CC000, 0xC000692A, 0xCD8000F8, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC000ABDE,
|
||||
0xC98000F8, 0x00000000, 0xC1C00080, 0x4194C000, 0x459CE000, 0x88000012, 0xC5D800F8, 0xC000ABDE,
|
||||
0xCD8000F8, 0xC000F406, 0xC98000F8, 0xC1C00002, 0x9D000000, 0xC5D80A00, 0xC5581048, 0xCD8000F8,
|
||||
0xC0006930, 0xC98000F8, 0xC0006932, 0xC9C000F8, 0xC140000E, 0xC5581C18, 0xDD9400F8, 0xC000AB40,
|
||||
0x40140000, 0x5D40ABC0, 0x88000012, 0x5C000080, 0xCD8000F8, 0x58000002, 0x5D40ABC0, 0x88000012,
|
||||
0x5C000080, 0xCDC000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078, 0xC1800000, 0x58140000,
|
||||
0xC98000D8, 0x6DDC2000, 0xC000691E, 0x41D8E000, 0xCDC000F8, 0xDD9800F8, 0xC1C00022, 0xC5D80D70,
|
||||
0xDD9400F9, 0xC5581C18, 0xC000691C, 0xCD8000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078,
|
||||
0xC1800000, 0x58140004, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, 0xC1C00000,
|
||||
0x9D000000, 0x58140006, 0xC5D81078, 0xCD821078, 0xC000ABDC, 0xC94000F8, 0xC1820020, 0xC1D00002,
|
||||
0x5814AB00, 0xD58000F8, 0x58000002, 0xD58000F9, 0x59540004, 0xB5580018, 0xC000ABDC, 0xC1400000,
|
||||
0xCD4000F8, 0xDD9800F9, 0x9D000000, 0xDD9400F8, 0xC000F402, 0xCDC10800, 0xC1C00000, 0xC1800080,
|
||||
0x5D980004, 0xDF5D0048, 0x459CA000, 0x8800FFF2, 0xDD8000F9, 0x5800000C, 0x00000000, 0xC94000F9,
|
||||
0xC98000F8, 0xC1C00002, 0xC5D43F00, 0xC5D81E00, 0xC000ABDE, 0xC9C000F8, 0x00000000, 0x00000000,
|
||||
0x581CAB40, 0x5DC0ABC0, 0x88000012, 0x5C000080, 0xCD4000F8, 0x58000002, 0x5DC0ABC0, 0x88000012,
|
||||
0x5C000080, 0xCD8000F8, 0xC000ABDE, 0xC9C000F8, 0x00000000, 0xC15004C0, 0xC5D40060, 0xDD9C00F8,
|
||||
0xC5D41C18, 0xC1C00000, 0xDD8000F9, 0x58000030, 0xC9C00078, 0xDD8000F9, 0x58000002, 0xC98000F8,
|
||||
0x6DDC2000, 0xC000691C, 0x41D8E000, 0xCD4000F9, 0xCDC000F8, 0xDD9400F9, 0xC1C00000, 0x58140030,
|
||||
0xC9C00078, 0xC1800000, 0x58140006, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010,
|
||||
0xC1C00000, 0x9D000000, 0x58140030, 0xC5D80078, 0xCD800078, 0xC1C00000, 0xDF5C0038, 0x5DDC0020,
|
||||
0x8400FFEA, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC000EA10,
|
||||
0xC9440070, 0xC1A0FFFE, 0x59983408, 0xC000F00C, 0xCD4000F8, 0xC000F00E, 0xCD8000F8, 0xC0006964,
|
||||
0xC98000F8, 0x00000000, 0xC170000A, 0x7158A000, 0x6C988000, 0x4588C000, 0x4588C000, 0x59980004,
|
||||
0xC5940270, 0xC000F010, 0xCD4000F8, 0xC0006946, 0xC94000F8, 0x00000000, 0x00000000, 0x6D58A000,
|
||||
0x6D5C4000, 0x459CC000, 0x4594C000, 0xC000694A, 0xC94000F8, 0xC0006948, 0xC9C000F8, 0x4194C000,
|
||||
0xC1400012, 0xC55C1818, 0x9D000000, 0xC59C0268, 0xC000F012, 0xCDC000F8, 0xC1400000, 0x58000012,
|
||||
0xC9410038, 0xC0006950, 0xC9C000F8, 0xC55800F8, 0xC5940838, 0xC5581078, 0xD99400F8, 0xC000693C,
|
||||
0xC94000F8, 0xC0006954, 0xC98000F8, 0x59DC00A8, 0x45D4E000, 0x41D8E000, 0x5D5C0030, 0x88000010,
|
||||
0xC1C00030, 0xC1800000, 0xC5D84028, 0xC1400000, 0xC5D40008, 0x5DD40002, 0x84000072, 0x5DD40004,
|
||||
0x8400009A, 0x5DD40006, 0x840000C2, 0x5DD80026, 0x840000EA, 0xDD5400F8, 0xDD8000F9, 0x58000008,
|
||||
0x40180000, 0xCD4000F8, 0x59980002, 0x8000FFC0, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000,
|
||||
0xCD4000B8, 0x59980002, 0x8000FF88, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400078,
|
||||
0x59980002, 0x8000FF50, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400038, 0x59980002,
|
||||
0x8000FF18, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC94000F8,
|
||||
0xC0006954, 0xC9C000F8, 0xC0006950, 0xC9400078, 0xDD8000F9, 0x58000028, 0x5D9C0000, 0x84000052,
|
||||
0x5D9C0002, 0x84000052, 0x5D9C0004, 0x8400006A, 0xC55B0038, 0xC55C08B8, 0xCD800039, 0xCDC108B8,
|
||||
0x80000060, 0xCD4000F8, 0x80000050, 0xC55900B8, 0xC55C1838, 0xCD8000B9, 0xCDC31838, 0x80000028,
|
||||
0xC55A0078, 0xC55C1078, 0xCD800079, 0xCDC21078, 0x9D000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x59540002, 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x88000012, 0xC59400F8, 0x9D000000,
|
||||
0xCD4000F8, 0x00000000, 0x00000000, 0xC000697E, 0xCA4000F8, 0xC0000000, 0xC55800F8, 0xC9D400F9,
|
||||
0x00000000, 0x00000000, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0,
|
||||
0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550,
|
||||
0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000,
|
||||
0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9,
|
||||
0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8,
|
||||
0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9,
|
||||
0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8,
|
||||
0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0,
|
||||
0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550,
|
||||
0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000,
|
||||
0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0xC000697C, 0x9CC00000,
|
||||
0xCE0000F8, 0xC000697E, 0xCE4000F8, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000,
|
||||
};
|
||||
|
||||
static u32 vr9_fw_data[] = {
|
||||
};
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_FW_VR9_H
|
||||
|
||||
116
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h
Normal file
116
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h
Normal file
@@ -0,0 +1,116 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ppe_amazon_se.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PPE Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_PPE_AMAZON_SE_H
|
||||
#define IFXMIPS_ATM_PPE_AMAZON_SE_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* FPI Configuration Bus Register and Memory Address Mapping
|
||||
*/
|
||||
#define IFX_PPE (KSEG1 | 0x1E180000)
|
||||
#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
|
||||
#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
|
||||
#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
|
||||
#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
|
||||
#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
|
||||
#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
|
||||
#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
|
||||
#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
|
||||
#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
|
||||
#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
|
||||
#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
|
||||
#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8200) << 2)))
|
||||
#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2)))
|
||||
#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
|
||||
|
||||
/*
|
||||
* DWORD-Length of Memory Blocks
|
||||
*/
|
||||
#define PP32_DEBUG_REG_DWLEN 0x0030
|
||||
#define PPM_INT_REG_DWLEN 0x0010
|
||||
#define PP32_INTERNAL_RES_DWLEN 0x00C0
|
||||
#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800)
|
||||
#define PPE_REG_DWLEN 0x1000
|
||||
#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1)
|
||||
#define PPM_INT_UNIT_DWLEN 0x0100
|
||||
#define PPM_TIMER0_DWLEN 0x0100
|
||||
#define PPM_TASK_IND_REG_DWLEN 0x0100
|
||||
#define PPS_BRK_DWLEN 0x0100
|
||||
#define PPM_TIMER1_DWLEN 0x0100
|
||||
#define SB_RAM0_DWLEN 0x0A00
|
||||
#define SB_RAM1_DWLEN 0x0A00
|
||||
#define QSB_CONF_REG_DWLEN 0x0100
|
||||
|
||||
/*
|
||||
* PP32 to FPI Address Mapping
|
||||
*/
|
||||
#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x2200) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2200) : \
|
||||
(((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2C00) : \
|
||||
0))
|
||||
|
||||
/*
|
||||
* PP32 Debug Control Register
|
||||
*/
|
||||
#define PP32_DBG_CTRL PP32_DEBUG_REG_ADDR(0, 0x0000)
|
||||
|
||||
#define DBG_CTRL_RESTART 0
|
||||
#define DBG_CTRL_STOP 1
|
||||
|
||||
#define PP32_HALT_STAT PP32_DEBUG_REG_ADDR(0, 0x0D00)
|
||||
#define PP32_BREAKPOINT_REASONS PP32_DEBUG_REG_ADDR(0, 0x0A00)
|
||||
|
||||
#define PP32_BRK_SRC PP32_DEBUG_REG_ADDR(0, 0x0F00)
|
||||
|
||||
#define PP32_DBG_CUR_PC PP32_DEBUG_REG_ADDR(0, 0x0F80)
|
||||
|
||||
#define PP32_DBG_TASK_NO PP32_DEBUG_REG_ADDR(0, 0x0F81)
|
||||
|
||||
/*
|
||||
* Share Buffer
|
||||
*/
|
||||
#define SB_MST_PRI0 PPE_REG_ADDR(0x0300)
|
||||
#define SB_MST_PRI1 PPE_REG_ADDR(0x0301)
|
||||
|
||||
/*
|
||||
* EMA Registers
|
||||
*/
|
||||
#define EMA_CMDCFG PPE_REG_ADDR(0x0A00)
|
||||
#define EMA_DATACFG PPE_REG_ADDR(0x0A01)
|
||||
#define EMA_CMDCNT PPE_REG_ADDR(0x0A02)
|
||||
#define EMA_DATACNT PPE_REG_ADDR(0x0A03)
|
||||
#define EMA_ISR PPE_REG_ADDR(0x0A04)
|
||||
#define EMA_IER PPE_REG_ADDR(0x0A05)
|
||||
#define EMA_CFG PPE_REG_ADDR(0x0A06)
|
||||
#define EMA_SUBID PPE_REG_ADDR(0x0A07)
|
||||
|
||||
#define EMA_ALIGNMENT 4
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_PPE_AMAZON_SE_H
|
||||
183
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h
Normal file
183
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h
Normal file
@@ -0,0 +1,183 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ppe_ar9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PPE Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_PPE_AR9_H
|
||||
#define IFXMIPS_ATM_PPE_AR9_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* FPI Configuration Bus Register and Memory Address Mapping
|
||||
*/
|
||||
#define IFX_PPE (KSEG1 | 0x1E180000)
|
||||
#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
|
||||
#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
|
||||
#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
|
||||
#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
|
||||
#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
|
||||
#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
|
||||
#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
|
||||
#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
|
||||
#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
|
||||
#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
|
||||
#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
|
||||
#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2)))
|
||||
#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8800) << 2)))
|
||||
#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9000) << 2)))
|
||||
#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9800) << 2)))
|
||||
#define SB_RAM4_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xA000) << 2)))
|
||||
#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
|
||||
|
||||
/*
|
||||
* DWORD-Length of Memory Blocks
|
||||
*/
|
||||
#define PP32_DEBUG_REG_DWLEN 0x0030
|
||||
#define PPM_INT_REG_DWLEN 0x0010
|
||||
#define PP32_INTERNAL_RES_DWLEN 0x00C0
|
||||
#define CDM_CODE_MEMORYn_DWLEN(n) 0x1000
|
||||
#define PPE_REG_DWLEN 0x1000
|
||||
#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1)
|
||||
#define PPM_INT_UNIT_DWLEN 0x0100
|
||||
#define PPM_TIMER0_DWLEN 0x0100
|
||||
#define PPM_TASK_IND_REG_DWLEN 0x0100
|
||||
#define PPS_BRK_DWLEN 0x0100
|
||||
#define PPM_TIMER1_DWLEN 0x0100
|
||||
#define SB_RAM0_DWLEN 0x0800
|
||||
#define SB_RAM1_DWLEN 0x0800
|
||||
#define SB_RAM2_DWLEN 0x0800
|
||||
#define SB_RAM3_DWLEN 0x0800
|
||||
#define SB_RAM4_DWLEN 0x0C00
|
||||
#define QSB_CONF_REG_DWLEN 0x0100
|
||||
|
||||
/*
|
||||
* PP32 to FPI Address Mapping
|
||||
*/
|
||||
#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x0FFF)) ? PPE_REG_ADDR((__sb_addr)): \
|
||||
(((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x27FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \
|
||||
(((__sb_addr) >= 0x2800) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2800) : \
|
||||
(((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x37FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x3000) : \
|
||||
(((__sb_addr) >= 0x3800) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3800) : \
|
||||
(((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4BFF)) ? SB_RAM4_ADDR((__sb_addr) - 0x4000) : \
|
||||
0))
|
||||
|
||||
/*
|
||||
* PP32 Debug Control Register
|
||||
*/
|
||||
#define NUM_OF_PP32 1
|
||||
|
||||
#define PP32_DBG_CTRL(n) PP32_DEBUG_REG_ADDR(n, 0x0000)
|
||||
|
||||
#define DBG_CTRL_RESTART 0
|
||||
#define DBG_CTRL_STOP 1
|
||||
|
||||
#define PP32_CTRL_CMD(n) PP32_DEBUG_REG_ADDR(n, 0x0B00)
|
||||
#define PP32_CTRL_CMD_RESTART (1 << 0)
|
||||
#define PP32_CTRL_CMD_STOP (1 << 1)
|
||||
#define PP32_CTRL_CMD_STEP (1 << 2)
|
||||
#define PP32_CTRL_CMD_BREAKOUT (1 << 3)
|
||||
|
||||
#define PP32_CTRL_OPT(n) PP32_DEBUG_REG_ADDR(n, 0x0C00)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON (3 << 0)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF (2 << 0)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON (3 << 2)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON (3 << 4)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF (2 << 4)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON (3 << 6)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF (2 << 6)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n) (*PP32_CTRL_OPT(n) & (1 << 0))
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 2))
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 4))
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n) (*PP32_CTRL_OPT(n) & (1 << 6))
|
||||
|
||||
#define PP32_BRK_PC(n, i) PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2)
|
||||
#define PP32_BRK_PC_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2)
|
||||
#define PP32_BRK_DATA_ADDR(n, i) PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2)
|
||||
#define PP32_BRK_DATA_ADDR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_RD(n, i) PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_RD_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_WR(n, i) PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_WR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2)
|
||||
#define PP32_BRK_CONTEXT_MASK(i) (1 << (i))
|
||||
#define PP32_BRK_CONTEXT_MASK_EN (1 << 4)
|
||||
#define PP32_BRK_COMPARE_GREATER_EQUAL (1 << 5) // valid for break data value rd/wr only
|
||||
#define PP32_BRK_COMPARE_LOWER_EQUAL (1 << 6)
|
||||
#define PP32_BRK_COMPARE_EN (1 << 7)
|
||||
|
||||
#define PP32_BRK_TRIG(n) PP32_DEBUG_REG_ADDR(n, 0x0F00)
|
||||
#define PP32_BRK_GRPi_PCn_ON(i, n) ((3 << ((n) * 2)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_PCn_OFF(i, n) ((2 << ((n) * 2)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n) ((3 << ((n) * 2 + 4)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n) ((2 << ((n) * 2 + 4)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_PCn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8)))
|
||||
|
||||
#define PP32_CPU_STATUS(n) PP32_DEBUG_REG_ADDR(n, 0x0D00)
|
||||
#define PP32_HALT_STAT(n) PP32_CPU_STATUS(n)
|
||||
#define PP32_DBG_CUR_PC(n) PP32_CPU_STATUS(n)
|
||||
#define PP32_CPU_USER_STOPPED(n) (*PP32_CPU_STATUS(n) & (1 << 0))
|
||||
#define PP32_CPU_USER_BREAKIN_RCV(n) (*PP32_CPU_STATUS(n) & (1 << 1))
|
||||
#define PP32_CPU_USER_BREAKPOINT_MET(n) (*PP32_CPU_STATUS(n) & (1 << 2))
|
||||
#define PP32_CPU_CUR_PC(n) (*PP32_CPU_STATUS(n) >> 16)
|
||||
|
||||
#define PP32_BREAKPOINT_REASONS(n) PP32_DEBUG_REG_ADDR(n, 0x0A00)
|
||||
#define PP32_BRK_PC_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << (i)))
|
||||
#define PP32_BRK_DATA_ADDR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13)))
|
||||
#define PP32_BRK_CUR_CONTEXT(n) ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03)
|
||||
|
||||
#define PP32_GP_REG_BASE(n) PP32_DEBUG_REG_ADDR(n, 0x0E00)
|
||||
#define PP32_GP_CONTEXTi_REGn(n, i, j) PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j))
|
||||
|
||||
/*
|
||||
* EMA Registers
|
||||
*/
|
||||
#define EMA_CMDCFG PPE_REG_ADDR(0x0A00)
|
||||
#define EMA_DATACFG PPE_REG_ADDR(0x0A01)
|
||||
#define EMA_CMDCNT PPE_REG_ADDR(0x0A02)
|
||||
#define EMA_DATACNT PPE_REG_ADDR(0x0A03)
|
||||
#define EMA_ISR PPE_REG_ADDR(0x0A04)
|
||||
#define EMA_IER PPE_REG_ADDR(0x0A05)
|
||||
#define EMA_CFG PPE_REG_ADDR(0x0A06)
|
||||
#define EMA_SUBID PPE_REG_ADDR(0x0A07)
|
||||
|
||||
#define EMA_ALIGNMENT 4
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_PPE_AR9_H
|
||||
368
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_common.h
Normal file
368
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_common.h
Normal file
@@ -0,0 +1,368 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ppe_common.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PPE Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_PPE_COMMON_H
|
||||
#define IFXMIPS_ATM_PPE_COMMON_H
|
||||
|
||||
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_atm_ppe_danube.h"
|
||||
#elif defined(CONFIG_AMAZON_SE)
|
||||
#include "ifxmips_atm_ppe_amazon_se.h"
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_atm_ppe_ar9.h"
|
||||
#elif defined(CONFIG_VR9)
|
||||
#include "ifxmips_atm_ppe_vr9.h"
|
||||
#else
|
||||
#error Platform is not specified!
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Code/Data Memory (CDM) Interface Configuration Register
|
||||
*/
|
||||
#define CDM_CFG PPE_REG_ADDR(0x0100)
|
||||
|
||||
#define CDM_CFG_RAM1 GET_BITS(*CDM_CFG, 3, 2)
|
||||
#define CDM_CFG_RAM0 (*CDM_CFG & (1 << 1))
|
||||
|
||||
#define CDM_CFG_RAM1_SET(value) SET_BITS(0, 3, 2, value)
|
||||
#define CDM_CFG_RAM0_SET(value) ((value) ? (1 << 1) : 0)
|
||||
|
||||
/*
|
||||
* QSB Internal Cell Delay Variation Register
|
||||
*/
|
||||
#define QSB_ICDV QSB_CONF_REG_ADDR(0x0007)
|
||||
|
||||
#define QSB_ICDV_TAU GET_BITS(*QSB_ICDV, 5, 0)
|
||||
|
||||
#define QSB_ICDV_TAU_SET(value) SET_BITS(0, 5, 0, value)
|
||||
|
||||
/*
|
||||
* QSB Scheduler Burst Limit Register
|
||||
*/
|
||||
#define QSB_SBL QSB_CONF_REG_ADDR(0x0009)
|
||||
|
||||
#define QSB_SBL_SBL GET_BITS(*QSB_SBL, 3, 0)
|
||||
|
||||
#define QSB_SBL_SBL_SET(value) SET_BITS(0, 3, 0, value)
|
||||
|
||||
/*
|
||||
* QSB Configuration Register
|
||||
*/
|
||||
#define QSB_CFG QSB_CONF_REG_ADDR(0x000A)
|
||||
|
||||
#define QSB_CFG_TSTEPC GET_BITS(*QSB_CFG, 1, 0)
|
||||
|
||||
#define QSB_CFG_TSTEPC_SET(value) SET_BITS(0, 1, 0, value)
|
||||
|
||||
/*
|
||||
* QSB RAM Transfer Table Register
|
||||
*/
|
||||
#define QSB_RTM QSB_CONF_REG_ADDR(0x000B)
|
||||
|
||||
#define QSB_RTM_DM (*QSB_RTM)
|
||||
|
||||
#define QSB_RTM_DM_SET(value) ((value) & 0xFFFFFFFF)
|
||||
|
||||
/*
|
||||
* QSB RAM Transfer Data Register
|
||||
*/
|
||||
#define QSB_RTD QSB_CONF_REG_ADDR(0x000C)
|
||||
|
||||
#define QSB_RTD_TTV (*QSB_RTD)
|
||||
|
||||
#define QSB_RTD_TTV_SET(value) ((value) & 0xFFFFFFFF)
|
||||
|
||||
/*
|
||||
* QSB RAM Access Register
|
||||
*/
|
||||
#define QSB_RAMAC QSB_CONF_REG_ADDR(0x000D)
|
||||
|
||||
#define QSB_RAMAC_RW (*QSB_RAMAC & (1 << 31))
|
||||
#define QSB_RAMAC_TSEL GET_BITS(*QSB_RAMAC, 27, 24)
|
||||
#define QSB_RAMAC_LH (*QSB_RAMAC & (1 << 16))
|
||||
#define QSB_RAMAC_TESEL GET_BITS(*QSB_RAMAC, 9, 0)
|
||||
|
||||
#define QSB_RAMAC_RW_SET(value) ((value) ? (1 << 31) : 0)
|
||||
#define QSB_RAMAC_TSEL_SET(value) SET_BITS(0, 27, 24, value)
|
||||
#define QSB_RAMAC_LH_SET(value) ((value) ? (1 << 16) : 0)
|
||||
#define QSB_RAMAC_TESEL_SET(value) SET_BITS(0, 9, 0, value)
|
||||
|
||||
/*
|
||||
* QSB Queue Scheduling and Shaping Definitions
|
||||
*/
|
||||
#define QSB_WFQ_NONUBR_MAX 0x3f00
|
||||
#define QSB_WFQ_UBR_BYPASS 0x3fff
|
||||
#define QSB_TP_TS_MAX 65472
|
||||
#define QSB_TAUS_MAX 64512
|
||||
#define QSB_GCR_MIN 18
|
||||
|
||||
/*
|
||||
* QSB Constant
|
||||
*/
|
||||
#define QSB_RAMAC_RW_READ 0
|
||||
#define QSB_RAMAC_RW_WRITE 1
|
||||
|
||||
#define QSB_RAMAC_TSEL_QPT 0x01
|
||||
#define QSB_RAMAC_TSEL_SCT 0x02
|
||||
#define QSB_RAMAC_TSEL_SPT 0x03
|
||||
#define QSB_RAMAC_TSEL_VBR 0x08
|
||||
|
||||
#define QSB_RAMAC_LH_LOW 0
|
||||
#define QSB_RAMAC_LH_HIGH 1
|
||||
|
||||
#define QSB_QPT_SET_MASK 0x0
|
||||
#define QSB_QVPT_SET_MASK 0x0
|
||||
#define QSB_SET_SCT_MASK 0x0
|
||||
#define QSB_SET_SPT_MASK 0x0
|
||||
#define QSB_SET_SPT_SBVALID_MASK 0x7FFFFFFF
|
||||
|
||||
#define QSB_SPT_SBV_VALID (1 << 31)
|
||||
#define QSB_SPT_PN_SET(value) (((value) & 0x01) ? (1 << 16) : 0)
|
||||
#define QSB_SPT_INTRATE_SET(value) SET_BITS(0, 13, 0, value)
|
||||
|
||||
/*
|
||||
* QSB Queue Parameter Table Entry and Queue VBR Parameter Table Entry
|
||||
*/
|
||||
#if defined(__BIG_ENDIAN)
|
||||
union qsb_queue_parameter_table {
|
||||
struct {
|
||||
unsigned int res1 :1;
|
||||
unsigned int vbr :1;
|
||||
unsigned int wfqf :14;
|
||||
unsigned int tp :16;
|
||||
} bit;
|
||||
u32 dword;
|
||||
};
|
||||
|
||||
union qsb_queue_vbr_parameter_table {
|
||||
struct {
|
||||
unsigned int taus :16;
|
||||
unsigned int ts :16;
|
||||
} bit;
|
||||
u32 dword;
|
||||
};
|
||||
#else
|
||||
union qsb_queue_parameter_table {
|
||||
struct {
|
||||
unsigned int tp :16;
|
||||
unsigned int wfqf :14;
|
||||
unsigned int vbr :1;
|
||||
unsigned int res1 :1;
|
||||
} bit;
|
||||
u32 dword;
|
||||
};
|
||||
|
||||
union qsb_queue_vbr_parameter_table {
|
||||
struct {
|
||||
unsigned int ts :16;
|
||||
unsigned int taus :16;
|
||||
} bit;
|
||||
u32 dword;
|
||||
};
|
||||
#endif // defined(__BIG_ENDIAN)
|
||||
|
||||
/*
|
||||
* Mailbox IGU0 Registers
|
||||
*/
|
||||
#define MBOX_IGU0_ISRS PPE_REG_ADDR(0x0200)
|
||||
#define MBOX_IGU0_ISRC PPE_REG_ADDR(0x0201)
|
||||
#define MBOX_IGU0_ISR PPE_REG_ADDR(0x0202)
|
||||
#define MBOX_IGU0_IER PPE_REG_ADDR(0x0203)
|
||||
|
||||
#define MBOX_IGU0_ISRS_SET(n) (1 << (n))
|
||||
#define MBOX_IGU0_ISRC_CLEAR(n) (1 << (n))
|
||||
#define MBOX_IGU0_ISR_ISR(n) (*MBOX_IGU0_ISR & (1 << (n)))
|
||||
#define MBOX_IGU0_IER_EN(n) (*MBOX_IGU0_IER & (1 << (n)))
|
||||
#define MBOX_IGU0_IER_EN_SET(n) (1 << (n))
|
||||
|
||||
/*
|
||||
* Mailbox IGU1 Registers
|
||||
*/
|
||||
#define MBOX_IGU1_ISRS PPE_REG_ADDR(0x0204)
|
||||
#define MBOX_IGU1_ISRC PPE_REG_ADDR(0x0205)
|
||||
#define MBOX_IGU1_ISR PPE_REG_ADDR(0x0206)
|
||||
#define MBOX_IGU1_IER PPE_REG_ADDR(0x0207)
|
||||
|
||||
#define MBOX_IGU1_ISRS_SET(n) (1 << (n))
|
||||
#define MBOX_IGU1_ISRC_CLEAR(n) (1 << (n))
|
||||
#define MBOX_IGU1_ISR_ISR(n) (*MBOX_IGU1_ISR & (1 << (n)))
|
||||
#define MBOX_IGU1_IER_EN(n) (*MBOX_IGU1_IER & (1 << (n)))
|
||||
#define MBOX_IGU1_IER_EN_SET(n) (1 << (n))
|
||||
|
||||
/*
|
||||
* Mailbox IGU3 Registers
|
||||
*/
|
||||
#define MBOX_IGU3_ISRS PPE_REG_ADDR(0x0214)
|
||||
#define MBOX_IGU3_ISRC PPE_REG_ADDR(0x0215)
|
||||
#define MBOX_IGU3_ISR PPE_REG_ADDR(0x0216)
|
||||
#define MBOX_IGU3_IER PPE_REG_ADDR(0x0217)
|
||||
|
||||
#define MBOX_IGU3_ISRS_SET(n) (1 << (n))
|
||||
#define MBOX_IGU3_ISRC_CLEAR(n) (1 << (n))
|
||||
#define MBOX_IGU3_ISR_ISR(n) (*MBOX_IGU3_ISR & (1 << (n)))
|
||||
#define MBOX_IGU3_IER_EN(n) (*MBOX_IGU3_IER & (1 << (n)))
|
||||
#define MBOX_IGU3_IER_EN_SET(n) (1 << (n))
|
||||
|
||||
/*
|
||||
* RTHA/TTHA Registers
|
||||
*/
|
||||
#define RFBI_CFG PPE_REG_ADDR(0x0400)
|
||||
#define RBA_CFG0 PPE_REG_ADDR(0x0404)
|
||||
#define RBA_CFG1 PPE_REG_ADDR(0x0405)
|
||||
#define RCA_CFG0 PPE_REG_ADDR(0x0408)
|
||||
#define RCA_CFG1 PPE_REG_ADDR(0x0409)
|
||||
#define RDES_CFG0 PPE_REG_ADDR(0x040C)
|
||||
#define RDES_CFG1 PPE_REG_ADDR(0x040D)
|
||||
#define SFSM_STATE0 PPE_REG_ADDR(0x0410)
|
||||
#define SFSM_STATE1 PPE_REG_ADDR(0x0411)
|
||||
#define SFSM_DBA0 PPE_REG_ADDR(0x0412)
|
||||
#define SFSM_DBA1 PPE_REG_ADDR(0x0413)
|
||||
#define SFSM_CBA0 PPE_REG_ADDR(0x0414)
|
||||
#define SFSM_CBA1 PPE_REG_ADDR(0x0415)
|
||||
#define SFSM_CFG0 PPE_REG_ADDR(0x0416)
|
||||
#define SFSM_CFG1 PPE_REG_ADDR(0x0417)
|
||||
#define SFSM_PGCNT0 PPE_REG_ADDR(0x041C)
|
||||
#define SFSM_PGCNT1 PPE_REG_ADDR(0x041D)
|
||||
#define FFSM_DBA0 PPE_REG_ADDR(0x0508)
|
||||
#define FFSM_DBA1 PPE_REG_ADDR(0x0509)
|
||||
#define FFSM_CFG0 PPE_REG_ADDR(0x050A)
|
||||
#define FFSM_CFG1 PPE_REG_ADDR(0x050B)
|
||||
#define FFSM_IDLE_HEAD_BC0 PPE_REG_ADDR(0x050E)
|
||||
#define FFSM_IDLE_HEAD_BC1 PPE_REG_ADDR(0x050F)
|
||||
#define FFSM_PGCNT0 PPE_REG_ADDR(0x0514)
|
||||
#define FFSM_PGCNT1 PPE_REG_ADDR(0x0515)
|
||||
|
||||
/*
|
||||
* PPE TC Logic Registers (partial)
|
||||
*/
|
||||
#define DREG_A_VERSION PPE_REG_ADDR(0x0D00)
|
||||
#define DREG_A_CFG PPE_REG_ADDR(0x0D01)
|
||||
#define DREG_AT_CTRL PPE_REG_ADDR(0x0D02)
|
||||
#define DREG_AT_CB_CFG0 PPE_REG_ADDR(0x0D03)
|
||||
#define DREG_AT_CB_CFG1 PPE_REG_ADDR(0x0D04)
|
||||
#define DREG_AR_CTRL PPE_REG_ADDR(0x0D08)
|
||||
#define DREG_AR_CB_CFG0 PPE_REG_ADDR(0x0D09)
|
||||
#define DREG_AR_CB_CFG1 PPE_REG_ADDR(0x0D0A)
|
||||
#define DREG_A_UTPCFG PPE_REG_ADDR(0x0D0E)
|
||||
#define DREG_A_STATUS PPE_REG_ADDR(0x0D0F)
|
||||
#define DREG_AT_CFG0 PPE_REG_ADDR(0x0D20)
|
||||
#define DREG_AT_CFG1 PPE_REG_ADDR(0x0D21)
|
||||
#define DREG_AT_FB_SIZE0 PPE_REG_ADDR(0x0D22)
|
||||
#define DREG_AT_FB_SIZE1 PPE_REG_ADDR(0x0D23)
|
||||
#define DREG_AT_CELL0 PPE_REG_ADDR(0x0D24)
|
||||
#define DREG_AT_CELL1 PPE_REG_ADDR(0x0D25)
|
||||
#define DREG_AT_IDLE_CNT0 PPE_REG_ADDR(0x0D26)
|
||||
#define DREG_AT_IDLE_CNT1 PPE_REG_ADDR(0x0D27)
|
||||
#define DREG_AT_IDLE0 PPE_REG_ADDR(0x0D28)
|
||||
#define DREG_AT_IDLE1 PPE_REG_ADDR(0x0D29)
|
||||
#define DREG_AR_CFG0 PPE_REG_ADDR(0x0D60)
|
||||
#define DREG_AR_CFG1 PPE_REG_ADDR(0x0D61)
|
||||
#define DREG_AR_CELL0 PPE_REG_ADDR(0x0D68)
|
||||
#define DREG_AR_CELL1 PPE_REG_ADDR(0x0D69)
|
||||
#define DREG_AR_IDLE_CNT0 PPE_REG_ADDR(0x0D6A)
|
||||
#define DREG_AR_IDLE_CNT1 PPE_REG_ADDR(0x0D6B)
|
||||
#define DREG_AR_AIIDLE_CNT0 PPE_REG_ADDR(0x0D6C)
|
||||
#define DREG_AR_AIIDLE_CNT1 PPE_REG_ADDR(0x0D6D)
|
||||
#define DREG_AR_BE_CNT0 PPE_REG_ADDR(0x0D6E)
|
||||
#define DREG_AR_BE_CNT1 PPE_REG_ADDR(0x0D6F)
|
||||
#define DREG_AR_HEC_CNT0 PPE_REG_ADDR(0x0D70)
|
||||
#define DREG_AR_HEC_CNT1 PPE_REG_ADDR(0x0D71)
|
||||
#define DREG_AR_IDLE0 PPE_REG_ADDR(0x0D74)
|
||||
#define DREG_AR_IDLE1 PPE_REG_ADDR(0x0D75)
|
||||
#define DREG_AR_CVN_CNT0 PPE_REG_ADDR(0x0DA4)
|
||||
#define DREG_AR_CVN_CNT1 PPE_REG_ADDR(0x0DA5)
|
||||
#define DREG_AR_CVNP_CNT0 PPE_REG_ADDR(0x0DA6)
|
||||
#define DREG_AR_CVNP_CNT1 PPE_REG_ADDR(0x0DA7)
|
||||
#define DREG_B0_LADR PPE_REG_ADDR(0x0DA8)
|
||||
#define DREG_B1_LADR PPE_REG_ADDR(0x0DA9)
|
||||
|
||||
#define SFSM_DBA(i) ( (SFSM_dba * ) PPE_REG_ADDR(0x0412 + (i)))
|
||||
#define SFSM_CBA(i) ( (SFSM_cba * ) PPE_REG_ADDR(0x0414 + (i)))
|
||||
#define SFSM_CFG(i) ( (SFSM_cfg * ) PPE_REG_ADDR(0x0416 + (i)))
|
||||
#define SFSM_PGCNT(i) ( (SFSM_pgcnt * ) PPE_REG_ADDR(0x041C + (i)))
|
||||
|
||||
#define FFSM_DBA(i) ( (FFSM_dba * ) PPE_REG_ADDR(0x0508 + (i)))
|
||||
#define FFSM_CFG(i) ( (FFSM_cfg * ) PPE_REG_ADDR(0x050A + (i)))
|
||||
#define FFSM_PGCNT(i) ( (FFSM_pgcnt * ) PPE_REG_ADDR(0x0514 + (i)))
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 19;
|
||||
unsigned int dbase : 13;
|
||||
} SFSM_dba;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 19;
|
||||
unsigned int cbase : 13;
|
||||
} SFSM_cba;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 15;
|
||||
unsigned int endian : 1;
|
||||
unsigned int idlekeep: 1;
|
||||
unsigned int sen : 1;
|
||||
unsigned int res1 : 8;
|
||||
unsigned int pnum : 6;
|
||||
} SFSM_cfg;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 17;
|
||||
unsigned int pptr : 6;
|
||||
unsigned int dcmd : 1;
|
||||
unsigned int res1 : 2;
|
||||
unsigned int upage : 6;
|
||||
} SFSM_pgcnt;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 19;
|
||||
unsigned int dbase : 13;
|
||||
} FFSM_dba;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 12;
|
||||
unsigned int rstptr : 1;
|
||||
unsigned int clvpage : 1;
|
||||
unsigned int fidle : 1;
|
||||
unsigned int endian : 1;
|
||||
unsigned int res1 : 10;
|
||||
unsigned int pnum : 6;
|
||||
} FFSM_cfg;
|
||||
|
||||
typedef struct {
|
||||
unsigned int res : 17;
|
||||
unsigned int ival : 6;
|
||||
unsigned int icmd : 1;
|
||||
unsigned int res1 : 2;
|
||||
unsigned int vpage : 6;
|
||||
} FFSM_pgcnt;
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_PPE_COMMON_H
|
||||
124
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h
Normal file
124
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h
Normal file
@@ -0,0 +1,124 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ppe_danube.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PPE Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_PPE_DANUBE_H
|
||||
#define IFXMIPS_ATM_PPE_DANUBE_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* FPI Configuration Bus Register and Memory Address Mapping
|
||||
*/
|
||||
#define IFX_PPE (KSEG1 | 0x1E180000)
|
||||
#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
|
||||
#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
|
||||
#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
|
||||
#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
|
||||
#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
|
||||
#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
|
||||
#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
|
||||
#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
|
||||
#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
|
||||
#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
|
||||
#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
|
||||
#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2)))
|
||||
#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8400) << 2)))
|
||||
#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2)))
|
||||
#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9600) << 2)))
|
||||
#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
|
||||
|
||||
/*
|
||||
* DWORD-Length of Memory Blocks
|
||||
*/
|
||||
#define PP32_DEBUG_REG_DWLEN 0x0030
|
||||
#define PPM_INT_REG_DWLEN 0x0010
|
||||
#define PP32_INTERNAL_RES_DWLEN 0x00C0
|
||||
#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800)
|
||||
#define PPE_REG_DWLEN 0x1000
|
||||
#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1)
|
||||
#define PPM_INT_UNIT_DWLEN 0x0100
|
||||
#define PPM_TIMER0_DWLEN 0x0100
|
||||
#define PPM_TASK_IND_REG_DWLEN 0x0100
|
||||
#define PPS_BRK_DWLEN 0x0100
|
||||
#define PPM_TIMER1_DWLEN 0x0100
|
||||
#define SB_RAM0_DWLEN 0x0400
|
||||
#define SB_RAM1_DWLEN 0x0800
|
||||
#define SB_RAM2_DWLEN 0x0A00
|
||||
#define SB_RAM3_DWLEN 0x0400
|
||||
#define QSB_CONF_REG_DWLEN 0x0100
|
||||
|
||||
/*
|
||||
* PP32 to FPI Address Mapping
|
||||
*/
|
||||
#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x23FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \
|
||||
(((__sb_addr) >= 0x2400) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2400) : \
|
||||
(((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x2C00) : \
|
||||
(((__sb_addr) >= 0x3600) && ((__sb_addr) <= 0x39FF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3600) : \
|
||||
0))
|
||||
|
||||
/*
|
||||
* PP32 Debug Control Register
|
||||
*/
|
||||
#define PP32_DBG_CTRL PP32_DEBUG_REG_ADDR(0, 0x0000)
|
||||
|
||||
#define DBG_CTRL_START_SET(value) ((value) ? (1 << 0) : 0)
|
||||
#define DBG_CTRL_STOP_SET(value) ((value) ? (1 << 1) : 0)
|
||||
#define DBG_CTRL_STEP_SET(value) ((value) ? (1 << 2) : 0)
|
||||
|
||||
#define PP32_HALT_STAT PP32_DEBUG_REG_ADDR(0, 0x0001)
|
||||
|
||||
#define PP32_BRK_SRC PP32_DEBUG_REG_ADDR(0, 0x0002)
|
||||
|
||||
#define PP32_DBG_PC_MIN(i) PP32_DEBUG_REG_ADDR(0, 0x0010 + (i))
|
||||
#define PP32_DBG_PC_MAX(i) PP32_DEBUG_REG_ADDR(0, 0x0014 + (i))
|
||||
#define PP32_DBG_DATA_MIN(i) PP32_DEBUG_REG_ADDR(0, 0x0018 + (i))
|
||||
#define PP32_DBG_DATA_MAX(i) PP32_DEBUG_REG_ADDR(0, 0x001A + (i))
|
||||
#define PP32_DBG_DATA_VAL(i) PP32_DEBUG_REG_ADDR(0, 0x001C + (i))
|
||||
|
||||
#define PP32_DBG_CUR_PC PP32_DEBUG_REG_ADDR(0, 0x0080)
|
||||
|
||||
#define PP32_DBG_TASK_NO PP32_DEBUG_REG_ADDR(0, 0x0081)
|
||||
|
||||
#define PP32_DBG_REG_BASE(tsk, i) PP32_DEBUG_REG_ADDR(0, 0x0100 + (tsk) * 16 + (i))
|
||||
|
||||
/*
|
||||
* EMA Registers
|
||||
*/
|
||||
#define EMA_CMDCFG PPE_REG_ADDR(0x0A00)
|
||||
#define EMA_DATACFG PPE_REG_ADDR(0x0A01)
|
||||
#define EMA_CMDCNT PPE_REG_ADDR(0x0A02)
|
||||
#define EMA_DATACNT PPE_REG_ADDR(0x0A03)
|
||||
#define EMA_ISR PPE_REG_ADDR(0x0A04)
|
||||
#define EMA_IER PPE_REG_ADDR(0x0A05)
|
||||
#define EMA_CFG PPE_REG_ADDR(0x0A06)
|
||||
#define EMA_SUBID PPE_REG_ADDR(0x0A07)
|
||||
|
||||
#define EMA_ALIGNMENT 4
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_PPE_DANUBE_H
|
||||
187
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h
Normal file
187
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h
Normal file
@@ -0,0 +1,187 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_ppe_vr9.h
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM (ADSL)
|
||||
**
|
||||
** DATE : 1 AUG 2005
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM Driver (PPE Registers)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 4 AUG 2005 Xu Liang Initiate Version
|
||||
** 23 OCT 2006 Xu Liang Add GPL header.
|
||||
** 9 JAN 2007 Xu Liang First version got from Anand (IC designer)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef IFXMIPS_ATM_PPE_VR9_H
|
||||
#define IFXMIPS_ATM_PPE_VR9_H
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* FPI Configuration Bus Register and Memory Address Mapping
|
||||
*/
|
||||
#define IFX_PPE (KSEG1 | 0x1E200000)
|
||||
#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x000000 + (i) * 0x00010000) << 2)))
|
||||
#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x001000 + (i) * 0x00010000) << 2)))
|
||||
#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x004000 + (i) * 0x00010000) << 2)))
|
||||
#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x008000) << 2)))
|
||||
#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x009000) << 2)))
|
||||
#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00A000) << 2)))
|
||||
#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00B000) << 2)))
|
||||
#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00D000) << 2)))
|
||||
#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00E000) << 2)))
|
||||
#define SB_RAM6_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x018000) << 2)))
|
||||
|
||||
/*
|
||||
* DWORD-Length of Memory Blocks
|
||||
*/
|
||||
#define PP32_DEBUG_REG_DWLEN 0x0030
|
||||
#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800)
|
||||
#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1)
|
||||
#define SB_RAM0_DWLEN 0x1000
|
||||
#define SB_RAM1_DWLEN 0x1000
|
||||
#define SB_RAM2_DWLEN 0x1000
|
||||
#define SB_RAM3_DWLEN 0x1000
|
||||
#define SB_RAM6_DWLEN 0x8000
|
||||
#define QSB_CONF_REG_DWLEN 0x0100
|
||||
|
||||
/*
|
||||
* PP32 to FPI Address Mapping
|
||||
*/
|
||||
#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x1FFF)) ? PPE_REG_ADDR((__sb_addr)) : \
|
||||
(((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \
|
||||
(((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x3000) : \
|
||||
(((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4FFF)) ? SB_RAM2_ADDR((__sb_addr) - 0x4000) : \
|
||||
(((__sb_addr) >= 0x5000) && ((__sb_addr) <= 0x5FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x5000) : \
|
||||
(((__sb_addr) >= 0x7000) && ((__sb_addr) <= 0x7FFF)) ? PPE_REG_ADDR((__sb_addr) - 0x7000) : \
|
||||
(((__sb_addr) >= 0x8000) && ((__sb_addr) <= 0xFFFF)) ? SB_RAM6_ADDR((__sb_addr) - 0x8000) : \
|
||||
0))
|
||||
|
||||
/*
|
||||
* PP32 Debug Control Register
|
||||
*/
|
||||
#define NUM_OF_PP32 2
|
||||
|
||||
#define PP32_FREEZE PPE_REG_ADDR(0x0000)
|
||||
#define PP32_SRST PPE_REG_ADDR(0x0020)
|
||||
|
||||
#define PP32_DBG_CTRL(n) PP32_DEBUG_REG_ADDR(n, 0x0000)
|
||||
|
||||
#define DBG_CTRL_RESTART 0
|
||||
#define DBG_CTRL_STOP 1
|
||||
|
||||
#define PP32_CTRL_CMD(n) PP32_DEBUG_REG_ADDR(n, 0x0B00)
|
||||
#define PP32_CTRL_CMD_RESTART (1 << 0)
|
||||
#define PP32_CTRL_CMD_STOP (1 << 1)
|
||||
#define PP32_CTRL_CMD_STEP (1 << 2)
|
||||
#define PP32_CTRL_CMD_BREAKOUT (1 << 3)
|
||||
|
||||
#define PP32_CTRL_OPT(n) PP32_DEBUG_REG_ADDR(n, 0x0C00)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON (3 << 0)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF (2 << 0)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON (3 << 2)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON (3 << 4)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF (2 << 4)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON (3 << 6)
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF (2 << 6)
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n) (*PP32_CTRL_OPT(n) & (1 << 0))
|
||||
#define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 2))
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 4))
|
||||
#define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n) (*PP32_CTRL_OPT(n) & (1 << 6))
|
||||
|
||||
#define PP32_BRK_PC(n, i) PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2)
|
||||
#define PP32_BRK_PC_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2)
|
||||
#define PP32_BRK_DATA_ADDR(n, i) PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2)
|
||||
#define PP32_BRK_DATA_ADDR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_RD(n, i) PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_RD_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_WR(n, i) PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2)
|
||||
#define PP32_BRK_DATA_VALUE_WR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2)
|
||||
#define PP32_BRK_CONTEXT_MASK(i) (1 << (i))
|
||||
#define PP32_BRK_CONTEXT_MASK_EN (1 << 4)
|
||||
#define PP32_BRK_COMPARE_GREATER_EQUAL (1 << 5) // valid for break data value rd/wr only
|
||||
#define PP32_BRK_COMPARE_LOWER_EQUAL (1 << 6)
|
||||
#define PP32_BRK_COMPARE_EN (1 << 7)
|
||||
|
||||
#define PP32_BRK_TRIG(n) PP32_DEBUG_REG_ADDR(n, 0x0F00)
|
||||
#define PP32_BRK_GRPi_PCn_ON(i, n) ((3 << ((n) * 2)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_PCn_OFF(i, n) ((2 << ((n) * 2)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n) ((3 << ((n) * 2 + 4)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n) ((2 << ((n) * 2 + 4)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16))
|
||||
#define PP32_BRK_GRPi_PCn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_ADDRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8)))
|
||||
#define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8)))
|
||||
|
||||
#define PP32_CPU_STATUS(n) PP32_DEBUG_REG_ADDR(n, 0x0D00)
|
||||
#define PP32_HALT_STAT(n) PP32_CPU_STATUS(n)
|
||||
#define PP32_DBG_CUR_PC(n) PP32_CPU_STATUS(n)
|
||||
#define PP32_CPU_USER_STOPPED(n) (*PP32_CPU_STATUS(n) & (1 << 0))
|
||||
#define PP32_CPU_USER_BREAKIN_RCV(n) (*PP32_CPU_STATUS(n) & (1 << 1))
|
||||
#define PP32_CPU_USER_BREAKPOINT_MET(n) (*PP32_CPU_STATUS(n) & (1 << 2))
|
||||
#define PP32_CPU_CUR_PC(n) (*PP32_CPU_STATUS(n) >> 16)
|
||||
|
||||
#define PP32_BREAKPOINT_REASONS(n) PP32_DEBUG_REG_ADDR(n, 0x0A00)
|
||||
#define PP32_BRK_PC_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << (i)))
|
||||
#define PP32_BRK_DATA_ADDR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8)))
|
||||
#define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12)))
|
||||
#define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13)))
|
||||
#define PP32_BRK_CUR_CONTEXT(n) ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03)
|
||||
|
||||
#define PP32_GP_REG_BASE(n) PP32_DEBUG_REG_ADDR(n, 0x0E00)
|
||||
#define PP32_GP_CONTEXTi_REGn(n, i, j) PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j))
|
||||
|
||||
/*
|
||||
* PDMA/EMA Registers
|
||||
*/
|
||||
#define PDMA_CFG PPE_REG_ADDR(0x0A00)
|
||||
#define PDMA_RX_CMDCNT PPE_REG_ADDR(0x0A01)
|
||||
#define PDMA_TX_CMDCNT PPE_REG_ADDR(0x0A02)
|
||||
#define PDMA_RX_FWDATACNT PPE_REG_ADDR(0x0A03)
|
||||
#define PDMA_TX_FWDATACNT PPE_REG_ADDR(0x0A04)
|
||||
#define PDMA_RX_CTX_CFG PPE_REG_ADDR(0x0A05)
|
||||
#define PDMA_TX_CTX_CFG PPE_REG_ADDR(0x0A06)
|
||||
#define PDMA_RX_MAX_LEN_REG PPE_REG_ADDR(0x0A07)
|
||||
#define PDMA_RX_DELAY_CFG PPE_REG_ADDR(0x0A08)
|
||||
#define PDMA_INT_FIFO_RD PPE_REG_ADDR(0x0A09)
|
||||
#define PDMA_ISR PPE_REG_ADDR(0x0A0A)
|
||||
#define PDMA_IER PPE_REG_ADDR(0x0A0B)
|
||||
#define PDMA_SUBID PPE_REG_ADDR(0x0A0C)
|
||||
#define PDMA_BAR0 PPE_REG_ADDR(0x0A0D)
|
||||
#define PDMA_BAR1 PPE_REG_ADDR(0x0A0E)
|
||||
|
||||
#define SAR_PDMA_RX_CMDBUF_CFG PPE_REG_ADDR(0x0F00)
|
||||
#define SAR_PDMA_TX_CMDBUF_CFG PPE_REG_ADDR(0x0F01)
|
||||
#define SAR_PDMA_RX_FW_CMDBUF_CFG PPE_REG_ADDR(0x0F02)
|
||||
#define SAR_PDMA_TX_FW_CMDBUF_CFG PPE_REG_ADDR(0x0F03)
|
||||
#define SAR_PDMA_RX_CMDBUF_STATUS PPE_REG_ADDR(0x0F04)
|
||||
#define SAR_PDMA_TX_CMDBUF_STATUS PPE_REG_ADDR(0x0F05)
|
||||
|
||||
#define PDMA_ALIGNMENT 4
|
||||
#define EMA_ALIGNMENT PDMA_ALIGNMENT
|
||||
|
||||
|
||||
|
||||
#endif // IFXMIPS_ATM_PPE_VR9_H
|
||||
215
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_vr9.c
Normal file
215
package/kernel/lantiq/ltq-atm/src/ifxmips_atm_vr9.c
Normal file
@@ -0,0 +1,215 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_atm_vr9.c
|
||||
** PROJECT : UEIP
|
||||
** MODULES : ATM
|
||||
**
|
||||
** DATE : 7 Jul 2009
|
||||
** AUTHOR : Xu Liang
|
||||
** DESCRIPTION : ATM driver common source file (core functions)
|
||||
** COPYRIGHT : Copyright (c) 2006
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 07 JUL 2009 Xu Liang Init Version
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ####################################
|
||||
* Head File
|
||||
* ####################################
|
||||
*/
|
||||
|
||||
/*
|
||||
* Common Head File
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/reset.h>
|
||||
#include <asm/delay.h>
|
||||
|
||||
#include "ifxmips_atm_core.h"
|
||||
#include "ifxmips_atm_fw_vr9.h"
|
||||
|
||||
#ifdef CONFIG_VR9
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
||||
#define IFX_PMU_MODULE_PPE_SLL01 BIT(19)
|
||||
#define IFX_PMU_MODULE_PPE_TC BIT(21)
|
||||
#define IFX_PMU_MODULE_PPE_EMA BIT(22)
|
||||
#define IFX_PMU_MODULE_PPE_QSB BIT(18)
|
||||
#define IFX_PMU_MODULE_AHBS BIT(13)
|
||||
#define IFX_PMU_MODULE_DSL_DFE BIT(9)
|
||||
|
||||
static inline void vr9_reset_ppe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct reset_control *dsp;
|
||||
struct reset_control *dfe;
|
||||
struct reset_control *tc;
|
||||
|
||||
dsp = devm_reset_control_get(dev, "dsp");
|
||||
if (IS_ERR(dsp)) {
|
||||
if (PTR_ERR(dsp) != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to lookup dsp reset\n");
|
||||
// return PTR_ERR(dsp);
|
||||
}
|
||||
|
||||
dfe = devm_reset_control_get(dev, "dfe");
|
||||
if (IS_ERR(dfe)) {
|
||||
if (PTR_ERR(dfe) != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to lookup dfe reset\n");
|
||||
// return PTR_ERR(dfe);
|
||||
}
|
||||
|
||||
tc = devm_reset_control_get(dev, "tc");
|
||||
if (IS_ERR(tc)) {
|
||||
if (PTR_ERR(tc) != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to lookup tc reset\n");
|
||||
// return PTR_ERR(tc);
|
||||
}
|
||||
|
||||
reset_control_assert(dsp);
|
||||
udelay(1000);
|
||||
reset_control_assert(dfe);
|
||||
udelay(1000);
|
||||
reset_control_assert(tc);
|
||||
udelay(1000);
|
||||
*PP32_SRST &= ~0x000303CF;
|
||||
udelay(1000);
|
||||
*PP32_SRST |= 0x000303CF;
|
||||
udelay(1000);
|
||||
}
|
||||
|
||||
static inline int vr9_pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
|
||||
{
|
||||
unsigned int clr, set;
|
||||
volatile u32 *dest;
|
||||
|
||||
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|
||||
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
|
||||
return -1;
|
||||
|
||||
clr = pp32 ? 0xF0 : 0x0F;
|
||||
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
|
||||
set = pp32 ? (3 << 6): (2 << 2);
|
||||
else
|
||||
set = 0x00;
|
||||
IFX_REG_W32_MASK(clr, set, CDM_CFG);
|
||||
|
||||
dest = CDM_CODE_MEMORY(pp32, 0);
|
||||
while ( code_dword_len-- > 0 )
|
||||
IFX_REG_W32(*code_src++, dest++);
|
||||
|
||||
dest = CDM_DATA_MEMORY(pp32, 0);
|
||||
while ( data_dword_len-- > 0 )
|
||||
IFX_REG_W32(*data_src++, dest++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void vr9_fw_ver(unsigned int *major, unsigned int *minor)
|
||||
{
|
||||
|
||||
*major = FW_VER_ID->major;
|
||||
*minor = FW_VER_ID->minor;
|
||||
}
|
||||
|
||||
static void vr9_init(struct platform_device *pdev)
|
||||
{
|
||||
volatile u32 *p;
|
||||
unsigned int i;
|
||||
|
||||
/* setup pmu */
|
||||
ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
|
||||
IFX_PMU_MODULE_PPE_TC |
|
||||
IFX_PMU_MODULE_PPE_EMA |
|
||||
IFX_PMU_MODULE_PPE_QSB |
|
||||
IFX_PMU_MODULE_AHBS |
|
||||
IFX_PMU_MODULE_DSL_DFE);
|
||||
|
||||
vr9_reset_ppe(pdev);
|
||||
|
||||
/* pdma init */
|
||||
IFX_REG_W32(0x08, PDMA_CFG);
|
||||
IFX_REG_W32(0x00203580, SAR_PDMA_RX_CMDBUF_CFG);
|
||||
IFX_REG_W32(0x004035A0, SAR_PDMA_RX_FW_CMDBUF_CFG);
|
||||
|
||||
/* mailbox init */
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
|
||||
IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
|
||||
IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
|
||||
|
||||
/* tc init - clear sync state */
|
||||
*SFSM_STATE0 = 0;
|
||||
*SFSM_STATE1 = 0;
|
||||
|
||||
/* init shared buffer */
|
||||
p = SB_RAM0_ADDR(0);
|
||||
for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
|
||||
IFX_REG_W32(0, p++);
|
||||
|
||||
p = SB_RAM6_ADDR(0);
|
||||
for ( i = 0; i < SB_RAM6_DWLEN; i++ )
|
||||
IFX_REG_W32(0, p++);
|
||||
}
|
||||
|
||||
static void vr9_shutdown(void)
|
||||
{
|
||||
}
|
||||
|
||||
static int vr9_start(int pp32)
|
||||
{
|
||||
unsigned int mask = 1 << (pp32 << 4);
|
||||
int ret;
|
||||
|
||||
/* download firmware */
|
||||
ret = vr9_pp32_download_code(pp32,
|
||||
vr9_fw_bin, sizeof(vr9_fw_bin) / sizeof(*vr9_fw_bin),
|
||||
vr9_fw_data, sizeof(vr9_fw_data) / sizeof(*vr9_fw_data));
|
||||
if ( ret != 0 )
|
||||
return ret;
|
||||
|
||||
/* run PP32 */
|
||||
IFX_REG_W32_MASK(mask, 0, PP32_FREEZE);
|
||||
|
||||
/* idle for a while to let PP32 init itself */
|
||||
udelay(10);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void vr9_stop(int pp32)
|
||||
{
|
||||
unsigned int mask = 1 << (pp32 << 4);
|
||||
|
||||
IFX_REG_W32_MASK(0, mask, PP32_FREEZE);
|
||||
}
|
||||
|
||||
struct ltq_atm_ops vr9_ops = {
|
||||
.init = vr9_init,
|
||||
.shutdown = vr9_shutdown,
|
||||
.start = vr9_start,
|
||||
.stop = vr9_stop,
|
||||
.fw_ver = vr9_fw_ver,
|
||||
};
|
||||
|
||||
#endif
|
||||
1901
package/kernel/lantiq/ltq-atm/src/ltq_atm.c
Normal file
1901
package/kernel/lantiq/ltq-atm/src/ltq_atm.c
Normal file
File diff suppressed because it is too large
Load Diff
44
package/kernel/lantiq/ltq-deu/Makefile
Normal file
44
package/kernel/lantiq/ltq-deu/Makefile
Normal file
@@ -0,0 +1,44 @@
|
||||
# Copyright (C) 2012 OpenWrt.org
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/kernel.mk
|
||||
|
||||
PKG_NAME:=ltq-deu
|
||||
PKG_RELEASE:=45
|
||||
|
||||
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
|
||||
PKG_LICENSE:=GPL-2.0+
|
||||
|
||||
include $(INCLUDE_DIR)/package.mk
|
||||
|
||||
define KernelPackage/ltq-deu-template
|
||||
SECTION:=sys
|
||||
CATEGORY:=Kernel modules
|
||||
SUBMENU:=Cryptographic API modules
|
||||
TITLE:=deu driver for $(1)
|
||||
URL:=http://www.lantiq.com/
|
||||
VARIANT:=$(1)
|
||||
DEPENDS:=@TARGET_lantiq_$(2) +kmod-crypto-manager +kmod-crypto-des
|
||||
FILES:=$(PKG_BUILD_DIR)/ltq_deu_$(1).ko
|
||||
AUTOLOAD:=$(call AutoProbe,ltq_deu_$(1))
|
||||
endef
|
||||
|
||||
KernelPackage/ltq-deu-danube=$(call KernelPackage/ltq-deu-template,danube,xway)
|
||||
KernelPackage/ltq-deu-ar9=$(call KernelPackage/ltq-deu-template,ar9,xway)
|
||||
KernelPackage/ltq-deu-vr9=$(call KernelPackage/ltq-deu-template,vr9,xrx200)
|
||||
|
||||
define Build/Configure
|
||||
endef
|
||||
|
||||
define Build/Compile
|
||||
cd $(LINUX_DIR); \
|
||||
ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \
|
||||
$(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR) V=1 modules
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ltq-deu-danube))
|
||||
$(eval $(call KernelPackage,ltq-deu-ar9))
|
||||
$(eval $(call KernelPackage,ltq-deu-vr9))
|
||||
24
package/kernel/lantiq/ltq-deu/src/Makefile
Normal file
24
package/kernel/lantiq/ltq-deu/src/Makefile
Normal file
@@ -0,0 +1,24 @@
|
||||
ifeq ($(BUILD_VARIANT),danube)
|
||||
CFLAGS_MODULE =-DCONFIG_DANUBE -DCONFIG_CRYPTO_DEV_DEU -DCONFIG_CRYPTO_DEV_SPEED_TEST -DCONFIG_CRYPTO_DEV_DES \
|
||||
-DCONFIG_CRYPTO_DEV_AES -DCONFIG_CRYPTO_DEV_SHA1 -DCONFIG_CRYPTO_DEV_MD5
|
||||
obj-m = ltq_deu_danube.o
|
||||
ltq_deu_danube-objs = ifxmips_deu.o ifxmips_deu_danube.o ifxmips_des.o ifxmips_aes.o ifxmips_sha1.o ifxmips_md5.o
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),ar9)
|
||||
CFLAGS_MODULE = -DCONFIG_AR9 -DCONFIG_CRYPTO_DEV_DEU -DCONFIG_CRYPTO_DEV_SPEED_TEST -DCONFIG_CRYPTO_DEV_DES \
|
||||
-DCONFIG_CRYPTO_DEV_AES -DCONFIG_CRYPTO_DEV_SHA1 -DCONFIG_CRYPTO_DEV_MD5 \
|
||||
-DCONFIG_CRYPTO_DEV_SHA1_HMAC -DCONFIG_CRYPTO_DEV_MD5_HMAC
|
||||
obj-m = ltq_deu_ar9.o
|
||||
ltq_deu_ar9-objs = ifxmips_deu.o ifxmips_deu_ar9.o ifxmips_des.o ifxmips_aes.o \
|
||||
ifxmips_sha1.o ifxmips_md5.o ifxmips_sha1_hmac.o ifxmips_md5_hmac.o
|
||||
endif
|
||||
|
||||
ifeq ($(BUILD_VARIANT),vr9)
|
||||
CFLAGS_MODULE = -DCONFIG_VR9 -DCONFIG_CRYPTO_DEV_DEU -DCONFIG_CRYPTO_DEV_SPEED_TEST -DCONFIG_CRYPTO_DEV_DES \
|
||||
-DCONFIG_CRYPTO_DEV_AES -DCONFIG_CRYPTO_DEV_SHA1 -DCONFIG_CRYPTO_DEV_MD5 \
|
||||
-DCONFIG_CRYPTO_DEV_SHA1_HMAC -DCONFIG_CRYPTO_DEV_MD5_HMAC
|
||||
obj-m = ltq_deu_vr9.o
|
||||
ltq_deu_vr9-objs = ifxmips_deu.o ifxmips_deu_vr9.o ifxmips_des.o ifxmips_aes.o \
|
||||
ifxmips_sha1.o ifxmips_md5.o ifxmips_sha1_hmac.o ifxmips_md5_hmac.o
|
||||
endif
|
||||
1979
package/kernel/lantiq/ltq-deu/src/ifxmips_aes.c
Normal file
1979
package/kernel/lantiq/ltq-deu/src/ifxmips_aes.c
Normal file
File diff suppressed because it is too large
Load Diff
387
package/kernel/lantiq/ltq-deu/src/ifxmips_arc4.c
Normal file
387
package/kernel/lantiq/ltq-deu/src/ifxmips_arc4.c
Normal file
@@ -0,0 +1,387 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_arc4.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver for ARC4 Algorithm
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08 Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_arc4.c
|
||||
\ingroup IFX_DEU
|
||||
\brief ARC4 encryption DEU driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_ARC4_FUNCTIONS IFX_ARC4_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief IFX deu driver functions
|
||||
*/
|
||||
|
||||
/* Project header */
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <crypto/internal/skcipher.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
/* Board specific header files */
|
||||
#ifdef CONFIG_AR9
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#endif
|
||||
#ifdef CONFIG_VR9
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#endif
|
||||
|
||||
static spinlock_t lock;
|
||||
#define CRTCL_SECT_INIT spin_lock_init(&lock)
|
||||
#define CRTCL_SECT_START spin_lock_irqsave(&lock, flag)
|
||||
#define CRTCL_SECT_END spin_unlock_irqrestore(&lock, flag)
|
||||
|
||||
/* Preprocessor declerations */
|
||||
#define ARC4_MIN_KEY_SIZE 1
|
||||
//#define ARC4_MAX_KEY_SIZE 256
|
||||
#define ARC4_MAX_KEY_SIZE 16
|
||||
#define ARC4_BLOCK_SIZE 1
|
||||
#define ARC4_START IFX_ARC4_CON
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* \brief arc4 private structure
|
||||
*/
|
||||
struct arc4_ctx {
|
||||
int key_length;
|
||||
u8 buf[120];
|
||||
};
|
||||
|
||||
extern int disable_deudma;
|
||||
extern int disable_multiblock;
|
||||
|
||||
/*! \fn static void _deu_arc4 (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief main interface to ARC4 hardware
|
||||
\param ctx_arg crypto algo context
|
||||
\param out_arg output bytestream
|
||||
\param in_arg input bytestream
|
||||
\param iv_arg initialization vector
|
||||
\param nbytes length of bytestream
|
||||
\param encdec 1 for encrypt; 0 for decrypt
|
||||
\param mode operation mode such as ebc, cbc, ctr
|
||||
*/
|
||||
static void _deu_arc4 (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
|
||||
u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
{
|
||||
volatile struct arc4_t *arc4 = (struct arc4_t *) ARC4_START;
|
||||
|
||||
int i = 0;
|
||||
unsigned long flag;
|
||||
|
||||
#if 1 // need to handle nbytes not multiple of 16
|
||||
volatile u32 tmp_array32[4];
|
||||
volatile u8 *tmp_ptr8;
|
||||
int remaining_bytes, j;
|
||||
#endif
|
||||
|
||||
CRTCL_SECT_START;
|
||||
|
||||
arc4->IDLEN = nbytes;
|
||||
|
||||
#if 1
|
||||
while (i < nbytes) {
|
||||
arc4->ID3R = *((u32 *) in_arg + (i>>2) + 0);
|
||||
arc4->ID2R = *((u32 *) in_arg + (i>>2) + 1);
|
||||
arc4->ID1R = *((u32 *) in_arg + (i>>2) + 2);
|
||||
arc4->ID0R = *((u32 *) in_arg + (i>>2) + 3);
|
||||
|
||||
arc4->controlr.GO = 1;
|
||||
|
||||
while (arc4->controlr.BUS) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
#if 1
|
||||
// need to handle nbytes not multiple of 16
|
||||
tmp_array32[0] = arc4->OD3R;
|
||||
tmp_array32[1] = arc4->OD2R;
|
||||
tmp_array32[2] = arc4->OD1R;
|
||||
tmp_array32[3] = arc4->OD0R;
|
||||
|
||||
remaining_bytes = nbytes - i;
|
||||
if (remaining_bytes > 16)
|
||||
remaining_bytes = 16;
|
||||
|
||||
tmp_ptr8 = (u8 *)&tmp_array32[0];
|
||||
for (j = 0; j < remaining_bytes; j++)
|
||||
*out_arg++ = *tmp_ptr8++;
|
||||
#else
|
||||
*((u32 *) out_arg + (i>>2) + 0) = arc4->OD3R;
|
||||
*((u32 *) out_arg + (i>>2) + 1) = arc4->OD2R;
|
||||
*((u32 *) out_arg + (i>>2) + 2) = arc4->OD1R;
|
||||
*((u32 *) out_arg + (i>>2) + 3) = arc4->OD0R;
|
||||
#endif
|
||||
|
||||
i += 16;
|
||||
}
|
||||
#else // dma
|
||||
|
||||
#endif // dma
|
||||
|
||||
CRTCL_SECT_END;
|
||||
}
|
||||
|
||||
/*! \fn arc4_chip_init (void)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief initialize arc4 hardware
|
||||
*/
|
||||
static void arc4_chip_init (void)
|
||||
{
|
||||
//do nothing
|
||||
}
|
||||
|
||||
/*! \fn static int arc4_set_key(struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief sets ARC4 key
|
||||
\param tfm linux crypto algo transform
|
||||
\param in_key input key
|
||||
\param key_len key lengths less than or equal to 16 bytes supported
|
||||
*/
|
||||
static int arc4_set_key(struct crypto_tfm *tfm, const u8 *inkey,
|
||||
unsigned int key_len)
|
||||
{
|
||||
//struct arc4_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
volatile struct arc4_t *arc4 = (struct arc4_t *) ARC4_START;
|
||||
u32 *in_key = (u32 *)inkey;
|
||||
|
||||
// must program all bits at one go?!!!
|
||||
//#if 1
|
||||
*IFX_ARC4_CON = ( (1<<31) | ((key_len - 1)<<27) | (1<<26) | (3<<16) );
|
||||
//NDC=1,ENDI=1,GO=0,KSAE=1,SM=0
|
||||
|
||||
arc4->K3R = *((u32 *) in_key + 0);
|
||||
arc4->K2R = *((u32 *) in_key + 1);
|
||||
arc4->K1R = *((u32 *) in_key + 2);
|
||||
arc4->K0R = *((u32 *) in_key + 3);
|
||||
|
||||
#if 0 // arc4 is a ugly state machine, KSAE can only be set once per session
|
||||
ctx->key_length = key_len;
|
||||
|
||||
memcpy ((u8 *) (ctx->buf), in_key, key_len);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static int arc4_set_key_skcipher(struct crypto_skcipher *tfm, const u8 *in_key, unsigned int key_len)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief sets ARC4 key
|
||||
\param tfm linux crypto skcipher
|
||||
\param in_key input key
|
||||
\param key_len key lengths less than or equal to 16 bytes supported
|
||||
*/
|
||||
static int arc4_set_key_skcipher(struct crypto_skcipher *tfm, const u8 *inkey,
|
||||
unsigned int key_len)
|
||||
{
|
||||
return arc4_set_key(crypto_skcipher_ctx(tfm), inkey, key_len);
|
||||
}
|
||||
|
||||
/*! \fn static void _deu_arc4_ecb(void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief sets ARC4 hardware to ECB mode
|
||||
\param ctx crypto algo context
|
||||
\param dst output bytestream
|
||||
\param src input bytestream
|
||||
\param iv initialization vector
|
||||
\param nbytes length of bytestream
|
||||
\param encdec 1 for encrypt; 0 for decrypt
|
||||
\param inplace not used
|
||||
*/
|
||||
static void _deu_arc4_ecb(void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
_deu_arc4 (ctx, dst, src, NULL, nbytes, encdec, 0);
|
||||
}
|
||||
|
||||
/*! \fn static void arc4_crypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief encrypt/decrypt ARC4_BLOCK_SIZE of data
|
||||
\param tfm linux crypto algo transform
|
||||
\param out output bytestream
|
||||
\param in input bytestream
|
||||
*/
|
||||
static void arc4_crypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
{
|
||||
struct arc4_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
_deu_arc4 (ctx, out, in, NULL, ARC4_BLOCK_SIZE,
|
||||
CRYPTO_DIR_DECRYPT, 0);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief ARC4 function mappings
|
||||
*/
|
||||
static struct crypto_alg ifxdeu_arc4_alg = {
|
||||
.cra_name = "arc4",
|
||||
.cra_driver_name = "ifxdeu-arc4",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = ARC4_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct arc4_ctx),
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_list = LIST_HEAD_INIT(ifxdeu_arc4_alg.cra_list),
|
||||
.cra_u = {
|
||||
.cipher = {
|
||||
.cia_min_keysize = ARC4_MIN_KEY_SIZE,
|
||||
.cia_max_keysize = ARC4_MAX_KEY_SIZE,
|
||||
.cia_setkey = arc4_set_key,
|
||||
.cia_encrypt = arc4_crypt,
|
||||
.cia_decrypt = arc4_crypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
/*! \fn static int ecb_arc4_encrypt(struct skcipher_request *req)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief ECB ARC4 encrypt using linux crypto skcipher
|
||||
\param req skcipher_request
|
||||
*/
|
||||
static int ecb_arc4_encrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct arc4_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
unsigned int nbytes;
|
||||
int err;
|
||||
|
||||
DPRINTF(1, "\n");
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = walk.nbytes)) {
|
||||
_deu_arc4_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
NULL, nbytes, CRYPTO_DIR_ENCRYPT, 0);
|
||||
nbytes &= ARC4_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*! \fn static int ecb_arc4_decrypt(struct skcipher_request *req)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief ECB ARC4 decrypt using linux crypto skcipher
|
||||
\param desc skcipher_request
|
||||
*/
|
||||
static int ecb_arc4_decrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct arc4_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
unsigned int nbytes;
|
||||
int err;
|
||||
|
||||
DPRINTF(1, "\n");
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = walk.nbytes)) {
|
||||
_deu_arc4_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
NULL, nbytes, CRYPTO_DIR_DECRYPT, 0);
|
||||
nbytes &= ARC4_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief ARC4 function mappings
|
||||
*/
|
||||
static struct skcipher_alg ifxdeu_ecb_arc4_alg = {
|
||||
.base.cra_name = "ecb(arc4)",
|
||||
.base.cra_driver_name = "ifxdeu-ecb(arc4)",
|
||||
.base.cra_priority = 400,
|
||||
.base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.base.cra_blocksize = ARC4_BLOCK_SIZE,
|
||||
.base.cra_ctxsize = sizeof(struct arc4_ctx),
|
||||
.base.cra_module = THIS_MODULE,
|
||||
.base.cra_list = LIST_HEAD_INIT(ifxdeu_ecb_arc4_alg.base.cra_list),
|
||||
.min_keysize = ARC4_MIN_KEY_SIZE,
|
||||
.max_keysize = ARC4_MAX_KEY_SIZE,
|
||||
.setkey = arc4_set_key_skcipher,
|
||||
.encrypt = ecb_arc4_encrypt,
|
||||
.decrypt = ecb_arc4_decrypt,
|
||||
};
|
||||
|
||||
/*! \fn int ifxdeu_init_arc4(void)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief initialize arc4 driver
|
||||
*/
|
||||
int ifxdeu_init_arc4(void)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
if ((ret = crypto_register_alg(&ifxdeu_arc4_alg)))
|
||||
goto arc4_err;
|
||||
|
||||
if ((ret = crypto_register_skcipher(&ifxdeu_ecb_arc4_alg)))
|
||||
goto ecb_arc4_err;
|
||||
|
||||
arc4_chip_init ();
|
||||
|
||||
CRTCL_SECT_INIT;
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU ARC4 initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
arc4_err:
|
||||
crypto_unregister_alg(&ifxdeu_arc4_alg);
|
||||
printk(KERN_ERR "IFX arc4 initialization failed!\n");
|
||||
return ret;
|
||||
ecb_arc4_err:
|
||||
crypto_unregister_skcipher(&ifxdeu_ecb_arc4_alg);
|
||||
printk (KERN_ERR "IFX ecb_arc4 initialization failed!\n");
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void ifxdeu_fini_arc4(void)
|
||||
\ingroup IFX_ARC4_FUNCTIONS
|
||||
\brief unregister arc4 driver
|
||||
*/
|
||||
void ifxdeu_fini_arc4(void)
|
||||
{
|
||||
crypto_unregister_alg (&ifxdeu_arc4_alg);
|
||||
crypto_unregister_skcipher (&ifxdeu_ecb_arc4_alg);
|
||||
|
||||
|
||||
}
|
||||
1133
package/kernel/lantiq/ltq-deu/src/ifxmips_async_aes.c
Normal file
1133
package/kernel/lantiq/ltq-deu/src/ifxmips_async_aes.c
Normal file
File diff suppressed because it is too large
Load Diff
940
package/kernel/lantiq/ltq-deu/src/ifxmips_async_des.c
Normal file
940
package/kernel/lantiq/ltq-deu/src/ifxmips_async_des.c
Normal file
@@ -0,0 +1,940 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_async_des.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module
|
||||
**
|
||||
** DATE : October 11, 2010
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver for DES Algorithm
|
||||
** COPYRIGHT : Copyright (c) 2010
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
** 11, Oct 2010 Mohammad Firdaus Kernel Port incl. Async. Ablkcipher mode
|
||||
** 21,March 2011 Mohammad Firdaus Changes for Kernel 2.6.32 and IPSec integration
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx DEU driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_async_des.c
|
||||
\ingroup IFX_DEU
|
||||
\brief DES Encryption Driver main file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DES_FUNCTIONS IFX_DES_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief IFX DES driver Functions
|
||||
*/
|
||||
|
||||
#include <linux/wait.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/list.h>
|
||||
#include <crypto/ctr.h>
|
||||
#include <crypto/aes.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <crypto/scatterwalk.h>
|
||||
|
||||
#include <asm/ifx/ifx_regs.h>
|
||||
#include <asm/ifx/ifx_types.h>
|
||||
#include <asm/ifx/common_routines.h>
|
||||
#include <asm/ifx/irq.h>
|
||||
#include <asm/ifx/ifx_pmu.h>
|
||||
#include <asm/ifx/ifx_gpio.h>
|
||||
#include <asm/kmap_types.h>
|
||||
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_deu_danube.h"
|
||||
extern int ifx_danube_pre_1_4;
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Unkown platform"
|
||||
#endif
|
||||
|
||||
/* DMA specific header and variables */
|
||||
|
||||
spinlock_t des_lock;
|
||||
#define CRTCL_SECT_INIT spin_lock_init(&des_lock)
|
||||
#define CRTCL_SECT_START spin_lock_irqsave(&des_lock, flag)
|
||||
#define CRTCL_SECT_END spin_unlock_irqrestore(&des_lock, flag)
|
||||
|
||||
/* Preprocessor declerations */
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
//#define DES_3DES_START IFX_DES_CON
|
||||
#define DES_KEY_SIZE 8
|
||||
#define DES_EXPKEY_WORDS 32
|
||||
#define DES_BLOCK_SIZE 8
|
||||
#define DES3_EDE_KEY_SIZE (3 * DES_KEY_SIZE)
|
||||
#define DES3_EDE_EXPKEY_WORDS (3 * DES_EXPKEY_WORDS)
|
||||
#define DES3_EDE_BLOCK_SIZE DES_BLOCK_SIZE
|
||||
|
||||
/* Function Declaration to prevent warning messages */
|
||||
void des_chip_init (void);
|
||||
u32 endian_swap(u32 input);
|
||||
u32 input_swap(u32 input);
|
||||
int aes_memory_allocate(int value);
|
||||
int des_memory_allocate(int value);
|
||||
void memory_release(u32 *buffer);
|
||||
u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
|
||||
void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
|
||||
static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
|
||||
u8 *iv_arg, u32 nbytes, int encdec, int mode);
|
||||
|
||||
struct des_ctx {
|
||||
int controlr_M;
|
||||
int key_length;
|
||||
u8 iv[DES_BLOCK_SIZE];
|
||||
u32 expkey[DES3_EDE_EXPKEY_WORDS];
|
||||
};
|
||||
|
||||
|
||||
static int disable_multiblock = 0;
|
||||
module_param(disable_multiblock, int, 0);
|
||||
|
||||
static int disable_deudma = 1;
|
||||
|
||||
struct des_container {
|
||||
u8 *iv;
|
||||
u8 *dst_buf;
|
||||
u8 *src_buf;
|
||||
int mode;
|
||||
int encdec;
|
||||
int complete;
|
||||
int flag;
|
||||
|
||||
u32 bytes_processed;
|
||||
u32 nbytes;
|
||||
|
||||
struct ablkcipher_request arequest;
|
||||
};
|
||||
|
||||
des_priv_t *des_queue;
|
||||
extern deu_drv_priv_t deu_dma_priv;
|
||||
|
||||
void hexdump1(unsigned char *buf, unsigned int len)
|
||||
{
|
||||
print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
|
||||
16, 1,
|
||||
buf, len, false);
|
||||
}
|
||||
|
||||
|
||||
/*! \fn int lq_des_setkey(struct crypto_ablkcipher *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length
|
||||
*/
|
||||
static int lq_des_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
struct des_ctx *dctx = crypto_ablkcipher_ctx(tfm);
|
||||
|
||||
//printk("setkey in %s\n", __FILE__);
|
||||
|
||||
dctx->controlr_M = 0; // des
|
||||
dctx->key_length = keylen;
|
||||
|
||||
memcpy ((u8 *) (dctx->expkey), key, keylen);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn int lq_des3_ede_setkey(struct crypto_ablkcipher *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length
|
||||
*/
|
||||
|
||||
static int lq_des3_ede_setkey(struct crypto_ablkcipher *tfm, const u8 *in_key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
struct des_ctx *dctx = crypto_ablkcipher_ctx(tfm);
|
||||
|
||||
//printk("setkey in %s\n", __FILE__);
|
||||
|
||||
dctx->controlr_M = keylen/8 + 1; // des
|
||||
dctx->key_length = keylen;
|
||||
|
||||
memcpy ((u8 *) (dctx->expkey), in_key, keylen);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_core(void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief main interface to DES hardware
|
||||
* \param ctx_arg crypto algo context
|
||||
* \param out_arg output bytestream
|
||||
* \param in_arg input bytestream
|
||||
* \param iv_arg initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param mode operation mode such as ebc, cbc
|
||||
*/
|
||||
|
||||
static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
|
||||
u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
{
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START;
|
||||
struct des_ctx *dctx = ctx_arg;
|
||||
u32 *key = dctx->expkey;
|
||||
unsigned long flag;
|
||||
|
||||
int i = 0;
|
||||
int nblocks = 0;
|
||||
|
||||
CRTCL_SECT_START;
|
||||
|
||||
des->controlr.M = dctx->controlr_M;
|
||||
if (dctx->controlr_M == 0) // des
|
||||
{
|
||||
des->K1HR = DEU_ENDIAN_SWAP(*((u32 *) key + 0));
|
||||
des->K1LR = DEU_ENDIAN_SWAP(*((u32 *) key + 1));
|
||||
|
||||
}
|
||||
else {
|
||||
/* Hardware Section */
|
||||
switch (dctx->key_length) {
|
||||
case 24:
|
||||
des->K3HR = DEU_ENDIAN_SWAP(*((u32 *) key + 4));
|
||||
des->K3LR = DEU_ENDIAN_SWAP(*((u32 *) key + 5));
|
||||
/* no break; */
|
||||
|
||||
case 16:
|
||||
des->K2HR = DEU_ENDIAN_SWAP(*((u32 *) key + 2));
|
||||
des->K2LR = DEU_ENDIAN_SWAP(*((u32 *) key + 3));
|
||||
|
||||
/* no break; */
|
||||
case 8:
|
||||
des->K1HR = DEU_ENDIAN_SWAP(*((u32 *) key + 0));
|
||||
des->K1LR = DEU_ENDIAN_SWAP(*((u32 *) key + 1));
|
||||
break;
|
||||
|
||||
default:
|
||||
CRTCL_SECT_END;
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
des->controlr.E_D = !encdec; //encryption
|
||||
des->controlr.O = mode; //0 ECB 1 CBC 2 OFB 3 CFB 4 CTR hexdump(prin,sizeof(*des));
|
||||
|
||||
if (mode > 0) {
|
||||
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
|
||||
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
|
||||
};
|
||||
|
||||
/* memory alignment issue */
|
||||
dword_mem_aligned_in = (u32 *) DEU_DWORD_REORDERING(in_arg, des_buff_in, BUFFER_IN, nbytes);
|
||||
|
||||
deu_priv->deu_rx_buf = (u32 *) out_arg;
|
||||
deu_priv->deu_rx_len = nbytes;
|
||||
|
||||
dma->controlr.ALGO = 0; //DES
|
||||
des->controlr.DAU = 0;
|
||||
dma->controlr.BS = 0;
|
||||
dma->controlr.EN = 1;
|
||||
|
||||
while (des->controlr.BUS) {
|
||||
};
|
||||
|
||||
wlen = dma_device_write (dma_device, (u8 *) dword_mem_aligned_in, nbytes, NULL);
|
||||
if (wlen != nbytes) {
|
||||
dma->controlr.EN = 0;
|
||||
CRTCL_SECT_END;
|
||||
printk (KERN_ERR "[%s %s %d]: dma_device_write fail!\n", __FILE__, __func__, __LINE__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
||||
/* Prepare Rx buf length used in dma psuedo interrupt */
|
||||
outcopy = (u32 *) DEU_DWORD_REORDERING(out_arg, des_buff_out, BUFFER_OUT, nbytes);
|
||||
deu_priv->outcopy = outcopy;
|
||||
deu_priv->event_src = DES_ASYNC_EVENT;
|
||||
|
||||
if (mode > 0) {
|
||||
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
|
||||
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
|
||||
};
|
||||
|
||||
CRTCL_SECT_END;
|
||||
|
||||
return -EINPROGRESS;
|
||||
|
||||
}
|
||||
|
||||
static int count_sgs(struct scatterlist *sl, unsigned int total_bytes)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
do {
|
||||
total_bytes -= sl[i].length;
|
||||
i++;
|
||||
|
||||
} while (total_bytes > 0);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/* \fn static inline struct des_container *des_container_cast (
|
||||
* struct scatterlist *dst)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Locate the structure des_container in memory.
|
||||
* \param *areq Pointer to memory location where ablkcipher_request is located
|
||||
* \return *des_cointainer The function pointer to des_container
|
||||
*/
|
||||
|
||||
static inline struct des_container *des_container_cast(
|
||||
struct ablkcipher_request *areq)
|
||||
{
|
||||
return container_of(areq, struct des_container, arequest);
|
||||
}
|
||||
|
||||
/* \fn static void lq_sg_complete(struct des_container *des_con)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Free the used up memory after encryt/decrypt.
|
||||
*/
|
||||
|
||||
static void lq_sg_complete(struct des_container *des_con)
|
||||
{
|
||||
unsigned long queue_flag;
|
||||
|
||||
spin_lock_irqsave(&des_queue->lock, queue_flag);
|
||||
kfree(des_con);
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
}
|
||||
|
||||
/* \fn void lq_sg_init(struct scatterlist *src,
|
||||
* struct scatterlist *dst)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Maps the scatterlists into a source/destination page.
|
||||
* \param *src Pointer to the source scatterlist
|
||||
* \param *dst Pointer to the destination scatterlist
|
||||
*/
|
||||
|
||||
static void lq_sg_init(struct des_container *des_con, struct scatterlist *src,
|
||||
struct scatterlist *dst)
|
||||
{
|
||||
struct page *dst_page, *src_page;
|
||||
|
||||
src_page = sg_virt(src);
|
||||
des_con->src_buf = (char *) src_page;
|
||||
|
||||
dst_page = sg_virt(dst);
|
||||
des_con->dst_buf = (char *) dst_page;
|
||||
}
|
||||
|
||||
/* \fn static int process_next_packet(struct des_container *des_con, struct ablkcipher_request *areq,
|
||||
* int state)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Process the next packet after dequeuing the packet from crypto queue
|
||||
* \param *des_con Pointer to DES container structure
|
||||
* \param *areq Pointer to ablkcipher_request container
|
||||
* \param state State of the packet (scattered packet or new packet to be processed)
|
||||
* \return -EINVAL: DEU failure, -EINPROGRESS: DEU encrypt/decrypt in progress, 1: no scatterlist left
|
||||
*/
|
||||
|
||||
static int process_next_packet(struct des_container *des_con, struct ablkcipher_request *areq,
|
||||
int state)
|
||||
{
|
||||
u8 *iv;
|
||||
int mode, encdec, err = -EINVAL;
|
||||
u32 remain, inc, chunk_size, nbytes;
|
||||
struct scatterlist *src = NULL;
|
||||
struct scatterlist *dst = NULL;
|
||||
struct crypto_ablkcipher *cipher;
|
||||
struct des_ctx *ctx;
|
||||
unsigned long queue_flag;
|
||||
|
||||
spin_lock_irqsave(&des_queue->lock, queue_flag);
|
||||
|
||||
mode = des_con->mode;
|
||||
encdec = des_con->encdec;
|
||||
iv = des_con->iv;
|
||||
|
||||
if (state & PROCESS_SCATTER) {
|
||||
src = scatterwalk_sg_next(areq->src);
|
||||
dst = scatterwalk_sg_next(areq->dst);
|
||||
|
||||
if (!src || !dst) {
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
else if (state & PROCESS_NEW_PACKET) {
|
||||
src = areq->src;
|
||||
dst = areq->dst;
|
||||
}
|
||||
|
||||
remain = des_con->bytes_processed;
|
||||
chunk_size = src->length;
|
||||
|
||||
//printk("debug ln: %d, func: %s, reqsize: %d, scattersize: %d\n",
|
||||
// __LINE__, __func__, areq->nbytes, chunk_size);
|
||||
|
||||
if (remain > DEU_MAX_PACKET_SIZE)
|
||||
inc = DEU_MAX_PACKET_SIZE;
|
||||
else if(remain > chunk_size)
|
||||
inc = chunk_size;
|
||||
else
|
||||
inc = remain;
|
||||
|
||||
remain -= inc;
|
||||
des_con->nbytes = inc;
|
||||
|
||||
if (state & PROCESS_SCATTER) {
|
||||
des_con->src_buf += des_con->nbytes;
|
||||
des_con->dst_buf += des_con->nbytes;
|
||||
}
|
||||
|
||||
lq_sg_init(des_con, src, dst);
|
||||
|
||||
nbytes = des_con->nbytes;
|
||||
|
||||
cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
if (des_queue->hw_status == DES_IDLE) {
|
||||
des_queue->hw_status = DES_STARTED;
|
||||
}
|
||||
|
||||
des_con->bytes_processed -= des_con->nbytes;
|
||||
err = ablkcipher_enqueue_request(&des_queue->list, &des_con->arequest);
|
||||
if (err == -EBUSY) {
|
||||
printk("Failed to enqueue request, ln: %d, err: %d\n",
|
||||
__LINE__, err);
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
err = lq_deu_des_core(ctx, des_con->dst_buf, des_con->src_buf, iv, nbytes, encdec, mode);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/* \fn static void process_queue(unsigned long data)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Process next packet in queue
|
||||
* \param data not used
|
||||
* \return
|
||||
*/
|
||||
|
||||
static void process_queue(unsigned long data)
|
||||
{
|
||||
DEU_WAKEUP_EVENT(deu_dma_priv.deu_thread_wait, DES_ASYNC_EVENT,
|
||||
deu_dma_priv.des_event_flags);
|
||||
|
||||
}
|
||||
|
||||
/* \fn static int des_crypto_thread (void *data)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief DES thread that handles crypto requests from upper layer & DMA
|
||||
* \param *data Not used
|
||||
* \return -EINVAL: DEU failure, -EBUSY: DEU HW busy, 0: exit thread
|
||||
*/
|
||||
|
||||
static int des_crypto_thread(void *data)
|
||||
{
|
||||
struct des_container *des_con = NULL;
|
||||
struct ablkcipher_request *areq = NULL;
|
||||
int err;
|
||||
unsigned long queue_flag;
|
||||
|
||||
daemonize("lq_des_thread");
|
||||
|
||||
while (1)
|
||||
{
|
||||
DEU_WAIT_EVENT(deu_dma_priv.deu_thread_wait, DES_ASYNC_EVENT,
|
||||
deu_dma_priv.des_event_flags);
|
||||
spin_lock_irqsave(&des_queue->lock, queue_flag);
|
||||
|
||||
/* wait to prevent starting a crypto session before
|
||||
* exiting the dma interrupt thread.
|
||||
*/
|
||||
|
||||
if (des_queue->hw_status == DES_STARTED) {
|
||||
areq = ablkcipher_dequeue_request(&des_queue->list);
|
||||
des_con = des_container_cast(areq);
|
||||
des_queue->hw_status = DES_BUSY;
|
||||
}
|
||||
else if (des_queue->hw_status == DES_IDLE) {
|
||||
areq = ablkcipher_dequeue_request(&des_queue->list);
|
||||
des_con = des_container_cast(areq);
|
||||
des_queue->hw_status = DES_STARTED;
|
||||
}
|
||||
else if (des_queue->hw_status == DES_BUSY) {
|
||||
areq = ablkcipher_dequeue_request(&des_queue->list);
|
||||
des_con = des_container_cast(areq);
|
||||
}
|
||||
else if (des_queue->hw_status == DES_COMPLETED) {
|
||||
areq->base.complete(&areq->base, 0);
|
||||
lq_sg_complete(des_con);
|
||||
des_queue->hw_status = DES_IDLE;
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return 0;
|
||||
}
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
|
||||
if ((des_con->bytes_processed == 0)) {
|
||||
goto des_done;
|
||||
}
|
||||
|
||||
if (!des_con) {
|
||||
goto des_done;
|
||||
}
|
||||
|
||||
if (des_con->flag & PROCESS_NEW_PACKET) {
|
||||
des_con->flag = PROCESS_SCATTER;
|
||||
err = process_next_packet(des_con, areq, PROCESS_NEW_PACKET);
|
||||
}
|
||||
else
|
||||
err = process_next_packet(des_con, areq, PROCESS_SCATTER);
|
||||
|
||||
if (err == -EINVAL) {
|
||||
areq->base.complete(&areq->base, err);
|
||||
lq_sg_complete(des_con);
|
||||
printk("src/dst returned -EINVAL in func: %s\n", __func__);
|
||||
}
|
||||
else if (err > 0) {
|
||||
printk("src/dst returned zero in func: %s\n", __func__);
|
||||
goto des_done;
|
||||
}
|
||||
|
||||
continue;
|
||||
|
||||
des_done:
|
||||
//printk("debug line - %d, func: %s, qlen: %d\n", __LINE__, __func__, des_queue->list.qlen);
|
||||
areq->base.complete(&areq->base, 0);
|
||||
lq_sg_complete(des_con);
|
||||
|
||||
spin_lock_irqsave(&des_queue->lock, queue_flag);
|
||||
if (des_queue->list.qlen > 0) {
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
tasklet_schedule(&des_queue->des_task);
|
||||
}
|
||||
else {
|
||||
des_queue->hw_status = DES_IDLE;
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
}
|
||||
} // while(1)
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/* \fn static int lq_des_queue_mgr(struct des_ctx *ctx, struct ablkcipher_request *areq,
|
||||
u8 *iv, int encdec, int mode)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief starts the process of queuing DEU requests
|
||||
* \param *ctx crypto algo contax
|
||||
* \param *areq Pointer to the balkcipher requests
|
||||
* \param *iv Pointer to intput vector location
|
||||
* \param dir Encrypt/Decrypt
|
||||
* \mode The mode DES algo is running
|
||||
* \return 0 if success
|
||||
*/
|
||||
|
||||
static int lq_queue_mgr(struct des_ctx *ctx, struct ablkcipher_request *areq,
|
||||
u8 *iv, int encdec, int mode)
|
||||
{
|
||||
int err = -EINVAL;
|
||||
unsigned long queue_flag;
|
||||
struct scatterlist *src = areq->src;
|
||||
struct scatterlist *dst = areq->dst;
|
||||
struct des_container *des_con = NULL;
|
||||
u32 remain, inc, nbytes = areq->nbytes;
|
||||
u32 chunk_bytes = src->length;
|
||||
|
||||
des_con = (struct des_container *)kmalloc(sizeof(struct des_container),
|
||||
GFP_KERNEL);
|
||||
|
||||
if (!(des_con)) {
|
||||
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
|
||||
__func__, __LINE__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* DES encrypt/decrypt mode */
|
||||
if (mode == 5) {
|
||||
nbytes = DES_BLOCK_SIZE;
|
||||
chunk_bytes = DES_BLOCK_SIZE;
|
||||
mode = 0;
|
||||
}
|
||||
|
||||
des_con->bytes_processed = nbytes;
|
||||
des_con->arequest = (*areq);
|
||||
remain = nbytes;
|
||||
|
||||
//printk("debug - Line: %d, func: %s, reqsize: %d, scattersize: %d\n",
|
||||
// __LINE__, __func__, nbytes, chunk_bytes);
|
||||
|
||||
if (remain > DEU_MAX_PACKET_SIZE)
|
||||
inc = DEU_MAX_PACKET_SIZE;
|
||||
else if(remain > chunk_bytes)
|
||||
inc = chunk_bytes;
|
||||
else
|
||||
inc = remain;
|
||||
|
||||
remain -= inc;
|
||||
lq_sg_init(des_con, src, dst);
|
||||
|
||||
if (remain <= 0 ) {
|
||||
des_con->complete = 1;
|
||||
}
|
||||
else
|
||||
des_con->complete = 0;
|
||||
|
||||
des_con->nbytes = inc;
|
||||
des_con->iv = iv;
|
||||
des_con->mode = mode;
|
||||
des_con->encdec = encdec;
|
||||
|
||||
spin_lock_irqsave(&des_queue->lock, queue_flag);
|
||||
|
||||
if (des_queue->hw_status == DES_STARTED || des_queue->hw_status == DES_BUSY ||
|
||||
des_queue->list.qlen > 0) {
|
||||
|
||||
des_con->flag = PROCESS_NEW_PACKET;
|
||||
err = ablkcipher_enqueue_request(&des_queue->list, &des_con->arequest);
|
||||
if (err == -EBUSY) {
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
printk("Fail to enqueue ablkcipher request ln: %d, err: %d\n",
|
||||
__LINE__, err);
|
||||
return err;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return -EINPROGRESS;
|
||||
|
||||
}
|
||||
else if (des_queue->hw_status == DES_IDLE) {
|
||||
des_queue->hw_status = DES_STARTED;
|
||||
}
|
||||
|
||||
des_con->flag = PROCESS_SCATTER;
|
||||
des_con->bytes_processed -= des_con->nbytes;
|
||||
|
||||
err = ablkcipher_enqueue_request(&des_queue->list, &des_con->arequest);
|
||||
if (err == -EBUSY) {
|
||||
printk("Fail to enqueue ablkcipher request ln: %d, err: %d\n",
|
||||
__LINE__, err);
|
||||
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return err;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&des_queue->lock, queue_flag);
|
||||
return lq_deu_des_core(ctx, des_con->dst_buf, des_con->src_buf, iv, inc, encdec, mode);
|
||||
|
||||
}
|
||||
|
||||
/* \fn static int lq_des_encrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
|
||||
static int lq_des_encrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, NULL, CRYPTO_DIR_ENCRYPT, 5);
|
||||
|
||||
}
|
||||
|
||||
/* \fn static int lq_des_decrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
|
||||
static int lq_des_decrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, NULL, CRYPTO_DIR_DECRYPT, 5);
|
||||
}
|
||||
|
||||
/* \fn static int lq_ecb_des_encrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
|
||||
static int lq_ecb_des_encrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 0);
|
||||
}
|
||||
|
||||
/* \fn static int lq_ecb_des_decrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
static int lq_ecb_des_decrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 0);
|
||||
|
||||
}
|
||||
|
||||
/* \fn static int lq_cbc_ecb_des_encrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
|
||||
static int lq_cbc_des_encrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 1);
|
||||
}
|
||||
/* \fn static int lq_cbc_des_decrypt(struct ablkcipher_request *areq)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief Decrypt function for DES algo
|
||||
* \param *areq Pointer to ablkcipher request in memory
|
||||
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
||||
*/
|
||||
|
||||
static int lq_cbc_des_decrypt(struct ablkcipher_request *areq)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
||||
struct des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
|
||||
return lq_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 1);
|
||||
}
|
||||
|
||||
struct lq_des_alg {
|
||||
struct crypto_alg alg;
|
||||
};
|
||||
|
||||
/* DES Supported algo array */
|
||||
static struct lq_des_alg des_drivers_alg [] = {
|
||||
{
|
||||
.alg = {
|
||||
.cra_name = "des",
|
||||
.cra_driver_name = "lqdeu-des",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 300,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des_setkey,
|
||||
.encrypt = lq_des_encrypt,
|
||||
.decrypt = lq_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
|
||||
},{
|
||||
.alg = {
|
||||
.cra_name = "ecb(des)",
|
||||
.cra_driver_name = "lqdeu-ecb(des)",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 400,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des_setkey,
|
||||
.encrypt = lq_ecb_des_encrypt,
|
||||
.decrypt = lq_ecb_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
},{
|
||||
.alg = {
|
||||
.cra_name = "cbc(des)",
|
||||
.cra_driver_name = "lqdeu-cbc(des)",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 400,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des_setkey,
|
||||
.encrypt = lq_cbc_des_encrypt,
|
||||
.decrypt = lq_cbc_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES3_EDE_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
},{
|
||||
.alg = {
|
||||
.cra_name = "des3_ede",
|
||||
.cra_driver_name = "lqdeu-des3_ede",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 300,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des3_ede_setkey,
|
||||
.encrypt = lq_des_encrypt,
|
||||
.decrypt = lq_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
},{
|
||||
.alg = {
|
||||
.cra_name = "ecb(des3_ede)",
|
||||
.cra_driver_name = "lqdeu-ecb(des3_ede)",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 400,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des3_ede_setkey,
|
||||
.encrypt = lq_ecb_des_encrypt,
|
||||
.decrypt = lq_ecb_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES3_EDE_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
},{
|
||||
.alg = {
|
||||
.cra_name = "cbc(des3_ede)",
|
||||
.cra_driver_name = "lqdeu-cbc(des3_ede)",
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct des_ctx),
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_priority = 400,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_ablkcipher = {
|
||||
.setkey = lq_des3_ede_setkey,
|
||||
.encrypt = lq_cbc_des_encrypt,
|
||||
.decrypt = lq_cbc_des_decrypt,
|
||||
.geniv = "eseqiv",
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES3_EDE_BLOCK_SIZE,
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
/*! \fn int __init lqdeu_async_des_init (void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief initialize des driver
|
||||
*/
|
||||
int __init lqdeu_async_des_init (void)
|
||||
{
|
||||
int i, j, ret = -EINVAL;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(des_drivers_alg); i++) {
|
||||
ret = crypto_register_alg(&des_drivers_alg[i].alg);
|
||||
//printk("driver: %s\n", des_drivers_alg[i].alg.cra_name);
|
||||
if (ret)
|
||||
goto des_err;
|
||||
}
|
||||
|
||||
des_chip_init();
|
||||
CRTCL_SECT_INIT;
|
||||
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU DES initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
des_err:
|
||||
for (j = 0; j < i; j++)
|
||||
crypto_unregister_alg(&des_drivers_alg[i].alg);
|
||||
|
||||
printk(KERN_ERR "Lantiq %s driver initialization failed!\n", (char *)&des_drivers_alg[i].alg.cra_driver_name);
|
||||
return ret;
|
||||
|
||||
cbc_des3_ede_err:
|
||||
for (i = 0; i < ARRAY_SIZE(des_drivers_alg); i++) {
|
||||
if (!strcmp((char *)&des_drivers_alg[i].alg.cra_name, "cbc(des3_ede)"))
|
||||
crypto_unregister_alg(&des_drivers_alg[i].alg);
|
||||
}
|
||||
|
||||
printk(KERN_ERR "Lantiq %s driver initialization failed!\n", (char *)&des_drivers_alg[i].alg.cra_driver_name);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! \fn void __exit lqdeu_fini_async_des (void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief unregister des driver
|
||||
*/
|
||||
void __exit lqdeu_fini_async_des (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(des_drivers_alg); i++)
|
||||
crypto_unregister_alg(&des_drivers_alg[i].alg);
|
||||
|
||||
des_queue->hw_status = DES_COMPLETED;
|
||||
DEU_WAKEUP_EVENT(deu_dma_priv.deu_thread_wait, DES_ASYNC_EVENT,
|
||||
deu_dma_priv.des_event_flags);
|
||||
|
||||
kfree(des_queue);
|
||||
}
|
||||
|
||||
773
package/kernel/lantiq/ltq-deu/src/ifxmips_des.c
Normal file
773
package/kernel/lantiq/ltq-deu/src/ifxmips_des.c
Normal file
@@ -0,0 +1,773 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_des.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver for DES Algorithm
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08 Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_des.c
|
||||
\ingroup IFX_DEU
|
||||
\brief DES encryption DEU driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DES_FUNCTIONS IFX_DES_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief IFX DES Encryption functions
|
||||
*/
|
||||
|
||||
/* Project Header Files */
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <crypto/des.h>
|
||||
#include <crypto/internal/skcipher.h>
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_deu_danube.h"
|
||||
extern int ifx_danube_pre_1_4;
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Unkown platform"
|
||||
#endif
|
||||
|
||||
/* DMA specific header and variables */
|
||||
|
||||
#if 0
|
||||
#define CRTCL_SECT_INIT
|
||||
#define CRTCL_SECT_START
|
||||
#define CRTCL_SECT_END
|
||||
#else
|
||||
spinlock_t des_lock;
|
||||
#define CRTCL_SECT_INIT spin_lock_init(&des_lock)
|
||||
#define CRTCL_SECT_START spin_lock_irqsave(&des_lock, flag)
|
||||
#define CRTCL_SECT_END spin_unlock_irqrestore(&des_lock, flag)
|
||||
#endif
|
||||
|
||||
/* Preprocessor declerations */
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
#define DES_KEY_SIZE 8
|
||||
#define DES_EXPKEY_WORDS 32
|
||||
#define DES_BLOCK_SIZE 8
|
||||
#define DES3_EDE_KEY_SIZE (3 * DES_KEY_SIZE)
|
||||
#define DES3_EDE_EXPKEY_WORDS (3 * DES_EXPKEY_WORDS)
|
||||
#define DES3_EDE_BLOCK_SIZE DES_BLOCK_SIZE
|
||||
|
||||
/* Function Declaration to prevent warning messages */
|
||||
void des_chip_init (void);
|
||||
u32 endian_swap(u32 input);
|
||||
u32 input_swap(u32 input);
|
||||
int aes_memory_allocate(int value);
|
||||
int des_memory_allocate(int value);
|
||||
void memory_release(u32 *buffer);
|
||||
u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
|
||||
void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
|
||||
void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
|
||||
u8 *iv_arg, u32 nbytes, int encdec, int mode);
|
||||
|
||||
struct ifx_deu_des_ctx {
|
||||
int controlr_M;
|
||||
int key_length;
|
||||
u8 iv[DES_BLOCK_SIZE];
|
||||
u32 expkey[DES3_EDE_EXPKEY_WORDS];
|
||||
struct des_ctx des_context;
|
||||
struct des3_ede_ctx des3_ede_context;
|
||||
};
|
||||
|
||||
extern int disable_multiblock;
|
||||
extern int disable_deudma;
|
||||
|
||||
/*! \fn int des_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length
|
||||
*/
|
||||
int des_setkey(struct crypto_tfm *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
struct ifx_deu_des_ctx *dctx = crypto_tfm_ctx(tfm);
|
||||
int err;
|
||||
|
||||
//printk("setkey in %s\n", __FILE__);
|
||||
|
||||
err = des_expand_key(&dctx->des_context, key, keylen);
|
||||
if (err == -ENOKEY) {
|
||||
if (crypto_tfm_get_flags(tfm) & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)
|
||||
err = -EINVAL;
|
||||
else
|
||||
err = 0;
|
||||
}
|
||||
|
||||
dctx->controlr_M = 0; // des
|
||||
dctx->key_length = keylen;
|
||||
|
||||
memcpy ((u8 *) (dctx->expkey), key, keylen);
|
||||
|
||||
if (err)
|
||||
memset(dctx, 0, sizeof(*dctx));
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*! \fn int des_setkey_skcipher (struct crypto_skcipher *tfm, const uint8_t *in_key, unsigned int key_len)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief sets the AES keys for skcipher
|
||||
* \param tfm linux crypto skcipher
|
||||
* \param in_key input key
|
||||
* \param key_len key lengths of 16, 24 and 32 bytes supported
|
||||
* \return -EINVAL - bad key length, 0 - SUCCESS
|
||||
*/
|
||||
int des_setkey_skcipher (struct crypto_skcipher *tfm, const u8 *in_key, unsigned int key_len)
|
||||
{
|
||||
return des_setkey(crypto_skcipher_tfm(tfm), in_key, key_len);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des(void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief main interface to DES hardware
|
||||
* \param ctx_arg crypto algo context
|
||||
* \param out_arg output bytestream
|
||||
* \param in_arg input bytestream
|
||||
* \param iv_arg initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param mode operation mode such as ebc, cbc
|
||||
*/
|
||||
|
||||
void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
|
||||
u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
{
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START;
|
||||
struct ifx_deu_des_ctx *dctx = ctx_arg;
|
||||
u32 *key = dctx->expkey;
|
||||
unsigned long flag;
|
||||
|
||||
int i = 0;
|
||||
int nblocks = 0;
|
||||
|
||||
CRTCL_SECT_START;
|
||||
|
||||
des->controlr.M = dctx->controlr_M;
|
||||
if (dctx->controlr_M == 0) // des
|
||||
{
|
||||
des->K1HR = DEU_ENDIAN_SWAP(*((u32 *) key + 0));
|
||||
des->K1LR = DEU_ENDIAN_SWAP(*((u32 *) key + 1));
|
||||
|
||||
}
|
||||
else {
|
||||
/* Hardware Section */
|
||||
switch (dctx->key_length) {
|
||||
case 24:
|
||||
des->K3HR = DEU_ENDIAN_SWAP(*((u32 *) key + 4));
|
||||
des->K3LR = DEU_ENDIAN_SWAP(*((u32 *) key + 5));
|
||||
/* no break; */
|
||||
fallthrough;
|
||||
case 16:
|
||||
des->K2HR = DEU_ENDIAN_SWAP(*((u32 *) key + 2));
|
||||
des->K2LR = DEU_ENDIAN_SWAP(*((u32 *) key + 3));
|
||||
|
||||
/* no break; */
|
||||
fallthrough;
|
||||
case 8:
|
||||
des->K1HR = DEU_ENDIAN_SWAP(*((u32 *) key + 0));
|
||||
des->K1LR = DEU_ENDIAN_SWAP(*((u32 *) key + 1));
|
||||
break;
|
||||
|
||||
default:
|
||||
CRTCL_SECT_END;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
des->controlr.E_D = !encdec; //encryption
|
||||
des->controlr.O = mode; //0 ECB 1 CBC 2 OFB 3 CFB 4 CTR hexdump(prin,sizeof(*des));
|
||||
|
||||
if (mode > 0) {
|
||||
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
|
||||
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
|
||||
};
|
||||
|
||||
nblocks = nbytes / 4;
|
||||
|
||||
for (i = 0; i < nblocks; i += 2) {
|
||||
/* wait for busy bit to clear */
|
||||
|
||||
/*--- Workaround ----------------------------------------------------
|
||||
do a dummy read to the busy flag because it is not raised early
|
||||
enough in CFB/OFB 3DES modes */
|
||||
#ifdef CRYPTO_DEBUG
|
||||
printk ("ihr: %x\n", (*((u32 *) in_arg + i)));
|
||||
printk ("ilr: %x\n", (*((u32 *) in_arg + 1 + i)));
|
||||
#endif
|
||||
des->IHR = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + i));
|
||||
des->ILR = INPUT_ENDIAN_SWAP(*((u32 *) in_arg + 1 + i)); /* start crypto */
|
||||
|
||||
while (des->controlr.BUS) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
*((u32 *) out_arg + 0 + i) = des->OHR;
|
||||
*((u32 *) out_arg + 1 + i) = des->OLR;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
if (mode > 0) {
|
||||
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
|
||||
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
|
||||
};
|
||||
|
||||
CRTCL_SECT_END;
|
||||
}
|
||||
|
||||
//definitions from linux/include/crypto.h:
|
||||
//#define CRYPTO_TFM_MODE_ECB 0x00000001
|
||||
//#define CRYPTO_TFM_MODE_CBC 0x00000002
|
||||
//#define CRYPTO_TFM_MODE_CFB 0x00000004
|
||||
//#define CRYPTO_TFM_MODE_CTR 0x00000008
|
||||
//#define CRYPTO_TFM_MODE_OFB 0x00000010 // not even defined
|
||||
//but hardware definition: 0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
|
||||
|
||||
/*! \fn void ifx_deu_des(void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief main interface to DES hardware
|
||||
* \param ctx_arg crypto algo context
|
||||
* \param out_arg output bytestream
|
||||
* \param in_arg input bytestream
|
||||
* \param iv_arg initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param mode operation mode such as ebc, cbc
|
||||
*/
|
||||
|
||||
/*! \fn void ifx_deu_des_ecb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES hardware to ECB mode
|
||||
* \param ctx crypto algo context
|
||||
* \param dst output bytestream
|
||||
* \param src input bytestream
|
||||
* \param iv initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param inplace not used
|
||||
*/
|
||||
void ifx_deu_des_ecb (void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
ifx_deu_des (ctx, dst, src, NULL, nbytes, encdec, 0);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_cbc (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES hardware to CBC mode
|
||||
* \param ctx crypto algo context
|
||||
* \param dst output bytestream
|
||||
* \param src input bytestream
|
||||
* \param iv initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param inplace not used
|
||||
*/
|
||||
void ifx_deu_des_cbc (void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
ifx_deu_des (ctx, dst, src, iv, nbytes, encdec, 1);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_ofb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES hardware to OFB mode
|
||||
* \param ctx crypto algo context
|
||||
* \param dst output bytestream
|
||||
* \param src input bytestream
|
||||
* \param iv initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param inplace not used
|
||||
*/
|
||||
void ifx_deu_des_ofb (void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
ifx_deu_des (ctx, dst, src, iv, nbytes, encdec, 2);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_cfb (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
\ingroup IFX_DES_FUNCTIONS
|
||||
\brief sets DES hardware to CFB mode
|
||||
\param ctx crypto algo context
|
||||
\param dst output bytestream
|
||||
\param src input bytestream
|
||||
\param iv initialization vector
|
||||
\param nbytes length of bytestream
|
||||
\param encdec 1 for encrypt; 0 for decrypt
|
||||
\param inplace not used
|
||||
*/
|
||||
void ifx_deu_des_cfb (void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
ifx_deu_des (ctx, dst, src, iv, nbytes, encdec, 3);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_ctr (void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets DES hardware to CTR mode
|
||||
* \param ctx crypto algo context
|
||||
* \param dst output bytestream
|
||||
* \param src input bytestream
|
||||
* \param iv initialization vector
|
||||
* \param nbytes length of bytestream
|
||||
* \param encdec 1 for encrypt; 0 for decrypt
|
||||
* \param inplace not used
|
||||
*/
|
||||
void ifx_deu_des_ctr (void *ctx, uint8_t *dst, const uint8_t *src,
|
||||
uint8_t *iv, size_t nbytes, int encdec, int inplace)
|
||||
{
|
||||
ifx_deu_des (ctx, dst, src, iv, nbytes, encdec, 4);
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_encrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief encrypt DES_BLOCK_SIZE of data
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out output bytestream
|
||||
* \param in input bytestream
|
||||
*/
|
||||
void ifx_deu_des_encrypt (struct crypto_tfm *tfm, uint8_t * out, const uint8_t * in)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
ifx_deu_des (ctx, out, in, NULL, DES_BLOCK_SIZE,
|
||||
CRYPTO_DIR_ENCRYPT, 0);
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void ifx_deu_des_decrypt (struct crypto_tfm *tfm, uint8_t *out, const uint8_t *in)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief encrypt DES_BLOCK_SIZE of data
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out output bytestream
|
||||
* \param in input bytestream
|
||||
*/
|
||||
void ifx_deu_des_decrypt (struct crypto_tfm *tfm, uint8_t * out, const uint8_t * in)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
ifx_deu_des (ctx, out, in, NULL, DES_BLOCK_SIZE,
|
||||
CRYPTO_DIR_DECRYPT, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief RFC2451:
|
||||
*
|
||||
* For DES-EDE3, there is no known need to reject weak or
|
||||
* complementation keys. Any weakness is obviated by the use of
|
||||
* multiple keys.
|
||||
*
|
||||
* However, if the first two or last two independent 64-bit keys are
|
||||
* equal (k1 == k2 or k2 == k3), then the DES3 operation is simply the
|
||||
* same as DES. Implementers MUST reject keys that exhibit this
|
||||
* property.
|
||||
*
|
||||
*/
|
||||
|
||||
/*! \fn int des3_ede_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets 3DES key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length
|
||||
*/
|
||||
int des3_ede_setkey(struct crypto_tfm *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
struct ifx_deu_des_ctx *dctx = crypto_tfm_ctx(tfm);
|
||||
int err;
|
||||
|
||||
//printk("setkey in %s\n", __FILE__);
|
||||
|
||||
err = des3_ede_expand_key(&dctx->des3_ede_context, key, keylen);
|
||||
if (err == -ENOKEY) {
|
||||
if (crypto_tfm_get_flags(tfm) & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)
|
||||
err = -EINVAL;
|
||||
else
|
||||
err = 0;
|
||||
}
|
||||
|
||||
dctx->controlr_M = keylen / 8 + 1; // 3DES EDE1 / EDE2 / EDE3 Mode
|
||||
dctx->key_length = keylen;
|
||||
|
||||
memcpy ((u8 *) (dctx->expkey), key, keylen);
|
||||
|
||||
if (err)
|
||||
memset(dctx, 0, sizeof(*dctx));
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*! \fn int des3_ede_setkey_skcipher(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief sets 3DES key
|
||||
* \param tfm linux crypto skcipher transform
|
||||
* \param key input key
|
||||
* \param keylen key length
|
||||
*/
|
||||
int des3_ede_setkey_skcipher(struct crypto_skcipher *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
return des3_ede_setkey(crypto_skcipher_tfm(tfm), key, keylen);
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct crypto_alg ifxdeu_des_alg = {
|
||||
.cra_name = "des",
|
||||
.cra_driver_name = "ifxdeu-des",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_alignmask = 3,
|
||||
.cra_list = LIST_HEAD_INIT(ifxdeu_des_alg.cra_list),
|
||||
.cra_u = { .cipher = {
|
||||
.cia_min_keysize = DES_KEY_SIZE,
|
||||
.cia_max_keysize = DES_KEY_SIZE,
|
||||
.cia_setkey = des_setkey,
|
||||
.cia_encrypt = ifx_deu_des_encrypt,
|
||||
.cia_decrypt = ifx_deu_des_decrypt } }
|
||||
};
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct crypto_alg ifxdeu_des3_ede_alg = {
|
||||
.cra_name = "des3_ede",
|
||||
.cra_driver_name = "ifxdeu-des3_ede",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_alignmask = 3,
|
||||
.cra_list = LIST_HEAD_INIT(ifxdeu_des3_ede_alg.cra_list),
|
||||
.cra_u = { .cipher = {
|
||||
.cia_min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.cia_max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.cia_setkey = des3_ede_setkey,
|
||||
.cia_encrypt = ifx_deu_des_encrypt,
|
||||
.cia_decrypt = ifx_deu_des_decrypt } }
|
||||
};
|
||||
|
||||
/*! \fn int ecb_des_encrypt(struct skcipher_req *req)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief ECB DES encrypt using linux crypto skcipher
|
||||
* \param req skcipher request
|
||||
* \return err
|
||||
*/
|
||||
int ecb_des_encrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
int err;
|
||||
unsigned int enc_bytes, nbytes;
|
||||
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = enc_bytes = walk.nbytes)) {
|
||||
enc_bytes -= (nbytes % DES_BLOCK_SIZE);
|
||||
ifx_deu_des_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
NULL, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
|
||||
nbytes &= DES_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*! \fn int ecb_des_decrypt(struct skcipher_req *req)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief ECB DES decrypt using linux crypto skcipher
|
||||
* \param req skcipher request
|
||||
* \return err
|
||||
*/
|
||||
int ecb_des_decrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
int err;
|
||||
unsigned int dec_bytes, nbytes;
|
||||
|
||||
DPRINTF(1, "\n");
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = dec_bytes = walk.nbytes)) {
|
||||
dec_bytes -= (nbytes % DES_BLOCK_SIZE);
|
||||
ifx_deu_des_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
NULL, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
|
||||
nbytes &= DES_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct skcipher_alg ifxdeu_ecb_des_alg = {
|
||||
.base.cra_name = "ecb(des)",
|
||||
.base.cra_driver_name = "ifxdeu-ecb(des)",
|
||||
.base.cra_priority = 400,
|
||||
.base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.base.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.base.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.base.cra_module = THIS_MODULE,
|
||||
.base.cra_list = LIST_HEAD_INIT(ifxdeu_ecb_des_alg.base.cra_list),
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.setkey = des_setkey_skcipher,
|
||||
.encrypt = ecb_des_encrypt,
|
||||
.decrypt = ecb_des_decrypt,
|
||||
};
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct skcipher_alg ifxdeu_ecb_des3_ede_alg = {
|
||||
.base.cra_name = "ecb(des3_ede)",
|
||||
.base.cra_driver_name = "ifxdeu-ecb(des3_ede)",
|
||||
.base.cra_priority = 400,
|
||||
.base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
||||
.base.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.base.cra_module = THIS_MODULE,
|
||||
.base.cra_list = LIST_HEAD_INIT(ifxdeu_ecb_des3_ede_alg.base.cra_list),
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.setkey = des3_ede_setkey_skcipher,
|
||||
.encrypt = ecb_des_encrypt,
|
||||
.decrypt = ecb_des_decrypt,
|
||||
};
|
||||
|
||||
/*! \fn int cbc_des_encrypt(struct skcipher_req *req)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief CBC DES encrypt using linux crypto skcipher
|
||||
* \param req skcipher request
|
||||
* \return err
|
||||
*/
|
||||
int cbc_des_encrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
int err;
|
||||
unsigned int enc_bytes, nbytes;
|
||||
|
||||
DPRINTF(1, "\n");
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = enc_bytes = walk.nbytes)) {
|
||||
u8 *iv = walk.iv;
|
||||
enc_bytes -= (nbytes % DES_BLOCK_SIZE);
|
||||
ifx_deu_des_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
iv, enc_bytes, CRYPTO_DIR_ENCRYPT, 0);
|
||||
nbytes &= DES_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*! \fn int cbc_des_encrypt(struct skcipher_req *req)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief CBC DES decrypt using linux crypto skcipher
|
||||
* \param req skcipher request
|
||||
* \return err
|
||||
*/
|
||||
int cbc_des_decrypt(struct skcipher_request *req)
|
||||
{
|
||||
struct ifx_deu_des_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct skcipher_walk walk;
|
||||
int err;
|
||||
unsigned int dec_bytes, nbytes;
|
||||
|
||||
DPRINTF(1, "\n");
|
||||
err = skcipher_walk_virt(&walk, req, false);
|
||||
|
||||
while ((nbytes = dec_bytes = walk.nbytes)) {
|
||||
u8 *iv = walk.iv;
|
||||
dec_bytes -= (nbytes % DES_BLOCK_SIZE);
|
||||
ifx_deu_des_cbc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
|
||||
iv, dec_bytes, CRYPTO_DIR_DECRYPT, 0);
|
||||
nbytes &= DES_BLOCK_SIZE - 1;
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct skcipher_alg ifxdeu_cbc_des_alg = {
|
||||
.base.cra_name = "cbc(des)",
|
||||
.base.cra_driver_name = "ifxdeu-cbc(des)",
|
||||
.base.cra_priority = 400,
|
||||
.base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.base.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.base.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.base.cra_module = THIS_MODULE,
|
||||
.base.cra_list = LIST_HEAD_INIT(ifxdeu_cbc_des_alg.base.cra_list),
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = des_setkey_skcipher,
|
||||
.encrypt = cbc_des_encrypt,
|
||||
.decrypt = cbc_des_decrypt,
|
||||
};
|
||||
|
||||
/*
|
||||
* \brief DES function mappings
|
||||
*/
|
||||
struct skcipher_alg ifxdeu_cbc_des3_ede_alg = {
|
||||
.base.cra_name = "cbc(des3_ede)",
|
||||
.base.cra_driver_name = "ifxdeu-cbc(des3_ede)",
|
||||
.base.cra_priority = 400,
|
||||
.base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
||||
.base.cra_ctxsize = sizeof(struct ifx_deu_des_ctx),
|
||||
.base.cra_module = THIS_MODULE,
|
||||
.base.cra_list = LIST_HEAD_INIT(ifxdeu_cbc_des3_ede_alg.base.cra_list),
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = des3_ede_setkey_skcipher,
|
||||
.encrypt = cbc_des_encrypt,
|
||||
.decrypt = cbc_des_decrypt,
|
||||
};
|
||||
|
||||
/*! \fn int ifxdeu_init_des (void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief initialize des driver
|
||||
*/
|
||||
int ifxdeu_init_des (void)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
des_chip_init();
|
||||
|
||||
ret = crypto_register_alg(&ifxdeu_des_alg);
|
||||
if (ret < 0)
|
||||
goto des_err;
|
||||
|
||||
ret = crypto_register_skcipher(&ifxdeu_ecb_des_alg);
|
||||
if (ret < 0)
|
||||
goto ecb_des_err;
|
||||
|
||||
ret = crypto_register_skcipher(&ifxdeu_cbc_des_alg);
|
||||
if (ret < 0)
|
||||
goto cbc_des_err;
|
||||
|
||||
ret = crypto_register_alg(&ifxdeu_des3_ede_alg);
|
||||
if (ret < 0)
|
||||
goto des3_ede_err;
|
||||
|
||||
ret = crypto_register_skcipher(&ifxdeu_ecb_des3_ede_alg);
|
||||
if (ret < 0)
|
||||
goto ecb_des3_ede_err;
|
||||
|
||||
ret = crypto_register_skcipher(&ifxdeu_cbc_des3_ede_alg);
|
||||
if (ret < 0)
|
||||
goto cbc_des3_ede_err;
|
||||
|
||||
CRTCL_SECT_INIT;
|
||||
|
||||
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU DES initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
des_err:
|
||||
crypto_unregister_alg(&ifxdeu_des_alg);
|
||||
printk(KERN_ERR "IFX des initialization failed!\n");
|
||||
return ret;
|
||||
ecb_des_err:
|
||||
crypto_unregister_skcipher(&ifxdeu_ecb_des_alg);
|
||||
printk (KERN_ERR "IFX ecb_des initialization failed!\n");
|
||||
return ret;
|
||||
cbc_des_err:
|
||||
crypto_unregister_skcipher(&ifxdeu_cbc_des_alg);
|
||||
printk (KERN_ERR "IFX cbc_des initialization failed!\n");
|
||||
return ret;
|
||||
des3_ede_err:
|
||||
crypto_unregister_alg(&ifxdeu_des3_ede_alg);
|
||||
printk(KERN_ERR "IFX des3_ede initialization failed!\n");
|
||||
return ret;
|
||||
ecb_des3_ede_err:
|
||||
crypto_unregister_skcipher(&ifxdeu_ecb_des3_ede_alg);
|
||||
printk (KERN_ERR "IFX ecb_des3_ede initialization failed!\n");
|
||||
return ret;
|
||||
cbc_des3_ede_err:
|
||||
crypto_unregister_skcipher(&ifxdeu_cbc_des3_ede_alg);
|
||||
printk (KERN_ERR "IFX cbc_des3_ede initialization failed!\n");
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void ifxdeu_fini_des (void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief unregister des driver
|
||||
*/
|
||||
void ifxdeu_fini_des (void)
|
||||
{
|
||||
crypto_unregister_alg (&ifxdeu_des_alg);
|
||||
crypto_unregister_skcipher (&ifxdeu_ecb_des_alg);
|
||||
crypto_unregister_skcipher (&ifxdeu_cbc_des_alg);
|
||||
crypto_unregister_alg (&ifxdeu_des3_ede_alg);
|
||||
crypto_unregister_skcipher (&ifxdeu_ecb_des3_ede_alg);
|
||||
crypto_unregister_skcipher (&ifxdeu_cbc_des3_ede_alg);
|
||||
|
||||
}
|
||||
208
package/kernel/lantiq/ltq-deu/src/ifxmips_deu.c
Normal file
208
package/kernel/lantiq/ltq-deu/src/ifxmips_deu.c
Normal file
@@ -0,0 +1,208 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for Danube
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu.c
|
||||
\ingroup IFX_DEU
|
||||
\brief main deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU_FUNCTIONS IFX_DEU_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief IFX DEU functions
|
||||
*/
|
||||
|
||||
/* Project header */
|
||||
#include <linux/version.h>
|
||||
#if defined(CONFIG_MODVERSIONS)
|
||||
#define MODVERSIONS
|
||||
#include <linux/modversions.h>
|
||||
#endif
|
||||
#include <linux/module.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/fs.h> /* Stuff about file systems that we need */
|
||||
#include <asm/byteorder.h>
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_deu_danube.h"
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Platform unknown!"
|
||||
#endif /* CONFIG_xxxx */
|
||||
|
||||
int disable_deudma = 1;
|
||||
spinlock_t ltq_deu_hash_lock;
|
||||
EXPORT_SYMBOL_GPL(ltq_deu_hash_lock);
|
||||
|
||||
void chip_version(void);
|
||||
|
||||
/*! \fn static int __init deu_init (void)
|
||||
* \ingroup IFX_DEU_FUNCTIONS
|
||||
* \brief link all modules that have been selected in kernel config for ifx hw crypto support
|
||||
* \return ret
|
||||
*/
|
||||
|
||||
static int ltq_deu_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
START_DEU_POWER;
|
||||
CRTCL_SECT_HASH_INIT;
|
||||
|
||||
#define IFX_DEU_DRV_VERSION "2.0.0"
|
||||
printk(KERN_INFO "Infineon Technologies DEU driver version %s \n", IFX_DEU_DRV_VERSION);
|
||||
|
||||
FIND_DEU_CHIP_VERSION;
|
||||
|
||||
#if defined(CONFIG_CRYPTO_DEV_DES)
|
||||
if ((ret = ifxdeu_init_des ())) {
|
||||
printk (KERN_ERR "IFX DES initialization failed!\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_AES)
|
||||
if ((ret = ifxdeu_init_aes ())) {
|
||||
printk (KERN_ERR "IFX AES initialization failed!\n");
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_ARC4)
|
||||
if ((ret = ifxdeu_init_arc4 ())) {
|
||||
printk (KERN_ERR "IFX ARC4 initialization failed!\n");
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_SHA1)
|
||||
if ((ret = ifxdeu_init_sha1 ())) {
|
||||
printk (KERN_ERR "IFX SHA1 initialization failed!\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_MD5)
|
||||
if ((ret = ifxdeu_init_md5 ())) {
|
||||
printk (KERN_ERR "IFX MD5 initialization failed!\n");
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_SHA1_HMAC)
|
||||
if ((ret = ifxdeu_init_sha1_hmac ())) {
|
||||
printk (KERN_ERR "IFX SHA1_HMAC initialization failed!\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_MD5_HMAC)
|
||||
if ((ret = ifxdeu_init_md5_hmac ())) {
|
||||
printk (KERN_ERR "IFX MD5_HMAC initialization failed!\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn static void __exit deu_fini (void)
|
||||
* \ingroup IFX_DEU_FUNCTIONS
|
||||
* \brief remove the loaded crypto algorithms
|
||||
*/
|
||||
static int ltq_deu_remove(struct platform_device *pdev)
|
||||
{
|
||||
//#ifdef CONFIG_CRYPTO_DEV_PWR_SAVE_MODE
|
||||
#if defined(CONFIG_CRYPTO_DEV_DES)
|
||||
ifxdeu_fini_des ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_AES)
|
||||
ifxdeu_fini_aes ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_ARC4)
|
||||
ifxdeu_fini_arc4 ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_SHA1)
|
||||
ifxdeu_fini_sha1 ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_MD5)
|
||||
ifxdeu_fini_md5 ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_SHA1_HMAC)
|
||||
ifxdeu_fini_sha1_hmac ();
|
||||
#endif
|
||||
#if defined(CONFIG_CRYPTO_DEV_MD5_HMAC)
|
||||
ifxdeu_fini_md5_hmac ();
|
||||
#endif
|
||||
printk("DEU has exited successfully\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int disable_multiblock = 0;
|
||||
|
||||
module_param(disable_multiblock,int,0);
|
||||
|
||||
|
||||
static const struct of_device_id ltq_deu_match[] = {
|
||||
#ifdef CONFIG_DANUBE
|
||||
{ .compatible = "lantiq,deu-danube"},
|
||||
#elif defined CONFIG_AR9
|
||||
{ .compatible = "lantiq,deu-arx100"},
|
||||
#elif defined CONFIG_VR9
|
||||
{ .compatible = "lantiq,deu-xrx200"},
|
||||
#endif
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ltq_deu_match);
|
||||
|
||||
|
||||
static struct platform_driver ltq_deu_driver = {
|
||||
.probe = ltq_deu_probe,
|
||||
.remove = ltq_deu_remove,
|
||||
.driver = {
|
||||
.name = "deu",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = ltq_deu_match,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(ltq_deu_driver);
|
||||
|
||||
MODULE_DESCRIPTION ("Infineon DEU crypto engine support.");
|
||||
MODULE_LICENSE ("GPL");
|
||||
MODULE_AUTHOR ("Mohammad Firdaus");
|
||||
236
package/kernel/lantiq/ltq-deu/src/ifxmips_deu.h
Normal file
236
package/kernel/lantiq/ltq-deu/src/ifxmips_deu.h
Normal file
@@ -0,0 +1,236 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu.h
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu.h
|
||||
\brief main deu driver header file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU_DEFINITIONS IFX_DEU_DEFINITIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx deu definitions
|
||||
*/
|
||||
|
||||
|
||||
#ifndef IFXMIPS_DEU_H
|
||||
#define IFXMIPS_DEU_H
|
||||
|
||||
#include <crypto/algapi.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#define IFXDEU_ALIGNMENT 16
|
||||
|
||||
#define IFX_DEU_BASE_ADDR (KSEG1 | 0x1E103100)
|
||||
#define IFX_DEU_CLK ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0000))
|
||||
#define IFX_DES_CON ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0010))
|
||||
#define IFX_AES_CON ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0050))
|
||||
#define IFX_HASH_CON ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x00B0))
|
||||
#define IFX_ARC4_CON ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0100))
|
||||
|
||||
#define PFX "ifxdeu: "
|
||||
#define CLC_START IFX_DEU_CLK
|
||||
#define IFXDEU_CRA_PRIORITY 300
|
||||
#define IFXDEU_COMPOSITE_PRIORITY 400
|
||||
//#define KSEG1 0xA0000000
|
||||
#define IFX_PMU_ENABLE 1
|
||||
#define IFX_PMU_DISABLE 0
|
||||
|
||||
#define CRYPTO_DIR_ENCRYPT 1
|
||||
#define CRYPTO_DIR_DECRYPT 0
|
||||
|
||||
#define AES_IDLE 0
|
||||
#define AES_BUSY 1
|
||||
#define AES_STARTED 2
|
||||
#define AES_COMPLETED 3
|
||||
#define DES_IDLE 0
|
||||
#define DES_BUSY 1
|
||||
#define DES_STARTED 2
|
||||
#define DES_COMPLETED 3
|
||||
|
||||
#define PROCESS_SCATTER 1
|
||||
#define PROCESS_NEW_PACKET 2
|
||||
|
||||
#define PMU_DEU BIT(20)
|
||||
#define START_DEU_POWER \
|
||||
do { \
|
||||
volatile struct clc_controlr_t *clc = (struct clc_controlr_t *) CLC_START; \
|
||||
ltq_pmu_enable(PMU_DEU); \
|
||||
clc->FSOE = 0; \
|
||||
clc->SBWE = 0; \
|
||||
clc->SPEN = 0; \
|
||||
clc->SBWE = 0; \
|
||||
clc->DISS = 0; \
|
||||
clc->DISR = 0; \
|
||||
} while(0)
|
||||
|
||||
#define STOP_DEU_POWER \
|
||||
do { \
|
||||
volatile struct clc_controlr_t *clc = (struct clc_controlr_t *) CLC_START; \
|
||||
ltq_pmu_disable(PMU_DEU); \
|
||||
clc->FSOE = 1; \
|
||||
clc->SBWE = 1; \
|
||||
clc->SPEN = 1; \
|
||||
clc->SBWE = 1; \
|
||||
clc->DISS = 1; \
|
||||
clc->DISR = 1; \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* Not used anymore in UEIP (use IFX_DES_CON, IFX_AES_CON, etc instead)
|
||||
* #define DEU_BASE (KSEG1+0x1E103100)
|
||||
* #define DES_CON (DEU_BASE+0x10)
|
||||
* #define AES_CON (DEU_BASE+0x50)
|
||||
* #define HASH_CON (DEU_BASE+0xB0)
|
||||
* #define DMA_CON (DEU_BASE+0xEC)
|
||||
* #define INT_CON (DEU_BASE+0xF4)
|
||||
* #define ARC4_CON (DEU_BASE+0x100)
|
||||
*/
|
||||
|
||||
|
||||
int ifxdeu_init_des (void);
|
||||
int ifxdeu_init_aes (void);
|
||||
int ifxdeu_init_arc4 (void);
|
||||
int ifxdeu_init_sha1 (void);
|
||||
int ifxdeu_init_md5 (void);
|
||||
int ifxdeu_init_sha1_hmac (void);
|
||||
int ifxdeu_init_md5_hmac (void);
|
||||
int __init lqdeu_async_aes_init(void);
|
||||
int __init lqdeu_async_des_init(void);
|
||||
|
||||
void ifxdeu_fini_des (void);
|
||||
void ifxdeu_fini_aes (void);
|
||||
void ifxdeu_fini_arc4 (void);
|
||||
void ifxdeu_fini_sha1 (void);
|
||||
void ifxdeu_fini_md5 (void);
|
||||
void ifxdeu_fini_sha1_hmac (void);
|
||||
void ifxdeu_fini_md5_hmac (void);
|
||||
void __exit ifxdeu_fini_dma(void);
|
||||
void __exit lqdeu_fini_async_aes(void);
|
||||
void __exit lqdeu_fini_async_des(void);
|
||||
void __exit deu_fini (void);
|
||||
int deu_dma_init (void);
|
||||
|
||||
extern spinlock_t ltq_deu_hash_lock;
|
||||
#define CRTCL_SECT_HASH_INIT spin_lock_init(<q_deu_hash_lock)
|
||||
#define CRTCL_SECT_HASH_START spin_lock_irqsave(<q_deu_hash_lock, flag)
|
||||
#define CRTCL_SECT_HASH_END spin_unlock_irqrestore(<q_deu_hash_lock, flag)
|
||||
|
||||
|
||||
#define DEU_WAKELIST_INIT(queue) \
|
||||
init_waitqueue_head(&queue)
|
||||
|
||||
#define DEU_WAIT_EVENT_TIMEOUT(queue, event, flags, timeout) \
|
||||
do { \
|
||||
wait_event_interruptible_timeout((queue), \
|
||||
test_bit((event), &(flags)), (timeout)); \
|
||||
clear_bit((event), &(flags)); \
|
||||
}while (0)
|
||||
|
||||
|
||||
#define DEU_WAKEUP_EVENT(queue, event, flags) \
|
||||
do { \
|
||||
set_bit((event), &(flags)); \
|
||||
wake_up_interruptible(&(queue)); \
|
||||
}while (0)
|
||||
|
||||
#define DEU_WAIT_EVENT(queue, event, flags) \
|
||||
do { \
|
||||
wait_event_interruptible(queue, \
|
||||
test_bit((event), &(flags))); \
|
||||
clear_bit((event), &(flags)); \
|
||||
}while (0)
|
||||
|
||||
typedef struct deu_drv_priv {
|
||||
wait_queue_head_t deu_thread_wait;
|
||||
#define DEU_EVENT 1
|
||||
#define DES_ASYNC_EVENT 2
|
||||
#define AES_ASYNC_EVENT 3
|
||||
volatile long des_event_flags;
|
||||
volatile long aes_event_flags;
|
||||
volatile long deu_event_flags;
|
||||
int event_src;
|
||||
u32 *deu_rx_buf;
|
||||
u32 *outcopy;
|
||||
u32 deu_rx_len;
|
||||
|
||||
struct aes_priv *aes_dataptr;
|
||||
struct des_priv *des_dataptr;
|
||||
}deu_drv_priv_t;
|
||||
|
||||
|
||||
/**
|
||||
* struct aes_priv_t - ASYNC AES
|
||||
* @lock: spinlock lock
|
||||
* @lock_flag: flag for spinlock activities
|
||||
* @list: crypto queue API list
|
||||
* @hw_status: DEU hw status flag
|
||||
* @aes_wait_flag: flag for sleep queue
|
||||
* @aes_wait_queue: queue attributes for aes
|
||||
* @bytes_processed: number of bytes to process by DEU
|
||||
* @aes_pid: pid number for AES thread
|
||||
* @aes_sync: atomic wait sync for AES
|
||||
*
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
spinlock_t lock;
|
||||
struct crypto_queue list;
|
||||
unsigned int hw_status;
|
||||
volatile long aes_wait_flag;
|
||||
wait_queue_head_t aes_wait_queue;
|
||||
|
||||
pid_t aes_pid;
|
||||
|
||||
struct tasklet_struct aes_task;
|
||||
|
||||
} aes_priv_t;
|
||||
|
||||
/**
|
||||
* struct des_priv_t - ASYNC DES
|
||||
* @lock: spinlock lock
|
||||
* @list: crypto queue API list
|
||||
* @hw_status: DEU hw status flag
|
||||
* @des_wait_flag: flag for sleep queue
|
||||
* @des_wait_queue: queue attributes for des
|
||||
* @des_pid: pid number for DES thread
|
||||
* @des_sync: atomic wait sync for DES
|
||||
*
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
spinlock_t lock;
|
||||
struct crypto_queue list;
|
||||
unsigned int hw_status;
|
||||
volatile long des_wait_flag;
|
||||
wait_queue_head_t des_wait_queue;
|
||||
|
||||
pid_t des_pid;
|
||||
|
||||
struct tasklet_struct des_task;
|
||||
|
||||
} des_priv_t;
|
||||
|
||||
#endif /* IFXMIPS_DEU_H */
|
||||
|
||||
|
||||
135
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_ar9.c
Normal file
135
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_ar9.c
Normal file
@@ -0,0 +1,135 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_ar9.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for AR9
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_ar9.c
|
||||
\brief ifx deu board specific driver file for ar9
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific functions
|
||||
*/
|
||||
|
||||
/* Project header files */
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/io.h> //dma_cache_inv
|
||||
|
||||
#include "ifxmips_deu_dma.h"
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
|
||||
/* Function decleration */
|
||||
void aes_chip_init (void);
|
||||
void des_chip_init (void);
|
||||
int deu_dma_init (void);
|
||||
u32 endian_swap(u32 input);
|
||||
u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
|
||||
void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void deu_dma_priv_init(void);
|
||||
void __exit ifxdeu_fini_dma(void);
|
||||
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
#define AES_START IFX_AES_CON
|
||||
#define CLC_START IFX_DEU_CLK
|
||||
|
||||
/* Variables */
|
||||
|
||||
u8 *g_dma_page_ptr = NULL;
|
||||
u8 *g_dma_block = NULL;
|
||||
u8 *g_dma_block2 = NULL;
|
||||
|
||||
deu_drv_priv_t deu_dma_priv;
|
||||
|
||||
|
||||
/*! \fn u32 endian_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief Swap data given to the function
|
||||
* \param input Data input to be swapped
|
||||
* \return either the swapped data or the input data depending on whether it is in DMA mode or FPI mode
|
||||
*/
|
||||
u32 endian_swap(u32 input)
|
||||
{
|
||||
return input;
|
||||
}
|
||||
|
||||
/*! \fn u32 input_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief Not used
|
||||
* \return input
|
||||
*/
|
||||
|
||||
u32 input_swap(u32 input)
|
||||
{
|
||||
return input;
|
||||
}
|
||||
|
||||
/*! \fn void aes_chip_init (void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief initialize AES hardware
|
||||
*/
|
||||
|
||||
void aes_chip_init (void)
|
||||
{
|
||||
volatile struct aes_t *aes = (struct aes_t *) AES_START;
|
||||
|
||||
aes->controlr.SM = 1;
|
||||
aes->controlr.ARS = 1;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void des_chip_init (void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief initialize DES hardware
|
||||
*/
|
||||
|
||||
void des_chip_init (void)
|
||||
{
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START;
|
||||
|
||||
// start crypto engine with write to ILR
|
||||
des->controlr.SM = 1;
|
||||
asm("sync");
|
||||
des->controlr.ARS = 1;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void chip_version(void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief not used!
|
||||
*/
|
||||
|
||||
void chip_version(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
307
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_ar9.h
Normal file
307
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_ar9.h
Normal file
@@ -0,0 +1,307 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_ar9.h
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for AR9
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU_DEFINITIONS IFX_DEU_DEFINITIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx deu definitions
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_ar9.h
|
||||
\brief deu driver header file
|
||||
*/
|
||||
|
||||
|
||||
#ifndef IFXMIPS_DEU_AR9_H
|
||||
#define IFXMIPS_DEU_AR9_H
|
||||
|
||||
/* Project Header Files */
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
|
||||
/* SHA CONSTANTS */
|
||||
#define HASH_CON_VALUE 0x0700002C
|
||||
|
||||
#define INPUT_ENDIAN_SWAP(input) input_swap(input)
|
||||
#define DEU_ENDIAN_SWAP(input) endian_swap(input)
|
||||
#define DELAY_PERIOD 10
|
||||
#define FIND_DEU_CHIP_VERSION chip_version()
|
||||
#define CLC_START IFX_DEU_CLK
|
||||
|
||||
#define AES_INIT 0
|
||||
#define DES_INIT 1
|
||||
#define ARC4_INIT 2
|
||||
#define SHA1_INIT 3
|
||||
#define MD5_INIT 4
|
||||
#define SHA1_HMAC_INIT 5
|
||||
#define MD5_HMAC_INIT 6
|
||||
|
||||
#define AES_START IFX_AES_CON
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
|
||||
#define WAIT_AES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (aes->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define WAIT_DES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (des->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define AES_DMA_MISC_CONFIG() \
|
||||
do { \
|
||||
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
|
||||
aes->controlr.KRE = 1; \
|
||||
aes->controlr.GO = 1; \
|
||||
} while(0)
|
||||
|
||||
#define SHA_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 0; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
#define MD5_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 1; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
/* DEU Common Structures for AR9*/
|
||||
|
||||
struct clc_controlr_t {
|
||||
u32 Res:26;
|
||||
u32 FSOE:1;
|
||||
u32 SBWE:1;
|
||||
u32 EDIS:1;
|
||||
u32 SPEN:1;
|
||||
u32 DISS:1;
|
||||
u32 DISR:1;
|
||||
|
||||
};
|
||||
|
||||
struct des_t {
|
||||
struct des_controlr { //10h
|
||||
u32 KRE:1;
|
||||
u32 reserved1:5;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 Res2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 Res3:2;
|
||||
u32 F:3;
|
||||
u32 O:3;
|
||||
u32 BUS:1;
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 M:3;
|
||||
|
||||
} controlr;
|
||||
u32 IHR; //14h
|
||||
u32 ILR; //18h
|
||||
u32 K1HR; //1c
|
||||
u32 K1LR; //
|
||||
u32 K2HR;
|
||||
u32 K2LR;
|
||||
u32 K3HR;
|
||||
u32 K3LR; //30h
|
||||
u32 IVHR; //34h
|
||||
u32 IVLR; //38
|
||||
u32 OHR; //3c
|
||||
u32 OLR; //40
|
||||
};
|
||||
|
||||
struct aes_t {
|
||||
struct aes_controlr {
|
||||
|
||||
u32 KRE:1;
|
||||
u32 reserved1:4;
|
||||
u32 PNK:1;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:2;
|
||||
u32 F:3; //fbs
|
||||
u32 O:3; //om
|
||||
u32 BUS:1; //bsy
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 KV:1;
|
||||
u32 K:2; //KL
|
||||
|
||||
} controlr;
|
||||
u32 ID3R; //80h
|
||||
u32 ID2R; //84h
|
||||
u32 ID1R; //88h
|
||||
u32 ID0R; //8Ch
|
||||
u32 K7R; //90h
|
||||
u32 K6R; //94h
|
||||
u32 K5R; //98h
|
||||
u32 K4R; //9Ch
|
||||
u32 K3R; //A0h
|
||||
u32 K2R; //A4h
|
||||
u32 K1R; //A8h
|
||||
u32 K0R; //ACh
|
||||
u32 IV3R; //B0h
|
||||
u32 IV2R; //B4h
|
||||
u32 IV1R; //B8h
|
||||
u32 IV0R; //BCh
|
||||
u32 OD3R; //D4h
|
||||
u32 OD2R; //D8h
|
||||
u32 OD1R; //DCh
|
||||
u32 OD0R; //E0h
|
||||
};
|
||||
|
||||
struct arc4_t {
|
||||
struct arc4_controlr {
|
||||
|
||||
u32 KRE:1;
|
||||
u32 KLEN:4;
|
||||
u32 KSAE:1;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 reserved1:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved2:8;
|
||||
u32 BUS:1; //bsy
|
||||
u32 reserved3:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 reserved4:4;
|
||||
|
||||
} controlr;
|
||||
u32 K3R; //104h
|
||||
u32 K2R; //108h
|
||||
u32 K1R; //10Ch
|
||||
u32 K0R; //110h
|
||||
|
||||
u32 IDLEN; //114h
|
||||
|
||||
u32 ID3R; //118h
|
||||
u32 ID2R; //11Ch
|
||||
u32 ID1R; //120h
|
||||
u32 ID0R; //124h
|
||||
|
||||
u32 OD3R; //128h
|
||||
u32 OD2R; //12Ch
|
||||
u32 OD1R; //130h
|
||||
u32 OD0R; //134h
|
||||
};
|
||||
|
||||
struct deu_hash_t {
|
||||
struct hash_controlr {
|
||||
u32 reserved1:5;
|
||||
u32 KHS:1;
|
||||
u32 GO:1;
|
||||
u32 INIT:1;
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:7;
|
||||
u32 DGRY:1;
|
||||
u32 BSY:1;
|
||||
u32 reserved4:1;
|
||||
u32 IRCL:1;
|
||||
u32 SM:1;
|
||||
u32 KYUE:1;
|
||||
u32 HMEN:1;
|
||||
u32 SSEN:1;
|
||||
u32 ALGO:1;
|
||||
|
||||
} controlr;
|
||||
u32 MR; //B4h
|
||||
u32 D1R; //B8h
|
||||
u32 D2R; //BCh
|
||||
u32 D3R; //C0h
|
||||
u32 D4R; //C4h
|
||||
u32 D5R; //C8h
|
||||
|
||||
u32 dummy; //CCh
|
||||
|
||||
u32 KIDX; //D0h
|
||||
u32 KEY; //D4h
|
||||
u32 DBN; //D8h
|
||||
};
|
||||
|
||||
|
||||
struct deu_dma_t {
|
||||
struct dma_controlr {
|
||||
u32 reserved1:22;
|
||||
u32 BS:2;
|
||||
u32 BSY:1;
|
||||
u32 reserved2:1;
|
||||
u32 ALGO:2;
|
||||
u32 RXCLS:2;
|
||||
u32 reserved3:1;
|
||||
u32 EN:1;
|
||||
|
||||
} controlr;
|
||||
};
|
||||
|
||||
#endif /* IFXMIPS_DEU_AR9_H */
|
||||
168
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_danube.c
Normal file
168
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_danube.c
Normal file
@@ -0,0 +1,168 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_danube.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for Danube
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_danube.c
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu driver file for danube
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu functions
|
||||
*/
|
||||
|
||||
/* Project header files */
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/io.h> //dma_cache_inv
|
||||
|
||||
#include "ifxmips_deu_dma.h"
|
||||
#include "ifxmips_deu_danube.h"
|
||||
|
||||
|
||||
/* Function Declerations */
|
||||
int aes_memory_allocate(int value);
|
||||
int des_memory_allocate(int value);
|
||||
void memory_release(u32 *addr);
|
||||
int aes_chip_init (void);
|
||||
void des_chip_init (void);
|
||||
int deu_dma_init (void);
|
||||
u32 endian_swap(u32 input);
|
||||
u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
|
||||
void dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void chip_version(void);
|
||||
void deu_dma_priv_init(void);
|
||||
void __exit ifxdeu_fini_dma(void);
|
||||
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
#define AES_START IFX_AES_CON
|
||||
#define CLC_START IFX_DEU_CLK
|
||||
|
||||
/* Variables definition */
|
||||
int ifx_danube_pre_1_4;
|
||||
u8 *g_dma_page_ptr = NULL;
|
||||
u8 *g_dma_block = NULL;
|
||||
u8 *g_dma_block2 = NULL;
|
||||
|
||||
deu_drv_priv_t deu_dma_priv;
|
||||
|
||||
|
||||
/*! \fn u32 endian_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief function is not used
|
||||
* \param input Data input to be swapped
|
||||
* \return input
|
||||
*/
|
||||
|
||||
u32 endian_swap(u32 input)
|
||||
{
|
||||
return input;
|
||||
}
|
||||
|
||||
/*! \fn u32 input_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief Swap the input data if the current chip is Danube version
|
||||
* 1.4 and do nothing to the data if the current chip is
|
||||
* Danube version 1.3
|
||||
* \param input data that needs to be swapped
|
||||
* \return input or swapped input
|
||||
*/
|
||||
|
||||
u32 input_swap(u32 input)
|
||||
{
|
||||
if (!ifx_danube_pre_1_4) {
|
||||
u8 *ptr = (u8 *)&input;
|
||||
return ((ptr[3] << 24) | (ptr[2] << 16) | (ptr[1] << 8) | ptr[0]);
|
||||
}
|
||||
else
|
||||
return input;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*! \fn void aes_chip_init (void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief initialize AES hardware
|
||||
*/
|
||||
|
||||
int aes_chip_init (void)
|
||||
{
|
||||
volatile struct aes_t *aes = (struct aes_t *) AES_START;
|
||||
|
||||
//start crypto engine with write to ILR
|
||||
aes->controlr.SM = 1;
|
||||
aes->controlr.ARS = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void des_chip_init (void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief initialize DES hardware
|
||||
*/
|
||||
|
||||
void des_chip_init (void)
|
||||
{
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START;
|
||||
|
||||
// start crypto engine with write to ILR
|
||||
des->controlr.SM = 1;
|
||||
des->controlr.ARS = 1;
|
||||
}
|
||||
|
||||
/*! \fn void chip_version (void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief To find the version of the chip by looking at the chip ID
|
||||
* \param ifx_danube_pre_1_4 (sets to 1 if Chip is Danube less than v1.4)
|
||||
*/
|
||||
#define IFX_MPS (KSEG1 | 0x1F107000)
|
||||
#define IFX_MPS_CHIPID ((volatile u32*)(IFX_MPS + 0x0344))
|
||||
|
||||
void chip_version(void)
|
||||
{
|
||||
|
||||
/* DANUBE PRE 1.4 SOFTWARE FIX */
|
||||
int chip_id = 0;
|
||||
chip_id = *IFX_MPS_CHIPID;
|
||||
chip_id >>= 28;
|
||||
|
||||
if (chip_id >= 4) {
|
||||
ifx_danube_pre_1_4 = 0;
|
||||
printk("Danube Chip ver. 1.4 detected. \n");
|
||||
}
|
||||
else {
|
||||
ifx_danube_pre_1_4 = 1;
|
||||
printk("Danube Chip ver. 1.3 or below detected. \n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
258
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_danube.h
Normal file
258
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_danube.h
Normal file
@@ -0,0 +1,258 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_danube.h
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for Danube
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_danube.h
|
||||
\brief board specific driver header file for danube
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu header files
|
||||
*/
|
||||
|
||||
#ifndef IFXMIPS_DEU_DANUBE_H
|
||||
#define IFXMIPS_DEU_DANUBE_H
|
||||
|
||||
/* Project Header Files */
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
|
||||
|
||||
#define INPUT_ENDIAN_SWAP(input) input_swap(input)
|
||||
#define DEU_ENDIAN_SWAP(input) endian_swap(input)
|
||||
#define FIND_DEU_CHIP_VERSION chip_version()
|
||||
#define AES_DMA_MISC_CONFIG()
|
||||
#define CLC_START IFX_DEU_CLK
|
||||
|
||||
#define AES_START IFX_AES_CON
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
|
||||
#define AES_INIT 0
|
||||
#define DES_INIT 1
|
||||
#define SHA1_INIT 2
|
||||
#define MD5_INIT 3
|
||||
|
||||
#define WAIT_AES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (aes->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define WAIT_DES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (des->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define SHA_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 0; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
#define MD5_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 1; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
/* DEU STRUCTURES */
|
||||
|
||||
struct clc_controlr_t {
|
||||
u32 Res:26;
|
||||
u32 FSOE:1;
|
||||
u32 SBWE:1;
|
||||
u32 EDIS:1;
|
||||
u32 SPEN:1;
|
||||
u32 DISS:1;
|
||||
u32 DISR:1;
|
||||
|
||||
};
|
||||
|
||||
struct des_t {
|
||||
struct des_controlr { //10h
|
||||
u32 KRE:1;
|
||||
u32 reserved1:5;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 Res2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 Res3:2;
|
||||
u32 F:3;
|
||||
u32 O:3;
|
||||
u32 BUS:1;
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 M:3;
|
||||
|
||||
} controlr;
|
||||
u32 IHR; //14h
|
||||
u32 ILR; //18h
|
||||
u32 K1HR; //1c
|
||||
u32 K1LR; //
|
||||
u32 K2HR;
|
||||
u32 K2LR;
|
||||
u32 K3HR;
|
||||
u32 K3LR; //30h
|
||||
u32 IVHR; //34h
|
||||
u32 IVLR; //38
|
||||
u32 OHR; //3c
|
||||
u32 OLR; //40
|
||||
};
|
||||
|
||||
struct aes_t {
|
||||
struct aes_controlr {
|
||||
|
||||
u32 KRE:1;
|
||||
u32 reserved1:4;
|
||||
u32 PNK:1;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:2;
|
||||
|
||||
u32 F:3; //fbs
|
||||
u32 O:3; //om
|
||||
u32 BUS:1; //bsy
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 KV:1;
|
||||
u32 K:2; //KL
|
||||
|
||||
} controlr;
|
||||
u32 ID3R; //80h
|
||||
u32 ID2R; //84h
|
||||
u32 ID1R; //88h
|
||||
u32 ID0R; //8Ch
|
||||
u32 K7R; //90h
|
||||
u32 K6R; //94h
|
||||
u32 K5R; //98h
|
||||
u32 K4R; //9Ch
|
||||
u32 K3R; //A0h
|
||||
u32 K2R; //A4h
|
||||
u32 K1R; //A8h
|
||||
u32 K0R; //ACh
|
||||
u32 IV3R; //B0h
|
||||
u32 IV2R; //B4h
|
||||
u32 IV1R; //B8h
|
||||
u32 IV0R; //BCh
|
||||
u32 OD3R; //D4h
|
||||
u32 OD2R; //D8h
|
||||
u32 OD1R; //DCh
|
||||
u32 OD0R; //E0h
|
||||
};
|
||||
|
||||
struct deu_hash_t {
|
||||
struct hash_controlr {
|
||||
u32 reserved1:5;
|
||||
u32 KHS:1;
|
||||
u32 GO:1;
|
||||
u32 INIT:1;
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:7;
|
||||
u32 DGRY:1;
|
||||
u32 BSY:1;
|
||||
u32 reserved4:1;
|
||||
u32 IRCL:1;
|
||||
u32 SM:1;
|
||||
u32 KYUE:1;
|
||||
u32 HMEN:1;
|
||||
u32 SSEN:1;
|
||||
u32 ALGO:1;
|
||||
|
||||
} controlr;
|
||||
u32 MR; //B4h
|
||||
u32 D1R; //B8h
|
||||
u32 D2R; //BCh
|
||||
u32 D3R; //C0h
|
||||
u32 D4R; //C4h
|
||||
u32 D5R; //C8h
|
||||
|
||||
u32 dummy; //CCh
|
||||
|
||||
u32 KIDX; //D0h
|
||||
u32 KEY; //D4h
|
||||
u32 DBN; //D8h
|
||||
};
|
||||
|
||||
struct deu_dma_t {
|
||||
struct dma_controlr {
|
||||
u32 reserved1:22;
|
||||
u32 BS:2;
|
||||
u32 BSY:1;
|
||||
u32 reserved2:1;
|
||||
u32 ALGO:2;
|
||||
u32 RXCLS:2;
|
||||
u32 reserved3:1;
|
||||
u32 EN:1;
|
||||
|
||||
} controlr;
|
||||
};
|
||||
|
||||
#endif /* IFXMIPS_DEU_DANUBE_H */
|
||||
42
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_dma.c
Normal file
42
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_dma.c
Normal file
@@ -0,0 +1,42 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_dma.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for Danube
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08 Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup IFX_API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_dma.c
|
||||
\ingroup IFX_DEU
|
||||
\brief DMA deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DMA_FUNCTIONS IFX_DMA_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief deu-dma driver functions
|
||||
*/
|
||||
|
||||
/* Project header files */
|
||||
|
||||
70
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_dma.h
Normal file
70
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_dma.h
Normal file
@@ -0,0 +1,70 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_dma.h
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
|
||||
/*!
|
||||
\addtogroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_dma.h
|
||||
\ingroup IFX_DEU
|
||||
\brief DMA deu driver header file
|
||||
*/
|
||||
|
||||
#ifndef IFXMIPS_DEU_DMA_H
|
||||
#define IFXMIPS_DEU_DMA_H
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/version.h>
|
||||
|
||||
// must match the size of memory block allocated for g_dma_block and g_dma_block2
|
||||
#define DEU_MAX_PACKET_SIZE (PAGE_SIZE >> 1)
|
||||
|
||||
typedef struct ifx_deu_device {
|
||||
struct dma_device_info *dma_device;
|
||||
u8 *dst;
|
||||
u8 *src;
|
||||
int len;
|
||||
int dst_count;
|
||||
int src_count;
|
||||
int recv_count;
|
||||
int packet_size;
|
||||
int packet_num;
|
||||
wait_queue_entry_t wait;
|
||||
} _ifx_deu_device;
|
||||
|
||||
extern _ifx_deu_device ifx_deu[1];
|
||||
|
||||
extern int deu_dma_intr_handler (struct dma_device_info *, int);
|
||||
extern u8 *deu_dma_buffer_alloc (int, int *, void **);
|
||||
extern int deu_dma_buffer_free (u8 *, void *);
|
||||
extern void deu_dma_inactivate_poll(struct dma_device_info* dma_dev);
|
||||
extern void deu_dma_activate_poll (struct dma_device_info* dma_dev);
|
||||
extern struct dma_device_info* deu_dma_reserve(struct dma_device_info** dma_device);
|
||||
extern int deu_dma_release(struct dma_device_info** dma_device);
|
||||
|
||||
#endif /* IFMIPS_DEU_DMA_H */
|
||||
144
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_vr9.c
Normal file
144
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_vr9.c
Normal file
@@ -0,0 +1,144 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_vr9.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for VR9
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_vr9.c
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu driver file for vr9
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu driver functions
|
||||
*/
|
||||
|
||||
/* Project header files */
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/io.h> //dma_cache_inv
|
||||
|
||||
#include "ifxmips_deu_dma.h"
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
|
||||
/* Function decleration */
|
||||
void aes_chip_init (void);
|
||||
void des_chip_init (void);
|
||||
int deu_dma_init (void);
|
||||
void deu_dma_priv_init(void);
|
||||
u32 endian_swap(u32 input);
|
||||
u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
|
||||
void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
|
||||
void __exit ifxdeu_fini_dma(void);
|
||||
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
#define AES_START IFX_AES_CON
|
||||
|
||||
/* Variables */
|
||||
|
||||
u8 *g_dma_page_ptr = NULL;
|
||||
u8 *g_dma_block = NULL;
|
||||
u8 *g_dma_block2 = NULL;
|
||||
|
||||
deu_drv_priv_t deu_dma_priv;
|
||||
|
||||
|
||||
/*! \fn u32 endian_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief Swap data given to the function
|
||||
* \param input Data input to be swapped
|
||||
* \return either the swapped data or the input data depending on whether it is in DMA mode or FPI mode
|
||||
*/
|
||||
|
||||
|
||||
u32 endian_swap(u32 input)
|
||||
{
|
||||
return input;
|
||||
}
|
||||
|
||||
/*! \fn u32 input_swap(u32 input)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief Not used
|
||||
* \return input
|
||||
*/
|
||||
|
||||
u32 input_swap(u32 input)
|
||||
{
|
||||
return input;
|
||||
}
|
||||
|
||||
/*! \fn void aes_chip_init (void)
|
||||
* \ingroup BOARD_SPECIFIC_FUNCTIONS
|
||||
* \brief initialize AES hardware
|
||||
*/
|
||||
|
||||
void aes_chip_init (void)
|
||||
{
|
||||
volatile struct aes_t *aes = (struct aes_t *) AES_START;
|
||||
|
||||
// start crypto engine with write to ILR
|
||||
aes->controlr.SM = 1;
|
||||
aes->controlr.NDC = 1;
|
||||
asm("sync");
|
||||
aes->controlr.ENDI = 1;
|
||||
asm("sync");
|
||||
aes->controlr.ARS = 0;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void des_chip_init (void)
|
||||
* \ingroup IFX_AES_FUNCTIONS
|
||||
* \brief initialize DES hardware
|
||||
*/
|
||||
|
||||
void des_chip_init (void)
|
||||
{
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START;
|
||||
|
||||
// start crypto engine with write to ILR
|
||||
des->controlr.SM = 1;
|
||||
des->controlr.NDC = 1;
|
||||
asm("sync");
|
||||
des->controlr.ENDI = 1;
|
||||
asm("sync");
|
||||
des->controlr.ARS = 0;
|
||||
|
||||
}
|
||||
/*! \fn void chip_version(void)
|
||||
* \ingroup IFX_DES_FUNCTIONS
|
||||
* \brief function not used in VR9
|
||||
*/
|
||||
void chip_version(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
324
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_vr9.h
Normal file
324
package/kernel/lantiq/ltq-deu/src/ifxmips_deu_vr9.h
Normal file
@@ -0,0 +1,324 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_deu_vr9.h
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for VR9
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_deu_vr9.h
|
||||
\ingroup IFX_DEU
|
||||
\brief board specific deu driver header file for vr9
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_DEU_DEFINITIONS IFX_DEU_DEFINITIONS
|
||||
\brief deu driver header file
|
||||
*/
|
||||
|
||||
|
||||
#ifndef IFXMIPS_DEU_VR9_H
|
||||
#define IFXMIPS_DEU_VR9_H
|
||||
|
||||
/* Project Header Files */
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <crypto/algapi.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include "ifxmips_deu.h"
|
||||
|
||||
|
||||
#define AES_INIT 1
|
||||
#define DES_INIT 2
|
||||
#define ARC4_INIT 3
|
||||
#define SHA1_INIT 4
|
||||
#define MD5_INIT 5
|
||||
#define SHA1_HMAC_INIT 6
|
||||
#define MD5_HMAC_INIT 7
|
||||
|
||||
#define AES_START IFX_AES_CON
|
||||
#define DES_3DES_START IFX_DES_CON
|
||||
|
||||
#if 0
|
||||
#define AES_IDLE 0
|
||||
#define AES_BUSY 1
|
||||
#define AES_STARTED 2
|
||||
#define AES_COMPLETED 3
|
||||
#define DES_IDLE 0
|
||||
#define DES_BUSY 1
|
||||
#define DES_STARTED 2
|
||||
#define DES_COMPLETED 3
|
||||
#endif
|
||||
|
||||
/* SHA1 CONSTANT */
|
||||
#define HASH_CON_VALUE 0x0701002C
|
||||
|
||||
#define INPUT_ENDIAN_SWAP(input) input_swap(input)
|
||||
#define DEU_ENDIAN_SWAP(input) endian_swap(input)
|
||||
#define FIND_DEU_CHIP_VERSION chip_version()
|
||||
|
||||
#if defined (CONFIG_AR10)
|
||||
#define DELAY_PERIOD 30
|
||||
#else
|
||||
#define DELAY_PERIOD 10
|
||||
#endif
|
||||
|
||||
#define WAIT_AES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (aes->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define WAIT_DES_DMA_READY() \
|
||||
do { \
|
||||
int i; \
|
||||
volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
|
||||
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
|
||||
for (i = 0; i < 10; i++) \
|
||||
udelay(DELAY_PERIOD); \
|
||||
while (dma->controlr.BSY) {}; \
|
||||
while (des->controlr.BUS) {}; \
|
||||
} while (0)
|
||||
|
||||
#define AES_DMA_MISC_CONFIG() \
|
||||
do { \
|
||||
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
|
||||
aes->controlr.KRE = 1; \
|
||||
aes->controlr.GO = 1; \
|
||||
} while(0)
|
||||
|
||||
#define SHA_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.ENDI = 1; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 0; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
#define MD5_HASH_INIT \
|
||||
do { \
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
|
||||
hash->controlr.ENDI = 1; \
|
||||
hash->controlr.SM = 1; \
|
||||
hash->controlr.ALGO = 1; \
|
||||
hash->controlr.INIT = 1; \
|
||||
} while(0)
|
||||
|
||||
/* DEU Common Structures for AR9*/
|
||||
|
||||
struct clc_controlr_t {
|
||||
u32 Res:26;
|
||||
u32 FSOE:1;
|
||||
u32 SBWE:1;
|
||||
u32 EDIS:1;
|
||||
u32 SPEN:1;
|
||||
u32 DISS:1;
|
||||
u32 DISR:1;
|
||||
|
||||
};
|
||||
|
||||
struct des_t {
|
||||
struct des_controlr { //10h
|
||||
u32 KRE:1;
|
||||
u32 reserved1:5;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 Res2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 Res3:2;
|
||||
u32 F:3;
|
||||
u32 O:3;
|
||||
u32 BUS:1;
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 M:3;
|
||||
|
||||
} controlr;
|
||||
u32 IHR; //14h
|
||||
u32 ILR; //18h
|
||||
u32 K1HR; //1c
|
||||
u32 K1LR; //
|
||||
u32 K2HR;
|
||||
u32 K2LR;
|
||||
u32 K3HR;
|
||||
u32 K3LR; //30h
|
||||
u32 IVHR; //34h
|
||||
u32 IVLR; //38
|
||||
u32 OHR; //3c
|
||||
u32 OLR; //40
|
||||
};
|
||||
|
||||
struct aes_t {
|
||||
struct aes_controlr {
|
||||
|
||||
u32 KRE:1;
|
||||
u32 reserved1:4;
|
||||
u32 PNK:1;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:2;
|
||||
u32 F:3; //fbs
|
||||
u32 O:3; //om
|
||||
u32 BUS:1; //bsy
|
||||
u32 DAU:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 E_D:1;
|
||||
u32 KV:1;
|
||||
u32 K:2; //KL
|
||||
|
||||
} controlr;
|
||||
u32 ID3R; //80h
|
||||
u32 ID2R; //84h
|
||||
u32 ID1R; //88h
|
||||
u32 ID0R; //8Ch
|
||||
u32 K7R; //90h
|
||||
u32 K6R; //94h
|
||||
u32 K5R; //98h
|
||||
u32 K4R; //9Ch
|
||||
u32 K3R; //A0h
|
||||
u32 K2R; //A4h
|
||||
u32 K1R; //A8h
|
||||
u32 K0R; //ACh
|
||||
u32 IV3R; //B0h
|
||||
u32 IV2R; //B4h
|
||||
u32 IV1R; //B8h
|
||||
u32 IV0R; //BCh
|
||||
u32 OD3R; //D4h
|
||||
u32 OD2R; //D8h
|
||||
u32 OD1R; //DCh
|
||||
u32 OD0R; //E0h
|
||||
};
|
||||
|
||||
struct arc4_t {
|
||||
struct arc4_controlr {
|
||||
|
||||
u32 KRE:1;
|
||||
u32 KLEN:4;
|
||||
u32 KSAE:1;
|
||||
u32 GO:1;
|
||||
u32 STP:1;
|
||||
u32 reserved1:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved2:8;
|
||||
u32 BUS:1; //bsy
|
||||
u32 reserved3:1;
|
||||
u32 ARS:1;
|
||||
u32 SM:1;
|
||||
u32 reserved4:4;
|
||||
|
||||
} controlr;
|
||||
u32 K3R; //104h
|
||||
u32 K2R; //108h
|
||||
u32 K1R; //10Ch
|
||||
u32 K0R; //110h
|
||||
|
||||
u32 IDLEN; //114h
|
||||
|
||||
u32 ID3R; //118h
|
||||
u32 ID2R; //11Ch
|
||||
u32 ID1R; //120h
|
||||
u32 ID0R; //124h
|
||||
|
||||
u32 OD3R; //128h
|
||||
u32 OD2R; //12Ch
|
||||
u32 OD1R; //130h
|
||||
u32 OD0R; //134h
|
||||
};
|
||||
|
||||
struct deu_hash_t {
|
||||
struct hash_controlr {
|
||||
u32 reserved1:5;
|
||||
u32 KHS:1;
|
||||
u32 GO:1;
|
||||
u32 INIT:1;
|
||||
u32 reserved2:6;
|
||||
u32 NDC:1;
|
||||
u32 ENDI:1;
|
||||
u32 reserved3:7;
|
||||
u32 DGRY:1;
|
||||
u32 BSY:1;
|
||||
u32 reserved4:1;
|
||||
u32 IRCL:1;
|
||||
u32 SM:1;
|
||||
u32 KYUE:1;
|
||||
u32 HMEN:1;
|
||||
u32 SSEN:1;
|
||||
u32 ALGO:1;
|
||||
|
||||
} controlr;
|
||||
u32 MR; //B4h
|
||||
u32 D1R; //B8h
|
||||
u32 D2R; //BCh
|
||||
u32 D3R; //C0h
|
||||
u32 D4R; //C4h
|
||||
u32 D5R; //C8h
|
||||
|
||||
u32 dummy; //CCh
|
||||
|
||||
u32 KIDX; //D0h
|
||||
u32 KEY; //D4h
|
||||
u32 DBN; //D8h
|
||||
};
|
||||
|
||||
|
||||
struct deu_dma_t {
|
||||
struct dma_controlr {
|
||||
u32 reserved1:22;
|
||||
u32 BS:2;
|
||||
u32 BSY:1;
|
||||
u32 reserved2:1;
|
||||
u32 ALGO:2;
|
||||
u32 RXCLS:2;
|
||||
u32 reserved3:1;
|
||||
u32 EN:1;
|
||||
|
||||
} controlr;
|
||||
};
|
||||
|
||||
#endif /* IFXMIPS_DEU_VR9_H */
|
||||
276
package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
Normal file
276
package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
Normal file
@@ -0,0 +1,276 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_md5.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for UEIP
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_md5.c
|
||||
\ingroup IFX_DEU
|
||||
\brief MD5 encryption deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_MD5_FUNCTIONS IFX_MD5_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx deu MD5 functions
|
||||
*/
|
||||
|
||||
/*Project header files */
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/types.h>
|
||||
#include <crypto/internal/hash.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
/* Project header */
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_deu_danube.h"
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Plaform Unknwon!"
|
||||
#endif
|
||||
|
||||
#define MD5_DIGEST_SIZE 16
|
||||
#define MD5_HMAC_BLOCK_SIZE 64
|
||||
#define MD5_BLOCK_WORDS 16
|
||||
#define MD5_HASH_WORDS 4
|
||||
#define HASH_START IFX_HASH_CON
|
||||
|
||||
//#define CRYPTO_DEBUG
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
|
||||
struct md5_ctx {
|
||||
int started;
|
||||
u32 hash[MD5_HASH_WORDS];
|
||||
u32 block[MD5_BLOCK_WORDS];
|
||||
u64 byte_count;
|
||||
};
|
||||
|
||||
extern int disable_deudma;
|
||||
|
||||
/*! \fn static void md5_transform(u32 *hash, u32 const *in)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief main interface to md5 hardware
|
||||
* \param hash current hash value
|
||||
* \param in 64-byte block of input
|
||||
*/
|
||||
static void md5_transform(struct md5_ctx *mctx, u32 *hash, u32 const *in)
|
||||
{
|
||||
int i;
|
||||
volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
unsigned long flag;
|
||||
|
||||
CRTCL_SECT_HASH_START;
|
||||
|
||||
MD5_HASH_INIT;
|
||||
|
||||
if (mctx->started) {
|
||||
hashs->D1R = *((u32 *) hash + 0);
|
||||
hashs->D2R = *((u32 *) hash + 1);
|
||||
hashs->D3R = *((u32 *) hash + 2);
|
||||
hashs->D4R = *((u32 *) hash + 3);
|
||||
}
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
hashs->MR = in[i];
|
||||
// printk("in[%d]: %08x\n", i, in[i]);
|
||||
};
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
*((u32 *) hash + 0) = hashs->D1R;
|
||||
*((u32 *) hash + 1) = hashs->D2R;
|
||||
*((u32 *) hash + 2) = hashs->D3R;
|
||||
*((u32 *) hash + 3) = hashs->D4R;
|
||||
|
||||
CRTCL_SECT_HASH_END;
|
||||
|
||||
mctx->started = 1;
|
||||
}
|
||||
|
||||
/*! \fn static inline void md5_transform_helper(struct md5_ctx *ctx)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief interfacing function for md5_transform()
|
||||
* \param ctx crypto context
|
||||
*/
|
||||
static inline void md5_transform_helper(struct md5_ctx *ctx)
|
||||
{
|
||||
//le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32));
|
||||
md5_transform(ctx, ctx->hash, ctx->block);
|
||||
}
|
||||
|
||||
/*! \fn static void md5_init(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief initialize md5 hardware
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int md5_init(struct shash_desc *desc)
|
||||
{
|
||||
struct md5_ctx *mctx = shash_desc_ctx(desc);
|
||||
//volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START;
|
||||
|
||||
mctx->byte_count = 0;
|
||||
mctx->started = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static void md5_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief on-the-fly md5 computation
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param data input data
|
||||
* \param len size of input data
|
||||
*/
|
||||
static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len)
|
||||
{
|
||||
struct md5_ctx *mctx = shash_desc_ctx(desc);
|
||||
const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
|
||||
|
||||
mctx->byte_count += len;
|
||||
|
||||
if (avail > len) {
|
||||
memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
|
||||
data, len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
|
||||
data, avail);
|
||||
|
||||
md5_transform_helper(mctx);
|
||||
data += avail;
|
||||
len -= avail;
|
||||
|
||||
while (len >= sizeof(mctx->block)) {
|
||||
memcpy(mctx->block, data, sizeof(mctx->block));
|
||||
md5_transform_helper(mctx);
|
||||
data += sizeof(mctx->block);
|
||||
len -= sizeof(mctx->block);
|
||||
}
|
||||
|
||||
memcpy(mctx->block, data, len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static void md5_final(struct crypto_tfm *tfm, u8 *out)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief compute final md5 value
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final md5 output value
|
||||
*/
|
||||
static int md5_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct md5_ctx *mctx = shash_desc_ctx(desc);
|
||||
const unsigned int offset = mctx->byte_count & 0x3f;
|
||||
char *p = (char *)mctx->block + offset;
|
||||
int padding = 56 - (offset + 1);
|
||||
//volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
//unsigned long flag;
|
||||
|
||||
*p++ = 0x80;
|
||||
if (padding < 0) {
|
||||
memset(p, 0x00, padding + sizeof (u64));
|
||||
md5_transform_helper(mctx);
|
||||
p = (char *)mctx->block;
|
||||
padding = 56;
|
||||
}
|
||||
|
||||
memset(p, 0, padding);
|
||||
mctx->block[14] = le32_to_cpu(mctx->byte_count << 3);
|
||||
mctx->block[15] = le32_to_cpu(mctx->byte_count >> 29);
|
||||
|
||||
md5_transform(mctx, mctx->hash, mctx->block);
|
||||
|
||||
memcpy(out, mctx->hash, MD5_DIGEST_SIZE);
|
||||
|
||||
// Wipe context
|
||||
memset(mctx, 0, sizeof(*mctx));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief MD5 function mappings
|
||||
*/
|
||||
static struct shash_alg ifxdeu_md5_alg = {
|
||||
.digestsize = MD5_DIGEST_SIZE,
|
||||
.init = md5_init,
|
||||
.update = md5_update,
|
||||
.final = md5_final,
|
||||
.descsize = sizeof(struct md5_ctx),
|
||||
.base = {
|
||||
.cra_name = "md5",
|
||||
.cra_driver_name= "ifxdeu-md5",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_HASH | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = MD5_HMAC_BLOCK_SIZE,
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
};
|
||||
|
||||
/*! \fn int ifxdeu_init_md5 (void)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief initialize md5 driver
|
||||
*/
|
||||
int ifxdeu_init_md5 (void)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
if ((ret = crypto_register_shash(&ifxdeu_md5_alg)))
|
||||
goto md5_err;
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU MD5 initialized%s.\n", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
md5_err:
|
||||
printk(KERN_ERR "IFX DEU MD5 initialization failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! \fn void ifxdeu_fini_md5 (void)
|
||||
* \ingroup IFX_MD5_FUNCTIONS
|
||||
* \brief unregister md5 driver
|
||||
*/
|
||||
|
||||
void ifxdeu_fini_md5 (void)
|
||||
{
|
||||
crypto_unregister_shash(&ifxdeu_md5_alg);
|
||||
|
||||
}
|
||||
428
package/kernel/lantiq/ltq-deu/src/ifxmips_md5_hmac.c
Normal file
428
package/kernel/lantiq/ltq-deu/src/ifxmips_md5_hmac.c
Normal file
@@ -0,0 +1,428 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_md5_hmac.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for UEIP
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
** 21,March 2011 Mohammad Firdaus Changes for Kernel 2.6.32 and IPSec integration
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_md5_hmac.c
|
||||
\ingroup IFX_DEU
|
||||
\brief MD5-HMAC encryption deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_MD5_HMAC_FUNCTIONS IFX_MD5_HMAC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx md5-hmac driver functions
|
||||
*/
|
||||
|
||||
/* Project Header files */
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/types.h>
|
||||
#include <crypto/internal/hash.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
#if defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Plaform Unknwon!"
|
||||
#endif
|
||||
|
||||
#define MD5_DIGEST_SIZE 16
|
||||
#define MD5_HMAC_BLOCK_SIZE 64
|
||||
#define MD5_BLOCK_WORDS 16
|
||||
#define MD5_HASH_WORDS 4
|
||||
#define MD5_HMAC_DBN_TEMP_SIZE 1024 // size in dword, needed for dbn workaround
|
||||
#define HASH_START IFX_HASH_CON
|
||||
|
||||
//#define CRYPTO_DEBUG
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
|
||||
#define MAX_HASH_KEYLEN 64
|
||||
|
||||
struct md5_hmac_ctx {
|
||||
u8 key[MAX_HASH_KEYLEN];
|
||||
u32 hash[MD5_HASH_WORDS];
|
||||
u32 block[MD5_BLOCK_WORDS];
|
||||
u64 byte_count;
|
||||
u32 dbn;
|
||||
int started;
|
||||
unsigned int keylen;
|
||||
struct shash_desc *desc;
|
||||
u32 (*temp)[MD5_BLOCK_WORDS];
|
||||
};
|
||||
|
||||
extern int disable_deudma;
|
||||
|
||||
static int md5_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final);
|
||||
|
||||
/*! \fn static void md5_hmac_transform(struct crypto_tfm *tfm, u32 const *in)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief save input block to context
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param in 64-byte block of input
|
||||
*/
|
||||
static void md5_hmac_transform(struct shash_desc *desc, u32 const *in)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_shash_ctx(desc->tfm);
|
||||
|
||||
if ( ((mctx->dbn<<4)+1) > MD5_HMAC_DBN_TEMP_SIZE )
|
||||
{
|
||||
//printk("MD5_HMAC_DBN_TEMP_SIZE exceeded\n");
|
||||
md5_hmac_final_impl(desc, (u8 *)mctx->hash, false);
|
||||
}
|
||||
|
||||
memcpy(&mctx->temp[mctx->dbn], in, 64); //dbn workaround
|
||||
mctx->dbn += 1;
|
||||
}
|
||||
|
||||
/*! \fn int md5_hmac_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief sets md5 hmac key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length greater than 64 bytes IS NOT SUPPORTED
|
||||
*/
|
||||
static int md5_hmac_setkey(struct crypto_shash *tfm, const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_shash_ctx(tfm);
|
||||
int err;
|
||||
//printk("copying keys to context with length %d\n", keylen);
|
||||
|
||||
if (keylen > MAX_HASH_KEYLEN) {
|
||||
char *hash_alg_name = "md5";
|
||||
|
||||
mctx->desc->tfm = crypto_alloc_shash(hash_alg_name, 0, 0);
|
||||
if (IS_ERR(mctx->desc->tfm)) return PTR_ERR(mctx->desc->tfm);
|
||||
|
||||
memset(mctx->key, 0, MAX_HASH_KEYLEN);
|
||||
err = crypto_shash_digest(mctx->desc, key, keylen, mctx->key);
|
||||
if (err) return err;
|
||||
|
||||
mctx->keylen = MD5_DIGEST_SIZE;
|
||||
|
||||
crypto_free_shash(mctx->desc->tfm);
|
||||
} else {
|
||||
memcpy(mctx->key, key, keylen);
|
||||
mctx->keylen = keylen;
|
||||
}
|
||||
memset(mctx->key + mctx->keylen, 0, MAX_HASH_KEYLEN - mctx->keylen);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn int md5_hmac_setkey_hw(const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief sets md5 hmac key into the hardware registers
|
||||
* \param key input key
|
||||
* \param keylen key length greater than 64 bytes IS NOT SUPPORTED
|
||||
*/
|
||||
static int md5_hmac_setkey_hw(const u8 *key, unsigned int keylen)
|
||||
{
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START;
|
||||
int i, j;
|
||||
u32 *in_key = (u32 *)key;
|
||||
|
||||
//printk("\nsetkey keylen: %d\n key: ", keylen);
|
||||
|
||||
hash->KIDX |= 0x80000000; // reset all 16 words of the key to '0'
|
||||
j = 0;
|
||||
for (i = 0; i < keylen; i+=4)
|
||||
{
|
||||
hash->KIDX = j;
|
||||
asm("sync");
|
||||
hash->KEY = *((u32 *) in_key + j);
|
||||
asm("sync");
|
||||
j++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void md5_hmac_init(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief initialize md5 hmac context
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int md5_hmac_init(struct shash_desc *desc)
|
||||
{
|
||||
|
||||
struct md5_hmac_ctx *mctx = crypto_shash_ctx(desc->tfm);
|
||||
|
||||
|
||||
mctx->dbn = 0; //dbn workaround
|
||||
mctx->started = 0;
|
||||
mctx->byte_count = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void md5_hmac_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief on-the-fly md5 hmac computation
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param data input data
|
||||
* \param len size of input data
|
||||
*/
|
||||
static int md5_hmac_update(struct shash_desc *desc, const u8 *data, unsigned int len)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_shash_ctx(desc->tfm);
|
||||
const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
|
||||
|
||||
mctx->byte_count += len;
|
||||
|
||||
if (avail > len) {
|
||||
memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
|
||||
data, len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
|
||||
data, avail);
|
||||
|
||||
md5_hmac_transform(desc, mctx->block);
|
||||
data += avail;
|
||||
len -= avail;
|
||||
|
||||
while (len >= sizeof(mctx->block)) {
|
||||
memcpy(mctx->block, data, sizeof(mctx->block));
|
||||
md5_hmac_transform(desc, mctx->block);
|
||||
data += sizeof(mctx->block);
|
||||
len -= sizeof(mctx->block);
|
||||
}
|
||||
|
||||
memcpy(mctx->block, data, len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static int md5_hmac_final(struct crypto_tfm *tfm, u8 *out)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief call md5_hmac_final_impl with hash_final true
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final md5 hmac output value
|
||||
*/
|
||||
static int md5_hmac_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
return md5_hmac_final_impl(desc, out, true);
|
||||
}
|
||||
|
||||
/*! \fn static int md5_hmac_final_impl(struct crypto_tfm *tfm, u8 *out, bool hash_final)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief compute final or intermediate md5 hmac value
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final md5 hmac output value
|
||||
* \param in finalize or intermediate processing
|
||||
*/
|
||||
static int md5_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_shash_ctx(desc->tfm);
|
||||
const unsigned int offset = mctx->byte_count & 0x3f;
|
||||
char *p = (char *)mctx->block + offset;
|
||||
int padding = 56 - (offset + 1);
|
||||
volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
unsigned long flag;
|
||||
int i = 0;
|
||||
int dbn;
|
||||
u32 *in = mctx->temp[0];
|
||||
|
||||
if (hash_final) {
|
||||
*p++ = 0x80;
|
||||
if (padding < 0) {
|
||||
memset(p, 0x00, padding + sizeof (u64));
|
||||
md5_hmac_transform(desc, mctx->block);
|
||||
p = (char *)mctx->block;
|
||||
padding = 56;
|
||||
}
|
||||
|
||||
memset(p, 0, padding);
|
||||
mctx->block[14] = le32_to_cpu((mctx->byte_count + 64) << 3); // need to add 512 bit of the IPAD operation
|
||||
mctx->block[15] = 0x00000000;
|
||||
|
||||
md5_hmac_transform(desc, mctx->block);
|
||||
}
|
||||
|
||||
CRTCL_SECT_HASH_START;
|
||||
|
||||
MD5_HASH_INIT;
|
||||
|
||||
md5_hmac_setkey_hw(mctx->key, mctx->keylen);
|
||||
|
||||
//printk("\ndbn = %d\n", mctx->dbn);
|
||||
if (hash_final) {
|
||||
hashs->DBN = mctx->dbn;
|
||||
} else {
|
||||
hashs->DBN = mctx->dbn + 5;
|
||||
}
|
||||
asm("sync");
|
||||
|
||||
*IFX_HASH_CON = 0x0703002D; //khs, go, init, ndc, endi, kyue, hmen, md5
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
if (mctx->started) {
|
||||
hashs->D1R = *((u32 *) mctx->hash + 0);
|
||||
hashs->D2R = *((u32 *) mctx->hash + 1);
|
||||
hashs->D3R = *((u32 *) mctx->hash + 2);
|
||||
hashs->D4R = *((u32 *) mctx->hash + 3);
|
||||
} else {
|
||||
mctx->started = 1;
|
||||
}
|
||||
|
||||
for (dbn = 0; dbn < mctx->dbn; dbn++)
|
||||
{
|
||||
for (i = 0; i < 16; i++) {
|
||||
hashs->MR = in[i];
|
||||
};
|
||||
|
||||
hashs->controlr.GO = 1;
|
||||
asm("sync");
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
in += 16;
|
||||
}
|
||||
|
||||
#if 1
|
||||
if (hash_final) {
|
||||
//wait for digest ready
|
||||
while (! hashs->controlr.DGRY) {
|
||||
// this will not take long
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
*((u32 *) out + 0) = hashs->D1R;
|
||||
*((u32 *) out + 1) = hashs->D2R;
|
||||
*((u32 *) out + 2) = hashs->D3R;
|
||||
*((u32 *) out + 3) = hashs->D4R;
|
||||
|
||||
CRTCL_SECT_HASH_END;
|
||||
|
||||
if (hash_final) {
|
||||
/* reset the context after we finish with the hash */
|
||||
md5_hmac_init(desc);
|
||||
} else {
|
||||
mctx->dbn = 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void md5_hmac_init_tfm(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief initialize pointers in md5_hmac_ctx
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int md5_hmac_init_tfm(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_tfm_ctx(tfm);
|
||||
mctx->temp = kzalloc(4 * MD5_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
|
||||
if (IS_ERR(mctx->temp)) return PTR_ERR(mctx->temp);
|
||||
mctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
|
||||
if (IS_ERR(mctx->desc)) return PTR_ERR(mctx->desc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void md5_hmac_exit_tfm(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief free pointers in md5_hmac_ctx
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static void md5_hmac_exit_tfm(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct md5_hmac_ctx *mctx = crypto_tfm_ctx(tfm);
|
||||
kfree(mctx->temp);
|
||||
kfree(mctx->desc);
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief MD5_HMAC function mappings
|
||||
*/
|
||||
static struct shash_alg ifxdeu_md5_hmac_alg = {
|
||||
.digestsize = MD5_DIGEST_SIZE,
|
||||
.init = md5_hmac_init,
|
||||
.update = md5_hmac_update,
|
||||
.final = md5_hmac_final,
|
||||
.setkey = md5_hmac_setkey,
|
||||
.descsize = sizeof(struct md5_hmac_ctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(md5)",
|
||||
.cra_driver_name= "ifxdeu-md5_hmac",
|
||||
.cra_priority = 400,
|
||||
.cra_ctxsize = sizeof(struct md5_hmac_ctx),
|
||||
.cra_flags = CRYPTO_ALG_TYPE_HASH | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = MD5_HMAC_BLOCK_SIZE,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = md5_hmac_init_tfm,
|
||||
.cra_exit = md5_hmac_exit_tfm,
|
||||
}
|
||||
};
|
||||
|
||||
/*! \fn int ifxdeu_init_md5_hmac (void)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief initialize md5 hmac driver
|
||||
*/
|
||||
int ifxdeu_init_md5_hmac (void)
|
||||
{
|
||||
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
if ((ret = crypto_register_shash(&ifxdeu_md5_hmac_alg)))
|
||||
goto md5_hmac_err;
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU MD5_HMAC initialized%s.\n", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
md5_hmac_err:
|
||||
printk(KERN_ERR "IFX DEU MD5_HMAC initialization failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/** \fn void ifxdeu_fini_md5_hmac (void)
|
||||
* \ingroup IFX_MD5_HMAC_FUNCTIONS
|
||||
* \brief unregister md5 hmac driver
|
||||
*/
|
||||
void ifxdeu_fini_md5_hmac (void)
|
||||
{
|
||||
crypto_unregister_shash(&ifxdeu_md5_hmac_alg);
|
||||
}
|
||||
288
package/kernel/lantiq/ltq-deu/src/ifxmips_sha1.c
Normal file
288
package/kernel/lantiq/ltq-deu/src/ifxmips_sha1.c
Normal file
@@ -0,0 +1,288 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_sha1.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for Danube
|
||||
**
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_sha1.c
|
||||
\ingroup IFX_DEU
|
||||
\brief SHA1 encryption deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_SHA1_FUNCTIONS IFX_SHA1_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx deu sha1 functions
|
||||
*/
|
||||
|
||||
/* Project header */
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/version.h>
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0)
|
||||
#include <crypto/sha.h>
|
||||
#else
|
||||
#include <crypto/sha1.h>
|
||||
#endif
|
||||
#include <crypto/hash.h>
|
||||
#include <crypto/internal/hash.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
#if defined(CONFIG_DANUBE)
|
||||
#include "ifxmips_deu_danube.h"
|
||||
#elif defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Plaform Unknwon!"
|
||||
#endif
|
||||
|
||||
#define SHA1_DIGEST_SIZE 20
|
||||
#define SHA1_HMAC_BLOCK_SIZE 64
|
||||
#define HASH_START IFX_HASH_CON
|
||||
|
||||
//#define CRYPTO_DEBUG
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* \brief SHA1 private structure
|
||||
*/
|
||||
struct sha1_ctx {
|
||||
int started;
|
||||
u64 count;
|
||||
u32 hash[5];
|
||||
u32 state[5];
|
||||
u8 buffer[64];
|
||||
};
|
||||
|
||||
extern int disable_deudma;
|
||||
|
||||
/*! \fn static void sha1_transform1 (u32 *state, const u32 *in)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief main interface to sha1 hardware
|
||||
* \param state current state
|
||||
* \param in 64-byte block of input
|
||||
*/
|
||||
static void sha1_transform1 (struct sha1_ctx *sctx, u32 *state, const u32 *in)
|
||||
{
|
||||
int i = 0;
|
||||
volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
unsigned long flag;
|
||||
|
||||
CRTCL_SECT_HASH_START;
|
||||
|
||||
SHA_HASH_INIT;
|
||||
|
||||
/* For context switching purposes, the previous hash output
|
||||
* is loaded back into the output register
|
||||
*/
|
||||
if (sctx->started) {
|
||||
hashs->D1R = *((u32 *) sctx->hash + 0);
|
||||
hashs->D2R = *((u32 *) sctx->hash + 1);
|
||||
hashs->D3R = *((u32 *) sctx->hash + 2);
|
||||
hashs->D4R = *((u32 *) sctx->hash + 3);
|
||||
hashs->D5R = *((u32 *) sctx->hash + 4);
|
||||
}
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
hashs->MR = in[i];
|
||||
};
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
/* For context switching purposes, the output is saved into a
|
||||
* context struct which can be used later on
|
||||
*/
|
||||
*((u32 *) sctx->hash + 0) = hashs->D1R;
|
||||
*((u32 *) sctx->hash + 1) = hashs->D2R;
|
||||
*((u32 *) sctx->hash + 2) = hashs->D3R;
|
||||
*((u32 *) sctx->hash + 3) = hashs->D4R;
|
||||
*((u32 *) sctx->hash + 4) = hashs->D5R;
|
||||
|
||||
sctx->started = 1;
|
||||
|
||||
CRTCL_SECT_HASH_END;
|
||||
}
|
||||
|
||||
/*! \fn static void sha1_init1(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief initialize sha1 hardware
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int sha1_init1(struct shash_desc *desc)
|
||||
{
|
||||
struct sha1_ctx *sctx = shash_desc_ctx(desc);
|
||||
|
||||
sctx->started = 0;
|
||||
sctx->count = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static void sha1_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief on-the-fly sha1 computation
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param data input data
|
||||
* \param len size of input data
|
||||
*/
|
||||
static int sha1_update(struct shash_desc * desc, const u8 *data,
|
||||
unsigned int len)
|
||||
{
|
||||
struct sha1_ctx *sctx = shash_desc_ctx(desc);
|
||||
unsigned int i, j;
|
||||
|
||||
j = (sctx->count >> 3) & 0x3f;
|
||||
sctx->count += len << 3;
|
||||
|
||||
if ((j + len) > 63) {
|
||||
memcpy (&sctx->buffer[j], data, (i = 64 - j));
|
||||
sha1_transform1 (sctx, sctx->state, (const u32 *)sctx->buffer);
|
||||
for (; i + 63 < len; i += 64) {
|
||||
sha1_transform1 (sctx, sctx->state, (const u32 *)&data[i]);
|
||||
}
|
||||
|
||||
j = 0;
|
||||
}
|
||||
else
|
||||
i = 0;
|
||||
|
||||
memcpy (&sctx->buffer[j], &data[i], len - i);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static void sha1_final(struct crypto_tfm *tfm, u8 *out)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief compute final sha1 value
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final md5 output value
|
||||
*/
|
||||
static int sha1_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct sha1_ctx *sctx = shash_desc_ctx(desc);
|
||||
u32 index, padlen;
|
||||
u64 t;
|
||||
u8 bits[8] = { 0, };
|
||||
static const u8 padding[64] = { 0x80, };
|
||||
//volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
//unsigned long flag;
|
||||
|
||||
t = sctx->count;
|
||||
bits[7] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[6] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[5] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[4] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[3] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[2] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[1] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[0] = 0xff & t;
|
||||
|
||||
/* Pad out to 56 mod 64 */
|
||||
index = (sctx->count >> 3) & 0x3f;
|
||||
padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
|
||||
sha1_update (desc, padding, padlen);
|
||||
|
||||
/* Append length */
|
||||
sha1_update (desc, bits, sizeof bits);
|
||||
|
||||
memcpy(out, sctx->hash, SHA1_DIGEST_SIZE);
|
||||
|
||||
// Wipe context
|
||||
memset (sctx, 0, sizeof *sctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief SHA1 function mappings
|
||||
*/
|
||||
static struct shash_alg ifxdeu_sha1_alg = {
|
||||
.digestsize = SHA1_DIGEST_SIZE,
|
||||
.init = sha1_init1,
|
||||
.update = sha1_update,
|
||||
.final = sha1_final,
|
||||
.descsize = sizeof(struct sha1_ctx),
|
||||
.statesize = sizeof(struct sha1_state),
|
||||
.base = {
|
||||
.cra_name = "sha1",
|
||||
.cra_driver_name= "ifxdeu-sha1",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_HASH | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = SHA1_HMAC_BLOCK_SIZE,
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/*! \fn int ifxdeu_init_sha1 (void)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief initialize sha1 driver
|
||||
*/
|
||||
int ifxdeu_init_sha1 (void)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
if ((ret = crypto_register_shash(&ifxdeu_sha1_alg)))
|
||||
goto sha1_err;
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU SHA1 initialized%s.\n", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
sha1_err:
|
||||
printk(KERN_ERR "IFX DEU SHA1 initialization failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! \fn void ifxdeu_fini_sha1 (void)
|
||||
* \ingroup IFX_SHA1_FUNCTIONS
|
||||
* \brief unregister sha1 driver
|
||||
*/
|
||||
void ifxdeu_fini_sha1 (void)
|
||||
{
|
||||
crypto_unregister_shash(&ifxdeu_sha1_alg);
|
||||
|
||||
|
||||
}
|
||||
453
package/kernel/lantiq/ltq-deu/src/ifxmips_sha1_hmac.c
Normal file
453
package/kernel/lantiq/ltq-deu/src/ifxmips_sha1_hmac.c
Normal file
@@ -0,0 +1,453 @@
|
||||
/******************************************************************************
|
||||
**
|
||||
** FILE NAME : ifxmips_sha1_hmac.c
|
||||
** PROJECT : IFX UEIP
|
||||
** MODULES : DEU Module for UEIP
|
||||
** DATE : September 8, 2009
|
||||
** AUTHOR : Mohammad Firdaus
|
||||
** DESCRIPTION : Data Encryption Unit Driver
|
||||
** COPYRIGHT : Copyright (c) 2009
|
||||
** Infineon Technologies AG
|
||||
** Am Campeon 1-12, 85579 Neubiberg, Germany
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or modify
|
||||
** it under the terms of the GNU General Public License as published by
|
||||
** the Free Software Foundation; either version 2 of the License, or
|
||||
** (at your option) any later version.
|
||||
**
|
||||
** HISTORY
|
||||
** $Date $Author $Comment
|
||||
** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
|
||||
** 21,March 2011 Mohammad Firdaus Changes for Kernel 2.6.32 and IPSec integration
|
||||
*******************************************************************************/
|
||||
/*!
|
||||
\defgroup IFX_DEU IFX_DEU_DRIVERS
|
||||
\ingroup API
|
||||
\brief ifx deu driver module
|
||||
*/
|
||||
|
||||
/*!
|
||||
\file ifxmips_sha1_hmac.c
|
||||
\ingroup IFX_DEU
|
||||
\brief SHA1-HMAC deu driver file
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup IFX_SHA1_HMAC_FUNCTIONS IFX_SHA1_HMAC_FUNCTIONS
|
||||
\ingroup IFX_DEU
|
||||
\brief ifx sha1 hmac functions
|
||||
*/
|
||||
|
||||
/* Project header */
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <crypto/internal/hash.h>
|
||||
#include <linux/version.h>
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0)
|
||||
#include <crypto/sha.h>
|
||||
#else
|
||||
#include <crypto/sha1.h>
|
||||
#endif
|
||||
#include <linux/types.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#if defined(CONFIG_AR9)
|
||||
#include "ifxmips_deu_ar9.h"
|
||||
#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
|
||||
#include "ifxmips_deu_vr9.h"
|
||||
#else
|
||||
#error "Plaform Unknwon!"
|
||||
#endif
|
||||
|
||||
#define SHA1_DIGEST_SIZE 20
|
||||
#define SHA1_BLOCK_WORDS 16
|
||||
#define SHA1_HASH_WORDS 5
|
||||
#define SHA1_HMAC_BLOCK_SIZE 64
|
||||
#define SHA1_HMAC_DBN_TEMP_SIZE 1024 // size in dword, needed for dbn workaround
|
||||
#define HASH_START IFX_HASH_CON
|
||||
|
||||
#define SHA1_HMAC_MAX_KEYLEN 64
|
||||
|
||||
#ifdef CRYPTO_DEBUG
|
||||
extern char debug_level;
|
||||
#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
|
||||
#else
|
||||
#define DPRINTF(level, format, args...)
|
||||
#endif
|
||||
|
||||
struct sha1_hmac_ctx {
|
||||
int keylen;
|
||||
|
||||
u8 buffer[SHA1_HMAC_BLOCK_SIZE];
|
||||
u8 key[SHA1_HMAC_MAX_KEYLEN];
|
||||
u32 hash[SHA1_HASH_WORDS];
|
||||
u32 dbn;
|
||||
int started;
|
||||
u64 count;
|
||||
|
||||
struct shash_desc *desc;
|
||||
u32 (*temp)[SHA1_BLOCK_WORDS];
|
||||
};
|
||||
|
||||
extern int disable_deudma;
|
||||
|
||||
static int sha1_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final);
|
||||
|
||||
/*! \fn static void sha1_hmac_transform(struct crypto_tfm *tfm, u32 const *in)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief save input block to context
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param in 64-byte block of input
|
||||
*/
|
||||
static int sha1_hmac_transform(struct shash_desc *desc, u32 const *in)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_shash_ctx(desc->tfm);
|
||||
|
||||
if ( ((sctx->dbn<<4)+1) > SHA1_HMAC_DBN_TEMP_SIZE )
|
||||
{
|
||||
//printk("SHA1_HMAC_DBN_TEMP_SIZE exceeded\n");
|
||||
sha1_hmac_final_impl(desc, (u8 *)sctx->hash, false);
|
||||
}
|
||||
|
||||
memcpy(&sctx->temp[sctx->dbn], in, 64); //dbn workaround
|
||||
sctx->dbn += 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn int sha1_hmac_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief sets sha1 hmac key
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length greater than 64 bytes IS NOT SUPPORTED
|
||||
*/
|
||||
static int sha1_hmac_setkey(struct crypto_shash *tfm, const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_shash_ctx(tfm);
|
||||
int err;
|
||||
|
||||
if (keylen > SHA1_HMAC_MAX_KEYLEN) {
|
||||
char *hash_alg_name = "sha1";
|
||||
|
||||
sctx->desc->tfm = crypto_alloc_shash(hash_alg_name, 0, 0);
|
||||
if (IS_ERR(sctx->desc->tfm)) return PTR_ERR(sctx->desc->tfm);
|
||||
|
||||
memset(sctx->key, 0, SHA1_HMAC_MAX_KEYLEN);
|
||||
err = crypto_shash_digest(sctx->desc, key, keylen, sctx->key);
|
||||
if (err) return err;
|
||||
|
||||
sctx->keylen = SHA1_DIGEST_SIZE;
|
||||
|
||||
crypto_free_shash(sctx->desc->tfm);
|
||||
} else {
|
||||
memcpy(sctx->key, key, keylen);
|
||||
sctx->keylen = keylen;
|
||||
}
|
||||
memset(sctx->key + sctx->keylen, 0, SHA1_HMAC_MAX_KEYLEN - sctx->keylen);
|
||||
|
||||
//printk("Setting keys of len: %d\n", keylen);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn int sha1_hmac_setkey_hw(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief sets sha1 hmac key into hw registers
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param key input key
|
||||
* \param keylen key length greater than 64 bytes IS NOT SUPPORTED
|
||||
*/
|
||||
static int sha1_hmac_setkey_hw(const u8 *key, unsigned int keylen)
|
||||
{
|
||||
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START;
|
||||
int i, j;
|
||||
u32 *in_key = (u32 *)key;
|
||||
|
||||
j = 0;
|
||||
|
||||
hash->KIDX |= 0x80000000; //reset keys back to 0
|
||||
for (i = 0; i < keylen; i+=4)
|
||||
{
|
||||
hash->KIDX = j;
|
||||
asm("sync");
|
||||
hash->KEY = *((u32 *) in_key + j);
|
||||
j++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void sha1_hmac_init(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief initialize sha1 hmac context
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int sha1_hmac_init(struct shash_desc *desc)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_shash_ctx(desc->tfm);
|
||||
|
||||
//printk("debug ln: %d, fn: %s\n", __LINE__, __func__);
|
||||
sctx->dbn = 0; //dbn workaround
|
||||
sctx->started = 0;
|
||||
sctx->count = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static void sha1_hmac_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief on-the-fly sha1 hmac computation
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param data input data
|
||||
* \param len size of input data
|
||||
*/
|
||||
static int sha1_hmac_update(struct shash_desc *desc, const u8 *data,
|
||||
unsigned int len)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_shash_ctx(desc->tfm);
|
||||
unsigned int i, j;
|
||||
|
||||
j = (sctx->count >> 3) & 0x3f;
|
||||
sctx->count += len << 3;
|
||||
// printk("sctx->count = %d\n", sctx->count);
|
||||
|
||||
if ((j + len) > 63) {
|
||||
memcpy (&sctx->buffer[j], data, (i = 64 - j));
|
||||
sha1_hmac_transform (desc, (const u32 *)sctx->buffer);
|
||||
for (; i + 63 < len; i += 64) {
|
||||
sha1_hmac_transform (desc, (const u32 *)&data[i]);
|
||||
}
|
||||
|
||||
j = 0;
|
||||
}
|
||||
else
|
||||
i = 0;
|
||||
|
||||
memcpy (&sctx->buffer[j], &data[i], len - i);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn static int sha1_hmac_final(struct crypto_tfm *tfm, u8 *out)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief call sha1_hmac_final_impl with hash_final true
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final sha1 hmac output value
|
||||
*/
|
||||
static int sha1_hmac_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
return sha1_hmac_final_impl(desc, out, true);
|
||||
}
|
||||
|
||||
/*! \fn static int sha1_hmac_final_impl(struct crypto_tfm *tfm, u8 *out, bool hash_final)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief ompute final or intermediate sha1 hmac value
|
||||
* \param tfm linux crypto algo transform
|
||||
* \param out final sha1 hmac output value
|
||||
* \param in finalize or intermediate processing
|
||||
*/
|
||||
static int sha1_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_shash_ctx(desc->tfm);
|
||||
u32 index, padlen;
|
||||
u64 t;
|
||||
u8 bits[8] = { 0, };
|
||||
static const u8 padding[64] = { 0x80, };
|
||||
volatile struct deu_hash_t *hashs = (struct deu_hash_t *) HASH_START;
|
||||
unsigned long flag;
|
||||
int i = 0;
|
||||
int dbn;
|
||||
u32 *in = sctx->temp[0];
|
||||
|
||||
if (hash_final) {
|
||||
t = sctx->count + 512; // need to add 512 bit of the IPAD operation
|
||||
bits[7] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[6] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[5] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[4] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[3] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[2] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[1] = 0xff & t;
|
||||
t >>= 8;
|
||||
bits[0] = 0xff & t;
|
||||
|
||||
/* Pad out to 56 mod 64 */
|
||||
index = (sctx->count >> 3) & 0x3f;
|
||||
padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
|
||||
sha1_hmac_update (desc, padding, padlen);
|
||||
|
||||
/* Append length */
|
||||
sha1_hmac_update (desc, bits, sizeof bits);
|
||||
}
|
||||
|
||||
CRTCL_SECT_HASH_START;
|
||||
|
||||
SHA_HASH_INIT;
|
||||
|
||||
sha1_hmac_setkey_hw(sctx->key, sctx->keylen);
|
||||
|
||||
if (hash_final) {
|
||||
hashs->DBN = sctx->dbn;
|
||||
} else {
|
||||
hashs->DBN = sctx->dbn + 5;
|
||||
}
|
||||
asm("sync");
|
||||
|
||||
//for vr9 change, ENDI = 1
|
||||
*IFX_HASH_CON = HASH_CON_VALUE;
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
if (sctx->started) {
|
||||
hashs->D1R = *((u32 *) sctx->hash + 0);
|
||||
hashs->D2R = *((u32 *) sctx->hash + 1);
|
||||
hashs->D3R = *((u32 *) sctx->hash + 2);
|
||||
hashs->D4R = *((u32 *) sctx->hash + 3);
|
||||
hashs->D5R = *((u32 *) sctx->hash + 4);
|
||||
} else {
|
||||
sctx->started = 1;
|
||||
}
|
||||
|
||||
for (dbn = 0; dbn < sctx->dbn; dbn++)
|
||||
{
|
||||
for (i = 0; i < 16; i++) {
|
||||
hashs->MR = in[i];
|
||||
};
|
||||
|
||||
hashs->controlr.GO = 1;
|
||||
asm("sync");
|
||||
|
||||
//wait for processing
|
||||
while (hashs->controlr.BSY) {
|
||||
// this will not take long
|
||||
}
|
||||
|
||||
in += 16;
|
||||
}
|
||||
|
||||
|
||||
#if 1
|
||||
if (hash_final) {
|
||||
//wait for digest ready
|
||||
while (! hashs->controlr.DGRY) {
|
||||
// this will not take long
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
*((u32 *) out + 0) = hashs->D1R;
|
||||
*((u32 *) out + 1) = hashs->D2R;
|
||||
*((u32 *) out + 2) = hashs->D3R;
|
||||
*((u32 *) out + 3) = hashs->D4R;
|
||||
*((u32 *) out + 4) = hashs->D5R;
|
||||
|
||||
CRTCL_SECT_HASH_END;
|
||||
|
||||
if (hash_final) {
|
||||
sha1_hmac_init(desc);
|
||||
} else {
|
||||
sctx->dbn = 0;
|
||||
}
|
||||
//printk("debug ln: %d, fn: %s\n", __LINE__, __func__);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/*! \fn void sha1_hmac_init_tfm(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief initialize pointers in sha1_hmac_ctx
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static int sha1_hmac_init_tfm(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_tfm_ctx(tfm);
|
||||
sctx->temp = kzalloc(4 * SHA1_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
|
||||
if (IS_ERR(sctx->temp)) return PTR_ERR(sctx->temp);
|
||||
sctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
|
||||
if (IS_ERR(sctx->desc)) return PTR_ERR(sctx->desc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! \fn void sha1_hmac_exit_tfm(struct crypto_tfm *tfm)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief free pointers in sha1_hmac_ctx
|
||||
* \param tfm linux crypto algo transform
|
||||
*/
|
||||
static void sha1_hmac_exit_tfm(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct sha1_hmac_ctx *sctx = crypto_tfm_ctx(tfm);
|
||||
kfree(sctx->temp);
|
||||
kfree(sctx->desc);
|
||||
}
|
||||
|
||||
/*
|
||||
* \brief SHA1_HMAC function mappings
|
||||
*/
|
||||
|
||||
static struct shash_alg ifxdeu_sha1_hmac_alg = {
|
||||
.digestsize = SHA1_DIGEST_SIZE,
|
||||
.init = sha1_hmac_init,
|
||||
.update = sha1_hmac_update,
|
||||
.final = sha1_hmac_final,
|
||||
.setkey = sha1_hmac_setkey,
|
||||
.descsize = sizeof(struct sha1_hmac_ctx),
|
||||
.base = {
|
||||
.cra_name = "hmac(sha1)",
|
||||
.cra_driver_name= "ifxdeu-sha1_hmac",
|
||||
.cra_priority = 400,
|
||||
.cra_ctxsize = sizeof(struct sha1_hmac_ctx),
|
||||
.cra_flags = CRYPTO_ALG_TYPE_HASH | CRYPTO_ALG_KERN_DRIVER_ONLY,
|
||||
.cra_blocksize = SHA1_HMAC_BLOCK_SIZE,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = sha1_hmac_init_tfm,
|
||||
.cra_exit = sha1_hmac_exit_tfm,
|
||||
}
|
||||
};
|
||||
|
||||
/*! \fn int ifxdeu_init_sha1_hmac (void)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief initialize sha1 hmac driver
|
||||
*/
|
||||
int ifxdeu_init_sha1_hmac (void)
|
||||
{
|
||||
int ret = -ENOSYS;
|
||||
|
||||
|
||||
|
||||
if ((ret = crypto_register_shash(&ifxdeu_sha1_hmac_alg)))
|
||||
goto sha1_err;
|
||||
|
||||
printk (KERN_NOTICE "IFX DEU SHA1_HMAC initialized%s.\n", disable_deudma ? "" : " (DMA)");
|
||||
return ret;
|
||||
|
||||
sha1_err:
|
||||
printk(KERN_ERR "IFX DEU SHA1_HMAC initialization failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! \fn void ifxdeu_fini_sha1_hmac (void)
|
||||
* \ingroup IFX_SHA1_HMAC_FUNCTIONS
|
||||
* \brief unregister sha1 hmac driver
|
||||
*/
|
||||
void ifxdeu_fini_sha1_hmac (void)
|
||||
{
|
||||
|
||||
crypto_unregister_shash(&ifxdeu_sha1_hmac_alg);
|
||||
|
||||
|
||||
}
|
||||
92
package/kernel/lantiq/ltq-deu/src/ifxmips_tcrypt.h
Normal file
92
package/kernel/lantiq/ltq-deu/src/ifxmips_tcrypt.h
Normal file
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Quick & dirty crypto testing module.
|
||||
*
|
||||
* This will only exist until we have a better testing mechanism
|
||||
* (e.g. a char device).
|
||||
*
|
||||
* Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
|
||||
* Copyright (c) 2002 Jean-Francois Dive <jef@linuxbe.org>
|
||||
* Copyright (c) 2007 Nokia Siemens Networks
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
*/
|
||||
#ifndef _IFXMIPS_CRYPTO_TCRYPT_H
|
||||
#define _IFXMIPS_CRYPTO_TCRYPT_H
|
||||
|
||||
struct cipher_speed_template {
|
||||
const char *key;
|
||||
unsigned int klen;
|
||||
};
|
||||
|
||||
struct hash_speed {
|
||||
unsigned int blen; /* buffer length */
|
||||
unsigned int plen; /* per-update length */
|
||||
};
|
||||
|
||||
/*
|
||||
* DES test vectors.
|
||||
*/
|
||||
#define DES3_SPEED_VECTORS 1
|
||||
#define CRYPTO_ALG_TYPE_SPEED_TEST 0xB
|
||||
|
||||
static int alg_speed_test(const char *alg, const char *driver,
|
||||
unsigned int sec,
|
||||
struct cipher_speed_template *t,
|
||||
unsigned int tcount, u8 *keysize);
|
||||
|
||||
static struct cipher_speed_template des3_speed_template[] = {
|
||||
{
|
||||
.key = "\x01\x23\x45\x67\x89\xab\xcd\xef"
|
||||
"\x55\x55\x55\x55\x55\x55\x55\x55"
|
||||
"\xfe\xdc\xba\x98\x76\x54\x32\x10",
|
||||
.klen = 24,
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* Cipher speed tests
|
||||
*/
|
||||
static u8 speed_template_8[] = {8, 0};
|
||||
static u8 speed_template_24[] = {24, 0};
|
||||
static u8 speed_template_8_32[] = {8, 32, 0};
|
||||
static u8 speed_template_16_32[] = {16, 32, 0};
|
||||
static u8 speed_template_16_24_32[] = {16, 24, 32, 0};
|
||||
static u8 speed_template_32_40_48[] = {32, 40, 48, 0};
|
||||
static u8 speed_template_32_48_64[] = {32, 48, 64, 0};
|
||||
|
||||
/*
|
||||
* Digest speed tests
|
||||
*/
|
||||
static struct hash_speed generic_hash_speed_template[] = {
|
||||
{ .blen = 16, .plen = 16, },
|
||||
{ .blen = 64, .plen = 16, },
|
||||
{ .blen = 64, .plen = 64, },
|
||||
{ .blen = 256, .plen = 16, },
|
||||
{ .blen = 256, .plen = 64, },
|
||||
{ .blen = 256, .plen = 256, },
|
||||
{ .blen = 1024, .plen = 16, },
|
||||
{ .blen = 1024, .plen = 256, },
|
||||
{ .blen = 1024, .plen = 1024, },
|
||||
{ .blen = 2048, .plen = 16, },
|
||||
{ .blen = 2048, .plen = 256, },
|
||||
{ .blen = 2048, .plen = 1024, },
|
||||
{ .blen = 2048, .plen = 2048, },
|
||||
{ .blen = 4096, .plen = 16, },
|
||||
{ .blen = 4096, .plen = 256, },
|
||||
{ .blen = 4096, .plen = 1024, },
|
||||
{ .blen = 4096, .plen = 4096, },
|
||||
{ .blen = 8192, .plen = 16, },
|
||||
{ .blen = 8192, .plen = 256, },
|
||||
{ .blen = 8192, .plen = 1024, },
|
||||
{ .blen = 8192, .plen = 4096, },
|
||||
{ .blen = 8192, .plen = 8192, },
|
||||
|
||||
/* End marker */
|
||||
{ .blen = 0, .plen = 0, }
|
||||
};
|
||||
|
||||
#endif /* _CRYPTO_TCRYPT_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user