Initial commit

package/kernel/qca-ssdk/Makefile

@@ -0,0 +1,98 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=qca-ssdk
+PKG_RELEASE:=3
+
+PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_DATE:=2024-06-13
+PKG_SOURCE_VERSION:=c451136ba69d51d60f770365b6d6d60ff2801998
+PKG_MIRROR_HASH:=4c54f2d77b5abeb96bddceb4a9eb58aa2c8fb12b58d5d666196224a35ac107dc
+
+PKG_FLAGS:=nonshared
+PKG_BUILD_PARALLEL:=1
+PKG_BUILD_FLAGS:=no-lto
+
+include $(INCLUDE_DIR)/kernel.mk
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/qca-ssdk
+  SECTION:=kernel
+  CATEGORY:=Kernel modules
+  SUBMENU:=Network Devices
+  TITLE:=Qualcom SSDK switch driver
+  DEPENDS:=@(TARGET_qualcommax)
+  FILES:=$(PKG_BUILD_DIR)/qca-ssdk.ko
+  AUTOLOAD:=$(call AutoLoad,30,qca-ssdk)
+endef
+
+define KernelPackage/qca-ssdk/Description
+  Driver for Qualcomm Atheros switches.
+endef
+
+GCC_VERSION=$(shell echo "$(CONFIG_GCC_VERSION)" | sed 's/[^0-9.]*\([0-9.]*\).*/\1/')
+
+LNX_CONFIG_OPTS = LNX_MAKEOPTS='$(KERNEL_MAKEOPTS)' PRJ_PATH=$(PKG_BUILD_DIR) MODULE_TYPE=KSLIB modules
+
+MAKE_FLAGS+= \
+	TARGET_NAME=$(CONFIG_TARGET_NAME) \
+	TOOL_PATH=$(firstword $(TOOLCHAIN_BIN_DIRS)) \
+	SYS_PATH=$(LINUX_DIR) \
+	TOOLPREFIX=$(TARGET_CROSS) \
+	KVER=$(LINUX_VERSION) \
+	ARCH=$(LINUX_KARCH) \
+	TARGET_SUFFIX=$(CONFIG_TARGET_SUFFIX) \
+	GCC_VERSION=$(GCC_VERSION) \
+	EXTRA_CFLAGS="-fno-stack-protector -I$(STAGING_DIR)/usr/include" \
+	SoC=$(CONFIG_TARGET_SUBTARGET) \
+	SHELL="$(BASH)" \
+	PTP_FEATURE=disable SWCONFIG_FEATURE=disable \
+	ISISC_ENABLE=disable MHT_ENABLE=disable \
+	IN_QCA803X_PHY=FALSE IN_QCA808X_PHY=FALSE \
+	IN_MALIBU_PHY=FALSE \
+	$(LNX_CONFIG_OPTS)
+
+ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x")
+    MAKE_FLAGS+= CHIP_TYPE=HPPE
+endif
+
+ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq60xx")
+    MAKE_FLAGS+= CHIP_TYPE=CPPE
+endif
+
+
+define Build/Compile
+	+$(MAKE) $(PKG_JOBS) $(MAKE_FLAGS) -C $(PKG_BUILD_DIR) $(LNX_CONFIG_OPTS)
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/api
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/ref
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/fal
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/sal
+	$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/init
+	$(CP) -rf $(PKG_BUILD_DIR)/include/api/sw_ioctl.h $(1)/usr/include/qca-ssdk/api
+	if [ -f $(PKG_BUILD_DIR)/include/ref/ref_vsi.h ]; then \
+	$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_vsi.h $(1)/usr/include/qca-ssdk/ref/; \
+	fi
+	if [ -f $(PKG_BUILD_DIR)/include/ref/ref_fdb.h ]; then \
+	$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_fdb.h $(1)/usr/include/qca-ssdk/ref/; \
+	fi
+	if [ -f $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h ]; then \
+	$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h $(1)/usr/include/qca-ssdk/ref/; \
+	fi
+	if [ -f $(PKG_BUILD_DIR)/include/init/ssdk_init.h ]; then \
+	$(CP) -rf $(PKG_BUILD_DIR)/include/init/ssdk_init.h $(1)/usr/include/qca-ssdk/init/; \
+	fi
+	if [ -f $(PKG_BUILD_DIR)/include/init/ssdk_netlink.h ]; then \
+	$(CP) -rf $(PKG_BUILD_DIR)/include/init/ssdk_netlink.h $(1)/usr/include/qca-ssdk/init/; \
+	fi
+	$(CP) -rf $(PKG_BUILD_DIR)/include/fal $(1)/usr/include/qca-ssdk
+	$(CP) -rf $(PKG_BUILD_DIR)/include/common/*.h $(1)/usr/include/qca-ssdk
+	$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/linux/*.h $(1)/usr/include/qca-ssdk
+	$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/*.h $(1)/usr/include/qca-ssdk
+
+endef
+
+$(eval $(call KernelPackage,qca-ssdk))

package/kernel/qca-ssdk/patches/0003-Revert-qca-ssdk-enable-invoking-fdb-del-function-for.patch

@@ -0,0 +1,30 @@
+From 73c0992a36bc13e9bb373f98ba246dfc1e29a393 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Tue, 7 Nov 2023 14:21:43 +0100
+Subject: [PATCH 3/3] Revert "[qca-ssdk]: enable invoking fdb del function for
+ kernel6.1"
+
+This reverts commit a86765ee6a87145f64344f4872cfe8c5e629dd62.
+
+Upstream kernel does not have this call present at all, we currently
+also dont use it, so revert the commit enabling it.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ src/ref/ref_acl.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/src/ref/ref_acl.c
++++ b/src/ref/ref_acl.c
+@@ -229,7 +229,11 @@ _ref_acl_mac_entry_create_rule(a_uint32_
+ 		eth_dev = dev_get_by_name(&init_net, entry->ifname);
+ 		if (eth_dev)
+ 		{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0))
++			// TODO: replace with corresponding ver
++#else
+ 			br_fdb_delete_by_netdev(eth_dev, entry->src_mac.uc, 0);
++#endif
+ 			dev_put(eth_dev);
+ 		}
+ 	}

package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch

@@ -0,0 +1,94 @@
+From 00d3c54c611143f57b632e4cd3b42b0a94d82307 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 25 Jun 2023 11:24:09 +0200
+Subject: [PATCH 3/3] SSDK: set OF node for the SFP PHY
+
+Currently, SSDK is creating a fake SFP PHY which has no OF node populated,
+thus making it impossible to pass it to NSS-DP so port can actually work.
+
+We eliminated QCA-s connecting of the PHY by manually creating a string
+and then matching by name and instead only support passing the PHY as
+phandle via phy-handle.
+
+So, lets just use the switch port node to which the SFP is connected to
+anyway and set it as the PHY device OF node so we can pass it to NSS-DP.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ include/hsl/phy/hsl_phy.h |  6 ++++++
+ src/hsl/phy/hsl_phy.c     | 14 ++++++++++++++
+ src/hsl/phy/sfp_phy.c     |  7 +++++++
+ src/init/ssdk_dts.c       |  7 +++++++
+ 4 files changed, 34 insertions(+)
+
+--- a/include/hsl/phy/hsl_phy.h
++++ b/include/hsl/phy/hsl_phy.h
+@@ -584,6 +584,7 @@ typedef struct {
+ 	a_bool_t port_link_status[SW_MAX_NR_PORT];
+ 	a_uint32_t port_mode[SW_MAX_NR_PORT];
+ 	a_uint32_t combo_phy_type[SW_MAX_NR_PORT];
++	struct device_node *port_node[SW_MAX_NR_PORT];
+ } phy_info_t;
+ /*qca808x_end*/
+ #define MALIBU5PORT_PHY         0x004DD0B1
+@@ -1038,3 +1039,8 @@ hsl_phydev_eee_update(a_uint32_t dev_id,
+ #endif				/* __cplusplus */
+ #endif				/* _HSL_PHY_H_ */
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id);
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node);
+--- a/src/hsl/phy/hsl_phy.c
++++ b/src/hsl/phy/hsl_phy.c
+@@ -3433,3 +3433,17 @@ hsl_phy_modify_debug(a_uint32_t dev_id,
+ 	return rv;
+ }
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id)
++{
++	return phy_info[dev_id]->port_node[port_id];
++}
++
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node)
++{
++	phy_info[dev_id]->port_node[port_id] = port_node;
++
++	return;
++}
+--- a/src/hsl/phy/sfp_phy.c
++++ b/src/hsl/phy/sfp_phy.c
+@@ -335,6 +335,13 @@ int sfp_phy_device_setup(a_uint32_t dev_
+ 	phy_device_register(phydev);
+ 
+ 	phydev->priv = priv;
++	/*
++	 * Set the PHY OF node in order to be able to later connect the
++	 * fake SFP PHY by passing it as a phandle in phy-handle.
++	 */
++	phydev->mdio.dev.of_node = hsl_port_node_get(dev_id, port);
++	if (!phydev->mdio.dev.of_node)
++		return SW_NOT_FOUND;
+ #if defined(IN_PHY_I2C_MODE)
+ 	if (hsl_port_phy_access_type_get(dev_id, port) == PHY_I2C_ACCESS) {
+ 		if(phydev->drv)
+--- a/src/init/ssdk_dts.c
++++ b/src/init/ssdk_dts.c
+@@ -784,6 +784,13 @@ static sw_error_t ssdk_dt_parse_phy_info
+ 			}
+ 		}
+ 		hsl_port_feature_set(dev_id, port_id, phy_features | PHY_F_INIT);
++
++		/*
++		* Save the port node so it can be passed as the
++		* fake SFP PHY OF node in order to be able to
++		* pass the SFP phy via phy-handle
++		*/
++		hsl_port_node_set(dev_id, port_id, port_node);
+ 	}
+ 
+ 	return rv;

package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch

@@ -0,0 +1,135 @@
+From 0116bb7359bd99c09bcad1b2051652cd1a04be3f Mon Sep 17 00:00:00 2001
+From: Mantas Pucka <mantas@8devices.com>
+Date: Mon, 12 Feb 2024 14:23:04 +0200
+Subject: [PATCH] qca-ssdk: support selecting PCS channel for PORT3 on IPQ6018
+
+When QCA8072 is used in PSGMII mode with IPQ6018, PCS used for second
+PHY port would overlap with one used by SGMII+ port. SoC has register
+to select different PCS in such case.
+
+Original code used PHY_ID for this decision, which also had other
+issues, but is no longer viable since we moved to upstream QCA807x
+driver.
+
+Introduce DT property port3_pcs_channel to allow describing this in DT.
+Default value is <2>, and for some QCA8072 designs <4> would be needed.
+
+Signed-off-by: Mantas Pucka <mantas@8devices.com>
+---
+ include/init/ssdk_dts.h            |  2 ++
+ src/adpt/cppe/adpt_cppe_portctrl.c |  4 ++--
+ src/adpt/hppe/adpt_hppe_uniphy.c   |  7 +------
+ src/init/ssdk_dts.c                | 27 +++++++++++++++++++++++++++
+ 4 files changed, 32 insertions(+), 8 deletions(-)
+
+--- a/include/init/ssdk_dts.h
++++ b/include/init/ssdk_dts.h
+@@ -99,6 +99,7 @@ typedef struct
+ 	a_uint32_t emu_chip_ver; /*only valid when is_emulation is true*/
+ 	a_uint32_t clk_mode;
+ 	a_uint32_t pcie_hw_base;
++	a_uint32_t port3_pcs_channel;
+ 	led_ctrl_pattern_t source_pattern[SSDK_MAX_PORT_NUM][PORT_LED_SOURCE_MAX];
+ } ssdk_dt_cfg;
+ 
+@@ -161,6 +162,7 @@ a_uint32_t ssdk_device_id_get(a_uint32_t
+ struct device_node *ssdk_dts_node_get(a_uint32_t dev_id);
+ struct clk *ssdk_dts_essclk_get(a_uint32_t dev_id);
+ struct clk *ssdk_dts_cmnclk_get(a_uint32_t dev_id);
++a_uint32_t ssdk_dts_port3_pcs_channel_get(a_uint32_t dev_id);
+ 
+ int ssdk_switch_device_num_init(void);
+ void ssdk_switch_device_num_exit(void);
+--- a/src/adpt/cppe/adpt_cppe_portctrl.c
++++ b/src/adpt/cppe/adpt_cppe_portctrl.c
+@@ -33,6 +33,7 @@
+ #include "hsl_phy.h"
+ #include "hsl_port_prop.h"
+ #include "hppe_init.h"
++#include "ssdk_dts.h"
+ #include "adpt.h"
+ #include "adpt_hppe.h"
+ #include "adpt_cppe_portctrl.h"
+@@ -60,8 +61,7 @@ _adpt_cppe_port_mux_mac_set(a_uint32_t d
+ 		case SSDK_PHYSICAL_PORT3:
+ 		case SSDK_PHYSICAL_PORT4:
+ 			if (mode0 == PORT_WRAPPER_PSGMII) {
+-				if (hsl_port_phyid_get(dev_id,
+-					SSDK_PHYSICAL_PORT3) == MALIBU2PORT_PHY) {
++				if (ssdk_dts_port3_pcs_channel_get(dev_id) == 4) {
+ 					cppe_port_mux_ctrl.bf.port3_pcs_sel =
+ 						CPPE_PORT3_PCS_SEL_PCS0_CHANNEL4;
+ 					cppe_port_mux_ctrl.bf.port4_pcs_sel =
+--- a/src/adpt/hppe/adpt_hppe_uniphy.c
++++ b/src/adpt/hppe/adpt_hppe_uniphy.c
+@@ -1160,9 +1160,6 @@ __adpt_hppe_uniphy_psgmii_mode_set(a_uin
+ {
+ 	a_uint32_t i;
+ 	sw_error_t rv = SW_OK;
+-#if defined(CPPE)
+-	a_uint32_t phy_type = 0;
+-#endif
+ 
+ 	union uniphy_mode_ctrl_u uniphy_mode_ctrl;
+ 
+@@ -1172,9 +1169,7 @@ __adpt_hppe_uniphy_psgmii_mode_set(a_uin
+ 	SSDK_DEBUG("uniphy %d is psgmii mode\n", uniphy_index);
+ #if defined(CPPE)
+ 	if (adpt_ppe_type_get(dev_id) == CPPE_TYPE) {
+-		phy_type = hsl_port_phyid_get(dev_id,
+-				SSDK_PHYSICAL_PORT3);
+-		if (phy_type == MALIBU2PORT_PHY) {
++		if (ssdk_dts_port3_pcs_channel_get(dev_id) == 4) {
+ 			SSDK_INFO("cypress uniphy %d is qca8072 psgmii mode\n", uniphy_index);
+ 			rv = __adpt_cppe_uniphy_mode_set(dev_id, uniphy_index,
+ 				PORT_WRAPPER_PSGMII);
+--- a/src/init/ssdk_dts.c
++++ b/src/init/ssdk_dts.c
+@@ -272,6 +272,13 @@ struct clk *ssdk_dts_cmnclk_get(a_uint32
+ 	return cfg->cmnblk_clk;
+ }
+ 
++a_uint32_t ssdk_dts_port3_pcs_channel_get(a_uint32_t dev_id)
++{
++	ssdk_dt_cfg* cfg = ssdk_dt_global.ssdk_dt_switch_nodes[dev_id];
++
++	return cfg->port3_pcs_channel;
++}
++
+ #if defined(CONFIG_OF) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0))
+ static void ssdk_dt_parse_mac_mode(a_uint32_t dev_id,
+ 		struct device_node *switch_node, ssdk_init_cfg *cfg)
+@@ -305,6 +312,25 @@ static void ssdk_dt_parse_mac_mode(a_uin
+ 
+ 	return;
+ }
++
++static void ssdk_dt_parse_port3_pcs_channel(a_uint32_t dev_id,
++		struct device_node *switch_node, ssdk_init_cfg *cfg)
++{
++	const __be32 *port3_pcs_channel;
++	a_uint32_t len = 0;
++
++	port3_pcs_channel = of_get_property(switch_node, "port3_pcs_channel", &len);
++	if (!port3_pcs_channel) {
++		ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port3_pcs_channel = 2;
++	}
++	else {
++		ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port3_pcs_channel =
++			be32_to_cpup(port3_pcs_channel);
++	}
++
++	return;
++}
++
+ #ifdef IN_UNIPHY
+ static void ssdk_dt_parse_uniphy(a_uint32_t dev_id)
+ {
+@@ -1354,6 +1380,7 @@ sw_error_t ssdk_dt_parse(ssdk_init_cfg *
+ 	rv = ssdk_dt_parse_access_mode(switch_node, ssdk_dt_priv);
+ 	SW_RTN_ON_ERROR(rv);
+ 	ssdk_dt_parse_mac_mode(*dev_id, switch_node, cfg);
++	ssdk_dt_parse_port3_pcs_channel(*dev_id, switch_node, cfg);
+ 	ssdk_dt_parse_mdio(*dev_id, switch_node, cfg);
+ 	ssdk_dt_parse_port_bmp(*dev_id, switch_node, cfg);
+ 	ssdk_dt_parse_interrupt(*dev_id, switch_node);

package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch

@@ -0,0 +1,33 @@
+From ab3b663842f66d0ed290696cee9edb9070a36e8f Mon Sep 17 00:00:00 2001
+From: Paweł Owoc <frut3k7@gmail.com>
+Date: Wed, 7 May 2024 10:37:44 +0100
+Subject: [PATCH] hsl_phy: add support for AQR114C-B0 PHY
+
+Add support for AQR114C-B0 PHY.
+
+Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
+---
+ include/hsl/phy/hsl_phy.h | 1 +
+ src/hsl/phy/hsl_phy.c     | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/include/hsl/phy/hsl_phy.h
++++ b/include/hsl/phy/hsl_phy.h
+@@ -613,6 +613,7 @@ typedef struct {
+ #define AQUANTIA_PHY_113C_B0    0x31c31C12
+ #define AQUANTIA_PHY_113C_B1    0x31c31C13
+ #define AQUANTIA_PHY_112C       0x03a1b792
++#define AQUANTIA_PHY_114C_B0    0x31c31c22
+ #define MVL_PHY_X3410           0x31c31DD3
+ 
+ #define PHY_805XV2              0x004DD082
+--- a/src/hsl/phy/hsl_phy.c
++++ b/src/hsl/phy/hsl_phy.c
+@@ -271,6 +271,7 @@ phy_type_t hsl_phytype_get_by_phyid(a_ui
+ 		case AQUANTIA_PHY_113C_B0:
+ 		case AQUANTIA_PHY_113C_B1:
+ 		case AQUANTIA_PHY_112C:
++		case AQUANTIA_PHY_114C_B0:
+ 		case MVL_PHY_X3410:
+ 			phytype = AQUANTIA_PHY_CHIP;
+ 			break;

package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch

@@ -0,0 +1,50 @@
+--- a/Makefile
++++ b/Makefile
+@@ -1,17 +1,19 @@
+-include ./config
+-
+ ifndef PRJ_PATH
+   PRJ_PATH=$(shell pwd)
+ endif
+ export PRJ_PATH
+ 
+-include ./make/config.mk
+-include ./make/tools.mk
+-include ./make/$(OS)_opt.mk
++include $(PRJ_PATH)/config
++
++include $(PRJ_PATH)/make/config.mk
++include $(PRJ_PATH)/make/tools.mk
++include $(PRJ_PATH)/make/$(OS)_opt.mk
+ 
+ SUB_DIR=$(patsubst %/, %, $(dir $(wildcard src/*/Makefile)))
+ SUB_LIB=$(subst src/, , $(SUB_DIR))
+ 
++include $(PRJ_PATH)/Makefile.modules
++
+ ####################################################################
+ # 			SSDK-Style Makefile
+ ####################################################################
+@@ -27,11 +29,7 @@ all: $(BIN_DIR) kslib
+ # 			LNX Modules-Style Makefile
+ ####################################################################
+ modules: $(BIN_DIR) kslib_c
+-	mkdir -p ./temp/;cp * ./temp -a;cd ./temp;cp ../Makefile.modules ./Makefile;
+-	make -C $(SYS_PATH) M=$(PRJ_PATH)/temp $(LNX_MAKEOPTS) modules
+-	cp $(PRJ_PATH)/temp/Module.symvers $(PRJ_PATH)/Module.symvers;
+-	cp temp/*.ko build/bin;
+-	rm -Rf ./temp/*.o ./temp/*.ko ./temp/*.a
++	@$(MAKE) -C $(SYS_PATH) M=$(PRJ_PATH) $(LNX_MAKEOPTS) modules
+ 	@echo "---Build [SSDK-$(VERSION)] at $(BUILD_DATE) finished."
+ 
+ kslib_c:
+--- a/make/linux_opt.mk
++++ b/make/linux_opt.mk
+@@ -782,6 +782,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M
+ ####################################################################
+ # 			cflags for LNX Modules-Style Makefile
+ ####################################################################
+-LNX_LOCAL_CFLAGS += $(MODULE_INC) $(MODULE_CFLAG) ${EXTRA_INC} -DFALLTHROUGH
++LNX_LOCAL_CFLAGS = $(MODULE_INC) $(MODULE_CFLAG) ${EXTRA_INC} -DFALLTHROUGH
+ export LNX_LOCAL_CFLAGS
+