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This commit is contained in:
domenico
2025-06-24 12:51:15 +02:00
commit 27c9d80f51
10493 changed files with 1885777 additions and 0 deletions

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@@ -0,0 +1,49 @@
From ffcbb4ccd357eeb649036e379a34bf5fb8d4f47c Mon Sep 17 00:00:00 2001
From: Richard Zhu <hongxing.zhu@nxp.com>
Date: Thu, 13 Oct 2022 09:47:00 +0800
Subject: [PATCH 1/3] phy: freescale: imx8m-pcie: Refine register definitions
No function changes, refine PHY register definitions.
- Keep align with other CMN PHY registers, refine the definitions of
PHY_CMN_REG75.
- Remove two BIT definitions that are not used at all.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
@@ -32,12 +32,10 @@
#define IMX8MM_PCIE_PHY_CMN_REG065 0x194
#define ANA_AUX_RX_TERM (BIT(7) | BIT(4))
#define ANA_AUX_TX_LVL GENMASK(3, 0)
-#define IMX8MM_PCIE_PHY_CMN_REG75 0x1D4
-#define PCIE_PHY_CMN_REG75_PLL_DONE 0x3
+#define IMX8MM_PCIE_PHY_CMN_REG075 0x1D4
+#define ANA_PLL_DONE 0x3
#define PCIE_PHY_TRSV_REG5 0x414
-#define PCIE_PHY_TRSV_REG5_GEN1_DEEMP 0x2D
#define PCIE_PHY_TRSV_REG6 0x418
-#define PCIE_PHY_TRSV_REG6_GEN2_DEEMP 0xF
#define IMX8MM_GPR_PCIE_REF_CLK_SEL GENMASK(25, 24)
#define IMX8MM_GPR_PCIE_REF_CLK_PLL FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3)
@@ -152,9 +150,8 @@ static int imx8_pcie_phy_power_on(struct
}
/* Polling to check the phy is ready or not. */
- ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG75,
- val, val == PCIE_PHY_CMN_REG75_PLL_DONE,
- 10, 20000);
+ ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075,
+ val, val == ANA_PLL_DONE, 10, 20000);
return ret;
}

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@@ -0,0 +1,99 @@
From bf03b9281b119bcdc167b2dd6ac98294587eb5ff Mon Sep 17 00:00:00 2001
From: Richard Zhu <hongxing.zhu@nxp.com>
Date: Thu, 13 Oct 2022 09:47:02 +0800
Subject: [PATCH 3/3] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
Add i.MX8MP PCIe PHY support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 25 ++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
@@ -48,6 +48,7 @@
enum imx8_pcie_phy_type {
IMX8MM,
+ IMX8MP,
};
struct imx8_pcie_phy_drvdata {
@@ -60,6 +61,7 @@ struct imx8_pcie_phy {
struct clk *clk;
struct phy *phy;
struct regmap *iomuxc_gpr;
+ struct reset_control *perst;
struct reset_control *reset;
u32 refclk_pad_mode;
u32 tx_deemph_gen1;
@@ -74,11 +76,11 @@ static int imx8_pcie_phy_power_on(struct
u32 val, pad_mode;
struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
- reset_control_assert(imx8_phy->reset);
-
pad_mode = imx8_phy->refclk_pad_mode;
switch (imx8_phy->drvdata->variant) {
case IMX8MM:
+ reset_control_assert(imx8_phy->reset);
+
/* Tune PHY de-emphasis setting to pass PCIe compliance. */
if (imx8_phy->tx_deemph_gen1)
writel(imx8_phy->tx_deemph_gen1,
@@ -87,6 +89,8 @@ static int imx8_pcie_phy_power_on(struct
writel(imx8_phy->tx_deemph_gen2,
imx8_phy->base + PCIE_PHY_TRSV_REG6);
break;
+ case IMX8MP: /* Do nothing. */
+ break;
}
if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
@@ -143,6 +147,9 @@ static int imx8_pcie_phy_power_on(struct
IMX8MM_GPR_PCIE_CMN_RST);
switch (imx8_phy->drvdata->variant) {
+ case IMX8MP:
+ reset_control_deassert(imx8_phy->perst);
+ fallthrough;
case IMX8MM:
reset_control_deassert(imx8_phy->reset);
usleep_range(200, 500);
@@ -183,8 +190,14 @@ static const struct imx8_pcie_phy_drvdat
.variant = IMX8MM,
};
+static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
+ .gpr = "fsl,imx8mp-iomuxc-gpr",
+ .variant = IMX8MP,
+};
+
static const struct of_device_id imx8_pcie_phy_of_match[] = {
{.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
+ {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
{ },
};
MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
@@ -240,6 +253,14 @@ static int imx8_pcie_phy_probe(struct pl
return PTR_ERR(imx8_phy->reset);
}
+ if (imx8_phy->drvdata->variant == IMX8MP) {
+ imx8_phy->perst =
+ devm_reset_control_get_exclusive(dev, "perst");
+ if (IS_ERR(imx8_phy->perst))
+ dev_err_probe(dev, PTR_ERR(imx8_phy->perst),
+ "Failed to get PCIE PHY PERST control\n");
+ }
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
imx8_phy->base = devm_ioremap_resource(dev, res);
if (IS_ERR(imx8_phy->base))

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@@ -0,0 +1,11 @@
--- a/arch/arm/boot/dts/imx6dl-wandboard.dts
+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts
@@ -16,4 +16,8 @@
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
+
+ chosen {
+ bootargs = "console=ttymxc0,115200";
+ };
};

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@@ -0,0 +1,96 @@
From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
Date: Tue, 3 Mar 2020 15:14:40 +0100
Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Petr Štetiar <ynezz@true.cz>
---
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 12 ++++++++----
2 files changed, 18 insertions(+), 10 deletions(-)
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
+ led-boot = &led_boot;
+ led-failsafe = &led_failsafe;
+ led-running = &led_running;
+ led-upgrade = &led_upgrade;
};
chosen {
@@ -35,22 +39,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds_ixora>;
- led4-green {
+ led_running: led4-green {
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
label = "LED_4_GREEN";
};
- led4-red {
+ led_upgrade: led4-red {
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
label = "LED_4_RED";
};
- led5-green {
+ led_boot: led5-green {
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
label = "LED_5_GREEN";
};
- led5-red {
+ led_failsafe: led5-red {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
label = "LED_5_RED";
};
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
+ led-boot = &led_boot;
+ led-failsafe = &led_failsafe;
+ led-running = &led_running;
+ led-upgrade = &led_upgrade;
};
chosen {
@@ -36,22 +40,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds_ixora>;
- led4-green {
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+ led_running: led4-green {
+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
label = "LED_4_GREEN";
};
- led4-red {
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ led_upgrade: led4-red {
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
label = "LED_4_RED";
};
- led5-green {
+ led_boot: led5-green {
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
label = "LED_5_GREEN";
};
- led5-red {
+ led_failsafe: led5-red {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
label = "LED_5_RED";
};

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@@ -0,0 +1,78 @@
From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
Date: Tue, 3 Mar 2020 15:15:57 +0100
Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Petr Štetiar <ynezz@true.cz>
---
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++-
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 ++++++++++++++-
2 files changed, 28 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -59,6 +59,17 @@
label = "LED_5_RED";
};
};
+
+ gpio-keys {
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <10>;
+ };
+ };
};
&can1 {
@@ -181,4 +192,10 @@
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
+
+ pinctrl_switch3_ixora: switch3ixora {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
+ >;
+ };
};
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
@@ -61,6 +61,17 @@
};
};
+ gpio-keys {
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <10>;
+ };
+ };
+
reg_3v3_vmmc: regulator-3v3-vmmc {
compatible = "regulator-fixed";
enable-active-high;
@@ -262,6 +273,12 @@
>;
};
+ pinctrl_switch3_ixora: switch3ixora {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
+ >;
+ };
+
pinctrl_mmc_cd_sleep: mmccdslpgrp {
fsl,pins = <
/* MMC1 CD */

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@@ -0,0 +1,24 @@
--- a/arch/arm/boot/dts/imx7d-pico-pi.dts
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
@@ -8,12 +8,20 @@
model = "TechNexion PICO-IMX7D Board and PI baseboard";
compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
+ aliases {
+ led-boot = &led_system;
+ led-failsafe = &led_system;
+ led-running = &led_system;
+ led-upgrade = &led_system;
+ label-mac-device = &fec1;
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
- led {
+ led_system: led {
label = "gpio-led";
gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
};

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@@ -0,0 +1,23 @@
From 6e8e5ccfbee7a531b035ffce3f95f3901946fa9d Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Wed, 9 Jan 2019 14:33:24 -0600
Subject: [PATCH] ARM: imx7d-pico-pi.dts: add default stdout-path
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/boot/dts/imx7d-pico-pi.dts | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/arm/boot/dts/imx7d-pico-pi.dts
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
@@ -16,6 +16,10 @@
label-mac-device = &fec1;
};
+ chosen {
+ stdout-path = "serial4:115200n8";
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";