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240
target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi
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240
target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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aliases {
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ethernet0 = &gmac0;
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label-mac-device = &gmac0;
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n1";
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bootargs = "console=ttyS0,115200n1 swiotlb=512";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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mesh_green {
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label = "green:mesh";
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gpios = <&pio 79 GPIO_ACTIVE_LOW>;
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};
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mesh_red {
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label = "red:mesh";
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gpios = <&pio 82 GPIO_ACTIVE_LOW>;
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};
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led_system: system_blue {
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label = "blue:system";
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gpios = <&pio 81 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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};
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ð {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-connection-type = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&pio>;
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interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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wan: port@4 {
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reg = <4>;
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label = "wan";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pcie0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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};
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&pio {
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epa_elna_pins: epa-elna-pins {
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mux {
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function = "antsel";
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groups = "antsel0", "antsel1", "antsel2", "antsel3",
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"antsel4", "antsel5", "antsel6", "antsel7",
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"antsel8", "antsel9", "antsel12", "antsel13",
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"antsel14", "antsel15", "antsel16", "antsel17";
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};
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};
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_0_waken",
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"pcie0_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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spi_nor_pins: spi-nor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx";
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&pwrap {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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};
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&rtc {
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status = "disabled";
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};
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&uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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&watchdog {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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};
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