domenico/openwrt-armor-g5
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domenico
2025-06-24 12:51:15 +02:00
commit 27c9d80f51
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63
target/linux/realtek/dts-5.15/rtl8382_zyxel_gs1900-24e.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later
#include "rtl8380_zyxel_gs1900.dtsi"
/ {
compatible = "zyxel,gs1900-24e", "realtek,rtl838x-soc";
model = "ZyXEL GS1900-24E";
};
&mdio {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)
EXTERNAL_PHY(2)
EXTERNAL_PHY(3)
EXTERNAL_PHY(4)
EXTERNAL_PHY(5)
EXTERNAL_PHY(6)
EXTERNAL_PHY(7)
EXTERNAL_PHY(16)
EXTERNAL_PHY(17)
EXTERNAL_PHY(18)
EXTERNAL_PHY(19)
EXTERNAL_PHY(20)
EXTERNAL_PHY(21)
EXTERNAL_PHY(22)
EXTERNAL_PHY(23)
};
&switch0 {
ports {
SWITCH_PORT(1, 1, qsgmii)
SWITCH_PORT(0, 2, qsgmii)
SWITCH_PORT(3, 3, qsgmii)
SWITCH_PORT(2, 4, qsgmii)
SWITCH_PORT(5, 5, qsgmii)
SWITCH_PORT(4, 6, qsgmii)
SWITCH_PORT(7, 7, qsgmii)
SWITCH_PORT(6, 8, qsgmii)
SWITCH_PORT(9, 9, internal)
SWITCH_PORT(8, 10, internal)
SWITCH_PORT(11, 11, internal)
SWITCH_PORT(10, 12, internal)
SWITCH_PORT(13, 13, internal)
SWITCH_PORT(12, 14, internal)
SWITCH_PORT(15, 15, internal)
SWITCH_PORT(14, 16, internal)
SWITCH_PORT(17, 17, qsgmii)
SWITCH_PORT(16, 18, qsgmii)
SWITCH_PORT(19, 19, qsgmii)
SWITCH_PORT(18, 20, qsgmii)
SWITCH_PORT(21, 21, qsgmii)
SWITCH_PORT(20, 22, qsgmii)
SWITCH_PORT(23, 23, qsgmii)
SWITCH_PORT(22, 24, qsgmii)
};
};
&gpio1 {
/delete-node/ poe_enable;
};