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openwrt-armor-g5/target/linux/ath79/dts/qca9558_tplink_archer-d7b-v1.dts
domenico 27c9d80f51
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Initial commit
2025-06-24 12:51:15 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9558_tplink_archer-d7.dtsi"
/ {
compatible = "tplink,archer-d7b-v1", "qca,qca9558";
model = "TP-Link Archer D7b v1";
aliases {
label-mac-device = &wmac;
};
};
&pcie1 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_5000>, <&macaddr_romfs_f100 2>;
nvmem-cell-names = "calibration", "mac-address";
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0xfa0000>;
};
partition@fc0000 {
label = "config";
reg = <0xfc0000 0x010000>;
read-only;
};
partition@fd0000 {
label = "romfs";
reg = <0xfd0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_romfs_f100: macaddr@f100 {
compatible = "mac-base";
reg = <0xf100 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@fe0000 {
label = "reserve";
reg = <0xfe0000 0x010000>;
read-only;
};
partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
cal_art_1000: calibration@1000 {
reg = <0x1000 0x440>;
};
cal_art_5000: calibration@5000 {
reg = <0x5000 0x844>;
};
};
};
};
};
};
&eth0 {
nvmem-cells = <&macaddr_romfs_f100 1>;
nvmem-cell-names = "mac-address";
};
&eth1 {
nvmem-cells = <&macaddr_romfs_f100 0>;
nvmem-cell-names = "mac-address";
};
&wmac {
nvmem-cells = <&macaddr_romfs_f100 0>, <&cal_art_1000>;
nvmem-cell-names = "mac-address", "calibration";
};