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43 lines
1.7 KiB
Diff
43 lines
1.7 KiB
Diff
From 0a19b5256303d2f35be9272832b01a170c9a039b Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Wed, 22 May 2024 09:46:54 +0100
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Subject: [PATCH 1100/1135] drivers: pcie-brcmstb: add best-effort workaround
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for QoS bug on bcm2712
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If a set of read requests are issued by an endpoint, they are streamed
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into a resynchronisation FIFO prior to exiting the RC. This FIFO has an
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edge case where it can drop QoS for a request to 0 if there's a single
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outstanding read request in the FIFO, and another is pushed when the
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FIFO is popped. Requests with a QoS of 0 can take hundreds of
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microseconds to complete.
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By adding an experimentally-determined amount of backpressure on the pop
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side, the critical level transition can largely be avoided.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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drivers/pci/controller/pcie-brcmstb.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/drivers/pci/controller/pcie-brcmstb.c
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+++ b/drivers/pci/controller/pcie-brcmstb.c
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@@ -568,6 +568,18 @@ static void brcm_pcie_set_tc_qos(struct
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AXI_DIS_QOS_GATING_IN_MASTER;
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writel(reg, pcie->base + PCIE_MISC_AXI_INTF_CTRL);
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+ /*
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+ * If the QOS_UPDATE_TIMING_FIX bit is Reserved-0, then this is a
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+ * 2712C1 chip, or a single-lane RC. Use the best-effort alternative
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+ * which is to partially throttle AXI requests in-flight to the SDC.
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+ */
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+ reg = readl(pcie->base + PCIE_MISC_AXI_INTF_CTRL);
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+ if (!(reg & AXI_EN_QOS_UPDATE_TIMING_FIX)) {
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+ reg &= ~AXI_MASTER_MAX_OUTSTANDING_REQUESTS_MASK;
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+ reg |= 15;
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+ writel(reg, pcie->base + PCIE_MISC_AXI_INTF_CTRL);
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+ }
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+
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/* Disable VDM reception by default - QoS map defaults to 0 */
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reg = readl(pcie->base + PCIE_MISC_CTRL_1);
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reg &= ~PCIE_MISC_CTRL_1_EN_VDM_QOS_CONTROL_MASK;
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