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domenico
2025-06-24 13:14:22 +02:00
commit 4002f145fc
9002 changed files with 1731834 additions and 0 deletions

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From 1ca5f2430c4f9d85b98b8d6e5d93f8d4802faf8e Mon Sep 17 00:00:00 2001
From: Vivek Unune <npcomplete13@gmail.com>
Date: Wed, 14 Oct 2020 15:27:27 -0400
Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7
Add ports 5 and 7 which are connected to gmac cores 1 & 2.
These will be disabled for now.
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/bcm47094-linksys-panamera.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -242,6 +242,30 @@
label = "wan";
};
+ port@5 {
+ reg = <5>;
+ ethernet = <&gmac0>;
+ label = "cpu";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ ethernet = <&gmac1>;
+ label = "cpu";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
port@8 {
reg = <8>;
ethernet = <&gmac2>;

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@@ -0,0 +1,60 @@
From 74abbfe99f43eb7466d26d9e48fbeb46b8f3d804 Mon Sep 17 00:00:00 2001
From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Date: Tue, 20 Oct 2020 14:59:37 +0300
Subject: [PATCH] ARM: dts: BCM5301X: Harmonize EHCI/OHCI DT nodes name
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
arch/arm/boot/dts/bcm53573.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -265,7 +265,7 @@
interrupt-parent = <&gic>;
- ehci: ehci@21000 {
+ ehci: usb@21000 {
#usb-cells = <0>;
compatible = "generic-ehci";
@@ -287,7 +287,7 @@
};
};
- ohci: ohci@22000 {
+ ohci: usb@22000 {
#usb-cells = <0>;
compatible = "generic-ohci";
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -135,7 +135,7 @@
#address-cells = <1>;
#size-cells = <1>;
- ehci: ehci@4000 {
+ ehci: usb@4000 {
compatible = "generic-ehci";
reg = <0x4000 0x1000>;
interrupt-parent = <&gic>;
@@ -155,7 +155,7 @@
};
};
- ohci: ohci@d000 {
+ ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";

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@@ -0,0 +1,29 @@
From 4b650a20bdb5f9558007dd3055a17a1644a91c3e Mon Sep 17 00:00:00 2001
From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Date: Tue, 20 Oct 2020 14:59:46 +0300
Subject: [PATCH] ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
In accordance with the Generic xHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are
correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -318,7 +318,7 @@
interrupt-parent = <&gic>;
- xhci: xhci@23000 {
+ xhci: usb@23000 {
#usb-cells = <0>;
compatible = "generic-xhci";

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@@ -0,0 +1,71 @@
From bd9a01e28e5d1632528e531480b42d6e2c861d88 Mon Sep 17 00:00:00 2001
From: Vivek Unune <npcomplete13@gmail.com>
Date: Sun, 1 Nov 2020 15:08:03 -0500
Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
This router has dual paritions to store trx firmware image and
dual partitions for nvram. The second one in each of these cases acts
as a backup store.
When tested with OpenWrt, the default partition parser causes two issues:
1. It labels both nvram partitions as nvram. In factory, second one is
labeled devinfo.
2. It parses second trx image and tries to create second 'linux' partition
and fails with - cannot create duplicate 'linux' partition
The following patch works around both of these issues.
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/bcm47094-linksys-panamera.dts | 41 +++++++++++++++++++
1 file changed, 41 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -292,3 +292,44 @@
&usb3_phy {
status = "okay";
};
+
+&nandcs {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x0000000 0x0080000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "nvram";
+ reg = <0x080000 0x0100000>;
+ };
+
+ partition@180000{
+ label = "devinfo";
+ reg = <0x0180000 0x080000>;
+ };
+
+ partition@200000 {
+ label = "firmware";
+ reg = <0x0200000 0x01D00000>;
+ compatible = "brcm,trx";
+ };
+
+ partition@1F00000 {
+ label = "failsafe";
+ reg = <0x01F00000 0x01D00000>;
+ read-only;
+ };
+
+ partition@5200000 {
+ label = "system";
+ reg = <0x05200000 0x02E00000>;
+ };
+ };
+};

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@@ -0,0 +1,49 @@
From 2f34ae32f5e74096540cd7ce95bfd467cb74b21a Mon Sep 17 00:00:00 2001
From: Vivek Unune <npcomplete13@gmail.com>
Date: Wed, 4 Nov 2020 15:29:51 -0500
Subject: [PATCH] ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM47094 version of pinmux uses different compatible and supports MDIO
pinmux pins. Hence, use the correct compatible string and defines the
MDIO pins group.
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094.dtsi | 9 +++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
2 files changed, 10 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm47094.dtsi
+++ b/arch/arm/boot/dts/bcm47094.dtsi
@@ -8,6 +8,15 @@
/ {
};
+&pinctrl {
+ compatible = "brcm,bcm4709-pinmux";
+
+ pinmux_mdio: mdio {
+ groups = "mdio_grp";
+ function = "mdio";
+ };
+};
+
&usb3_phy {
compatible = "brcm,ns-bx-usb3-phy";
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -428,7 +428,7 @@
#address-cells = <1>;
#size-cells = <1>;
- pin-controller@1c0 {
+ pinctrl: pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";

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From c862059875cffc013ee27bf9759ac288224e7a14 Mon Sep 17 00:00:00 2001
From: Vivek Unune <npcomplete13@gmail.com>
Date: Wed, 4 Nov 2020 15:29:52 -0500
Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
Now that we have a pin controller, use that instead of manuplating the
mdio/mdc pins directly. i.e. we no longer require the mdio-mii-mux
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/bcm47094-linksys-panamera.dts | 26 +++----------------
1 file changed, 4 insertions(+), 22 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -123,33 +123,13 @@
};
};
- mdio-bus-mux {
- #address-cells = <1>;
- #size-cells = <0>;
+ mdio-bus-mux@18003000 {
/* BIT(9) = 1 => external mdio */
- mdio_ext: mdio@200 {
+ mdio@200 {
reg = <0x200>;
#address-cells = <1>;
#size-cells = <0>;
- };
- };
-
- mdio-mii-mux {
- compatible = "mdio-mux-mmioreg";
- mdio-parent-bus = <&mdio_ext>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x1800c1c0 0x4>;
-
- /* BIT(6) = mdc, BIT(7) = mdio */
- mux-mask = <0xc0>;
-
- mdio-mii@0 {
- /* Enable MII function */
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
switch@0 {
compatible = "brcm,bcm53125";
@@ -159,6 +139,8 @@
reset-names = "robo_reset";
reg = <0>;
dsa,member = <1 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_mdio>;
ports {
#address-cells = <1>;

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@@ -0,0 +1,85 @@
From 776461b1795b4dc4084894cf53399044aafa1d21 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 11 Nov 2020 15:55:38 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Move CRU devices to the CRU node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
"Central Resource Unit").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 51 +++++++++++++++++----------------
1 file changed, 26 insertions(+), 25 deletions(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -428,6 +428,26 @@
#address-cells = <1>;
#size-cells = <1>;
+ lcpll0: lcpll0@100 {
+ #clock-cells = <1>;
+ compatible = "brcm,nsp-lcpll0";
+ reg = <0x100 0x14>;
+ clocks = <&osc>;
+ clock-output-names = "lcpll0", "pcie_phy",
+ "sdio", "ddr_phy";
+ };
+
+ genpll: genpll@140 {
+ #clock-cells = <1>;
+ compatible = "brcm,nsp-genpll";
+ reg = <0x140 0x24>;
+ clocks = <&osc>;
+ clock-output-names = "genpll", "phy",
+ "ethernetclk",
+ "usbclk", "iprocfast",
+ "sata1", "sata2";
+ };
+
pinctrl: pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
@@ -454,32 +474,13 @@
function = "uart1";
};
};
- };
- };
- lcpll0: lcpll0@1800c100 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-lcpll0";
- reg = <0x1800c100 0x14>;
- clocks = <&osc>;
- clock-output-names = "lcpll0", "pcie_phy", "sdio",
- "ddr_phy";
- };
-
- genpll: genpll@1800c140 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-genpll";
- reg = <0x1800c140 0x24>;
- clocks = <&osc>;
- clock-output-names = "genpll", "phy", "ethernetclk",
- "usbclk", "iprocfast", "sata1",
- "sata2";
- };
-
- thermal: thermal@1800c2c0 {
- compatible = "brcm,ns-thermal";
- reg = <0x1800c2c0 0x10>;
- #thermal-sensor-cells = <0>;
+ thermal: thermal@2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
};
srab: srab@18007000 {

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From 632ddf978565378e7efb9ea77c0ba239ea66bfdc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 13 Nov 2020 11:09:19 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB
3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It seems pointless to have it enabled.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 4 ----
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 4 ----
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ----
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 4 ----
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 4 ----
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ----
6 files changed, 24 deletions(-)
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -57,10 +57,6 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -64,10 +64,6 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -117,7 +117,3 @@
};
};
};
-
-&usb3_phy {
- status = "okay";
-};
--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -57,10 +57,6 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -105,10 +105,6 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
@@ -126,7 +126,3 @@
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
-
-&usb3_phy {
- status = "okay";
-};

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@@ -0,0 +1,30 @@
From b2ab5e8697ef6591aeeda23be49e096705dbbda3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 13 Nov 2020 10:50:12 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This device has a functional USB 3 port so PHY is required.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -71,6 +71,10 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&usb3_phy {
+ status = "okay";
+};
+
&spi_nor {
status = "okay";
};

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@@ -0,0 +1,32 @@
From f527cb6f3345f7faa8e61dd9f3c437437327428c Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 11:41:01 -0800
Subject: [PATCH] ARM: dts: BCM5301X: Update Ethernet switch node name
Update the switch unit name from srab to ethernet-switch, allowing us to
fix warnings such as:
CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml:
srab@18007000: $nodename:0: 'srab@18007000' does not match
'^(ethernet-)?switch(@.*)?$'
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -483,7 +483,7 @@
};
};
- srab: srab@18007000 {
+ srab: ethernet-switch@18007000 {
compatible = "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;

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@@ -0,0 +1,82 @@
From 953efcb0c0234f8c488ebd4090378e949d6ba78b Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 16:42:09 -0800
Subject: [PATCH] ARM: dts: BCM5301X: Add a default compatible for switch node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Provide a default compatible string which is based on the 53011 SRAB
compatible by default. The 4709 and 47094 default to the 53012 SRAB
compatible.
This allows us to have sane defaults and silences the following
warnings:
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
ethernet-switch@18007000: compatible: 'oneOf' conditional failed, one
must be fixed:
['brcm,bcm5301x-srab'] is too short
'brcm,bcm5325' was expected
'brcm,bcm53115' was expected
'brcm,bcm53125' was expected
'brcm,bcm53128' was expected
'brcm,bcm5365' was expected
'brcm,bcm5395' was expected
'brcm,bcm5389' was expected
'brcm,bcm5397' was expected
'brcm,bcm5398' was expected
'brcm,bcm11360-srab' was expected
'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab',
'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab',
'brcm,bcm53019-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab',
'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab',
'brcm,bcm58311-srab', 'brcm,bcm58313-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab',
'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab',
'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch',
'brcm,bcm6328-switch', 'brcm,bcm6368-switch']
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4709.dtsi | 4 ++++
arch/arm/boot/dts/bcm47094.dtsi | 4 ++++
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
3 files changed, 9 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4709.dtsi
+++ b/arch/arm/boot/dts/bcm4709.dtsi
@@ -9,3 +9,7 @@
clock-frequency = <125000000>;
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
+};
--- a/arch/arm/boot/dts/bcm47094.dtsi
+++ b/arch/arm/boot/dts/bcm47094.dtsi
@@ -25,3 +25,7 @@
clock-frequency = <125000000>;
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
+};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -484,7 +484,7 @@
};
srab: ethernet-switch@18007000 {
- compatible = "brcm,bcm5301x-srab";
+ compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
status = "disabled";

View File

@@ -0,0 +1,180 @@
From fd577b41421bc24e2d04cab96d387301b649eb14 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 17:20:17 -0800
Subject: [PATCH] ARM: dts: BCM5301X: Provide defaults ports container node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Provide an empty 'ports' container node with the correct #address-cells
and #size-cells properties. This silences the following warning:
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
ethernet-switch@18007000: 'oneOf' conditional failed, one must be fixed:
'ports' is a required property
'ethernet-ports' is a required property
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 3 ---
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 3 ---
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 3 ---
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 3 ---
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 3 ---
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 3 ---
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 3 ---
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 3 ---
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 3 ---
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 3 ---
arch/arm/boot/dts/bcm5301x.dtsi | 4 ++++
arch/arm/boot/dts/bcm953012er.dts | 3 ---
12 files changed, 4 insertions(+), 33 deletions(-)
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -61,9 +61,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "poe";
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -68,9 +68,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@4 {
reg = <4>;
label = "lan";
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -122,9 +122,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -61,9 +61,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@4 {
reg = <4>;
label = "poe";
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -109,9 +109,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -201,9 +201,6 @@
dsa,member = <0 0>;
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@1 {
reg = <1>;
label = "lan7";
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -59,9 +59,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "poe";
--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
@@ -57,9 +57,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan";
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -108,9 +108,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -83,9 +83,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -490,6 +490,10 @@
status = "disabled";
/* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
rng: rng@18004000 {
--- a/arch/arm/boot/dts/bcm953012er.dts
+++ b/arch/arm/boot/dts/bcm953012er.dts
@@ -69,9 +69,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "port0";

View File

@@ -0,0 +1,32 @@
From fd66cd0d79cb836badecb91fdd19afd32afbb443 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 12:02:08 -0800
Subject: [PATCH 13/16] ARM: dts: NSP: Update ethernet switch node name
Update the switch unit name from srab to ethernet-switch, allowing us
to fix warnings such as:
CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml:
srab@18007000: $nodename:0: 'srab@18007000' does not match
'^(ethernet-)?switch(@.*)?$'
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -385,7 +385,7 @@
clock-names = "apb_pclk";
};
- srab: srab@36000 {
+ srab: ethernet-switch@36000 {
compatible = "brcm,nsp-srab";
reg = <0x36000 0x1000>,
<0x3f308 0x8>,

View File

@@ -0,0 +1,26 @@
From 8b0235d1deace8f1bd8cdd149d698fee3974fdf4 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 12:06:15 -0800
Subject: [PATCH 14/16] ARM: dts: NSP: Fix Ethernet switch SGMII register name
The register name should be "sgmii_config", not "sgmii", this is not a
functional change since no code is currently looking for that register
by name (or at all).
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -390,7 +390,7 @@
reg = <0x36000 0x1000>,
<0x3f308 0x8>,
<0x3f410 0xc>;
- reg-names = "srab", "mux_config", "sgmii";
+ reg-names = "srab", "mux_config", "sgmii_config";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,

View File

@@ -0,0 +1,77 @@
From 42791b317db4cda36751f57bada27857849811d3 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 17:41:32 -0800
Subject: [PATCH 15/16] ARM: dts: NSP: Add a SRAB compatible string for each
board
Provide a valid compatible string for the Ethernet switch node based on
the board including the switch. This allows us to have sane defaults and
silences the following warnings:
arch/arm/boot/dts/bcm958522er.dt.yaml:
ethernet-switch@36000: compatible: 'oneOf' conditional failed,
one
must be fixed:
['brcm,bcm5301x-srab'] is too short
'brcm,bcm5325' was expected
'brcm,bcm53115' was expected
'brcm,bcm53125' was expected
'brcm,bcm53128' was expected
'brcm,bcm5365' was expected
'brcm,bcm5395' was expected
'brcm,bcm5389' was expected
'brcm,bcm5397' was expected
'brcm,bcm5398' was expected
'brcm,bcm11360-srab' was expected
'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab',
'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab',
'brcm,bcm53019-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab',
'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab',
'brcm,bcm58311-srab', 'brcm,bcm58313-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab',
'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab',
'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab']
'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch',
'brcm,bcm6328-switch', 'brcm,bcm6368-switch']
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm958522er.dts | 4 ++++
arch/arm/boot/dts/bcm958525er.dts | 4 ++++
arch/arm/boot/dts/bcm958525xmc.dts | 4 ++++
3 files changed, 12 insertions(+)
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -178,3 +178,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58522-srab", "brcm,nsp-srab";
+};
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -190,3 +190,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
+};
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -210,3 +210,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
+};

View File

@@ -0,0 +1,99 @@
From 51e40c25aa18d926a8eb1c07289d01611b21123a Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Mon, 9 Nov 2020 17:44:33 -0800
Subject: [PATCH 16/16] ARM: dts: NSP: Provide defaults ports container node
Provide an empty 'ports' container node with the correct #address-cells
and #size-cells properties. This silences the following warning:
arch/arm/boot/dts/bcm958522er.dt.yaml:
ethernet-switch@36000: 'oneOf' conditional failed, one must be fixed:
'ports' is a required property
'ethernet-ports' is a required property
From schema:
Documentation/devicetree/bindings/net/dsa/b53.yaml
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++++
arch/arm/boot/dts/bcm958622hr.dts | 3 ---
arch/arm/boot/dts/bcm958623hr.dts | 3 ---
arch/arm/boot/dts/bcm958625hr.dts | 3 ---
arch/arm/boot/dts/bcm958625k.dts | 3 ---
arch/arm/boot/dts/bcm988312hr.dts | 3 ---
6 files changed, 4 insertions(+), 15 deletions(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -420,6 +420,10 @@
status = "disabled";
/* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
i2c0: i2c@38000 {
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -176,9 +176,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -180,9 +180,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -195,9 +195,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -216,9 +216,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -184,9 +184,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;

View File

@@ -0,0 +1,136 @@
From 428ac8df021dd1cbcc693eb76636873d42327e5d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 10 Mar 2021 22:04:46 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul
routers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Provide access to NVRAM which contains device environment variables.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts | 5 +++++
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 5 +++++
arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 5 +++++
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 5 +++++
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 5 +++++
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 5 +++++
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 5 +++++
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 5 +++++
8 files changed, 40 insertions(+)
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
@@ -21,6 +21,11 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1c080000 {
+ compatible = "brcm,nvram";
+ reg = <0x1c080000 0x180000>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -21,6 +21,11 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };
+
leds {
compatible = "gpio-leds";
--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
@@ -22,6 +22,11 @@
<0x88000000 0x08000000>;
};
+ nvram@1c080000 {
+ compatible = "brcm,nvram";
+ reg = <0x1c080000 0x180000>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -22,6 +22,11 @@
<0x88000000 0x08000000>;
};
+ nvram@1c080000 {
+ compatible = "brcm,nvram";
+ reg = <0x1c080000 0x100000>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
@@ -22,6 +22,11 @@
<0x88000000 0x18000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };
+
leds {
compatible = "gpio-leds";
--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
@@ -22,6 +22,11 @@
<0x88000000 0x18000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };
+
leds {
compatible = "gpio-leds";
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -22,6 +22,11 @@
<0x88000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };
+
leds {
compatible = "gpio-leds";
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -22,6 +22,11 @@
<0x88000000 0x18000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };
+
leds {
compatible = "gpio-leds";

View File

@@ -0,0 +1,60 @@
From 1d3352aeed164ef73f05cf80ca001f11d2f3312d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 29 Mar 2021 07:54:30 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.
While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 16 +++++++---------
1 file changed, 7 insertions(+), 9 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -279,7 +279,7 @@
&nandcs {
partitions {
- compatible = "fixed-partitions";
+ compatible = "linksys,ns-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -300,20 +300,18 @@
};
partition@200000 {
- label = "firmware";
- reg = <0x0200000 0x01D00000>;
- compatible = "brcm,trx";
+ reg = <0x0200000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
};
- partition@1F00000 {
- label = "failsafe";
- reg = <0x01F00000 0x01D00000>;
- read-only;
+ partition@1f00000 {
+ reg = <0x01f00000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
};
partition@5200000 {
label = "system";
- reg = <0x05200000 0x02E00000>;
+ reg = <0x05200000 0x02e00000>;
};
};
};

View File

@@ -0,0 +1,27 @@
From dcb56d61d5a8acca0a357cc603397bc0272ce4cb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 29 Mar 2021 10:04:09 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Set Linksys EA9500 power LED
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Set Linux default trigger to default on, just like it's normally done
for power LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -75,6 +75,7 @@
power {
label = "bcm53xx:white:power";
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
};
wifi-disabled {

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@@ -0,0 +1,77 @@
From b660269cba748dfd07eb5551a88ff34d5ea0b86e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 16 Apr 2021 15:37:48 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix NAND nodes names
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This matches nand-controller.yaml requirements.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -24,8 +24,8 @@
reg = <0x00000000 0x08000000>;
};
- nand: nand@18028000 {
- nandcs@0 {
+ nand_controller: nand-controller@18028000 {
+ nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -25,8 +25,8 @@
<0x88000000 0x08000000>;
};
- nand: nand@18028000 {
- nandcs@0 {
+ nand_controller: nand-controller@18028000 {
+ nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
@@ -6,8 +6,8 @@
*/
/ {
- nand@18028000 {
- nandcs: nandcs@0 {
+ nand-controller@18028000 {
+ nandcs: nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -501,7 +501,7 @@
reg = <0x18004000 0x14>;
};
- nand: nand@18028000 {
+ nand_controller: nand-controller@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
--- a/arch/arm/boot/dts/bcm953012k.dts
+++ b/arch/arm/boot/dts/bcm953012k.dts
@@ -49,8 +49,8 @@
};
};
-&nand {
- nandcs@0 {
+&nand_controller {
+ nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

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@@ -0,0 +1,52 @@
From bb95d7d440fefd104c593d9cb20da6d34a474e97 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 21 Apr 2021 11:00:06 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix pinmux subnodes names
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This matches pinmux-node.yaml requirements.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094.dtsi | 2 +-
arch/arm/boot/dts/bcm5301x.dtsi | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/bcm47094.dtsi
+++ b/arch/arm/boot/dts/bcm47094.dtsi
@@ -11,7 +11,7 @@
&pinctrl {
compatible = "brcm,bcm4709-pinmux";
- pinmux_mdio: mdio {
+ pinmux_mdio: mdio-pins {
groups = "mdio_grp";
function = "mdio";
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -458,18 +458,18 @@
function = "spi";
};
- pinmux_i2c: i2c {
+ pinmux_i2c: i2c-pins {
groups = "i2c_grp";
function = "i2c";
};
- pinmux_pwm: pwm {
+ pinmux_pwm: pwm-pins {
groups = "pwm0_grp", "pwm1_grp",
"pwm2_grp", "pwm3_grp";
function = "pwm";
};
- pinmux_uart1: uart1 {
+ pinmux_uart1: uart1-pins {
groups = "uart1_grp";
function = "uart1";
};

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@@ -0,0 +1,97 @@
From 465078bfdf5271601f098450ae2fc974865c59fd Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Thu, 10 Jun 2021 21:35:10 +0100
Subject: [PATCH] ARM: dts: NSP: add device names to compatible
Currently only the SoC type and platform are specified for all NSP
devices. This patch adds the device names.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm958522er.dts | 2 +-
arch/arm/boot/dts/bcm958525er.dts | 2 +-
arch/arm/boot/dts/bcm958525xmc.dts | 2 +-
arch/arm/boot/dts/bcm958622hr.dts | 2 +-
arch/arm/boot/dts/bcm958625hr.dts | 2 +-
arch/arm/boot/dts/bcm958625k.dts | 2 +-
arch/arm/boot/dts/bcm988312hr.dts | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM958522ER)";
- compatible = "brcm,bcm58522", "brcm,nsp";
+ compatible = "brcm,bcm958522er", "brcm,bcm58522", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM958525ER)";
- compatible = "brcm,bcm58525", "brcm,nsp";
+ compatible = "brcm,bcm958525er", "brcm,bcm58525", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus XMC (BCM958525xmc)";
- compatible = "brcm,bcm58525", "brcm,nsp";
+ compatible = "brcm,bcm958525xmc", "brcm,bcm58525", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM958622HR)";
- compatible = "brcm,bcm58622", "brcm,nsp";
+ compatible = "brcm,bcm958622hr", "brcm,bcm58622", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM958625HR)";
- compatible = "brcm,bcm58625", "brcm,nsp";
+ compatible = "brcm,bcm958625hr", "brcm,bcm58625", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -36,7 +36,7 @@
/ {
model = "NorthStar Plus SVK (BCM958625K)";
- compatible = "brcm,bcm58625", "brcm,nsp";
+ compatible = "brcm,bcm958625k", "brcm,bcm58625", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM988312HR)";
- compatible = "brcm,bcm88312", "brcm,nsp";
+ compatible = "brcm,bcm988312hr", "brcm,bcm88312", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";

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@@ -0,0 +1,29 @@
From 1b90dde4278a7b459979706b572785bc3a10bbb5 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Thu, 10 Jun 2021 21:35:12 +0100
Subject: [PATCH] ARM: dts: NSP: enable DMA on bcm988312hr
The previous patch "ARM: dts: NSP: Disable PL330 by default, add
dma-coherent property" set the DMAC to disabled by default, requiring it
to be manually enabled on each device. The bcm988312hr was mistakenly
omitted. This patch adds it back.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm988312hr.dts | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -58,6 +58,10 @@
/* USB 3 support needed to be complete */
+&dma {
+ status = "okay";
+};
+
&amac0 {
status = "okay";
};

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@@ -0,0 +1,113 @@
From 091a12b1814142eac16a115dab206f735b5476a9 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 13 Jun 2021 10:46:34 +0100
Subject: [PATCH] ARM: dts: NSP: disable qspi node by default
The QSPI bus is enabled by default, however this may not used on all
devices. This patch disables by default, requiring it to be explicitly
enabled where required.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 1 +
arch/arm/boot/dts/bcm958522er.dts | 1 +
arch/arm/boot/dts/bcm958525er.dts | 1 +
arch/arm/boot/dts/bcm958525xmc.dts | 1 +
arch/arm/boot/dts/bcm958622hr.dts | 1 +
arch/arm/boot/dts/bcm958623hr.dts | 1 +
arch/arm/boot/dts/bcm958625hr.dts | 1 +
arch/arm/boot/dts/bcm958625k.dts | 1 +
arch/arm/boot/dts/bcm988312hr.dts | 1 +
9 files changed, 9 insertions(+)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -310,6 +310,7 @@
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
xhci: usb@29000 {
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -134,6 +134,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -134,6 +134,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -150,6 +150,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -138,6 +138,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -142,6 +142,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -149,6 +149,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -153,6 +153,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -138,6 +138,7 @@
};
&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;

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@@ -0,0 +1,30 @@
From 236b31b1d84eb0e4f10c5f113a2675529456f919 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 13 Jun 2021 10:46:36 +0100
Subject: [PATCH] ARM: dts: NSP: add MDIO bus controller node
This patch adds the node for the MDIO bus controller, present on the NSP
SoC.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -363,6 +363,13 @@
status = "disabled";
};
+ mdio: mdio@32000 {
+ compatible = "brcm,iproc-mdio";
+ reg = <0x32000 0x8>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
+
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;

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@@ -0,0 +1,85 @@
From 1c615401bddb1be21e1d375aaa071680f40f1ae2 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 13 Jun 2021 10:46:37 +0100
Subject: [PATCH] ARM: dts: NSP: Move USB3 PHY to internal MDIO bus
This patch largely replicates Vivek Unune's patch "ARM: dts:
BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
whereby we need to create an mdio-mux to facilitate switches
configured via external MDIO, in this case on the Meraki MX65.
However in doing so, we are creating an overlap with usb3_phy's
ccb-mii range. To resolve this, usb3_phy should be moved to a child
node of the internal MDIO bus. The result is heavily based upon Vivek's
patch. This has also been cross-referenced with Yendapally Reddy's
earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
documentation, utilising the required usb3-dmp-syscon property. Note
that support for the deprecated ccb-mii bindings has been dropped as of
"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].
[1] https://lore.kernel.org/patchwork/patch/933971/
[2] https://www.spinics.net/lists/arm-kernel/msg555132.html
[3] https://lore.kernel.org/linux-devicetree/20201113113423.9466-1-zajec5@gmail.com/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 38 +++++++++++++++++++++++++++-------
1 file changed, 31 insertions(+), 7 deletions(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -370,6 +370,35 @@
#address-cells = <1>;
};
+ mdio-mux@32000 {
+ compatible = "mdio-mux-mmioreg";
+ reg = <0x32000 0x4>;
+ mux-mask = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio>;
+
+ mdio_int: mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb3_phy: usb3-phy@10 {
+ compatible = "brcm,ns-bx-usb3-phy";
+ reg = <0x10>;
+ usb3-dmp-syscon = <&usb3_dmp>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ mdio_ext: mdio@200 {
+ reg = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;
@@ -528,13 +557,8 @@
};
};
- usb3_phy: usb3-phy@104000 {
- compatible = "brcm,ns-bx-usb3-phy";
- reg = <0x104000 0x1000>,
- <0x032000 0x1000>;
- reg-names = "dmp", "ccb-mii";
- #phy-cells = <0>;
- status = "disabled";
+ usb3_dmp: syscon@104000 {
+ reg = <0x104000 0x1000>;
};
};

View File

@@ -0,0 +1,148 @@
From f111016a8293b968f05450fec83020c94d0f88c2 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Fri, 6 Aug 2021 21:44:32 +0100
Subject: [PATCH] ARM: dts: NSP: Add common bindings for MX64/MX65
These bindings are required for all Meraki MX64/MX65 devices. These
common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND
partitions, EHCI, OHCI and pinctrl.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../dts/bcm958625-meraki-mx6x-common.dtsi | 129 ++++++++++++++++++
1 file changed, 129 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+#include "bcm-nsp.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ pwm-leds {
+ compatible = "pwm-leds";
+
+ led-1 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_RED>;
+ pwms = <&pwm 1 50000>;
+ max-brightness = <255>;
+ };
+
+ led-2 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_GREEN>;
+ pwms = <&pwm 2 50000>;
+ max-brightness = <255>;
+ };
+
+ led-3 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_BLUE>;
+ pwms = <&pwm 3 50000>;
+ max-brightness = <255>;
+ };
+ };
+};
+
+&amac2 {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ at24@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ read-only;
+ };
+};
+
+&nand_controller {
+ nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <1024>;
+
+ brcm,nand-oob-sector-size = <27>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "shmoo";
+ reg = <0x80000 0x80000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "bootkernel1";
+ reg = <0x100000 0x300000>;
+ };
+
+ partition@400000 {
+ label = "nvram";
+ reg = <0x400000 0x100000>;
+ };
+
+ partition@500000 {
+ label = "bootkernel2";
+ reg = <0x500000 0x300000>;
+ };
+
+ partition@800000 {
+ label = "ubi";
+ reg = <0x800000 0x3f700000>;
+ };
+ };
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_leds>;
+
+ pwm_leds: pwm_leds {
+ function = "pwm";
+ groups = "pwm1_grp", "pwm2_grp", "pwm3_grp";
+ };
+};
+
+&pwm {
+ status = "okay";
+ #pwm-cells = <2>;
+};
+
+&uart0 {
+ clock-frequency = <62500000>;
+ status = "okay";
+};

View File

@@ -0,0 +1,90 @@
From 2addf9266a1d0f4ba59c9868b3effcd50de441a4 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Fri, 6 Aug 2021 21:44:33 +0100
Subject: [PATCH] ARM: dts: NSP: Add Ax stepping modifications
While uncommon, some Ax NSP SoCs exist in the wild. This stepping
requires a modified secondary CPU boot-reg and removal of DMA coherency
properties. Without these modifications, the secondary CPU will be
inactive and many peripherals will exhibit undefined behaviour.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp-ax.dtsi | 70 +++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm-nsp-ax.dtsi
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-nsp-ax.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Broadcom Northstar Plus Ax stepping-specific bindings.
+ * Notable differences from B0+ are the secondary-boot-reg and
+ * lack of DMA coherency.
+ */
+
+&cpu1 {
+ secondary-boot-reg = <0xffff042c>;
+};
+
+&dma {
+ /delete-property/ dma-coherent;
+};
+
+&sdio {
+ /delete-property/ dma-coherent;
+};
+
+&amac0 {
+ /delete-property/ dma-coherent;
+};
+
+&amac1 {
+ /delete-property/ dma-coherent;
+};
+
+&amac2 {
+ /delete-property/ dma-coherent;
+};
+
+&ehci0 {
+ /delete-property/ dma-coherent;
+};
+
+&mailbox {
+ /delete-property/ dma-coherent;
+};
+
+&xhci {
+ /delete-property/ dma-coherent;
+};
+
+&ehci0 {
+ /delete-property/ dma-coherent;
+};
+
+&ohci0 {
+ /delete-property/ dma-coherent;
+};
+
+&i2c0 {
+ /delete-property/ dma-coherent;
+};
+
+&sata {
+ /delete-property/ dma-coherent;
+};
+
+&pcie0 {
+ /delete-property/ dma-coherent;
+};
+
+&pcie1 {
+ /delete-property/ dma-coherent;
+};
+
+&pcie2 {
+ /delete-property/ dma-coherent;
+};

View File

@@ -0,0 +1,340 @@
From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Fri, 6 Aug 2021 21:44:34 +0100
Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series
MX64 & MX64W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 internal switch (5x 1GbE ports)
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
This patch adds the Meraki MX64 series-specific bindings. Since some
devices make use of the older A0 SoC, changes need to be made to
accommodate this case, including removal of coherency options and
modification to the secondary-boot-reg.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/Makefile | 4 +
.../boot/dts/bcm958625-meraki-kingpin.dtsi | 163 ++++++++++++++++++
.../arm/boot/dts/bcm958625-meraki-mx64-a0.dts | 25 +++
arch/arm/boot/dts/bcm958625-meraki-mx64.dts | 24 +++
.../boot/dts/bcm958625-meraki-mx64w-a0.dts | 33 ++++
arch/arm/boot/dts/bcm958625-meraki-mx64w.dts | 32 ++++
6 files changed, 281 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -158,6 +158,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
bcm958525xmc.dtb \
bcm958622hr.dtb \
bcm958623hr.dtb \
+ bcm958625-meraki-mx64.dtb \
+ bcm958625-meraki-mx64-a0.dtb \
+ bcm958625-meraki-mx64w.dtb \
+ bcm958625-meraki-mx64w-a0.dtb \
bcm958625hr.dtb \
bcm988312hr.dtb \
bcm958625k.dtb
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+#include "bcm958625-meraki-mx6x-common.dtsi"
+
+/ {
+
+ keys {
+ compatible = "gpio-keys-polled";
+ autorepeat;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ /* green:lan1-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ /* green:lan1-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
+ };
+
+ led-2 {
+ /* green:lan2-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
+ };
+
+ led-3 {
+ /* green:lan2-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <3>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
+ };
+
+ led-4 {
+ /* green:lan3-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <4>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
+ };
+
+ led-5 {
+ /* green:lan3-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <5>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
+ };
+
+ led-6 {
+ /* green:lan4-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <6>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
+ };
+
+ led-7 {
+ /* green:lan4-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <7>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
+ };
+
+ led-8 {
+ /* green:wan-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <8>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
+ };
+
+ led-9 {
+ /* green:wan-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <9>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
+ };
+
+ led-a {
+ /* amber:power */
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-b {
+ /* white:status */
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "lan2";
+ reg = <1>;
+ };
+
+ port@2 {
+ label = "lan3";
+ reg = <2>;
+ };
+
+ port@3 {
+ label = "lan4";
+ reg = <3>;
+ };
+
+ port@4 {
+ label = "wan";
+ reg = <4>;
+ };
+
+ port@8 {
+ ethernet = <&amac2>;
+ reg = <8>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-kingpin.dtsi"
+#include "bcm-nsp-ax.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64(A0)";
+ compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-kingpin.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64";
+ compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-kingpin.dtsi"
+#include "bcm-nsp-ax.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64W(A0)";
+ compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-kingpin.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64W";
+ compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};

View File

@@ -0,0 +1,386 @@
From 702a8f4744ed5b480f2b2411858184afdb10f9fd Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Fri, 6 Aug 2021 21:44:35 +0100
Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX65 series
MX65 & MX65W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 switch (2x 1GbE ports)
2x Qualcomm QCA8337 switches (10x 1GbE ports total)
- PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus.
Note that a driver and firmware image for the BCM59111 PSE has been
released under GPL, but this is not present in the kernel.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 279 ++++++++++++++++++
arch/arm/boot/dts/bcm958625-meraki-mx65.dts | 24 ++
arch/arm/boot/dts/bcm958625-meraki-mx65w.dts | 32 ++
4 files changed, 337 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65.dts
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -162,6 +162,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
bcm958625-meraki-mx64-a0.dtb \
bcm958625-meraki-mx64w.dtb \
bcm958625-meraki-mx64w-a0.dtb \
+ bcm958625-meraki-mx65.dtb \
+ bcm958625-meraki-mx65w.dtb \
bcm958625hr.dtb \
bcm988312hr.dtb \
bcm958625k.dtb
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65 series (Alamo).
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+#include "bcm958625-meraki-mx6x-common.dtsi"
+
+/ {
+ keys {
+ compatible = "gpio-keys-polled";
+ autorepeat;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ /* green:wan1-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ /* green:wan1-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
+ };
+
+ led-2 {
+ /* green:wan2-left */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
+ };
+
+ led-3 {
+ /* green:wan2-right */
+ function = LED_FUNCTION_ACTIVITY;
+ function-enumerator = <3>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
+ };
+
+ led-4 {
+ /* amber:power */
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led-5 {
+ /* white:status */
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ mdio-mii-mux {
+ compatible = "mdio-mux-mmioreg";
+ reg = <0x1803f1c0 0x4>;
+ mux-mask = <0x2000>;
+ mdio-parent-bus = <&mdio_ext>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port6: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port7: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port8: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port9: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port10: phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ reg = <0x10>;
+ dsa,member = <1 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ ethernet = <&sgmii1>;
+ phy-mode = "sgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan8";
+ phy-handle = <&phy_port6>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan9";
+ phy-handle = <&phy_port7>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan10";
+ phy-handle = <&phy_port8>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan11";
+ phy-handle = <&phy_port9>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan12";
+ phy-handle = <&phy_port10>;
+ };
+ };
+ };
+ };
+
+ mdio-mii@2000 {
+ reg = <0x2000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ reg = <0x10>;
+ dsa,member = <2 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ ethernet = <&sgmii0>;
+ phy-mode = "sgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan4";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan5";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan6";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan7";
+ phy-handle = <&phy_port5>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+ dsa,member = <0 0>;
+
+ ports {
+ port@0 {
+ label = "wan1";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "wan2";
+ reg = <1>;
+ };
+
+ sgmii0: port@4 {
+ label = "sw0";
+ reg = <4>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ sgmii1: port@5 {
+ label = "sw1";
+ reg = <5>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@8 {
+ ethernet = <&amac2>;
+ reg = <8>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-alamo.dtsi"
+
+/ {
+ model = "Cisco Meraki MX65";
+ compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65W.
+ *
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-meraki-alamo.dtsi"
+
+/ {
+ model = "Cisco Meraki MX65W";
+ compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};

View File

@@ -0,0 +1,70 @@
From 0e89c0d8e8edece7f8e4607841ca6651885d23b1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 08:57:00 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix nodes names
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes following errors for all BCM5301X dts files:
chipcommonA@18000000: $nodename:0: 'chipcommonA@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mdio-bus-mux@18003000: $nodename:0: 'mdio-bus-mux@18003000' does not match '^mdio-mux[\\-@]?'
dmu@1800c000: $nodename:0: 'dmu@1800c000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 2 +-
arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -129,7 +129,7 @@
};
};
- mdio-bus-mux@18003000 {
+ mdio-mux@18003000 {
/* BIT(9) = 1 => external mdio */
mdio@200 {
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -19,7 +19,7 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
- chipcommonA@18000000 {
+ chipcommon-a-bus@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
#address-cells = <1>;
@@ -44,7 +44,7 @@
};
};
- mpcore@19000000 {
+ mpcore-bus@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
@@ -369,7 +369,7 @@
#address-cells = <1>;
};
- mdio-bus-mux@18003000 {
+ mdio-mux@18003000 {
compatible = "mdio-mux-mmioreg";
mdio-parent-bus = <&mdio>;
#address-cells = <1>;
@@ -415,7 +415,7 @@
status = "disabled";
};
- dmu@1800c000 {
+ dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
#address-cells = <1>;

View File

@@ -0,0 +1,28 @@
From 75a5646c26895c4cfadc8d54aa53ac5455947895 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 08:57:01 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix MDIO mux binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes following error for all BCM5301X dts files:
mdio-bus-mux@18003000: compatible: ['mdio-mux-mmioreg'] is too short
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -370,7 +370,7 @@
};
mdio-mux@18003000 {
- compatible = "mdio-mux-mmioreg";
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&mdio>;
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -0,0 +1,158 @@
From def3d0357e0539e6f6b82f079ff156def6ec2107 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 19 Aug 2021 08:57:02 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Fix memory nodes names
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Thix fixes:
arch/arm/boot/dts/bcm4708-netgear-r6250.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
arch/arm/boot/dts/bcm4709-linksys-ea9200.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
arch/arm/boot/dts/bcm4709-netgear-r7000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
arch/arm/boot/dts/bcm4709-netgear-r8000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 134217728]]}
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728], [2281701376, 402653184]]}
arch/arm/boot/dts/bcm53016-meraki-mr32.dt.yaml: /: memory: False schema does not allow {'reg': [[0, 134217728]], 'device_type': ['memory']}
arch/arm/boot/dts/bcm94708.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
arch/arm/boot/dts/bcm94709.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 134217728]]}
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 2 +-
arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 +-
arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 +-
arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 2 +-
arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 +-
arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 2 +-
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 2 +-
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 2 +-
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 +-
arch/arm/boot/dts/bcm94708.dts | 2 +-
arch/arm/boot/dts/bcm94709.dts | 2 +-
11 files changed, 11 insertions(+), 11 deletions(-)
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -20,7 +20,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x18000000>;
--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
@@ -16,7 +16,7 @@
bootargs = "console=ttyS0,115200";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -30,7 +30,7 @@
bootargs = "console=ttyS0,115200";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
@@ -15,7 +15,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
@@ -16,7 +16,7 @@
bootargs = "earlycon";
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x18000000>;
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -20,7 +20,7 @@
bootargs = " console=ttyS0,115200n8 earlycon";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x08000000>;
device_type = "memory";
};
--- a/arch/arm/boot/dts/bcm94708.dts
+++ b/arch/arm/boot/dts/bcm94708.dts
@@ -38,7 +38,7 @@
model = "NorthStar SVK (BCM94708)";
compatible = "brcm,bcm94708", "brcm,bcm4708";
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
--- a/arch/arm/boot/dts/bcm94709.dts
+++ b/arch/arm/boot/dts/bcm94709.dts
@@ -38,7 +38,7 @@
model = "NorthStar SVK (BCM94709)";
compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

View File

@@ -0,0 +1,27 @@
From 695717eb4c61173d05a277e37132b5e2c6531bf1 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 29 Aug 2021 22:37:47 +0000
Subject: [PATCH] ARM: dts: NSP: Add bcm958623hr board name to dts
This board was previously added to
Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml
however the dts file was not updated to reflect this change. This patch
corrects bcm958623hr.dts by adding the board name to the compatible.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm958623hr.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -37,7 +37,7 @@
/ {
model = "NorthStar Plus SVK (BCM958623HR)";
- compatible = "brcm,bcm58623", "brcm,nsp";
+ compatible = "brcm,bcm958623hr", "brcm,bcm58623", "brcm,nsp";
chosen {
stdout-path = "serial0:115200n8";

View File

@@ -0,0 +1,40 @@
From 15a563d008ef9d04df525f0c476cd7d7127bb883 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 29 Aug 2021 22:37:48 +0000
Subject: [PATCH] ARM: dts: NSP: Fix mpcore, mmc node names
Running dtbs_check yielded the issues with bcm-nsp.dtsi.
Firstly this patch fixes the following message by appending "-bus" to
the mpcore node name:
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Secondly mmc node name. The label name can remain as is.
sdhci@21000: $nodename:0: 'sdhci@21000' does not match '^mmc(@.*)?$'
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -77,7 +77,7 @@
interrupt-affinity = <&cpu0>, <&cpu1>;
};
- mpcore@19000000 {
+ mpcore-bus@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
@@ -219,7 +219,7 @@
status = "disabled";
};
- sdio: sdhci@21000 {
+ sdio: mmc@21000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x21000 0x100>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;

View File

@@ -0,0 +1,47 @@
From 38f8111369f318a538e9d4d89d8e48030c22fb40 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 29 Aug 2021 22:37:49 +0000
Subject: [PATCH] ARM: dts: NSP: Fix MDIO mux node names
While functional, the mdio-mux-mmioreg binding does not conform to
Documentation/devicetree/bindings/net/mdio-mux-mmioreg.yaml in that an
mdio-mux compatible is also required. Without this the following output
is observed when running dtbs_check:
mdio-mux@32000: compatible: ['mdio-mux-mmioreg'] is too short
This change brings conformance to this requirement and corresponds
likewise to Rafal Milecki's change to the BCM5301x platform[1].
[1] https://lore.kernel.org/linux-arm-kernel/20210822191256.3715003-1-f.fainelli@gmail.com/T/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -371,7 +371,7 @@
};
mdio-mux@32000 {
- compatible = "mdio-mux-mmioreg";
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
reg = <0x32000 0x4>;
mux-mask = <0x200>;
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
@@ -72,7 +72,7 @@
};
mdio-mii-mux {
- compatible = "mdio-mux-mmioreg";
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
reg = <0x1803f1c0 0x4>;
mux-mask = <0x2000>;
mdio-parent-bus = <&mdio_ext>;

View File

@@ -0,0 +1,28 @@
From 56e4e548427240d85fd220460d0ab5987e1dec00 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 29 Aug 2021 22:37:50 +0000
Subject: [PATCH] ARM: dts: NSP: Fix MX64/MX65 eeprom node name
Running dtbs_check yields the following message when checking the
MX64/MX65 devicetree:
at24@50: $nodename:0: 'at24@50' does not match '^eeprom@[0-9a-f]{1,2}$'
This patch fixes the issue by renaming the at24 node appropriately.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
@@ -48,7 +48,7 @@
&i2c0 {
status = "okay";
- at24@50 {
+ eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;

View File

@@ -0,0 +1,52 @@
From f5fc9044e5d45a4d97b5240c8723f4677f647c9f Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Sun, 29 Aug 2021 22:37:51 +0000
Subject: [PATCH] ARM: dts: NSP: Fix MX65 MDIO mux warnings
The naming of this node is based upon that of the initial EA9500 dts[1].
However this does not conform with the mdio-mux format, yielding the
following message when running dtbs_check:
mdio-mii-mux: $nodename:0: 'mdio-mii-mux' does not match '^mdio-mux[\\-@]?'
Secondly, this node should be moved to within the axi node and given the
appropriate unit address. This also requires exposing the axi node via a
label in bcm-nsp.dtsi. This fixes the following warning:
Warning (unit_address_vs_reg): /mdio-mii-mux: node has a reg or ranges property, but no unit name
[1]https://patchwork.ozlabs.org/project/linux-imx/patch/20180618174159.86150-1-npcomplete13@gmail.com/#1941353
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 6 ++++--
2 files changed, 5 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -166,7 +166,7 @@
};
};
- axi@18000000 {
+ axi: axi@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x0011c40c>;
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
@@ -70,10 +70,12 @@
gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
};
};
+};
- mdio-mii-mux {
+&axi {
+ mdio-mux@3f1c0 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
- reg = <0x1803f1c0 0x4>;
+ reg = <0x3f1c0 0x4>;
mux-mask = <0x2000>;
mdio-parent-bus = <&mdio_ext>;
#address-cells = <1>;

View File

@@ -0,0 +1,290 @@
From 225ffaf3d0e00daa2d0c7b68e8fd731ebbde3c03 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 7 Sep 2021 08:00:48 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for more devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Those are remaining models I have that didn't have ports yet. All
tested.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 37 ++++++++++++++++
.../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 37 ++++++++++++++++
arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 42 +++++++++++++++++++
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 42 +++++++++++++++++++
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 37 ++++++++++++++++
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 37 ++++++++++++++++
6 files changed, 232 insertions(+)
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -94,3 +94,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan1";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -117,3 +117,40 @@
};
};
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -187,3 +187,45 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@8 {
+ reg = <8>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -118,3 +118,45 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan1";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@8 {
+ reg = <8>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
@@ -68,3 +68,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
@@ -68,3 +68,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};

View File

@@ -0,0 +1,44 @@
From 9fb90ae6cae7f8fe4fbf626945f32cd9da2c3892 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 20 Sep 2021 16:10:23 +0200
Subject: [PATCH] ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM53573 family SoC have Ethernet switch connected to the first Ethernet
controller (accessible over MDIO).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm53573.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -180,6 +180,24 @@
gmac0: ethernet@5000 {
reg = <0x5000 0x1000>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch: switch@1e {
+ compatible = "brcm,bcm53125";
+ reg = <0x1e>;
+
+ status = "disabled";
+
+ /* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
};
gmac1: ethernet@b000 {

View File

@@ -0,0 +1,59 @@
From 64612828628cca6e3992e421f45c242dc6625647 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 20 Sep 2021 16:10:24 +0200
Subject: [PATCH] ARM: dts: BCM53573: Add Tenda AC9 switch ports
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This router has 1 WAN and 4 LAN ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
--- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
@@ -105,3 +105,40 @@
};
};
};
+
+&switch {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};

View File

@@ -0,0 +1,57 @@
From 6abc4ca5a28070945e0d68cb4160b309bfbf4b8b Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sat, 18 Sep 2021 19:29:30 +0200
Subject: [PATCH] ARM: BCM53016: Specify switch ports for Meraki MR32
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
the switch identifies itself as a BCM53012 (rev 5)...
This patch has been tested & verified on OpenWrt's
snapshot with Linux 5.10 (didn't test any older kernels).
The MR32 is able to "talk to the network" as before with
OpenWrt's SWITCHDEV b53 driver.
| b53-srab-switch 18007000.ethernet-switch: found switch: BCM53012, rev 5
| libphy: dsa slave smi: probed
| b53-srab-switch 18007000.ethernet-switch poe (uninitialized):
| PHY [dsa-0.0:00] driver [Generic PHY] (irq=POLL)
| b53-srab-switch 18007000.ethernet-switch: Using legacy PHYLIB callbacks.
| Please migrate to PHYLINK!
| DSA: tree 0 setup
Reported-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -195,3 +195,25 @@
};
};
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "poe";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+
+ fixed-link {
+ speed = <1000>;
+ duplex-full;
+ };
+ };
+ };
+};

View File

@@ -0,0 +1,41 @@
From 477ffdbdf389cc91294d66e251cc6f856da5820c Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sat, 18 Sep 2021 19:29:31 +0200
Subject: [PATCH] ARM: BCM53016: MR32: get mac-address from nvmem
The MAC-Address of the MR32's sole ethernet port is
located in offset 0x66 of the attached AT24C64 eeprom.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -110,6 +110,12 @@
reg = <0x50>;
pagesize = <32>;
read-only;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@66 {
+ reg = <0x66 0x6>;
+ };
};
};
};
@@ -133,6 +139,11 @@
*/
};
+&gmac0 {
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&mac_address>;
+};
+
&gmac1 {
status = "disabled";
};

View File

@@ -0,0 +1,242 @@
From beff77b93452cd2057c859694709dd34a181488f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Tue, 21 Sep 2021 20:19:01 +0800
Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Asus RT-AC88U
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Hardware Info
-------------
Processor - Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz
Switch - BCM53012 in BCM4709C0KFEBG & external RTL8365MB
DDR3 RAM - 512 MB
Flash - 128 MB (ESMT F59L1G81LA-25T)
2.4GHz - BCM4366 4×4 2.4/5G single chip 802.11ac SoC
5GHz - BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Ports - 8 Ports, 1 WAN Ports
Tested on OpenWrt on kernel 5.10 built with DSA driver.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 200 +++++++++++++++++++
2 files changed, 201 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -118,6 +118,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-netgear-r7000.dtb \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
+ bcm47094-asus-rt-ac88u.dtb \
bcm47094-dlink-dir-885l.dtb \
bcm47094-linksys-panamera.dtb \
bcm47094-luxul-abr-4500.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2021 Arınç ÜNAL <arinc.unal@arinc9.com>
+ */
+
+/dts-v1/;
+
+#include "bcm47094.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+
+/ {
+ compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
+ model = "Asus RT-AC88U";
+
+ chosen {
+ bootargs = "earlycon";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x18000000>;
+ };
+
+ nvram@1c080000 {
+ compatible = "brcm,nvram";
+ reg = <0x1c080000 0x00180000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "white:power";
+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+
+ wan-red {
+ label = "red:wan";
+ gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ lan {
+ label = "white:lan";
+ gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;
+ };
+
+ usb2 {
+ label = "white:usb2";
+ gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ehci_port2>;
+ linux,default-trigger = "usbport";
+ };
+
+ usb3 {
+ label = "white:usb3";
+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ehci_port1>, <&xhci_port1>;
+ linux,default-trigger = "usbport";
+ };
+
+ wps {
+ label = "white:wps";
+ gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wps {
+ label = "WPS";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi {
+ label = "Wi-Fi";
+ linux,code = <KEY_RFKILL>;
+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
+ };
+
+ led {
+ label = "Backlight";
+ linux,code = <KEY_BRIGHTNESS_ZERO>;
+ gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&srab {
+ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
+ status = "okay";
+ dsa,member = <0 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan1";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ sw0_p5: port@5 {
+ reg = <5>;
+ label = "extsw";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ ethernet = <&gmac1>;
+ label = "cpu";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@8 {
+ reg = <8>;
+ ethernet = <&gmac2>;
+ label = "cpu";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
+&usb2 {
+ vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
+};
+
+&usb3_phy {
+ status = "okay";
+};
+
+&nandcs {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x00080000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "nvram";
+ reg = <0x00080000 0x00180000>;
+ };
+
+ partition@200000 {
+ label = "firmware";
+ reg = <0x00200000 0x07e00000>;
+ compatible = "brcm,trx";
+ };
+ };
+};

View File

@@ -0,0 +1,56 @@
From c39edb9f9dcb6c8a0ba0ebf5df9e0ac93ab94b82 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Mar 2021 19:32:35 +0100
Subject: [PATCH] dt-bindings: nvmem: add Broadcom's NVRAM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom's NVRAM structure contains device data and can be accessed
using I/O mapping.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/nvmem/brcm,nvram.yaml | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/brcm,nvram.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom's NVRAM
+
+description: |
+ Broadcom's NVRAM is a structure containing device specific environment
+ variables. It is used for storing device configuration, booting parameters
+ and calibration data.
+
+ NVRAM can be accessed on Broadcom BCM47xx MIPS and Northstar ARM Cortex-A9
+ devices usiong I/O mapped memory.
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ const: brcm,nvram
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+ };

View File

@@ -0,0 +1,124 @@
From b152bbeb0282bfcf6f91d0d5befd7582c1c3fc23 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Mar 2021 19:32:36 +0100
Subject: [PATCH] nvmem: brcm_nvram: new driver exposing Broadcom's NVRAM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This driver provides access to Broadcom's NVRAM.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/nvmem/Kconfig | 9 +++++
drivers/nvmem/Makefile | 2 +
drivers/nvmem/brcm_nvram.c | 78 ++++++++++++++++++++++++++++++++++++++
3 files changed, 89 insertions(+)
create mode 100644 drivers/nvmem/brcm_nvram.c
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -270,4 +270,13 @@ config SPRD_EFUSE
This driver can also be built as a module. If so, the module
will be called nvmem-sprd-efuse.
+
+config NVMEM_BRCM_NVRAM
+ tristate "Broadcom's NVRAM support"
+ depends on ARCH_BCM_5301X || COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ This driver provides support for Broadcom's NVRAM that can be accessed
+ using I/O mapping.
+
endif
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -55,3 +55,5 @@ obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynq
nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o
obj-$(CONFIG_SPRD_EFUSE) += nvmem_sprd_efuse.o
nvmem_sprd_efuse-y := sprd-efuse.o
+obj-$(CONFIG_NVMEM_BRCM_NVRAM) += nvmem_brcm_nvram.o
+nvmem_brcm_nvram-y := brcm_nvram.o
--- /dev/null
+++ b/drivers/nvmem/brcm_nvram.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+ */
+
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/platform_device.h>
+
+struct brcm_nvram {
+ struct device *dev;
+ void __iomem *base;
+};
+
+static int brcm_nvram_read(void *context, unsigned int offset, void *val,
+ size_t bytes)
+{
+ struct brcm_nvram *priv = context;
+ u8 *dst = val;
+
+ while (bytes--)
+ *dst++ = readb(priv->base + offset++);
+
+ return 0;
+}
+
+static int brcm_nvram_probe(struct platform_device *pdev)
+{
+ struct nvmem_config config = {
+ .name = "brcm-nvram",
+ .reg_read = brcm_nvram_read,
+ };
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct brcm_nvram *priv;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+ priv->dev = dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ config.dev = dev;
+ config.priv = priv;
+ config.size = resource_size(res);
+
+ return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config));
+}
+
+static const struct of_device_id brcm_nvram_of_match_table[] = {
+ { .compatible = "brcm,nvram", },
+ {},
+};
+
+static struct platform_driver brcm_nvram_driver = {
+ .probe = brcm_nvram_probe,
+ .driver = {
+ .name = "brcm_nvram",
+ .of_match_table = brcm_nvram_of_match_table,
+ },
+};
+
+static int __init brcm_nvram_init(void)
+{
+ return platform_driver_register(&brcm_nvram_driver);
+}
+
+subsys_initcall_sync(brcm_nvram_init);
+
+MODULE_AUTHOR("Rafał Miłecki");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, brcm_nvram_of_match_table);

View File

@@ -0,0 +1,43 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 13 Apr 2021 18:25:20 +0200
Subject: [PATCH] mtd: parsers: trx: parse "firmware" MTD partitions only
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Parsing every partition with "compatible" set to "brcm,trx" results in
parsing both: firmware partition and failsafe partition on devices that
implement failsafe booting. This affects e.g. Linksys EA9500 which has:
partition@200000 {
reg = <0x0200000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
partition@1f00000 {
reg = <0x01f00000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
Check for MTD partition name "firmware" before parsing. Recently added
ofpart_linksys_ns.c creates "firmware" and "failsafe" depending on
bootloader setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/mtd/parsers/parser_trx.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/mtd/parsers/parser_trx.c
+++ b/drivers/mtd/parsers/parser_trx.c
@@ -85,6 +85,10 @@ static int parser_trx_parse(struct mtd_i
uint8_t curr_part = 0, i = 0;
int err;
+ /* Don't parse any failsafe / backup partitions */
+ if (strcmp(mtd->name, "firmware"))
+ return -EINVAL;
+
parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
GFP_KERNEL);
if (!parts)

View File

@@ -0,0 +1,137 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 1 Oct 2016 22:54:48 +0200
Subject: [PATCH] usb: xhci: add support for performing fake doorbell
Broadcom's Northstar XHCI controllers seem to need a special start
procedure to work correctly. There isn't any official documentation of
this, the problem is that controller doesn't detect any connected
devices with default setup. Moreover connecting USB device to controller
that doesn't run properly can cause SoC's watchdog issues.
A workaround that was successfully tested on multiple devices is to
perform a fake doorbell. This patch adds code for doing this and enables
it on BCM4708 family.
---
drivers/usb/host/xhci-plat.c | 6 +++++
drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++---
drivers/usb/host/xhci.h | 1 +
3 files changed, 67 insertions(+), 3 deletions(-)
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -87,6 +87,8 @@ static int xhci_priv_resume_quirk(struct
static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
{
struct xhci_plat_priv *priv = xhci_to_priv(xhci);
+ struct platform_device*pdev = to_platform_device(dev);
+ struct device_node *node = pdev->dev.of_node;
/*
* As of now platform drivers don't provide MSI support so we ensure
@@ -94,6 +96,9 @@ static void xhci_plat_quirks(struct devi
* dev struct in order to setup MSI
*/
xhci->quirks |= XHCI_PLAT | priv->quirks;
+
+ if (node && of_machine_is_compatible("brcm,bcm4708"))
+ xhci->quirks |= XHCI_FAKE_DOORBELL;
}
/* called during probe() after chip reset completes */
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -156,6 +156,49 @@ int xhci_start(struct xhci_hcd *xhci)
return ret;
}
+/**
+ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot
+ *
+ * Some controllers require a fake doorbell to start correctly. Without that
+ * they simply don't detect any devices.
+ */
+static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
+{
+ u32 temp;
+
+ /* Alloc a virt device for that slot */
+ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) {
+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
+ return -ENOMEM;
+ }
+
+ /* Ring fake doorbell for slot_id ep 0 */
+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
+ usleep_range(1000, 1500);
+
+ /* Read the status to check if HSE is set or not */
+ temp = readl(&xhci->op_regs->status);
+
+ /* Clear HSE if set */
+ if (temp & STS_FATAL) {
+ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp);
+ temp &= ~0x1fff;
+ temp |= STS_FATAL;
+ writel(temp, &xhci->op_regs->status);
+ usleep_range(1000, 1500);
+ readl(&xhci->op_regs->status);
+ }
+
+ /* Free virt device */
+ xhci_free_virt_device(xhci, slot_id);
+
+ /* We're done if controller is already running */
+ if (readl(&xhci->op_regs->command) & CMD_RUN)
+ return 0;
+
+ return xhci_start(xhci);
+}
+
/*
* Reset a halted HC.
*
@@ -608,10 +651,20 @@ static int xhci_init(struct usb_hcd *hcd
static int xhci_run_finished(struct xhci_hcd *xhci)
{
- if (xhci_start(xhci)) {
- xhci_halt(xhci);
- return -ENODEV;
+ int err;
+
+ err = xhci_start(xhci);
+ if (err) {
+ err = -ENODEV;
+ goto err_halt;
}
+
+ if (xhci->quirks & XHCI_FAKE_DOORBELL) {
+ err = xhci_fake_doorbell(xhci, 1);
+ if (err)
+ goto err_halt;
+ }
+
xhci->shared_hcd->state = HC_STATE_RUNNING;
xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
@@ -621,6 +674,10 @@ static int xhci_run_finished(struct xhci
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
"Finished xhci_run for USB3 roothub");
return 0;
+
+err_halt:
+ xhci_halt(xhci);
+ return err;
}
/*
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1884,6 +1884,7 @@ struct xhci_hcd {
#define XHCI_DISABLE_SPARSE BIT_ULL(38)
#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
+#define XHCI_FAKE_DOORBELL BIT_ULL(41)
unsigned int num_active_eps;
unsigned int limit_active_eps;

View File

@@ -0,0 +1,101 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 24 Sep 2014 22:14:07 +0200
Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom devices have broken CFE (bootloader) that leaves hardware in an
invalid state. It causes problems with booting Linux. On Northstar
devices kernel was randomly hanging in ~25% of tries during early init.
Hangs used to happen at random places in the start_kernel. On BCM53573
kernel doesn't even seem to start booting.
To workaround this problem we need to do following very early:
1) Clear 2 following bits in the SCTLR register:
#define CR_M (1 << 0) /* MMU enable */
#define CR_C (1 << 2) /* Dcache enable */
2) Flush the whole D-cache
3) Disable L2 cache
Unfortunately this patch is not upstreamable as it does above things
unconditionally. We can't check if we are running on Broadcom platform
in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable
as it could break other devices support.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -35,6 +35,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y)
OBJS += ll_char_wr.o font.o
endif
+ifeq ($(CONFIG_ARCH_BCM_5301X),y)
+OBJS += head-bcm_5301x-mpcore.o
+OBJS += cache-v7-min.o
+endif
+
ifeq ($(CONFIG_ARCH_SA1100),y)
OBJS += head-sa1100.o
endif
--- /dev/null
+++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S
@@ -0,0 +1,37 @@
+/*
+ *
+ * Platform specific tweaks. This is merged into head.S by the linker.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/cp15.h>
+
+ .section ".start", "ax"
+
+/*
+ * This code section is spliced into the head code by the linker
+ */
+
+__plat_uncompress_start:
+
+ @ Preserve r8/r7 i.e. kernel entry values
+ mov r12, r8
+
+ @ Clear MMU enable and Dcache enable bits
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
+ bic r0, #CR_C|CR_M
+ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR
+ nop
+
+ @ Call the cache invalidation routine
+ bl v7_flush_dcache_all
+ nop
+ mov r0,#0
+ ldr r3, =0x19022000 @ L2 cache controller, control reg
+ str r0, [r3, #0x100] @ Disable L2 cache
+ nop
+
+ @ Restore
+ mov r8, r12
--- a/arch/arm/boot/compressed/cache-v7-min.S
+++ b/arch/arm/boot/compressed/cache-v7-min.S
@@ -12,6 +12,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/assembler.h>
__INIT
@@ -63,7 +64,7 @@ loop2:
ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
THUMB( lsl r6, r9, r2 )
THUMB( orr r11, r11, r6 ) @ factor index number into r11
- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
+ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way
subs r9, r9, #1 @ decrement the index
bge loop2
subs r4, r4, #1 @ decrement the way

View File

@@ -0,0 +1,33 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -422,7 +422,7 @@
#size-cells = <1>;
cru@100 {
- compatible = "simple-bus";
+ compatible = "syscon", "simple-mfd";
reg = <0x100 0x1a4>;
ranges;
#address-cells = <1>;
@@ -448,10 +448,9 @@
"sata1", "sata2";
};
- pinctrl: pin-controller@1c0 {
+ pinctrl: pin-controller {
compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";
+ offset = <0xc0>;
spi-pins {
groups = "spi_grp";

View File

@@ -0,0 +1,575 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for remaining
devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
@@ -93,3 +93,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
@@ -83,3 +83,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
@@ -149,3 +149,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
@@ -46,3 +46,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -42,3 +42,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
@@ -86,3 +86,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
@@ -77,3 +77,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
@@ -68,6 +68,38 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@7 {
+ reg = <7>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
@@ -132,3 +132,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
@@ -49,3 +49,45 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@8 {
+ reg = <8>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -106,3 +106,40 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
@@ -94,3 +94,45 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port@8 {
+ reg = <8>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
@@ -38,6 +38,38 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "wan";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";

View File

@@ -0,0 +1,64 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -116,6 +116,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-buffalo-wxr-1900dhp.dtb \
bcm4709-linksys-ea9200.dtb \
bcm4709-netgear-r7000.dtb \
+ bcm4709-netgear-r7900.dtb \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-asus-rt-ac88u.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts
@@ -0,0 +1,42 @@
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ * DTS for Netgear R7900
+ *
+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+/dts-v1/;
+
+#include "bcm4709.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+
+/ {
+ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708";
+ model = "Netgear R7900";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x00000000 0x08000000
+ 0x88000000 0x08000000>;
+ };
+
+ axi@18000000 {
+ usb3@23000 {
+ reg = <0x00023000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@@ -0,0 +1,20 @@
From: Felix Fietkau <nbd@nbd.name>
Subject: [PATCH] ARM: BCM5301X: Add power button for Buffalo WZR-1750DHP
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
@@ -100,6 +100,12 @@
gpio-keys {
compatible = "gpio-keys";
+ power {
+ label = "Power";
+ linux,code = <KEY_POWER>;
+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
+ };
+
restart {
label = "Reset";
linux,code = <KEY_RESTART>;

View File

@@ -0,0 +1,25 @@
From 7166207bd1d8c46d09d640d46afc685df9bb9083 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 22 Nov 2018 09:21:49 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Describe partition formats
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's needed by OpenWrt for custom partitioning.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -35,6 +35,7 @@
partition@0 {
label = "firmware";
reg = <0x00000000 0x08000000>;
+ compatible = "seama";
};
};
};

View File

@@ -0,0 +1,28 @@
From: Christian Lamparter <chunkeey@gmail.com>
Date: Thu, 7 Jun 2018 19:29:12 +0200
Subject: bcm53xx: add LED status label alias for Meraki MR32
add an led-status alias label. This is used by OpenWrt's LED
DTS lookup function to identifiy the indicator LED
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -27,6 +27,7 @@
aliases {
serial1 = &uart2;
+ led-status = &led_status;
};
leds {
@@ -68,7 +69,7 @@
max-brightness = <255>;
};
- green {
+ led_status: green {
/* SYS-LED 1 - Tricolor */
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;

View File

@@ -0,0 +1,59 @@
From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 16 Oct 2014 20:52:16 +0200
Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/mtd/ubi/attach.c | 5 +++++
drivers/mtd/ubi/io.c | 4 ++++
drivers/mtd/ubi/ubi.h | 1 +
3 files changed, 10 insertions(+)
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -82,6 +82,9 @@ static int self_check_ai(struct ubi_devi
#define AV_ADD BIT(1)
#define AV_FIND_OR_ADD (AV_FIND | AV_ADD)
+/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */
+bool erase_all_next;
+
/**
* find_or_add_av - internal function to find a volume, add a volume or do
* both (find and add if missing).
@@ -1580,6 +1583,8 @@ int ubi_attach(struct ubi_device *ubi, i
if (!ai)
return -ENOMEM;
+ erase_all_next = false;
+
#ifdef CONFIG_MTD_UBI_FASTMAP
/* On small flash devices we disable fastmap in any case. */
if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) {
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -710,6 +710,10 @@ int ubi_io_read_ec_hdr(struct ubi_device
}
magic = be32_to_cpu(ec_hdr->magic);
+ if (magic == 0xdeadc0de)
+ erase_all_next = true;
+ if (erase_all_next)
+ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF;
if (magic != UBI_EC_HDR_MAGIC) {
if (mtd_is_eccerr(read_err))
return UBI_IO_BAD_HDR_EBADMSG;
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -824,6 +824,7 @@ extern struct mutex ubi_devices_mutex;
extern struct blocking_notifier_head ubi_notifiers;
/* attach.c */
+extern bool erase_all_next;
struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum,
int ec);
void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb);

View File

@@ -0,0 +1,53 @@
From 4abdde3ad6bc0b3b157c4bf6ec0bf139d11d07e8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Wed, 13 May 2015 14:13:28 +0200
Subject: [PATCH] b53: add hacky CPU port fixes for devices not using port 5
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/net/phy/b53/b53_common.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/phy/b53/b53_common.c
+++ b/drivers/net/phy/b53/b53_common.c
@@ -28,6 +28,7 @@
#include <linux/of.h>
#include <linux/of_net.h>
#include <linux/platform_data/b53.h>
+#include <linux/of.h>
#include "b53_regs.h"
#include "b53_priv.h"
@@ -1587,6 +1588,29 @@ static int b53_switch_init(struct b53_de
return ret;
}
+ /* Set correct CPU port */
+ if (of_machine_is_compatible("asus,rt-ac87u"))
+ sw_dev->cpu_port = 7;
+ else if (of_machine_is_compatible("netgear,r7900"))
+ sw_dev->cpu_port = 8;
+ else if (of_machine_is_compatible("netgear,r8000"))
+ sw_dev->cpu_port = 8;
+ else if (of_machine_is_compatible("netgear,r8500"))
+ sw_dev->cpu_port = 8;
+
+ /* Enable extra ports */
+ if (of_machine_is_compatible("tenda,ac9"))
+ dev->enabled_ports |= BIT(5);
+
+ /*
+ * Workaround for devices using port 8 (connected to the 3rd iface).
+ * For some reason it doesn't work (no packets on eth2).
+ */
+ if (of_machine_is_compatible("netgear,r7900") ||
+ of_machine_is_compatible("netgear,r8000") ||
+ (of_machine_is_compatible("linksys,panamera") && dev->chip_id == BCM53012_DEVICE_ID))
+ sw_dev->cpu_port = 5;
+
dev->enabled_ports |= BIT(sw_dev->cpu_port);
sw_dev->ports = fls(dev->enabled_ports);

View File

@@ -0,0 +1,61 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Mar 2021 08:24:44 +0100
Subject: [PATCH] firmware: bcm47xx_nvram: support init from IO memory
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/firmware/broadcom/bcm47xx_nvram.c | 17 +++++++++++++++++
include/linux/bcm47xx_nvram.h | 6 ++++++
2 files changed, 23 insertions(+)
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
@@ -110,6 +110,23 @@ found:
return 0;
}
+int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start, size_t res_size)
+{
+ if (nvram_len) {
+ pr_warn("nvram already initialized\n");
+ return -EEXIST;
+ }
+
+ if (!bcm47xx_nvram_is_valid(nvram_start)) {
+ pr_err("No valid NVRAM found\n");
+ return -ENOENT;
+ }
+
+ bcm47xx_nvram_copy(nvram_start, res_size);
+
+ return 0;
+}
+
/*
* On bcm47xx we need access to the NVRAM very early, so we can't use mtd
* subsystem to access flash. We can't even use platform device / driver to
--- a/include/linux/bcm47xx_nvram.h
+++ b/include/linux/bcm47xx_nvram.h
@@ -11,6 +11,7 @@
#include <linux/vmalloc.h>
#ifdef CONFIG_BCM47XX_NVRAM
+int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start, size_t res_size);
int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len);
int bcm47xx_nvram_gpio_pin(const char *name);
@@ -20,6 +21,11 @@ static inline void bcm47xx_nvram_release
vfree(nvram);
};
#else
+static inline int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start,
+ size_t res_size)
+{
+ return -ENOTSUPP;
+}
static inline int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
{
return -ENOTSUPP;

View File

@@ -0,0 +1,31 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 11 Mar 2021 08:26:14 +0100
Subject: [PATCH] nvmem: brcm_nvram: provide NVMEM content to the NVRAM driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/nvmem/brcm_nvram.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/nvmem/brcm_nvram.c
+++ b/drivers/nvmem/brcm_nvram.c
@@ -3,6 +3,7 @@
* Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
*/
+#include <linux/bcm47xx_nvram.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
@@ -46,6 +47,8 @@ static int brcm_nvram_probe(struct platf
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
+ bcm47xx_nvram_init_from_iomem(priv->base, resource_size(res));
+
config.dev = dev;
config.priv = priv;
config.size = resource_size(res);

View File

@@ -0,0 +1,80 @@
From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Aug 2016 10:30:41 +0200
Subject: [PATCH] BCM53573 minor hacks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -54,6 +54,7 @@
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ilp>;
};
clocks {
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -328,14 +328,6 @@ static int bcma_register_devices(struct
}
#endif
-#ifdef CONFIG_BCMA_SFLASH
- if (bus->drv_cc.sflash.present) {
- err = platform_device_register(&bcma_sflash_dev);
- if (err)
- bcma_err(bus, "Error registering serial flash\n");
- }
-#endif
-
#ifdef CONFIG_BCMA_NFLASH
if (bus->drv_cc.nflash.present) {
err = platform_device_register(&bcma_nflash_dev);
@@ -413,6 +405,14 @@ int bcma_bus_register(struct bcma_bus *b
bcma_register_core(bus, core);
}
+#ifdef CONFIG_BCMA_SFLASH
+ if (bus->drv_cc.sflash.present) {
+ err = platform_device_register(&bcma_sflash_dev);
+ if (err)
+ bcma_err(bus, "Error registering serial flash\n");
+ }
+#endif
+
/* Try to get SPROM */
err = bcma_sprom_get(bus);
if (err == -ENOENT) {
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -14,6 +14,7 @@
#include <linux/smp.h>
#include <linux/cpu.h>
#include <linux/cpu_pm.h>
+#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/interrupt.h>
@@ -934,6 +935,16 @@ static void arch_timer_of_configure_rate
if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
arch_timer_rate = rate;
+ /* Get clk rate through clk driver if present */
+ if (!arch_timer_rate) {
+ struct clk *clk = of_clk_get(np, 0);
+
+ if (!IS_ERR(clk)) {
+ if (!clk_prepare_enable(clk))
+ arch_timer_rate = clk_get_rate(clk);
+ }
+ }
+
/* Check the timer frequency. */
if (validate_timer_rate())
pr_warn("frequency not available\n");