Initial commit
This commit is contained in:
19
target/linux/malta/Makefile
Normal file
19
target/linux/malta/Makefile
Normal file
@@ -0,0 +1,19 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Copyright (C) 2010-2011 OpenWrt.org
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
|
||||
BOARD:=malta
|
||||
BOARDNAME:=MIPS Malta CoreLV board (qemu)
|
||||
SUBTARGETS:=le be le64 be64
|
||||
INITRAMFS_EXTRA_FILES:=
|
||||
FEATURES:=cpiogz ext4 ramdisk squashfs targz
|
||||
|
||||
KERNEL_PATCHVER:=5.10
|
||||
|
||||
include $(INCLUDE_DIR)/target.mk
|
||||
|
||||
DEFAULT_PACKAGES += wpad-basic-wolfssl kmod-mac80211-hwsim kmod-pcnet32 mkf2fs e2fsprogs
|
||||
|
||||
$(eval $(call BuildTarget))
|
||||
19
target/linux/malta/README
Normal file
19
target/linux/malta/README
Normal file
@@ -0,0 +1,19 @@
|
||||
This Malta target is intended to be used with the Qemu emulator. It can be used
|
||||
to prototype an OpenWrt firmware for MIPS processors. One could also use it to
|
||||
troubleshoot MIPS applications without access to real hardware.
|
||||
|
||||
To use the images built by OpenWrt with qemu, use the following commands:
|
||||
|
||||
For the 32 bit little-endian image:
|
||||
qemu-system-mipsel -kernel bin/targets/malta/le/openwrt-malta-le-vmlinux-initramfs.elf -nographic -m 256
|
||||
|
||||
For the 32 bit big-endian image:
|
||||
qemu-system-mips -kernel bin/targets/malta/be/openwrt-malta-be-vmlinux-initramfs.elf -nographic -m 256
|
||||
|
||||
For the 64 bit little-endian image:
|
||||
qemu-system-mips64el -kernel bin/targets/malta/le64/openwrt-malta-le64-vmlinux-initramfs.elf -cpu MIPS64R2-generic -nographic -m 256
|
||||
|
||||
For the 64 bit big-endian image:
|
||||
qemu-system-mips64 -kernel bin/targets/malta/be64/openwrt-malta-be64-vmlinux-initramfs.elf -cpu MIPS64R2-generic -nographic -m 256
|
||||
|
||||
and enjoy the system bootin.
|
||||
12
target/linux/malta/base-files/etc/board.d/00_model
Normal file
12
target/linux/malta/base-files/etc/board.d/00_model
Normal file
@@ -0,0 +1,12 @@
|
||||
# Copyright (C) 2015 OpenWrt.org
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
|
||||
board_config_update
|
||||
|
||||
ucidef_set_board_id "malta"
|
||||
ucidef_set_model_name "MIPS Malta"
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
13
target/linux/malta/base-files/etc/board.d/02_network
Normal file
13
target/linux/malta/base-files/etc/board.d/02_network
Normal file
@@ -0,0 +1,13 @@
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
|
||||
board_config_update
|
||||
|
||||
ucidef_set_interface_wan "eth0"
|
||||
if [ -d "/sys/class/net/eth1" ]; then
|
||||
ucidef_set_interface_lan "eth1"
|
||||
fi
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
7
target/linux/malta/base-files/etc/inittab
Normal file
7
target/linux/malta/base-files/etc/inittab
Normal file
@@ -0,0 +1,7 @@
|
||||
::sysinit:/etc/init.d/rcS S boot
|
||||
::shutdown:/etc/init.d/rcS K shutdown
|
||||
tts/0::askfirst:/usr/libexec/login.sh
|
||||
ttyS0::askfirst:/usr/libexec/login.sh
|
||||
ttyS1::askfirst:/usr/libexec/login.sh
|
||||
ttyS2::askfirst:/usr/libexec/login.sh
|
||||
tty1::askfirst:/usr/libexec/login.sh
|
||||
4
target/linux/malta/be/config-default
Normal file
4
target/linux/malta/be/config-default
Normal file
@@ -0,0 +1,4 @@
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
# CONFIG_CPU_LITTLE_ENDIAN is not set
|
||||
CONFIG_CPU_MIPS32_R2=y
|
||||
CONFIG_HIGHMEM=y
|
||||
9
target/linux/malta/be/target.mk
Normal file
9
target/linux/malta/be/target.mk
Normal file
@@ -0,0 +1,9 @@
|
||||
ARCH:=mips
|
||||
CPU_TYPE:=24kc
|
||||
SUBTARGET:=be
|
||||
BOARDNAME:=Big Endian
|
||||
|
||||
define Target/Description
|
||||
Build BE firmware images for MIPS Malta CoreLV board running in
|
||||
big-endian mode
|
||||
endef
|
||||
9
target/linux/malta/be64/config-default
Normal file
9
target/linux/malta/be64/config-default
Normal file
@@ -0,0 +1,9 @@
|
||||
# CONFIG_32BIT is not set
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=12
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
# CONFIG_CPU_LITTLE_ENDIAN is not set
|
||||
CONFIG_CPU_MIPS64_R2=y
|
||||
# CONFIG_MIPS32_N32 is not set
|
||||
# CONFIG_MIPS32_O32 is not set
|
||||
# CONFIG_MIPS_VA_BITS_48 is not set
|
||||
10
target/linux/malta/be64/target.mk
Normal file
10
target/linux/malta/be64/target.mk
Normal file
@@ -0,0 +1,10 @@
|
||||
ARCH:=mips64
|
||||
CPU_TYPE:=mips64r2
|
||||
SUBTARGET:=be64
|
||||
FEATURES+=source-only
|
||||
BOARDNAME:=Big Endian (64-bits)
|
||||
|
||||
define Target/Description
|
||||
Build BE firmware images for MIPS Malta CoreLV board running in
|
||||
big-endian and 64-bits mode
|
||||
endef
|
||||
282
target/linux/malta/config-5.10
Normal file
282
target/linux/malta/config-5.10
Normal file
@@ -0,0 +1,282 @@
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
|
||||
CONFIG_ATA=y
|
||||
CONFIG_ATA_PIIX=y
|
||||
CONFIG_BLK_DEV_BSG=y
|
||||
CONFIG_BLK_DEV_BSGLIB=y
|
||||
# CONFIG_BLK_DEV_DM is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_MD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BOARD_SCACHE=y
|
||||
CONFIG_BOOT_ELF32=y
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_BUILTIN_DTB=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CLKBLD_I8253=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKEVT_I8253=y
|
||||
CONFIG_CLKSRC_I8253=y
|
||||
CONFIG_CLKSRC_MIPS_GIC=y
|
||||
CONFIG_CLOCKSOURCE_WATCHDOG=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
# CONFIG_COMMON_CLK_BOSTON is not set
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
# CONFIG_CPU_HAS_SMARTMIPS is not set
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
# CONFIG_CPU_MICROMIPS is not set
|
||||
# CONFIG_CPU_MIPS32 is not set
|
||||
# CONFIG_CPU_MIPS32_3_5_FEATURES is not set
|
||||
# CONFIG_CPU_MIPS32_R1 is not set
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS32_R5 is not set
|
||||
# CONFIG_CPU_MIPS32_R5_FEATURES is not set
|
||||
# CONFIG_CPU_MIPS32_R6 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R6 is not set
|
||||
# CONFIG_CPU_MIPSR2 is not set
|
||||
# CONFIG_CPU_MIPSR2_IRQ_EI is not set
|
||||
# CONFIG_CPU_MIPSR2_IRQ_VI is not set
|
||||
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
CONFIG_CPU_R4K_CACHE_TLB=y
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DMA_MAYBE_COHERENT=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
CONFIG_GENERIC_IRQ_CHIP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_ISA_DMA=y
|
||||
CONFIG_GENERIC_LIB_ASHLDI3=y
|
||||
CONFIG_GENERIC_LIB_ASHRDI3=y
|
||||
CONFIG_GENERIC_LIB_CMPDI2=y
|
||||
CONFIG_GENERIC_LIB_LSHRDI3=y
|
||||
CONFIG_GENERIC_LIB_UCMPDI2=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GLOB=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_I8253=y
|
||||
CONFIG_I8253_LOCK=y
|
||||
CONFIG_I8259=y
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_MIPS_CPU=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_ISA_DMA_API=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_JFFS2_FS_POSIX_ACL=y
|
||||
CONFIG_JFFS2_FS_SECURITY=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LLD_VERSION=0
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_MIPS_ASID_BITS=8
|
||||
CONFIG_MIPS_ASID_SHIFT=0
|
||||
CONFIG_MIPS_BONITO64=y
|
||||
CONFIG_MIPS_CLOCK_VSYSCALL=y
|
||||
CONFIG_MIPS_CM=y
|
||||
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
|
||||
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
|
||||
# CONFIG_MIPS_CMDLINE_FROM_DTB is not set
|
||||
# CONFIG_MIPS_CMP is not set
|
||||
CONFIG_MIPS_CPC=y
|
||||
# CONFIG_MIPS_CPS is not set
|
||||
CONFIG_MIPS_CPU_SCACHE=y
|
||||
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
|
||||
CONFIG_MIPS_EXTERNAL_TIMER=y
|
||||
CONFIG_MIPS_GIC=y
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=6
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
|
||||
CONFIG_MIPS_MALTA=y
|
||||
CONFIG_MIPS_MSC=y
|
||||
CONFIG_MIPS_MT=y
|
||||
CONFIG_MIPS_MT_FPAFF=y
|
||||
CONFIG_MIPS_MT_SMP=y
|
||||
CONFIG_MIPS_NO_APPENDED_DTB=y
|
||||
CONFIG_MIPS_NR_CPU_NR_MAP=2
|
||||
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
|
||||
# CONFIG_MIPS_RAW_APPENDED_DTB is not set
|
||||
# CONFIG_MIPS_VPE_LOADER is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_CFI_STAA=y
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_PADATA=y
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_PATA_TIMINGS=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DRIVERS_LEGACY=y
|
||||
CONFIG_PCI_GT64XXX_PCI0=y
|
||||
CONFIG_PCSPKR_PLATFORM=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_PIIX4_POWEROFF=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_PRINT_QUOTA_WARNING=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
# CONFIG_QFMT_V1 is not set
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTACTL=y
|
||||
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
|
||||
CONFIG_QUOTA_TREE=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_MC146818_LIB=y
|
||||
CONFIG_SATA_HOST=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_SECCOMP_FILTER=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SERIO=y
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_UP=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_SYNC_R4K=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R3_5=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R5=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R6=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R6=y
|
||||
CONFIG_SYS_HAS_CPU_NEVADA=y
|
||||
CONFIG_SYS_HAS_CPU_RM7000=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_MICROMIPS=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS16=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS_CMP=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
|
||||
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
||||
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
|
||||
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
|
||||
CONFIG_SYS_SUPPORTS_SMARTMIPS=y
|
||||
CONFIG_SYS_SUPPORTS_SMP=y
|
||||
CONFIG_SYS_SUPPORTS_VPE_LOADER=y
|
||||
CONFIG_SYS_SUPPORTS_ZBOOT=y
|
||||
CONFIG_TARGET_ISA_REV=1
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USE_OF=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_VXFS_FS=y
|
||||
CONFIG_WAR_ICACHE_REFILLS=y
|
||||
CONFIG_XPS=y
|
||||
52
target/linux/malta/image/Makefile
Normal file
52
target/linux/malta/image/Makefile
Normal file
@@ -0,0 +1,52 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Copyright (C) 2010 OpenWrt.org
|
||||
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/image.mk
|
||||
|
||||
define CompressLzma
|
||||
$(STAGING_DIR_HOST)/bin/lzma e $(1) -lc1 -lp2 -pb2 $(2)
|
||||
endef
|
||||
|
||||
define CompressGzip
|
||||
gzip -9n -c $(1) > $(2)
|
||||
endef
|
||||
|
||||
define MkuImage
|
||||
mkimage -A mips -O linux -T kernel -a 0x80100000 -C $(1) $(2) \
|
||||
-e 0x80100000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
|
||||
-d $(3) $(4)
|
||||
endef
|
||||
|
||||
define Image/Prepare
|
||||
$(call CompressLzma,$(KDIR)/vmlinux,$(KDIR)/vmlinux.bin.lzma)
|
||||
$(call MkuImage,lzma,,$(KDIR)/vmlinux.bin.lzma,$(KDIR)/uImage.lzma)
|
||||
$(call CompressGzip,$(KDIR)/vmlinux,$(KDIR)/vmlinux.bin.gz)
|
||||
$(call MkuImage,gzip,,$(KDIR)/vmlinux.bin.gz,$(KDIR)/uImage.gz)
|
||||
endef
|
||||
|
||||
define Image/BuildKernel
|
||||
cp $(KDIR)/vmlinux.elf $(BIN_DIR)/$(IMG_PREFIX)-vmlinux.elf
|
||||
cp $(KDIR)/uImage.lzma $(BIN_DIR)/$(IMG_PREFIX)-uImage-lzma
|
||||
cp $(KDIR)/uImage.gz $(BIN_DIR)/$(IMG_PREFIX)-uImage-gzip
|
||||
endef
|
||||
|
||||
define Image/Build/Initramfs
|
||||
cp $(KDIR)/vmlinux-initramfs.elf $(BIN_DIR)/$(IMG_PREFIX)-vmlinux-initramfs.elf
|
||||
cp $(KDIR)/vmlinux-initramfs $(BIN_DIR)/$(IMG_PREFIX)-vmlinux-initramfs.bin
|
||||
endef
|
||||
|
||||
define Image/Build/gzip
|
||||
gzip -f9n $(BIN_DIR)/$(IMG_ROOTFS)-$(1).img
|
||||
endef
|
||||
|
||||
$(eval $(call Image/gzip-ext4-padded-squashfs))
|
||||
|
||||
define Image/Build
|
||||
$(call Image/Build/$(1))
|
||||
$(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_ROOTFS)-$(1).img
|
||||
$(call Image/Build/gzip/$(1))
|
||||
endef
|
||||
|
||||
$(eval $(call BuildImage))
|
||||
3
target/linux/malta/le/config-default
Normal file
3
target/linux/malta/le/config-default
Normal file
@@ -0,0 +1,3 @@
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_MIPS32_R2=y
|
||||
CONFIG_HIGHMEM=y
|
||||
10
target/linux/malta/le/target.mk
Normal file
10
target/linux/malta/le/target.mk
Normal file
@@ -0,0 +1,10 @@
|
||||
ARCH:=mipsel
|
||||
CPU_TYPE:=24kc
|
||||
SUBTARGET:=le
|
||||
FEATURES+=source-only
|
||||
BOARDNAME:=Little Endian
|
||||
|
||||
define Target/Description
|
||||
Build LE firmware images for MIPS Malta CoreLV board running in
|
||||
little-endian mode
|
||||
endef
|
||||
8
target/linux/malta/le64/config-default
Normal file
8
target/linux/malta/le64/config-default
Normal file
@@ -0,0 +1,8 @@
|
||||
# CONFIG_32BIT is not set
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=12
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_MIPS64_R2=y
|
||||
# CONFIG_MIPS32_N32 is not set
|
||||
# CONFIG_MIPS32_O32 is not set
|
||||
# CONFIG_MIPS_VA_BITS_48 is not set
|
||||
10
target/linux/malta/le64/target.mk
Normal file
10
target/linux/malta/le64/target.mk
Normal file
@@ -0,0 +1,10 @@
|
||||
ARCH:=mips64el
|
||||
CPU_TYPE:=mips64r2
|
||||
SUBTARGET:=le64
|
||||
FEATURES+=source-only
|
||||
BOARDNAME:=Little Endian (64-bits)
|
||||
|
||||
define Target/Description
|
||||
Build LE firmware images for MIPS Malta CoreLV board running in
|
||||
little-endian and 64-bits mode
|
||||
endef
|
||||
Reference in New Issue
Block a user