Initial commit
This commit is contained in:
domenico
@@ -0,0 +1,31 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "cn7130_ubnt_edgerouter-e300.dtsi"
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/ {
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compatible = "ubnt,edgerouter-4", "cavium,cn7130";
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model = "Ubiquiti EdgeRouter 4";
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};
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&pip {
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interface@0 {
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ethernet@0 {
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label = "lan3";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy4>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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&eeprom {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_eeprom_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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};
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@@ -0,0 +1,73 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "cn7130_ubnt_edgerouter-e300.dtsi"
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/ {
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compatible = "ubnt,edgerouter-6p", "cavium,cn7130";
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model = "Ubiquiti EdgeRouter 6P";
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};
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&smi0 {
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phy8: ethernet-phy@8 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
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reg = <8>;
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};
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phy9: ethernet-phy@9 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
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reg = <9>;
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};
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};
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&pip {
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interface@0 {
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ethernet@0 {
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label = "lan5";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy4>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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};
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};
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interface@1 {
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status = "okay";
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ethernet@0 {
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label = "lan3";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy8>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(4)>;
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};
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ethernet@1 {
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label = "lan4";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy9>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(5)>;
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};
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};
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};
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&eeprom {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_eeprom_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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};
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@@ -0,0 +1,218 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "cn71xx.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "ubnt,edgerouter-e300", "cavium,cn7130";
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model = "Ubiquiti EdgeRouter E300 series";
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aliases {
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/* White + Blinking Blue */
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led-boot = &led_power_white;
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/* Blue + Blinking White */
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led-failsafe = &led_power_blue;
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/* Constant Blue */
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led-running = &led_power_blue;
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/* Blue + Blinking White */
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led-upgrade = &led_power_blue;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000>,
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<0x0 0x10000000>,
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<0x0 0x20000000>,
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<0x0 0x30000000>;
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};
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leds {
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compatible = "gpio-leds";
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led_power_blue: power_blue {
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label = "blue:power";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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led_power_white: power_white {
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label = "white:power";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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sfp: sfp {
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compatible = "sff,sfp";
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i2c-bus = <&twsi0>;
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/* Pins 12, 13 and 14 gets pulled low when SFP is plugged in */
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mod-def0-gpio = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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};
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&uart0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&xhci0 {
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status = "okay";
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dr_mode = "host";
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};
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&twsi0 {
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status = "okay";
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sfp_eeprom@50 {
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compatible = "at,24c04";
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reg = <0x50>;
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};
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sfp_eeprom@51 {
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compatible = "at,24c04";
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reg = <0x51>;
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};
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};
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&spi {
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "Macronix,mx25l6405d", "spi-flash";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partition@0 {
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label = "boot0";
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read-only;
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reg = <0x000000 0x300000>;
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};
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partition@300000 {
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label = "dummy";
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read-only;
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reg = <0x300000 0x100000>;
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};
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eeprom: partition@400000 {
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label = "eeprom";
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read-only;
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reg = <0x400000 0x10000>;
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};
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};
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};
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&mmc {
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status = "okay";
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mmc-slot@0 {
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compatible = "mmc-slot";
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reg = <0>;
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non-removable;
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max-frequency = <26000000>;
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voltage-ranges = <3300 3300>;
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bus-width = <8>;
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};
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};
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&smi0 {
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status = "okay";
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phy4: ethernet-phy@4 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
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reg = <4>;
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sfp = <&sfp>;
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};
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phy5: ethernet-phy@5 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
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reg = <5>;
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};
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phy6: ethernet-phy@6 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
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reg = <6>;
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};
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phy7: ethernet-phy@7 {
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device_type = "ethernet-phy";
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interrupts = <17 8>;
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interrupt-parent = <&gpio>;
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compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
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reg = <7>;
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};
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};
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&pip {
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status = "okay";
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interface@0 {
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status = "okay";
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ethernet@1 {
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label = "lan0";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy5>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(1)>;
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};
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ethernet@2 {
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label = "lan1";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy6>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(2)>;
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};
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ethernet@3 {
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label = "lan2";
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&phy7>;
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(3)>;
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};
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};
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};
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&eeprom {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_eeprom_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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};
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@@ -0,0 +1,357 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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/ {
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compatible = "cavium,cn71xx";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&ciu>;
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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bootbus@1180000000000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "cavium,octeon-3860-bootbus";
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reg = <0x11800 0x00 0x00 0x200>;
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ranges = <0x00 0x00 0x10000 0x10000000 0x00>,
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<0x01 0x00 0x10000 0x20000000 0x00>,
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<0x02 0x00 0x10000 0x30000000 0x00>,
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<0x03 0x00 0x10000 0x40000000 0x00>,
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<0x04 0x00 0x10000 0x50000000 0x00>,
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<0x05 0x00 0x10000 0x60000000 0x00>,
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<0x06 0x00 0x10000 0x70000000 0x00>,
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<0x07 0x00 0x10000 0x80000000 0x00>;
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};
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dma0: dma-engine@1180000000100 {
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status = "disabled";
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compatible = "cavium,octeon-5750-bootbus-dma";
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reg = <0x11800 0x100 0x0 0x08>;
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interrupts = <0 63>;
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};
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dma1: dma-engine@1180000000108 {
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status = "disabled";
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compatible = "cavium,octeon-5750-bootbus-dma";
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reg = <0x11800 0x108 0x0 0x08>;
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interrupts = <0 63>;
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};
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ciu: interrupt-controller@1070000000000 {
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#interrupt-cells = <2>;
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compatible = "cavium,octeon-3860-ciu";
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reg = <0x10700 0x00000000 0x0 0x7000>;
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interrupt-controller;
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};
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cib0: interrupt-controller@107000000e000 {
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#interrupt-cells = <2>;
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compatible = "cavium,octeon-7130-cib";
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reg = <0x10700 0xe000 0x0 0x08>, /* RAW */
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<0x10700 0xe100 0x0 0x08>; /* EN */
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cavium,max-bits = <23>;
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interrupts = <1 24>;
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interrupt-parent = <&ciu>;
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interrupt-controller;
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};
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cib1: interrupt-controller@107000000e200 {
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#interrupt-cells = <2>;
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compatible = "cavium,octeon-7130-cib";
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reg = <0x10700 0xe200 0x0 0x08>, /* RAW */
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<0x10700 0xe300 0x0 0x08>; /* EN */
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cavium,max-bits = <12>;
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interrupts = <1 52>;
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interrupt-parent = <&ciu>;
|
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interrupt-controller;
|
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};
|
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cib2: interrupt-controller@107000000e400 {
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#interrupt-cells = <2>;
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compatible = "cavium,octeon-7130-cib";
|
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reg = <0x10700 0xe400 0x0 0x08>, /* RAW */
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<0x10700 0xe500 0x0 0x08>; /* EN */
|
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cavium,max-bits = <6>;
|
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interrupts = <1 63>;
|
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interrupt-parent = <&ciu>;
|
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interrupt-controller;
|
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};
|
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cib3: interrupt-controller@107000000e600 {
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#interrupt-cells = <2>;
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compatible = "cavium,octeon-7130-cib";
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reg = <0x10700 0xe600 0x0 0x08>, /* RAW */
|
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<0x10700 0xe700 0x0 0x08>; /* EN */
|
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cavium,max-bits = <4>;
|
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interrupts = <2 16>;
|
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interrupt-parent = <&ciu>;
|
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interrupt-controller;
|
||||
};
|
||||
|
||||
cib4: interrupt-controller@107000000e800 {
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#interrupt-cells = <2>;
|
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compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe800 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xea00 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <11>;
|
||||
interrupts = <1 33>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib5: interrupt-controller@107000000e900 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe900 0x00 0x08>, /* RAW */
|
||||
<0x10700 0xeb00 0x00 0x08>; /* EN */
|
||||
cavium,max-bits = <11>;
|
||||
interrupts = <1 23>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib6: interrupt-controller@107000000ec00 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xec00 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xee00 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <15>;
|
||||
interrupts = <2 17>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@1070000000800 {
|
||||
#interrupt-cells = <2>;
|
||||
#gpio-cells = <2>;
|
||||
compatible = "cavium,octeon-3860-gpio";
|
||||
reg = <0x10700 0x800 0x0 0x100>;
|
||||
interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
|
||||
<0 20>, <0 21>, <0 22>, <0 23>,
|
||||
<0 24>, <0 25>, <0 26>, <0 27>,
|
||||
<0 28>, <0 29>, <0 30>, <0 31>;
|
||||
interrupt-controller;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
mmc: mmc@1180000002000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-6130-mmc";
|
||||
reg = <0x11800 0x2000 0x0 0x100>,
|
||||
<0x11800 0x168 0x0 0x20>;
|
||||
interrupts = <1 19>, <0 63>;
|
||||
};
|
||||
|
||||
smi0: mdio@1180000001800 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-mdio";
|
||||
reg = <0x11800 0x1800 0x0 0x40>;
|
||||
};
|
||||
|
||||
smi1: mdio@1180000001900 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-mdio";
|
||||
reg = <0x11800 0x1900 0x0 0x40>;
|
||||
};
|
||||
|
||||
pip: pip@11800a0000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip";
|
||||
reg = <0x11800 0xa0000000 0x0 0x2000>;
|
||||
|
||||
interface@0 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip-interface";
|
||||
reg = <0>; /* Interface */
|
||||
|
||||
ethernet@0 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <0>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@1 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <1>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@2 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <2>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <3>; /* Port */
|
||||
};
|
||||
};
|
||||
|
||||
interface@1 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip-interface";
|
||||
reg = <1>; /* Interface */
|
||||
|
||||
ethernet@0 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <0>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@1 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <1>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@2 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <2>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <3>; /* Port */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
twsi0: i2c@1180000001000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-twsi";
|
||||
reg = <0x11800 0x1000 0x0 0x200>;
|
||||
interrupts = <0 45>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
twsi1: i2c@1180000001200 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-twsi";
|
||||
reg = <0x11800 0x1200 0x0 0x200>;
|
||||
interrupts = <0 59>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
uctl@118006c000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-sata-uctl";
|
||||
reg = <0x11800 0x6c000000 0x00 0x100>;
|
||||
ranges;
|
||||
|
||||
sata@16c0000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-ahci";
|
||||
reg = <0x16c00 0x00 0x00 0x200>;
|
||||
interrupt-parent = <&cib3>;
|
||||
interrupts = <2 4>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: uctl@1180068000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-usb-uctl";
|
||||
reg = <0x11800 0x68000000 0x00 0x100>;
|
||||
ranges;
|
||||
power = <0x02 0x01 0x00>;
|
||||
refclk-frequency = <100000000>;
|
||||
refclk-type-hs = "pll_ref_clk";
|
||||
refclk-type-ss = "dlmc_ref_clk1";
|
||||
|
||||
xhci0: xhci@1680000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
|
||||
reg = <0x16800 0x0 0x10 0x00>;
|
||||
interrupts = <9 4>;
|
||||
interrupt-parent = <&cib4>;
|
||||
};
|
||||
};
|
||||
|
||||
usb1: uctl@1180069000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-usb-uctl";
|
||||
reg = <0x11800 0x69000000 0x00 0x100>;
|
||||
ranges;
|
||||
power = <0x02 0x02 0x01>;
|
||||
refclk-frequency = <100000000>;
|
||||
refclk-type-hs = "pll_ref_clk";
|
||||
refclk-type-ss = "dlmc_ref_clk1";
|
||||
|
||||
xhci1: xhci@1690000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
|
||||
reg = <0x16900 0x0 0x10 0x00>;
|
||||
interrupts = <9 4>;
|
||||
interrupt-parent = <&cib5>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@1180000000800 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-uart", "ns16550";
|
||||
reg = <0x11800 0x800 0x0 0x400>;
|
||||
reg-shift = <3>;
|
||||
interrupts = <0 34>;
|
||||
clock-frequency = <400000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
uart1: serial@1180000000c00 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-uart", "ns16550";
|
||||
reg = <0x11800 0xc00 0x0 0x400>;
|
||||
reg-shift = <3>;
|
||||
interrupts = <0 35>;
|
||||
clock-frequency = <400000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
ocla0@11800a8000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-ocla";
|
||||
reg = <0x11800 0xa8000000 0x0 0x500000>;
|
||||
interrupts = <0x08 0x01 0x09 0x01 0x0b 0x01>;
|
||||
interrupt-parent = <&cib6>;
|
||||
};
|
||||
|
||||
spi: spi@1070000001000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3010-spi";
|
||||
reg = <0x10700 0x1000 0x00 0x100>;
|
||||
interrupts = <0 58>;
|
||||
spi-max-frequency = <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user