325 lines
9.4 KiB
Diff
325 lines
9.4 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Ard Biesheuvel <ardb@kernel.org>
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Date: Fri, 6 Nov 2020 17:39:38 +0100
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Subject: [PATCH] crypto: arm64/chacha - simplify tail block handling
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commit c4fc6328d6c67690a7e6e03f43a5a976a13120ef upstream.
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Based on lessons learnt from optimizing the 32-bit version of this driver,
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we can simplify the arm64 version considerably, by reordering the final
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two stores when the last block is not a multiple of 64 bytes. This removes
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the need to use permutation instructions to calculate the elements that are
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clobbered by the final overlapping store, given that the store of the
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penultimate block now follows it, and that one carries the correct values
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for those elements already.
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While at it, simplify the overlapping loads as well, by calculating the
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address of the final overlapping load upfront, and switching to this
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address for every load that would otherwise extend past the end of the
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source buffer.
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There is no impact on performance, but the resulting code is substantially
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smaller and easier to follow.
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Cc: Eric Biggers <ebiggers@google.com>
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Cc: "Jason A . Donenfeld" <Jason@zx2c4.com>
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Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
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---
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arch/arm64/crypto/chacha-neon-core.S | 193 ++++++++++-----------------
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1 file changed, 69 insertions(+), 124 deletions(-)
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--- a/arch/arm64/crypto/chacha-neon-core.S
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+++ b/arch/arm64/crypto/chacha-neon-core.S
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@@ -195,7 +195,6 @@ ENTRY(chacha_4block_xor_neon)
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adr_l x10, .Lpermute
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and x5, x4, #63
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add x10, x10, x5
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- add x11, x10, #64
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//
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// This function encrypts four consecutive ChaCha blocks by loading
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@@ -645,11 +644,11 @@ CPU_BE( rev a15, a15 )
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zip2 v31.4s, v14.4s, v15.4s
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eor a15, a15, w9
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- mov x3, #64
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+ add x3, x2, x4
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+ sub x3, x3, #128 // start of last block
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+
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subs x5, x4, #128
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- add x6, x5, x2
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- csel x3, x3, xzr, ge
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- csel x2, x2, x6, ge
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+ csel x2, x2, x3, ge
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// interleave 64-bit words in state n, n+2
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zip1 v0.2d, v16.2d, v18.2d
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@@ -658,13 +657,10 @@ CPU_BE( rev a15, a15 )
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zip1 v8.2d, v17.2d, v19.2d
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zip2 v12.2d, v17.2d, v19.2d
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stp a2, a3, [x1, #-56]
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- ld1 {v16.16b-v19.16b}, [x2], x3
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subs x6, x4, #192
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- ccmp x3, xzr, #4, lt
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- add x7, x6, x2
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- csel x3, x3, xzr, eq
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- csel x2, x2, x7, eq
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+ ld1 {v16.16b-v19.16b}, [x2], #64
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+ csel x2, x2, x3, ge
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zip1 v1.2d, v20.2d, v22.2d
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zip2 v5.2d, v20.2d, v22.2d
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@@ -672,13 +668,10 @@ CPU_BE( rev a15, a15 )
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zip1 v9.2d, v21.2d, v23.2d
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zip2 v13.2d, v21.2d, v23.2d
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stp a6, a7, [x1, #-40]
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- ld1 {v20.16b-v23.16b}, [x2], x3
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subs x7, x4, #256
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- ccmp x3, xzr, #4, lt
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- add x8, x7, x2
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- csel x3, x3, xzr, eq
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- csel x2, x2, x8, eq
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+ ld1 {v20.16b-v23.16b}, [x2], #64
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+ csel x2, x2, x3, ge
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zip1 v2.2d, v24.2d, v26.2d
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zip2 v6.2d, v24.2d, v26.2d
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@@ -686,12 +679,10 @@ CPU_BE( rev a15, a15 )
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zip1 v10.2d, v25.2d, v27.2d
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zip2 v14.2d, v25.2d, v27.2d
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stp a10, a11, [x1, #-24]
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- ld1 {v24.16b-v27.16b}, [x2], x3
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subs x8, x4, #320
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- ccmp x3, xzr, #4, lt
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- add x9, x8, x2
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- csel x2, x2, x9, eq
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+ ld1 {v24.16b-v27.16b}, [x2], #64
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+ csel x2, x2, x3, ge
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zip1 v3.2d, v28.2d, v30.2d
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zip2 v7.2d, v28.2d, v30.2d
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@@ -699,151 +690,105 @@ CPU_BE( rev a15, a15 )
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zip1 v11.2d, v29.2d, v31.2d
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zip2 v15.2d, v29.2d, v31.2d
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stp a14, a15, [x1, #-8]
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+
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+ tbnz x5, #63, .Lt128
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ld1 {v28.16b-v31.16b}, [x2]
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// xor with corresponding input, write to output
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- tbnz x5, #63, 0f
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eor v16.16b, v16.16b, v0.16b
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eor v17.16b, v17.16b, v1.16b
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eor v18.16b, v18.16b, v2.16b
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eor v19.16b, v19.16b, v3.16b
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- st1 {v16.16b-v19.16b}, [x1], #64
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- cbz x5, .Lout
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- tbnz x6, #63, 1f
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+ tbnz x6, #63, .Lt192
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+
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eor v20.16b, v20.16b, v4.16b
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eor v21.16b, v21.16b, v5.16b
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eor v22.16b, v22.16b, v6.16b
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eor v23.16b, v23.16b, v7.16b
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- st1 {v20.16b-v23.16b}, [x1], #64
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- cbz x6, .Lout
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- tbnz x7, #63, 2f
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+ st1 {v16.16b-v19.16b}, [x1], #64
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+ tbnz x7, #63, .Lt256
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+
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eor v24.16b, v24.16b, v8.16b
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eor v25.16b, v25.16b, v9.16b
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eor v26.16b, v26.16b, v10.16b
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eor v27.16b, v27.16b, v11.16b
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- st1 {v24.16b-v27.16b}, [x1], #64
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- cbz x7, .Lout
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- tbnz x8, #63, 3f
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+ st1 {v20.16b-v23.16b}, [x1], #64
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+ tbnz x8, #63, .Lt320
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+
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eor v28.16b, v28.16b, v12.16b
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eor v29.16b, v29.16b, v13.16b
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eor v30.16b, v30.16b, v14.16b
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eor v31.16b, v31.16b, v15.16b
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+
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+ st1 {v24.16b-v27.16b}, [x1], #64
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st1 {v28.16b-v31.16b}, [x1]
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.Lout: frame_pop
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ret
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- // fewer than 128 bytes of in/output
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-0: ld1 {v8.16b}, [x10]
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- ld1 {v9.16b}, [x11]
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- movi v10.16b, #16
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- sub x2, x1, #64
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- add x1, x1, x5
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- ld1 {v16.16b-v19.16b}, [x2]
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- tbl v4.16b, {v0.16b-v3.16b}, v8.16b
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- tbx v20.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v5.16b, {v0.16b-v3.16b}, v8.16b
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- tbx v21.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v6.16b, {v0.16b-v3.16b}, v8.16b
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- tbx v22.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v7.16b, {v0.16b-v3.16b}, v8.16b
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- tbx v23.16b, {v16.16b-v19.16b}, v9.16b
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-
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- eor v20.16b, v20.16b, v4.16b
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- eor v21.16b, v21.16b, v5.16b
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- eor v22.16b, v22.16b, v6.16b
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- eor v23.16b, v23.16b, v7.16b
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- st1 {v20.16b-v23.16b}, [x1]
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- b .Lout
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-
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// fewer than 192 bytes of in/output
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-1: ld1 {v8.16b}, [x10]
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- ld1 {v9.16b}, [x11]
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- movi v10.16b, #16
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- add x1, x1, x6
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- tbl v0.16b, {v4.16b-v7.16b}, v8.16b
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- tbx v20.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v1.16b, {v4.16b-v7.16b}, v8.16b
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- tbx v21.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v2.16b, {v4.16b-v7.16b}, v8.16b
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- tbx v22.16b, {v16.16b-v19.16b}, v9.16b
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- add v8.16b, v8.16b, v10.16b
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- add v9.16b, v9.16b, v10.16b
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- tbl v3.16b, {v4.16b-v7.16b}, v8.16b
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- tbx v23.16b, {v16.16b-v19.16b}, v9.16b
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-
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- eor v20.16b, v20.16b, v0.16b
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- eor v21.16b, v21.16b, v1.16b
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- eor v22.16b, v22.16b, v2.16b
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- eor v23.16b, v23.16b, v3.16b
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- st1 {v20.16b-v23.16b}, [x1]
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+.Lt192: cbz x5, 1f // exactly 128 bytes?
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+ ld1 {v28.16b-v31.16b}, [x10]
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+ add x5, x5, x1
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+ tbl v28.16b, {v4.16b-v7.16b}, v28.16b
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+ tbl v29.16b, {v4.16b-v7.16b}, v29.16b
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+ tbl v30.16b, {v4.16b-v7.16b}, v30.16b
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+ tbl v31.16b, {v4.16b-v7.16b}, v31.16b
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+
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+0: eor v20.16b, v20.16b, v28.16b
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+ eor v21.16b, v21.16b, v29.16b
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+ eor v22.16b, v22.16b, v30.16b
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+ eor v23.16b, v23.16b, v31.16b
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+ st1 {v20.16b-v23.16b}, [x5] // overlapping stores
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+1: st1 {v16.16b-v19.16b}, [x1]
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b .Lout
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+ // fewer than 128 bytes of in/output
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+.Lt128: ld1 {v28.16b-v31.16b}, [x10]
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+ add x5, x5, x1
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+ sub x1, x1, #64
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+ tbl v28.16b, {v0.16b-v3.16b}, v28.16b
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+ tbl v29.16b, {v0.16b-v3.16b}, v29.16b
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+ tbl v30.16b, {v0.16b-v3.16b}, v30.16b
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+ tbl v31.16b, {v0.16b-v3.16b}, v31.16b
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+ ld1 {v16.16b-v19.16b}, [x1] // reload first output block
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+ b 0b
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+
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// fewer than 256 bytes of in/output
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-2: ld1 {v4.16b}, [x10]
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- ld1 {v5.16b}, [x11]
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- movi v6.16b, #16
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- add x1, x1, x7
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+.Lt256: cbz x6, 2f // exactly 192 bytes?
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+ ld1 {v4.16b-v7.16b}, [x10]
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+ add x6, x6, x1
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tbl v0.16b, {v8.16b-v11.16b}, v4.16b
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- tbx v24.16b, {v20.16b-v23.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v1.16b, {v8.16b-v11.16b}, v4.16b
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- tbx v25.16b, {v20.16b-v23.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v2.16b, {v8.16b-v11.16b}, v4.16b
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- tbx v26.16b, {v20.16b-v23.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v3.16b, {v8.16b-v11.16b}, v4.16b
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- tbx v27.16b, {v20.16b-v23.16b}, v5.16b
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-
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- eor v24.16b, v24.16b, v0.16b
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- eor v25.16b, v25.16b, v1.16b
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- eor v26.16b, v26.16b, v2.16b
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- eor v27.16b, v27.16b, v3.16b
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- st1 {v24.16b-v27.16b}, [x1]
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+ tbl v1.16b, {v8.16b-v11.16b}, v5.16b
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+ tbl v2.16b, {v8.16b-v11.16b}, v6.16b
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+ tbl v3.16b, {v8.16b-v11.16b}, v7.16b
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+
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+ eor v28.16b, v28.16b, v0.16b
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+ eor v29.16b, v29.16b, v1.16b
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+ eor v30.16b, v30.16b, v2.16b
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+ eor v31.16b, v31.16b, v3.16b
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+ st1 {v28.16b-v31.16b}, [x6] // overlapping stores
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+2: st1 {v20.16b-v23.16b}, [x1]
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b .Lout
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// fewer than 320 bytes of in/output
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-3: ld1 {v4.16b}, [x10]
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- ld1 {v5.16b}, [x11]
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- movi v6.16b, #16
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- add x1, x1, x8
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+.Lt320: cbz x7, 3f // exactly 256 bytes?
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+ ld1 {v4.16b-v7.16b}, [x10]
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+ add x7, x7, x1
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tbl v0.16b, {v12.16b-v15.16b}, v4.16b
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- tbx v28.16b, {v24.16b-v27.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v1.16b, {v12.16b-v15.16b}, v4.16b
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- tbx v29.16b, {v24.16b-v27.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v2.16b, {v12.16b-v15.16b}, v4.16b
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- tbx v30.16b, {v24.16b-v27.16b}, v5.16b
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- add v4.16b, v4.16b, v6.16b
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- add v5.16b, v5.16b, v6.16b
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- tbl v3.16b, {v12.16b-v15.16b}, v4.16b
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- tbx v31.16b, {v24.16b-v27.16b}, v5.16b
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+ tbl v1.16b, {v12.16b-v15.16b}, v5.16b
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+ tbl v2.16b, {v12.16b-v15.16b}, v6.16b
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+ tbl v3.16b, {v12.16b-v15.16b}, v7.16b
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eor v28.16b, v28.16b, v0.16b
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eor v29.16b, v29.16b, v1.16b
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eor v30.16b, v30.16b, v2.16b
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eor v31.16b, v31.16b, v3.16b
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- st1 {v28.16b-v31.16b}, [x1]
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+ st1 {v28.16b-v31.16b}, [x7] // overlapping stores
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+3: st1 {v24.16b-v27.16b}, [x1]
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b .Lout
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ENDPROC(chacha_4block_xor_neon)
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@@ -851,7 +796,7 @@ ENDPROC(chacha_4block_xor_neon)
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.align L1_CACHE_SHIFT
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.Lpermute:
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.set .Li, 0
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- .rept 192
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+ .rept 128
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.byte (.Li - 64)
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.set .Li, .Li + 1
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.endr
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