72 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			72 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 5e4548922009870a38bcf1d887317676d4e08f54 Mon Sep 17 00:00:00 2001
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| From: Damir Franusic <damir.franusic@sartura.hr>
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| Date: Thu, 21 Nov 2019 16:29:02 +0100
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| Subject: [PATCH] ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx
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| 
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| Add missing nodes and properties to enable SMP
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| support on IPQ40xx devices.
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| 
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| Booting without "saw_l2" node:
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| 
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| [    0.001400] CPU: Testing write buffer coherency: ok
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| [    0.001856] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
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| [    0.060163] Setting up static identity map for 0x80300000 - 0x80300060
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| [    0.080140] rcu: Hierarchical SRCU implementation.
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| [    0.120258] smp: Bringing up secondary CPUs ...
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| [    0.200540] CPU1: failed to boot: -19
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| [    0.280689] CPU2: failed to boot: -19
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| [    0.360874] CPU3: failed to boot: -19
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| [    0.360966] smp: Brought up 1 node, 1 CPU
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| [    0.360979] SMP: Total of 1 processors activated (96.00 BogoMIPS).
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| [    0.360988] CPU: All CPU(s) started in SVC mode.
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| 
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| Then, booting with "saw_l2" node present (this patch applied):
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| 
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| [    0.001450] CPU: Testing write buffer coherency: ok
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| [    0.001904] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
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| [    0.060161] Setting up static identity map for 0x80300000 - 0x80300060
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| [    0.080137] rcu: Hierarchical SRCU implementation.
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| [    0.120252] smp: Bringing up secondary CPUs ...
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| [    0.200958] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
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| [    0.281091] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
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| [    0.361264] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
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| [    0.361430] smp: Brought up 1 node, 4 CPUs
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| [    0.361460] SMP: Total of 4 processors activated (384.00 BogoMIPS).
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| [    0.361469] CPU: All CPU(s) started in SVC mode.
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| 
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| Signed-off-by: Damir Franusic <damir.franusic@sartura.hr>
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| Cc: Luka Perkov <luka.perkov@sartura.hr>
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| Cc: Robert Marko <robert.marko@sartura.hr>
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| Cc: Andy Gross <agross@kernel.org>
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| Cc: Rob Herring <robh+dt@kernel.org>
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| Cc: linux-arm-msm@vger.kernel.org
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| Link: https://lore.kernel.org/r/20191121152902.21394-1-damir.franusic@gmail.com
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| Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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| ---
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|  arch/arm/boot/dts/qcom-ipq4019.dtsi | 7 +++++++
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|  1 file changed, 7 insertions(+)
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| 
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| --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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| +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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| @@ -102,6 +102,7 @@
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|  		L2: l2-cache {
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|  			compatible = "cache";
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|  			cache-level = <2>;
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| +			qcom,saw = <&saw_l2>;
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|  		};
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|  	};
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|  
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| @@ -353,6 +354,12 @@
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|  			regulator;
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|  		};
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|  
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| +		saw_l2: regulator@b012000 {
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| +			compatible = "qcom,saw2";
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| +			reg = <0xb012000 0x1000>;
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| +			regulator;
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| +		};
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| +
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|  		blsp1_uart1: serial@78af000 {
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|  			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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|  			reg = <0x78af000 0x200>;
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