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domenico
2025-06-24 14:35:53 +02:00
commit c06fb25d1f
9263 changed files with 1750214 additions and 0 deletions

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#
# Copyright (C) 2017 Hauke Mehrtens
# Copyright (C) 2021-2023 Daniel Golle
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=arm-trusted-firmware-mediatek
PKG_RELEASE:=3
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git
PKG_SOURCE_DATE:=2024-01-17
PKG_SOURCE_VERSION:=bacca82a8cac369470df052a9d801a0ceb9b74ca
PKG_MIRROR_HASH:=1138649f64ac3982330925c38c795ca6860289adbd95755991f80afa30ebdea7
PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/trusted-firmware-a.mk
include $(INCLUDE_DIR)/package.mk
define Trusted-Firmware-A/Default
BUILD_TARGET:=mediatek
TFA_IMAGE:=bl2.img bl31.bin
HIDDEN:=y
BOOT_DEVICE:=
DDR3_FLYBY:=
DDR_TYPE:=
NAND_TYPE:=
BOARD_QFN:=
DRAM_USE_COMB:=
RAM_BOOT_UART_DL:=
USE_UBI:=
endef
define Trusted-Firmware-A/mt7622-nor-1ddr
NAME:=MediaTek MT7622 (SPI-NOR, 1x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=nor
endef
define Trusted-Firmware-A/mt7622-nor-2ddr
NAME:=MediaTek MT7622 (SPI-NOR, 2x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=nor
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-ram-1ddr
NAME:=MediaTek MT7622 (RAM, 1x DDR3)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_mt7622
endef
define Trusted-Firmware-A/mt7622-ram-2ddr
NAME:=MediaTek MT7622 (RAM, 2x DDR3)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
DDR3_FLYBY:=1
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_mt7622
endef
define Trusted-Firmware-A/mt7622-snand-1ddr
NAME:=MediaTek MT7622 (SPI-NAND, 1x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=snand
endef
define Trusted-Firmware-A/mt7622-snand-ubi-1ddr
NAME:=MediaTek MT7622 (SPI-NAND using UBI, 1x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=snand
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7622-snand-2ddr
NAME:=MediaTek MT7622 (SPI-NAND, 2x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=snand
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-snand-ubi-2ddr
NAME:=MediaTek MT7622 (SPI-NAND using UBI, 2x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=snand
DDR3_FLYBY:=1
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7622-emmc-1ddr
NAME:=MediaTek MT7622 (eMMC, 1x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=emmc
endef
define Trusted-Firmware-A/mt7622-emmc-2ddr
NAME:=MediaTek MT7622 (eMMC, 2x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=emmc
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-sdmmc-1ddr
NAME:=MediaTek MT7622 (SD card, 1x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=sdmmc
endef
define Trusted-Firmware-A/mt7622-sdmmc-2ddr
NAME:=MediaTek MT7622 (SD card, 2x DDR3)
BUILD_SUBTARGET:=mt7622
PLAT:=mt7622
BOOT_DEVICE:=sdmmc
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7981-ram-ddr4
NAME:=MediaTek MT7981 (RAM, DDR4)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr4
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_filogic
endef
define Trusted-Firmware-A/mt7981-emmc-ddr4
NAME:=MediaTek MT7981 (eMMC, DDR4)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7981-spim-nand-ddr4
NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7981-nor-ddr3
NAME:=MediaTek MT7981 (SPI-NOR, DDR3)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7981-ram-ddr3
NAME:=MediaTek MT7981 (RAM, DDR3)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_filogic
endef
define Trusted-Firmware-A/mt7981-nor-ddr4
NAME:=MediaTek MT7981 (SPI-NOR, DDR4)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7981-emmc-ddr3
NAME:=MediaTek MT7981 (eMMC, DDR3)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7981-sdmmc-ddr3
NAME:=MediaTek MT7981 (SD card, DDR3)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7981-snand-ddr3
NAME:=MediaTek MT7981 (SPI-NAND via SNFI, DDR3)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7981-spim-nand-ddr3
NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR3)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-ram-ddr4
NAME:=MediaTek MT7986 (RAM, DDR4)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_filogic
endef
define Trusted-Firmware-A/mt7981-spim-nand-ubi-ddr4
NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7981
DDR_TYPE:=ddr4
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7986-nor-ddr4
NAME:=MediaTek MT7986 (SPI-NOR, DDR4)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7986-emmc-ddr4
NAME:=MediaTek MT7986 (eMMC, DDR4)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7986-sdmmc-ddr4
NAME:=MediaTek MT7986 (SD card, DDR4)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7986-snand-ddr4
NAME:=MediaTek MT7986 (SPI-NAND via SNFI, DDR4)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7986-spim-nand-ddr4
NAME:=MediaTek MT7986 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
NAND_TYPE:=spim:2k+64
endef
define Trusted-Firmware-A/mt7986-spim-nand-ubi-ddr4
NAME:=MediaTek MT7986 (SPI-NAND via SPIM using UBI, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
NAND_TYPE:=spim:2k+64
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7986-spim-nand-4k-ddr4
NAME:=MediaTek MT7986 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr4
NAND_TYPE:=spim:4k+256
endef
define Trusted-Firmware-A/mt7986-ram-ddr3
NAME:=MediaTek MT7986 (RAM, DDR3)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_filogic
endef
define Trusted-Firmware-A/mt7986-nor-ddr3
NAME:=MediaTek MT7986 (SPI-NOR, DDR3)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-emmc-ddr3
NAME:=MediaTek MT7986 (eMMC, DDR3)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-sdmmc-ddr3
NAME:=MediaTek MT7986 (SD card, DDR3)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-snand-ddr3
NAME:=MediaTek MT7986 (SPI-NAND via SNFI, DDR3)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-spim-nand-ddr3
NAME:=MediaTek MT7986 (SPI-NAND via SPIM, DDR3)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7986-spim-nand-ubi-ddr3
NAME:=MediaTek MT7986 (SPI-NAND via SPIM using UBI, DDR3)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7986
DDR_TYPE:=ddr3
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7988-nor-ddr3
NAME:=MediaTek MT7988 (SPI-NOR, DDR3)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-emmc-ddr3
NAME:=MediaTek MT7988 (eMMC, DDR3)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-sdmmc-ddr3
NAME:=MediaTek MT7988 (SD card, DDR3)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-snand-ddr3
NAME:=MediaTek MT7988 (SPI-NAND via SNFI, DDR3)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-spim-nand-ddr3
NAME:=MediaTek MT7988 (SPI-NAND via SPIM, DDR3)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-nor-ddr4
NAME:=MediaTek MT7988 (SPI-NOR, DDR4)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-emmc-ddr4
NAME:=MediaTek MT7988 (eMMC, DDR4)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-sdmmc-ddr4
NAME:=MediaTek MT7988 (SD card, DDR4)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-snand-ddr4
NAME:=MediaTek MT7988 (SPI-NAND via SNFI, DDR4)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-spim-nand-ddr4
NAME:=MediaTek MT7988 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-ram-comb
NAME:=MediaTek MT7988 (RAM)
BOOT_DEVICE:=ram
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
RAM_BOOT_UART_DL:=1
HIDDEN:=
DEFAULT:=TARGET_mediatek_filogic
endef
define Trusted-Firmware-A/mt7988-nor-comb
NAME:=MediaTek MT7988 (SPI-NOR)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-emmc-comb
NAME:=MediaTek MT7988 (eMMC)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-sdmmc-comb
NAME:=MediaTek MT7988 (SD card)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-snand-comb
NAME:=MediaTek MT7988 (SPI-NAND via SNFI)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-snand-ubi-comb
NAME:=MediaTek MT7988 (SPI-NAND via SNFI, UBI)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
USE_UBI:=1
endef
define Trusted-Firmware-A/mt7988-spim-nand-comb
NAME:=MediaTek MT7988 (SPI-NAND via SPIM)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-spim-nand-ubi-comb
NAME:=MediaTek MT7988 (SPI-NAND via SPIM, UBI)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
USE_UBI:=1
endef
TFA_TARGETS:= \
mt7622-nor-1ddr \
mt7622-nor-2ddr \
mt7622-ram-1ddr \
mt7622-ram-2ddr \
mt7622-snand-1ddr \
mt7622-snand-ubi-1ddr \
mt7622-snand-2ddr \
mt7622-snand-ubi-2ddr \
mt7622-emmc-1ddr \
mt7622-emmc-2ddr \
mt7622-sdmmc-1ddr \
mt7622-sdmmc-2ddr \
mt7981-ram-ddr3 \
mt7981-emmc-ddr3 \
mt7981-nor-ddr3 \
mt7981-nor-ddr4 \
mt7981-sdmmc-ddr3 \
mt7981-snand-ddr3 \
mt7981-spim-nand-ddr3 \
mt7981-spim-nand-ubi-ddr4 \
mt7981-ram-ddr4 \
mt7981-emmc-ddr4 \
mt7981-spim-nand-ddr4 \
mt7986-ram-ddr3 \
mt7986-emmc-ddr3 \
mt7986-nor-ddr3 \
mt7986-sdmmc-ddr3 \
mt7986-snand-ddr3 \
mt7986-spim-nand-ddr3 \
mt7986-spim-nand-ubi-ddr3 \
mt7986-ram-ddr4 \
mt7986-emmc-ddr4 \
mt7986-nor-ddr4 \
mt7986-sdmmc-ddr4 \
mt7986-snand-ddr4 \
mt7986-spim-nand-ddr4 \
mt7986-spim-nand-ubi-ddr4 \
mt7986-spim-nand-4k-ddr4 \
mt7988-emmc-ddr3 \
mt7988-nor-ddr3 \
mt7988-sdmmc-ddr3 \
mt7988-snand-ddr3 \
mt7988-spim-nand-ddr3 \
mt7988-emmc-ddr4 \
mt7988-nor-ddr4 \
mt7988-sdmmc-ddr4 \
mt7988-snand-ddr4 \
mt7988-spim-nand-ddr4 \
mt7988-ram-comb \
mt7988-emmc-comb \
mt7988-nor-comb \
mt7988-sdmmc-comb \
mt7988-snand-comb \
mt7988-snand-ubi-comb \
mt7988-spim-nand-comb \
mt7988-spim-nand-ubi-comb
TFA_MAKE_FLAGS += \
BOOT_DEVICE=$(BOOT_DEVICE) \
USE_MKIMAGE=1 MKIMAGE=$(STAGING_DIR_HOST)/bin/mkimage \
$(if $(findstring ddr4,$(DDR_TYPE)),DRAM_USE_DDR4=1) \
$(if $(BOARD_QFN),BOARD_QFN=1,BOARD_BGA=1) \
$(if $(NAND_TYPE),NAND_TYPE=$(NAND_TYPE)) \
HAVE_DRAM_OBJ_FILE=yes \
$(if $(DDR3_FLYBY),DDR3_FLYBY=1) \
$(if $(DRAM_USE_COMB),DRAM_USE_COMB=1) \
$(if $(RAM_BOOT_UART_DL),RAM_BOOT_UART_DL=1) \
$(if $(USE_UBI),UBI=1 $(if $(findstring mt7622,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x80000)) \
$(if $(USE_UBI),UBI=1 $(if $(findstring mt7981,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x100000)) \
$(if $(USE_UBI),UBI=1 $(if $(findstring mt7986,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x200000)) \
$(if $(RAM_BOOT_UART_DL),bl2,all)
define Package/trusted-firmware-a-ram/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl2.bin $(BIN_DIR)/$(BUILD_VARIANT)-bl2.bin
endef
Package/trusted-firmware-a-mt7622-ram-1ddr/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7622-ram-2ddr/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7981-ram-ddr3/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7981-ram-ddr4/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7986-ram-ddr3/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7986-ram-ddr4/install = $(Package/trusted-firmware-a-ram/install)
Package/trusted-firmware-a-mt7988-ram-comb/install = $(Package/trusted-firmware-a-ram/install)
define Package/trusted-firmware-a/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl2.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl2.img
$(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl31.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl31.bin
endef
$(eval $(call BuildPackage/Trusted-Firmware-A))

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@@ -0,0 +1,23 @@
From fb2a2b669ec9bbf5c448d4b56499bc83de075c93 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 29 Feb 2024 18:01:08 +0000
Subject: [PATCH 1/3] mediatek: snfi: FM35Q1GA is x4-only
Dont allow x2 read and cache read operations on FM35Q1GA.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
+++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
@@ -423,7 +423,7 @@ static const struct snand_flash_info sna
SNAND_INFO("FM35Q1GA", SNAND_ID(SNAND_ID_DYMMY, 0xe5, 0x71),
SNAND_MEMORG_1G_2K_64,
- &snand_cap_read_from_cache_x4,
+ &snand_cap_read_from_cache_x4_only,
&snand_cap_program_load_x4),
SNAND_INFO("PN26G01A", SNAND_ID(SNAND_ID_DYMMY, 0xa1, 0xe1),

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@@ -0,0 +1,99 @@
From 6470986f037880ce76960c369d6e5a5270e7ce32 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 10 Mar 2024 15:39:07 +0000
Subject: [PATCH 2/3] mediatek: snfi: adjust pin drive strength for Fidelix
SPI-NAND
It seems like we might need to adjust the pin driver strength to 12mA
for Fidelix SPI-NAND chip on MT7622 to avoid SPI data corruption on
some devices.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../apsoc_common/drivers/snfi/mtk-snand-def.h | 7 +++++
.../apsoc_common/drivers/snfi/mtk-snand-ids.c | 4 ++-
.../apsoc_common/drivers/snfi/mtk-snand.c | 30 +++++++++++++++++++
3 files changed, 40 insertions(+), 1 deletion(-)
--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-def.h
+++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-def.h
@@ -86,6 +86,12 @@ struct snand_mem_org {
typedef int (*snand_select_die_t)(struct mtk_snand *snf, uint32_t dieidx);
+enum snand_drv {
+ SNAND_DRV_NO_CHANGE = 0,
+ SNAND_DRV_8mA = 8,
+ SNAND_DRV_12mA = 12,
+};
+
struct snand_flash_info {
const char *model;
struct snand_id id;
@@ -93,6 +99,7 @@ struct snand_flash_info {
const struct snand_io_cap *cap_rd;
const struct snand_io_cap *cap_pl;
snand_select_die_t select_die;
+ enum snand_drv drv;
};
#define SNAND_INFO(_model, _id, _memorg, _cap_rd, _cap_pl, ...) \
--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
+++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
@@ -424,7 +424,9 @@ static const struct snand_flash_info sna
SNAND_INFO("FM35Q1GA", SNAND_ID(SNAND_ID_DYMMY, 0xe5, 0x71),
SNAND_MEMORG_1G_2K_64,
&snand_cap_read_from_cache_x4_only,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("PN26G01A", SNAND_ID(SNAND_ID_DYMMY, 0xa1, 0xe1),
SNAND_MEMORG_1G_2K_128,
--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand.c
+++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand.c
@@ -1845,6 +1845,33 @@ static int mtk_snand_id_probe(struct mtk
return -EINVAL;
}
+#define MT7622_GPIO_BASE (void *)0x10211000
+#define MT7622_GPIO_DRIV(x) (MT7622_GPIO_BASE + 0x900 + 0x10 * x)
+
+void mtk_mt7622_snand_adjust_drive(void *dev, enum snand_drv drv)
+{
+ uint32_t e4, e8;
+
+ e4 = readl(MT7622_GPIO_DRIV(6)) & ~(0x3f00);
+ e8 = readl(MT7622_GPIO_DRIV(7)) & ~(0x3f00);
+
+ switch (drv) {
+ case SNAND_DRV_8mA:
+ e4 |= 0x3f00;
+ break;
+ case SNAND_DRV_12mA:
+ e8 |= 0x3f00;
+ break;
+ default:
+ return;
+ }
+
+ snand_log_chip(dev, "adjusting SPI-NAND pin drive strength to %umA\n", drv);
+
+ writel(e4, MT7622_GPIO_DRIV(6));
+ writel(e8, MT7622_GPIO_DRIV(7));
+}
+
int mtk_snand_init(void *dev, const struct mtk_snand_platdata *pdata,
struct mtk_snand **psnf)
{
@@ -1888,6 +1915,9 @@ int mtk_snand_init(void *dev, const stru
if (ret)
return ret;
+ if (pdata->soc == SNAND_SOC_MT7622 && snand_info->drv)
+ mtk_mt7622_snand_adjust_drive(dev, snand_info->drv);
+
rawpage_size = snand_info->memorg.pagesize +
snand_info->memorg.sparesize;

View File

@@ -0,0 +1,135 @@
From 40a3661bebb3d738ab95b7de66e9d8382d5b9ab1 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 10 Mar 2024 17:48:09 +0000
Subject: [PATCH 3/3] mediatek: snfi: adjust drive strength to 12mA like old
loader does
In addition to FM35X1GA, also change the driver strength to 12mA for
all chips where this is done by the old/legacy U-Boot:
* Winbond 512Mb
* Winbond 1Gb
* Winbond 2Gb
* GD5F4GQ4UBYIG
* GD5F4GQ4UAYIG
* GD5F1GQ4UX
* GD5F1GQ4UE
* GD5F2GQ4UX
* GD5F2GQ4UE
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../apsoc_common/drivers/snfi/mtk-snand-ids.c | 59 ++++++++++++++-----
1 file changed, 44 insertions(+), 15 deletions(-)
--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
+++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c
@@ -80,65 +80,94 @@ static const struct snand_flash_info sna
SNAND_INFO("W25N512GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x20),
SNAND_MEMORG_512M_2K_64,
&snand_cap_read_from_cache_quad,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("W25N01GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x21),
SNAND_MEMORG_1G_2K_64,
&snand_cap_read_from_cache_quad,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("W25M02GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xab, 0x21),
SNAND_MEMORG_2G_2K_64_2D,
&snand_cap_read_from_cache_quad,
&snand_cap_program_load_x4,
- mtk_snand_winbond_select_die),
+ mtk_snand_winbond_select_die,
+ SNAND_DRV_12mA),
SNAND_INFO("W25N02KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x22),
SNAND_MEMORG_2G_2K_128,
&snand_cap_read_from_cache_quad,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F1GQ4UAWxx", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0x10),
SNAND_MEMORG_1G_2K_64,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F1GQ4UExIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd1),
SNAND_MEMORG_1G_2K_128,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F1GQ4UExxH", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd9),
SNAND_MEMORG_1G_2K_64,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F1GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf1),
SNAND_MEMORG_1G_2K_64,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F2GQ4UExIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd2),
SNAND_MEMORG_2G_2K_128,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F2GQ5UExxH", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0x32),
SNAND_MEMORG_2G_2K_64,
&snand_cap_read_from_cache_quad_a8d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F2GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf2),
SNAND_MEMORG_2G_2K_64,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F4GQ4UBxIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd4),
SNAND_MEMORG_4G_4K_256,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F4GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf4),
SNAND_MEMORG_4G_2K_64,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F2GQ5UExxG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0x52),
SNAND_MEMORG_2G_2K_128,
&snand_cap_read_from_cache_quad_a8d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("GD5F4GQ4UCxIG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0xb4),
SNAND_MEMORG_4G_4K_256,
&snand_cap_read_from_cache_quad_q2d,
- &snand_cap_program_load_x4),
+ &snand_cap_program_load_x4,
+ NULL,
+ SNAND_DRV_12mA),
SNAND_INFO("MX35LF1GE4AB", SNAND_ID(SNAND_ID_DYMMY, 0xc2, 0x12),
SNAND_MEMORG_1G_2K_64,

View File

@@ -0,0 +1,27 @@
From 94802b344195d3574701ca6ab5122f6b7615a6eb Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 11 Aug 2024 23:12:33 +0100
Subject: [PATCH] mediatek: snfi: fix return code when reading
Return 0 on succesful read, which may contain correctable bitflips.
Fixes: #10
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c
+++ b/plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c
@@ -29,8 +29,10 @@ static int snfi_mtd_read_page(struct nan
int ret;
ret = mtk_snand_read_page(snf, addr, (void *)buffer, NULL, false);
- if (ret == -EBADMSG)
+ if (ret > 0) {
+ NOTICE("corrected %d bitflips while reading page %u\n", ret, page);
ret = 0;
+ }
return ret;
}