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This commit is contained in:
domenico
350
package/boot/uboot-rockchip/Makefile
Normal file
350
package/boot/uboot-rockchip/Makefile
Normal file
@@ -0,0 +1,350 @@
|
||||
#
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
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||||
#
|
||||
include $(TOPDIR)/rules.mk
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||||
include $(INCLUDE_DIR)/kernel.mk
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||||
|
||||
PKG_VERSION:=2024.10
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||||
PKG_RELEASE:=1
|
||||
PKG_HASH:=b28daf4ac17e43156363078bf510297584137f6df50fced9b12df34f61a92fb0
|
||||
|
||||
PKG_MAINTAINER:=Sarah Maedel <openwrt@tbspace.de>
|
||||
|
||||
UBOOT_USE_BINMAN:=1
|
||||
UBOOT_USE_INTREE_DTC:=1
|
||||
|
||||
include $(INCLUDE_DIR)/u-boot.mk
|
||||
include $(INCLUDE_DIR)/package.mk
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||||
|
||||
define U-Boot/Default
|
||||
BUILD_TARGET:=rockchip
|
||||
UENV:=default
|
||||
HIDDEN:=1
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||||
endef
|
||||
|
||||
|
||||
# RK3308 boards
|
||||
|
||||
define U-Boot/rk3308/Default
|
||||
BUILD_SUBTARGET:=armv8
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308
|
||||
ATF:=rk3308_bl31_v2.26.elf
|
||||
TPL:=rk3308_ddr_589MHz_uart2_m1_v2.07.bin
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||||
endef
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||||
|
||||
define U-Boot/rock-pi-s-rk3308
|
||||
$(U-Boot/rk3308/Default)
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308-rock-pi-s
|
||||
TPL:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
|
||||
NAME:=ROCK Pi S
|
||||
BUILD_DEVICES:= \
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||||
radxa_rock-pi-s
|
||||
endef
|
||||
|
||||
# RK3328 boards
|
||||
|
||||
define U-Boot/rk3328/Default
|
||||
BUILD_SUBTARGET:=armv8
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||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3328
|
||||
ATF:=rk3328_bl31.elf
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r2c-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=NanoPi R2C
|
||||
BUILD_DEVICES:= \
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||||
friendlyarm_nanopi-r2c
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r2c-plus-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=NanoPi R2C Plus
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r2c-plus
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r2s-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=NanoPi R2S
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r2s
|
||||
endef
|
||||
|
||||
define U-Boot/orangepi-r1-plus-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=Orange Pi R1 Plus
|
||||
BUILD_DEVICES:= \
|
||||
xunlong_orangepi-r1-plus
|
||||
endef
|
||||
|
||||
define U-Boot/orangepi-r1-plus-lts-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=Orange Pi R1 Plus LTS
|
||||
BUILD_DEVICES:= \
|
||||
xunlong_orangepi-r1-plus-lts
|
||||
endef
|
||||
|
||||
define U-Boot/roc-cc-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=ROC-RK3328-CC
|
||||
BUILD_DEVICES:= \
|
||||
firefly_roc-rk3328-cc
|
||||
endef
|
||||
|
||||
define U-Boot/rock64-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=Rock64
|
||||
BUILD_DEVICES:= \
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||||
pine64_rock64
|
||||
endef
|
||||
|
||||
define U-Boot/rock-pi-e-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=ROCK Pi E
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-pi-e
|
||||
endef
|
||||
|
||||
define U-Boot/rock-pi-e-v3-rk3328
|
||||
$(U-Boot/rk3328/Default)
|
||||
NAME:=ROCK Pi E v3.0
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-pi-e-v3
|
||||
endef
|
||||
|
||||
# RK3399 boards
|
||||
|
||||
define U-Boot/rk3399/Default
|
||||
BUILD_SUBTARGET:=armv8
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3399
|
||||
ATF:=rk3399_bl31.elf
|
||||
endef
|
||||
|
||||
define U-Boot/nanopc-t4-rk3399
|
||||
$(U-Boot/rk3399/Default)
|
||||
NAME:=NanoPC T4
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopc-t4
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r4s-rk3399
|
||||
$(U-Boot/rk3399/Default)
|
||||
NAME:=NanoPi R4S
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r4s \
|
||||
friendlyarm_nanopi-r4s-enterprise
|
||||
endef
|
||||
|
||||
define U-Boot/rock-pi-4-rk3399
|
||||
$(U-Boot/rk3399/Default)
|
||||
NAME:=Rock Pi 4
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-pi-4a
|
||||
endef
|
||||
|
||||
define U-Boot/rockpro64-rk3399
|
||||
$(U-Boot/rk3399/Default)
|
||||
NAME:=RockPro64
|
||||
BUILD_DEVICES:= \
|
||||
pine64_rockpro64
|
||||
endef
|
||||
|
||||
|
||||
# RK3566 boards
|
||||
|
||||
define U-Boot/rk3566/Default
|
||||
BUILD_SUBTARGET:=armv8
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3566
|
||||
ATF:=rk3568_bl31_v1.44.elf
|
||||
TPL:=rk3566_ddr_1056MHz_v1.21.bin
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r3s-rk3566
|
||||
$(U-Boot/rk3566/Default)
|
||||
NAME:=NanoPi R3S
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r3s
|
||||
endef
|
||||
|
||||
define U-Boot/radxa-cm3-io-rk3566
|
||||
$(U-Boot/rk3566/Default)
|
||||
NAME:=CM3 IO
|
||||
BUILD_DEVICES:= \
|
||||
radxa_cm3-io
|
||||
endef
|
||||
|
||||
define U-Boot/radxa-zero-3-rk3566
|
||||
$(U-Boot/rk3566/Default)
|
||||
NAME:=ZERO 3E/3W
|
||||
BUILD_DEVICES:= \
|
||||
radxa_zero-3e \
|
||||
radxa_zero-3w
|
||||
endef
|
||||
|
||||
define U-Boot/rock-3c-rk3566
|
||||
$(U-Boot/rk3566/Default)
|
||||
NAME:=ROCK 3C
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-3c
|
||||
endef
|
||||
|
||||
# RK3568 boards
|
||||
|
||||
define U-Boot/rk3568/Default
|
||||
BUILD_SUBTARGET:=armv8
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3568
|
||||
ATF:=rk3568_bl31_v1.44.elf
|
||||
TPL:=rk3568_ddr_1560MHz_v1.21.bin
|
||||
endef
|
||||
|
||||
define U-Boot/bpi-r2-pro-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
NAME:=Bananapi-R2 Pro
|
||||
BUILD_DEVICES:= \
|
||||
sinovoip_bpi-r2-pro
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r5c-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
NAME:=NanoPi R5C
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r5c
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r5s-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
NAME:=NanoPi R5S
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r5s
|
||||
endef
|
||||
|
||||
define U-Boot/radxa-e25-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3568-e25
|
||||
TPL:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
|
||||
NAME:=E25
|
||||
BUILD_DEVICES:= \
|
||||
radxa_e25
|
||||
endef
|
||||
|
||||
define U-Boot/rock-3a-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
NAME:=ROCK 3A
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-3a
|
||||
endef
|
||||
|
||||
define U-Boot/rock-3b-rk3568
|
||||
$(U-Boot/rk3568/Default)
|
||||
NAME:=ROCK 3B
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-3b
|
||||
endef
|
||||
|
||||
|
||||
# RK3588 boards
|
||||
|
||||
define U-Boot/rk3588/Default
|
||||
BUILD_SUBTARGET:=armv8
|
||||
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3588
|
||||
ATF:=rk3588_bl31_v1.45.elf
|
||||
TPL:=rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
|
||||
endef
|
||||
|
||||
define U-Boot/nanopc-t6-rk3588
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=NanoPC T6
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopc-t6
|
||||
endef
|
||||
|
||||
define U-Boot/rock5b-rk3588
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=ROCK 5B
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-5b
|
||||
endef
|
||||
|
||||
define U-Boot/sige7-rk3588
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=Sige7
|
||||
BUILD_DEVICES:= \
|
||||
armsom_sige7
|
||||
endef
|
||||
|
||||
|
||||
# RK3588S boards
|
||||
|
||||
define U-Boot/nanopi-r6c-rk3588s
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=NanoPi R6C
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r6c
|
||||
endef
|
||||
|
||||
define U-Boot/nanopi-r6s-rk3588s
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=NanoPi R6S
|
||||
BUILD_DEVICES:= \
|
||||
friendlyarm_nanopi-r6s
|
||||
endef
|
||||
|
||||
define U-Boot/rock5a-rk3588s
|
||||
$(U-Boot/rk3588/Default)
|
||||
NAME:=ROCK 5A
|
||||
BUILD_DEVICES:= \
|
||||
radxa_rock-5a
|
||||
endef
|
||||
|
||||
UBOOT_TARGETS := \
|
||||
nanopc-t4-rk3399 \
|
||||
nanopi-r4s-rk3399 \
|
||||
rock-pi-4-rk3399 \
|
||||
rockpro64-rk3399 \
|
||||
rock-pi-s-rk3308 \
|
||||
nanopi-r2c-rk3328 \
|
||||
nanopi-r2c-plus-rk3328 \
|
||||
nanopi-r2s-rk3328 \
|
||||
orangepi-r1-plus-rk3328 \
|
||||
orangepi-r1-plus-lts-rk3328 \
|
||||
roc-cc-rk3328 \
|
||||
rock64-rk3328 \
|
||||
rock-pi-e-rk3328 \
|
||||
rock-pi-e-v3-rk3328 \
|
||||
nanopi-r3s-rk3566 \
|
||||
radxa-cm3-io-rk3566 \
|
||||
radxa-zero-3-rk3566 \
|
||||
rock-3c-rk3566 \
|
||||
bpi-r2-pro-rk3568 \
|
||||
nanopi-r5c-rk3568 \
|
||||
nanopi-r5s-rk3568 \
|
||||
radxa-e25-rk3568 \
|
||||
rock-3a-rk3568 \
|
||||
rock-3b-rk3568 \
|
||||
nanopc-t6-rk3588 \
|
||||
rock5b-rk3588 \
|
||||
sige7-rk3588 \
|
||||
nanopi-r6c-rk3588s \
|
||||
nanopi-r6s-rk3588s \
|
||||
rock5a-rk3588s
|
||||
|
||||
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
|
||||
|
||||
UBOOT_CUSTOMIZE_CONFIG := \
|
||||
--disable TOOLS_MKEFICAPSULE \
|
||||
--set-str MKIMAGE_DTC_PATH $(PKG_BUILD_DIR)/scripts/dtc/dtc
|
||||
|
||||
UBOOT_MAKE_FLAGS += \
|
||||
BL31=$(STAGING_DIR_IMAGE)/$(ATF) \
|
||||
$(if $(TPL),ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(TPL))
|
||||
|
||||
define Build/InstallDev
|
||||
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
|
||||
$(CP) $(PKG_BUILD_DIR)/u-boot-rockchip.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot-rockchip.bin
|
||||
endef
|
||||
|
||||
define Package/u-boot/install/default
|
||||
endef
|
||||
|
||||
$(eval $(call BuildPackage/U-Boot))
|
||||
@@ -0,0 +1,661 @@
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3566-nanopi-r3s-u-boot.dtsi
|
||||
@@ -0,0 +1,25 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
+/*
|
||||
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
|
||||
+ * (http://www.friendlyelec.com)
|
||||
+ *
|
||||
+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
|
||||
+ *
|
||||
+ * Copyright (c) 2024 Kevin Zhang <kevin@kevinzhang.me>
|
||||
+ */
|
||||
+
|
||||
+#include "rk356x-u-boot.dtsi"
|
||||
+
|
||||
+&sdhci {
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ mmc-hs400-1_8v;
|
||||
+ mmc-hs400-enhanced-strobe;
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+};
|
||||
+
|
||||
+&vcc5v0_usb {
|
||||
+ /delete-property/ regulator-always-on;
|
||||
+ /delete-property/ regulator-boot-on;
|
||||
+};
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/configs/nanopi-r3s-rk3566_defconfig
|
||||
@@ -0,0 +1,73 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
|
||||
+CONFIG_COUNTER_FREQUENCY=24000000
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3566-nanopi-r3s"
|
||||
+CONFIG_ROCKCHIP_RK3568=y
|
||||
+CONFIG_TARGET_NANOPI_R3S_RK3566=y
|
||||
+# CONFIG_OF_UPSTREAM is not set
|
||||
+CONFIG_SPL_SERIAL=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_SYS_LOAD_ADDR=0xc00800
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_FIT=y
|
||||
+CONFIG_FIT_VERBOSE=y
|
||||
+CONFIG_SPL_FIT_SIGNATURE=y
|
||||
+CONFIG_SPL_LOAD_FIT=y
|
||||
+CONFIG_LEGACY_IMAGE_FORMAT=y
|
||||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-nanopi-r3s.dtb"
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_SPL_MAX_SIZE=0x40000
|
||||
+CONFIG_SPL_PAD_TO=0x7f8000
|
||||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
+CONFIG_SPL_ATF=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_PCI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_PMIC=y
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_OF_LIVE=y
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
+CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_MMC_SDHCI=y
|
||||
+CONFIG_MMC_SDHCI_SDMA=y
|
||||
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DWC_ETH_QOS=y
|
||||
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
|
||||
+CONFIG_RTL8169=y
|
||||
+CONFIG_PCIE_DW_ROCKCHIP=y
|
||||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_PMIC_RK8XX=y
|
||||
+CONFIG_REGULATOR_RK8XX=y
|
||||
+CONFIG_PWM_ROCKCHIP=y
|
||||
+CONFIG_SPL_RAM=y
|
||||
+CONFIG_BAUDRATE=1500000
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYS_NS16550_MEM32=y
|
||||
+CONFIG_SYSRESET=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+CONFIG_USB_DWC3_GENERIC=y
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3566-nanopi-r3s.dts
|
||||
@@ -0,0 +1,554 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
+/*
|
||||
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
||||
+ *
|
||||
+ * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
|
||||
+ * (http://www.friendlyelec.com)
|
||||
+ *
|
||||
+ * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+#include <dt-bindings/pinctrl/rockchip.h>
|
||||
+#include <dt-bindings/soc/rockchip,vop2.h>
|
||||
+#include "rk3566.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "FriendlyElec NanoPi R3S";
|
||||
+ compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &gmac1;
|
||||
+ mmc0 = &sdhci;
|
||||
+ mmc1 = &sdmmc0;
|
||||
+ };
|
||||
+
|
||||
+ chosen: chosen {
|
||||
+ stdout-path = "serial2:1500000n8";
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&reset_button_pin>;
|
||||
+
|
||||
+ button-reset {
|
||||
+ label = "reset";
|
||||
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ debounce-interval = <50>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led_pin>, <&lan_led_pin>, <&wan_led_pin>;
|
||||
+
|
||||
+ power_led: led-0 {
|
||||
+ color = <LED_COLOR_ID_RED>;
|
||||
+ function = LED_FUNCTION_POWER;
|
||||
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+
|
||||
+ lan_led: led-1 {
|
||||
+ color = <LED_COLOR_ID_GREEN>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ wan_led: led-2 {
|
||||
+ color = <LED_COLOR_ID_GREEN>;
|
||||
+ function = LED_FUNCTION_WAN;
|
||||
+ gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sys: regulator-vcc3v3-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_sys: regulator-vcc5v0-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vdd_usbc>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb: regulator-vcc5v0_usb {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
|
||||
+ regulator-name = "vcc5v0_usb";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_usbc: regulator-vdd-usbc {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vdd_usbc";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&combphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&combphy2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&gmac1 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
||||
+ assigned-clock-rates = <0>, <125000000>;
|
||||
+ clock_in_out = "output";
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1m0_miim
|
||||
+ &gmac1m0_tx_bus2_level3
|
||||
+ &gmac1m0_rx_bus2
|
||||
+ &gmac1m0_rgmii_clk_level2
|
||||
+ &gmac1m0_rgmii_bus_level3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_cpu: regulator@1c {
|
||||
+ compatible = "tcs,tcs4525";
|
||||
+ reg = <0x1c>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rk809: pmic@20 {
|
||||
+ compatible = "rockchip,rk809";
|
||||
+ reg = <0x20>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int>;
|
||||
+ system-power-controller;
|
||||
+ vcc1-supply = <&vcc3v3_sys>;
|
||||
+ vcc2-supply = <&vcc3v3_sys>;
|
||||
+ vcc3-supply = <&vcc3v3_sys>;
|
||||
+ vcc4-supply = <&vcc3v3_sys>;
|
||||
+ vcc5-supply = <&vcc3v3_sys>;
|
||||
+ vcc6-supply = <&vcc3v3_sys>;
|
||||
+ vcc7-supply = <&vcc3v3_sys>;
|
||||
+ vcc8-supply = <&vcc3v3_sys>;
|
||||
+ vcc9-supply = <&vcc3v3_sys>;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-min-microvolt = <950000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG8 {
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ hym8563: rtc@51 {
|
||||
+ compatible = "haoyu,hym8563";
|
||||
+ reg = <0x51>;
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-output-names = "hym8563";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hym8563_int>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ interrupt-parent = <&gpio4>;
|
||||
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <ð_phy_reset_pin>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie2x1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_reset_h>;
|
||||
+ reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ gpio-leds {
|
||||
+ lan_led_pin: lan-led-pin {
|
||||
+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ power_led_pin: power-led-pin {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wan_led_pin: wan-led-pin {
|
||||
+ rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gmac {
|
||||
+ eth_phy_reset_pin: eth-phy-reset-pin {
|
||||
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie_reset_h: pcie-reset-h {
|
||||
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic-int {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rockchip-key {
|
||||
+ reset_button_pin: reset-button-pin {
|
||||
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rtc {
|
||||
+ hym8563_int: hym8563-int {
|
||||
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_usb_host_en: vcc5v0-usb-host-en {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_3v3>;
|
||||
+ vccio5-supply = <&vcc_1v8>;
|
||||
+ vccio6-supply = <&vcc_3v3>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ no-sdio;
|
||||
+ no-mmc;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ sd-uhs-sdr50;
|
||||
+ vmmc-supply = <&vcc3v3_sd>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ phy-supply = <&vcc5v0_usb>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ extcon = <&usb2phy0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
@@ -0,0 +1,22 @@
|
||||
From 445502bc21ecf1b5120faee785cea578b810c759 Mon Sep 17 00:00:00 2001
|
||||
From: Lu jicong <jiconglu58@gmail.com>
|
||||
Date: Wed, 5 Jul 2023 17:13:55 +0800
|
||||
Subject: [PATCH] rockchip: rk3399: nanopc-t4: use 1600MHz sdram config
|
||||
|
||||
Current 1866MHz sdram config is too high for NanoPC-T4.
|
||||
On this frequency, its lpddr3 sdram becomes unstable,
|
||||
causing memtest failures and random kernel crashes.
|
||||
|
||||
Signed-off-by: Lu jicong <jiconglu58@gmail.com>
|
||||
---
|
||||
arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
|
||||
@@ -4,4 +4,4 @@
|
||||
*/
|
||||
|
||||
#include "rk3399-nanopi4-u-boot.dtsi"
|
||||
-#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
|
||||
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
|
||||
Reference in New Issue
Block a user