Initial commit
Some checks failed
Build Kernel / Build all affected Kernels (push) Has been cancelled
Build all core packages / Build all core packages for selected target (push) Has been cancelled
Build and Push prebuilt tools container / Build and Push all prebuilt containers (push) Has been cancelled
Build Toolchains / Build Toolchains for each target (push) Has been cancelled
Build host tools / Build host tools for linux and macos based systems (push) Has been cancelled
Coverity scan build / Coverity x86/64 build (push) Has been cancelled

This commit is contained in:
domenico
2025-06-24 14:35:53 +02:00
commit c06fb25d1f
9263 changed files with 1750214 additions and 0 deletions

View File

@@ -0,0 +1,68 @@
Disable the valgrind helpers which use MIPS floating point operations
when floating point support is deactivated in the toolchain.
The fix from this commit is not sufficient any more:
https://sourceware.org/git/?p=valgrind.git;a=commitdiff;h=869fcf2f6739f17b4eff36ec68f8dca826c8afeb
This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
---------------------------------------------------------
../VEX/priv/guest_mips_helpers.c: In function 'mips_dirtyhelper_calculate_FCSR_fp32':
../VEX/priv/guest_mips_helpers.c:640:10: error: the register '$f21' cannot be clobbered in 'asm' for the current target
640 | ASM_VOLATILE_UNARY32_DOUBLE(round.w.d)
| ^
---------------------------------------------------------
--- a/VEX/priv/guest_mips_helpers.c
+++ b/VEX/priv/guest_mips_helpers.c
@@ -620,6 +620,7 @@ extern UInt mips_dirtyhelper_calculate_F
flt_op inst )
{
UInt ret = 0;
+#ifndef __mips_soft_float
#if defined(__mips__)
VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
@@ -702,6 +703,7 @@ extern UInt mips_dirtyhelper_calculate_F
break;
}
#endif
+#endif
return ret;
}
@@ -711,6 +713,7 @@ extern UInt mips_dirtyhelper_calculate_F
flt_op inst )
{
UInt ret = 0;
+#ifndef __mips_soft_float
#if defined(__mips__) && ((__mips == 64) || \
(defined(__mips_isa_rev) && (__mips_isa_rev >= 2)))
#if defined(VGA_mips32)
@@ -863,6 +866,7 @@ extern UInt mips_dirtyhelper_calculate_F
break;
}
#endif
+#endif
return ret;
}
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -2119,6 +2119,7 @@ Bool VG_(machine_get_hwcaps)( void )
we are using alternative way to determine FP mode */
ULong result = 0;
+#ifndef __mips_soft_float
if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
__asm__ volatile (
".set push\n\t"
@@ -2136,6 +2137,9 @@ Bool VG_(machine_get_hwcaps)( void )
fpmode = (result != 0x3FF0000000000000ull);
}
+#else
+ fpmode = 0;
+#endif
}
if (fpmode != 0)