Initial commit
Some checks failed
Build Kernel / Build all affected Kernels (push) Has been cancelled
Build all core packages / Build all core packages for selected target (push) Has been cancelled
Build and Push prebuilt tools container / Build and Push all prebuilt containers (push) Has been cancelled
Build Toolchains / Build Toolchains for each target (push) Has been cancelled
Build host tools / Build host tools for linux and macos based systems (push) Has been cancelled
Coverity scan build / Coverity x86/64 build (push) Has been cancelled
Some checks failed
Build Kernel / Build all affected Kernels (push) Has been cancelled
Build all core packages / Build all core packages for selected target (push) Has been cancelled
Build and Push prebuilt tools container / Build and Push all prebuilt containers (push) Has been cancelled
Build Toolchains / Build Toolchains for each target (push) Has been cancelled
Build host tools / Build host tools for linux and macos based systems (push) Has been cancelled
Coverity scan build / Coverity x86/64 build (push) Has been cancelled
This commit is contained in:
@@ -0,0 +1,58 @@
|
||||
From 4178828dd4a72d6cc4ec0572fef4efa23e82869e Mon Sep 17 00:00:00 2001
|
||||
From: popcornmix <popcornmix@gmail.com>
|
||||
Date: Tue, 3 Sep 2019 20:28:00 +0100
|
||||
Subject: [PATCH 0052/1085] clk-bcm2835: Disable v3d clock
|
||||
|
||||
This is controlled by firmware, see clk-raspberrypi.c
|
||||
|
||||
Signed-off-by: popcornmix <popcornmix@gmail.com>
|
||||
---
|
||||
drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------
|
||||
1 file changed, 12 insertions(+), 18 deletions(-)
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -1764,16 +1764,12 @@ static const struct bcm2835_clk_desc clk
|
||||
.hold_mask = CM_PLLA_HOLDCORE,
|
||||
.fixed_divider = 1,
|
||||
.flags = CLK_SET_RATE_PARENT),
|
||||
- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
|
||||
- SOC_ALL,
|
||||
- .name = "plla_per",
|
||||
- .source_pll = "plla",
|
||||
- .cm_reg = CM_PLLA,
|
||||
- .a2w_reg = A2W_PLLA_PER,
|
||||
- .load_mask = CM_PLLA_LOADPER,
|
||||
- .hold_mask = CM_PLLA_HOLDPER,
|
||||
- .fixed_divider = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT),
|
||||
+
|
||||
+ /*
|
||||
+ * PLLA_PER is used for gpu clocks. Controlled by firmware, see
|
||||
+ * clk-raspberrypi.c.
|
||||
+ */
|
||||
+
|
||||
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
|
||||
SOC_ALL,
|
||||
.name = "plla_dsi0",
|
||||
@@ -2074,14 +2070,12 @@ static const struct bcm2835_clk_desc clk
|
||||
.int_bits = 6,
|
||||
.frac_bits = 0,
|
||||
.tcnt_mux = 3),
|
||||
- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
|
||||
- SOC_ALL,
|
||||
- .name = "v3d",
|
||||
- .ctl_reg = CM_V3DCTL,
|
||||
- .div_reg = CM_V3DDIV,
|
||||
- .int_bits = 4,
|
||||
- .frac_bits = 8,
|
||||
- .tcnt_mux = 4),
|
||||
+
|
||||
+ /*
|
||||
+ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see
|
||||
+ * clk-raspberrypi.c.
|
||||
+ */
|
||||
+
|
||||
/*
|
||||
* VPU clock. This doesn't have an enable bit, since it drives
|
||||
* the bus for everything else, and is special so it doesn't need
|
||||
Reference in New Issue
Block a user