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400
target/linux/mediatek/dts/mt7986a-acer-w6-common.dtsi
Normal file
400
target/linux/mediatek/dts/mt7986a-acer-w6-common.dtsi
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@@ -0,0 +1,400 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7986a.dtsi"
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/ {
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "dm-mod.create=\"acer,,,ro,0 1 zero 1 0 0 0\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
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};
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memory@0 {
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reg = <0 0x40000000 0 0x20000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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factory {
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label = "factory";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&watchdog {
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status = "okay";
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};
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&pio {
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mmc0_pins_default: mmc0-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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pcie_pins: pcie-pins {
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mux {
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function = "pcie";
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groups = "pcie_pereset";
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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wf_dbdc_pins: wf-dbdc-pins {
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mux {
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function = "wifi";
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groups = "wf_dbdc";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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i2c_pins: i2c-pins {
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mux {
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function = "i2c";
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groups = "i2c";
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};
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};
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};
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&trng {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins>;
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status = "okay";
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <0x08>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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hs400-ds-delay = <0x14014>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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no-sd;
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no-sdio;
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#address-cells = <1>;
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#size-cells = <0>;
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card@0 {
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compatible = "mmc-card";
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reg = <0>;
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block {
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compatible = "block-device";
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partitions {
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block-partition-factory {
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partname = "factory";
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nvmem: nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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};
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};
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};
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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slot0: pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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#address-cells = <0x03>;
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#size-cells = <0x02>;
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};
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};
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&pcie_phy {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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swport0: port@0 {
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reg = <0>;
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phy-handle = <&swphy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&swphy1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&swphy2>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-handle = <&swphy3>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy0: phy@0 {
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reg = <0>;
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mediatek,led-config = <
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0x21 0x8008 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0003 /* LED0_BLINK_CTRL */
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0x26 0xc006 /* LED1_ON_CTRL */
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0x27 0x003c /* LED1_BLINK_CTRL */
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>;
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};
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swphy1: phy@1 {
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reg = <1>;
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mediatek,led-config = <
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0x21 0x8008 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0003 /* LED0_BLINK_CTRL */
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0x26 0xc006 /* LED1_ON_CTRL */
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0x27 0x003c /* LED1_BLINK_CTRL */
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>;
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};
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swphy2: phy@2 {
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reg = <2>;
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mediatek,led-config = <
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0x21 0x8008 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0003 /* LED0_BLINK_CTRL */
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0x26 0xc006 /* LED1_ON_CTRL */
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0x27 0x003c /* LED1_BLINK_CTRL */
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>;
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};
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swphy3: phy@3 {
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reg = <3>;
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mediatek,led-config = <
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0x21 0x8008 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0003 /* LED0_BLINK_CTRL */
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0x26 0xc006 /* LED1_ON_CTRL */
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0x27 0x003c /* LED1_BLINK_CTRL */
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>;
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};
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};
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};
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};
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};
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&wifi {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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pinctrl-names = "default", "dbdc";
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pinctrl-0 = <&wf_2g_5g_pins>;
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pinctrl-1 = <&wf_dbdc_pins>;
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status = "okay";
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};
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